1 /* $NetBSD: isadmareg.h,v 1.8 2008/04/28 20:23:52 martin Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #ifndef _DEV_ISA_ISADMAREG_H_ 34 #define _DEV_ISA_ISADMAREG_H_ 35 36 #include <dev/ic/i8237reg.h> 37 38 /* 39 * By default, ISA DMA controllers can do 64k or 128k transfers, depending 40 * on the width of the channel being used. However, this may be modified 41 * by our parent based on bus constraints, etc. Clients of ISA DMA should 42 * query the ISA DMA to determine the maximum transfer size allowed. 43 */ 44 #define ISA_DMA_MAXSIZE_8BIT (64 * 1024) 45 #define ISA_DMA_MAXSIZE_16BIT (ISA_DMA_MAXSIZE_8BIT * 2) 46 47 #define ISA_DMA_MAXSIZE_DEFAULT(chan) \ 48 (((chan) & 4) ? ISA_DMA_MAXSIZE_16BIT : ISA_DMA_MAXSIZE_8BIT) 49 50 /* 51 * Register definitions for DMA controller 1 (channels 0..3): 52 */ 53 #define DMA1_CHN(c) (1*(2*(c))) /* addr reg for channel c */ 54 #define DMA1_SR (1*8) /* status register */ 55 #define DMA1_SMSK (1*10) /* single mask register */ 56 #define DMA1_MODE (1*11) /* mode register */ 57 #define DMA1_FFC (1*12) /* clear first/last FF */ 58 #define DMA1_MASK (1*15) /* mask register */ 59 60 #define DMA1_IOSIZE (1*16) 61 62 /* 63 * Register definitions for DMA controller 2 (channels 4..7): 64 */ 65 #define DMA2_CHN(c) (2*(2*(c))) /* addr reg for channel c */ 66 #define DMA2_SR (2*8) /* status register */ 67 #define DMA2_SMSK (2*10) /* single mask register */ 68 #define DMA2_MODE (2*11) /* mode register */ 69 #define DMA2_FFC (2*12) /* clear first/last FF */ 70 #define DMA2_MASK (2*15) /* mask register */ 71 72 #define DMA2_IOSIZE (2*16) 73 74 #endif /* _DEV_ISA_ISADMAREG_H_ */ 75