xref: /netbsd/sys/dev/mii/glxtphyreg.h (revision bf9ec67e)
1 /*	$NetBSD: glxtphyreg.h,v 1.1 2001/07/12 21:54:40 thorpej Exp $	*/
2 
3 /*-
4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *	This product includes software developed by the NetBSD
21  *	Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 #ifndef _DEV_MII_GLXTPHYREG_H_
40 #define	_DEV_MII_GLXTPHYREG_H_
41 
42 /*
43  * LXT-1000 registers.
44  */
45 
46 #define	MII_GLXTPHY_PCR		0x10	/* port configuration register */
47 #define	PCR_TX_DIS		(1U << 13)  /* transmit disable */
48 #define	PCR_BYP_SCR		(1U << 12)  /* bypass scrambler */
49 #define	PCR_BYP_4B5B		(1U << 11)  /* bypass 4b/5b encoder */
50 #define	PCR_JAB_DIS		(1U << 10)  /* disable jabber */
51 #define	PCR_SQE			(1U << 9)   /* enable heartbeat */
52 #define	PCR_TP_LOOPBACK		(1U << 8)   /* disable TP loopback */
53 #define	PCR_SMART_SPEED		(1U << 7)   /* enable SmartSpeed */
54 #define	PCR_PRE_EN		(1U << 5)   /* preamble enable */
55 #define	PCR_10_SERIAL		(1U << 3)   /* 10Mb/s serial mode */
56 #define	PCR_AN_ISOLATE		(1U << 2)   /* autoneg. isolate */
57 #define	PCR_TBI			(1U << 1)   /* use ten-bit interface */
58 
59 #define	MII_GLXTPHY_QSR		0x11	/* quick status register */
60 #define	QSR_SPEED_get(x)	(((x) >> 14) & 0x3)
61 #define	QSR_TX_STATUS		(1U << 13)  /* transmit active */
62 #define	QSR_RX_STATUS		(1U << 12)  /* receive active */
63 #define	QSR_COL_STATUS		(1U << 11)  /* collision active */
64 #define	QSR_LINK		(1U << 10)  /* link up */
65 #define	QSR_DUPLEX		(1U << 9)   /* full-duplex */
66 #define	QSR_AN			(1U << 8)   /* autoneg. enabled */
67 #define	QSR_ACOMP		(1U << 7)   /* autoneg. complete */
68 #define	QSR_LINE_LENGTH_get(x)	(((x) >> 4) & 0x7)
69 #define	QSR_PAUSE		(1U << 3)   /* partner can pause */
70 #define	QSR_APAUSE		(1U << 2)   /* partner can asym-pause */
71 #define	QSR_EVENT		(1U << 0)   /* event has occurred */
72 
73 #define	SPEED_10_SERIAL		0
74 #define	SPEED_10_MII		1
75 #define	SPEED_100		2
76 #define	SPEED_1000		3
77 
78 #define	MII_GLXT_IER		0x12	/* interrupt enable register */
79 #define	IER_AN_FAULT		(1U << 13)  /* autoneg fault */
80 #define	IER_CROSS		(1U << 11)  /* crossover MDIX */
81 #define	IER_POLARITY		(1U << 10)  /* polarity change */
82 #define	IER_SMRT		(1U << 9)   /* SmartSpeed event */
83 #define	IER_CNTR		(1U << 8)   /* counter full */
84 #define	IER_AN			(1U << 7)   /* autoneg complete */
85 #define	IER_SPEED		(1U << 6)   /* speed change */
86 #define	IER_DUPLEX		(1U << 5)   /* duplex change */
87 #define	IER_LINK		(1U << 4)   /* link change */
88 #define	IER_INTEN		(1U << 1)   /* enable interrupts */
89 #define	IER_TINT		(1U << 0)   /* force interrupt */
90 
91 #define	MII_GLXT_ISR		0x13	/* interrupt status register */
92 	/* See IER bits. */
93 
94 #define	MII_GLXT_LEDCFG		0x14	/* LED configuration register */
95 #define	LEDCFG_LEDC(x)		((x) << 14) /* collision */
96 #define	LEDCFG_LEDR(x)		((x) << 12) /* receive */
97 #define	LEDCFG_LEDT(x)		((x) << 10) /* transmit */
98 #define	LEDCFG_LEDG(x)		((x) << 8)  /* gigabit */
99 #define	LEDCFG_LEDS(x)		((x) << 6)  /* speed */
100 #define	LEDCFG_LEDL(x)		((x) << 4)  /* link */
101 #define	LEDCFG_LEDF(x)		((x) << 2)  /* full-duplex */
102 #define	LEDCFG_PULSESTRETCH	(1U << 1)
103 #define	LEDCFG_LEDFREQ		(1U << 0)
104 
105 #define	LED_MODE_INDICATION	0	    /* indicate LED's event */
106 #define	LED_MODE_BLINK		1	    /* blink */
107 #define	LED_MODE_ON		2	    /* force on */
108 #define	LED_MODE_OFF		3	    /* force off */
109 
110 #define	MII_GLXT_PORTCR		0x15	/* port control register */
111 #define	PORTCR_TX_TCLK		(1U << 15)  /* enable TX_TCLK */
112 #define	PORTCR_ALT_NP		(1U << 13)  /* alternet next-page feature */
113 
114 #endif /* _DEV_MII_GLXTPHYREG_H_ */
115