1 /* $NetBSD: gphyterreg.h,v 1.1 2001/05/31 16:06:58 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #ifndef _DEV_MII_GPHYTERREG_H_ 40 #define _DEV_MII_GPHYTERREG_H_ 41 42 /* 43 * DP83861 registers. 44 */ 45 46 /* 47 * A quick node about "non-compliant mode": When set to 1, the 48 * DP83861 will auto-negotiate with both BCM5400 PHYs before rev. 49 * C5 and 802.3ab compliant PHYs. When set to 0, it will auto- 50 * negotiate *only* with 802.3ab compliant PHYs. We can change 51 * the setting, but the default comes from a strapping pin. 52 */ 53 54 #define MII_GPHYTER_STRAP 0x10 /* strap options */ 55 #define STRAP_PHYADDR 0xf800 /* PHY address (ro) */ 56 #define STRAP_NC_MODE 0x0400 /* non-compliant mode (rw) */ 57 #define STRAP_MAN_MS_ENABLE 0x0200 /* manual master/slave enable (ro) */ 58 #define STRAP_AN_ENABLE 0x0100 /* auto-negotiation enable (ro) */ 59 #define STRAP_MS_VAL 0x0080 /* 1 = master, 0 = slave */ 60 #define STRAP_ADV_1000HDX 0x0010 /* adv. 1000T-HDX */ 61 #define STRAP_ADV_1000FDX 0x0008 /* adv. 1000T-FDX */ 62 #define STRAP_ADV_100 0x0004 /* adv. 100TX-HDX and 100TX-FDX */ 63 #define STRAP_SPEED1 0x0002 /* speed bit 1 */ 64 #define STRAP_SPEED0 0x0001 /* speed bit 0 */ 65 66 67 #define MII_GPHYTER_PHY_SUP 0x11 /* PHY support */ 68 #define PHY_SUP_SPEED1 0x0010 /* speed bit 1 */ 69 #define PHY_SUP_SPEED0 0x0008 /* speed bit 0 */ 70 #define PHY_SUP_LINK 0x0004 /* 1 == link */ 71 #define PHY_SUP_DUPLEX 0x0002 /* 1 == full-duplex */ 72 #define PHY_SUP_10baseT 0x0001 /* 10baseT resolved */ 73 74 75 #define MII_GPHYTER_MDIX_SEL 0x15 /* MIDX select */ 76 #define MIDX_SEL_CROSSOVER 0x0001 /* 1 == cross-over A-B */ 77 78 79 #define MII_GPHYTER_EX_MEM 0x16 /* expanded memory access */ 80 #define EX_MEM_RE_TIME 0x0008 /* Re-time to MDC */ 81 #define EX_MEM_ACCESS 0x0004 /* enable expanded mem access */ 82 #define EX_MEM_ADDRCONTROL_16 0x0002 /* 16-bit access */ 83 #define EX_MEM_ADDRCONTROL_8 0x0001 /* 8-bit access */ 84 85 86 #define MII_GPHYTER_EX_MEM_DAT 0x1d /* expanded memory data */ 87 88 89 #define MII_GPHYTER_EX_MEM_ADDR 0x1e /* expanded memory address */ 90 91 92 #define GPHYTER_ISR0 0x810d /* interrupt status 0 */ 93 94 95 #define GPHYTER_ISR1 0x810e /* interrupt status 1 */ 96 97 98 #define GPHYTER_IRR0 0x810f /* interrupt reason 0 */ 99 100 101 #define GPHYTER_IRR1 0x8110 /* interrupt reason 1 */ 102 103 104 #define GPHYTER_RRR0 0x8111 /* raw reason 0 */ 105 106 107 #define GPHYTER_RRR1 0x8112 /* raw reason 1 */ 108 109 110 #define GPHYTER_IER0 0x8113 /* interrupt enable 0 */ 111 112 113 #define GPHYTER_IER1 0x8114 /* interrupt enable 1 */ 114 115 116 #define GPHYTER_ICLR0 0x8115 /* interrupt clear 0 */ 117 118 119 #define GPHYTER_ICLR1 0x8116 /* interrupt clear 1 */ 120 121 122 #define GPHYTER_ICTR 0x8117 /* interrupt control */ 123 124 125 #define GPHYTER_AN_THRESH 0x8118 /* AN_threshold value */ 126 127 128 #define GPHYTER_LINK_THRESH 0x8119 /* LINK_threshold value */ 129 130 131 #define GPHYTER_IEC_THRESH 0x811a /* IEC_threshold value */ 132 133 134 #endif /* _DEV_MII_GPHYTERREG_H_ */ 135