1 /* $NetBSD: mii.h,v 1.10 2001/07/25 22:00:43 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Manuel Bouyer. All rights reserved. 5 * 6 * Modification to match BSD/OS 3.0 MII interface by Jason R. Thorpe, 7 * Numerical Aerospace Simulation Facility, NASA Ames Research Center. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by Manuel Bouyer. 20 * 4. The name of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #ifndef _DEV_MII_MII_H_ 36 #define _DEV_MII_MII_H_ 37 38 /* 39 * Registers common to all PHYs. 40 */ 41 42 #define MII_NPHY 32 /* max # of PHYs per MII */ 43 44 /* 45 * MII commands, used if a device must drive the MII lines 46 * manually. 47 */ 48 #define MII_COMMAND_START 0x01 49 #define MII_COMMAND_READ 0x02 50 #define MII_COMMAND_WRITE 0x01 51 #define MII_COMMAND_ACK 0x02 52 53 #define MII_BMCR 0x00 /* Basic mode control register (rw) */ 54 #define BMCR_RESET 0x8000 /* reset */ 55 #define BMCR_LOOP 0x4000 /* loopback */ 56 #define BMCR_SPEED0 0x2000 /* speed selection (LSB) */ 57 #define BMCR_AUTOEN 0x1000 /* autonegotiation enable */ 58 #define BMCR_PDOWN 0x0800 /* power down */ 59 #define BMCR_ISO 0x0400 /* isolate */ 60 #define BMCR_STARTNEG 0x0200 /* restart autonegotiation */ 61 #define BMCR_FDX 0x0100 /* Set duplex mode */ 62 #define BMCR_CTEST 0x0080 /* collision test */ 63 #define BMCR_SPEED1 0x0040 /* speed selection (MSB) */ 64 65 #define BMCR_S10 0x0000 /* 10 Mb/s */ 66 #define BMCR_S100 BMCR_SPEED0 /* 100 Mb/s */ 67 #define BMCR_S1000 BMCR_SPEED1 /* 1000 Mb/s */ 68 69 #define BMCR_SPEED(x) ((x) & (BMCR_SPEED0|BMCR_SPEED1)) 70 71 #define MII_BMSR 0x01 /* Basic mode status register (ro) */ 72 #define BMSR_100T4 0x8000 /* 100 base T4 capable */ 73 #define BMSR_100TXFDX 0x4000 /* 100 base Tx full duplex capable */ 74 #define BMSR_100TXHDX 0x2000 /* 100 base Tx half duplex capable */ 75 #define BMSR_10TFDX 0x1000 /* 10 base T full duplex capable */ 76 #define BMSR_10THDX 0x0800 /* 10 base T half duplex capable */ 77 #define BMSR_100T2FDX 0x0400 /* 100 base T2 full duplex capable */ 78 #define BMSR_100T2HDX 0x0200 /* 100 base T2 half duplex capable */ 79 #define BMSR_EXTSTAT 0x0100 /* Extended status in register 15 */ 80 #define BMSR_MFPS 0x0040 /* MII Frame Preamble Suppression */ 81 #define BMSR_ACOMP 0x0020 /* Autonegotiation complete */ 82 #define BMSR_RFAULT 0x0010 /* Link partner fault */ 83 #define BMSR_ANEG 0x0008 /* Autonegotiation capable */ 84 #define BMSR_LINK 0x0004 /* Link status */ 85 #define BMSR_JABBER 0x0002 /* Jabber detected */ 86 #define BMSR_EXTCAP 0x0001 /* Extended capability */ 87 88 /* 89 * Note that the EXTSTAT bit indicates that there is extended status 90 * info available in register 15, but 802.3 section 22.2.4.3 also 91 * states that that all 1000 Mb/s capable PHYs will set this bit to 1. 92 */ 93 94 #define BMSR_MEDIAMASK (BMSR_100T4|BMSR_100TXFDX|BMSR_100TXHDX| \ 95 BMSR_10TFDX|BMSR_10THDX|BMSR_100T2FDX|BMSR_100T2HDX) 96 97 /* 98 * Convert BMSR media capabilities to ANAR bits for autonegotiation. 99 * Note the shift chopps off the BMSR_ANEG bit. 100 */ 101 #define BMSR_MEDIA_TO_ANAR(x) (((x) & BMSR_MEDIAMASK) >> 6) 102 103 #define MII_PHYIDR1 0x02 /* ID register 1 (ro) */ 104 105 #define MII_PHYIDR2 0x03 /* ID register 2 (ro) */ 106 #define IDR2_OUILSB 0xfc00 /* OUI LSB */ 107 #define IDR2_MODEL 0x03f0 /* vendor model */ 108 #define IDR2_REV 0x000f /* vendor revision */ 109 110 #define MII_ANAR 0x04 /* Autonegotiation advertisement (rw) */ 111 /* section 28.2.4.1 and 37.2.6.1 */ 112 #define ANAR_NP 0x8000 /* Next page (ro) */ 113 #define ANAR_ACK 0x4000 /* link partner abilities acknowledged (ro) */ 114 #define ANAR_RF 0x2000 /* remote fault (ro) */ 115 #define ANAR_FC 0x0400 /* local device supports PAUSE */ 116 #define ANAR_T4 0x0200 /* local device supports 100bT4 */ 117 #define ANAR_TX_FD 0x0100 /* local device supports 100bTx FD */ 118 #define ANAR_TX 0x0080 /* local device supports 100bTx */ 119 #define ANAR_10_FD 0x0040 /* local device supports 10bT FD */ 120 #define ANAR_10 0x0020 /* local device supports 10bT */ 121 #define ANAR_CSMA 0x0001 /* protocol selector CSMA/CD */ 122 123 #define ANAR_X_FD 0x0020 /* local device supports 1000BASE-X FD */ 124 #define ANAR_X_HD 0x0040 /* local device supports 1000BASE-X HD */ 125 #define ANAR_X_PAUSE_NONE (0 << 7) 126 #define ANAR_X_PAUSE_SYM (1 << 7) 127 #define ANAR_X_PAUSE_ASYM (2 << 7) 128 #define ANAR_X_PAUSE_TOWARDS (3 << 7) 129 130 #define MII_ANLPAR 0x05 /* Autonegotiation lnk partner abilities (rw) */ 131 /* section 28.2.4.1 and 37.2.6.1 */ 132 #define ANLPAR_NP 0x8000 /* Next page (ro) */ 133 #define ANLPAR_ACK 0x4000 /* link partner accepted ACK (ro) */ 134 #define ANLPAR_RF 0x2000 /* remote fault (ro) */ 135 #define ANLPAR_FC 0x0400 /* link partner supports PAUSE */ 136 #define ANLPAR_T4 0x0200 /* link partner supports 100bT4 */ 137 #define ANLPAR_TX_FD 0x0100 /* link partner supports 100bTx FD */ 138 #define ANLPAR_TX 0x0080 /* link partner supports 100bTx */ 139 #define ANLPAR_10_FD 0x0040 /* link partner supports 10bT FD */ 140 #define ANLPAR_10 0x0020 /* link partner supports 10bT */ 141 #define ANLPAR_CSMA 0x0001 /* protocol selector CSMA/CD */ 142 143 #define ANLPAR_X_FD 0x0020 /* local device supports 1000BASE-X FD */ 144 #define ANLPAR_X_HD 0x0040 /* local device supports 1000BASE-X HD */ 145 #define ANLPAR_X_PAUSE_MASK (3 << 7) 146 #define ANLPAR_X_PAUSE_NONE (0 << 7) 147 #define ANLPAR_X_PAUSE_SYM (1 << 7) 148 #define ANLPAR_X_PAUSE_ASYM (2 << 7) 149 #define ANLPAR_X_PAUSE_TOWARDS (3 << 7) 150 151 #define MII_ANER 0x06 /* Autonegotiation expansion (ro) */ 152 /* section 28.2.4.1 and 37.2.6.1 */ 153 #define ANER_MLF 0x0010 /* multiple link detection fault */ 154 #define ANER_LPNP 0x0008 /* link parter next page-able */ 155 #define ANER_NP 0x0004 /* next page-able */ 156 #define ANER_PAGE_RX 0x0002 /* Page received */ 157 #define ANER_LPAN 0x0001 /* link parter autoneg-able */ 158 159 #define MII_ANNP 0x07 /* Autonegotiation next page */ 160 /* section 28.2.4.1 and 37.2.6.1 */ 161 162 #define MII_ANLPRNP 0x08 /* Autonegotiation link partner rx next page */ 163 /* section 32.5.1 and 37.2.6.1 */ 164 165 /* This is also the 1000baseT control register */ 166 #define MII_100T2CR 0x09 /* 100base-T2 control register */ 167 #define GTCR_TEST_MASK 0xe000 /* see 802.3ab ss. 40.6.1.1.2 */ 168 #define GTCR_MAN_MS 0x1000 /* enable manual master/slave control */ 169 #define GTCR_ADV_MS 0x0800 /* 1 = adv. master, 0 = adv. slave */ 170 #define GTCR_PORT_TYPE 0x0400 /* 1 = DCE, 0 = DTE (NIC) */ 171 #define GTCR_ADV_1000TFDX 0x0200 /* adv. 1000baseT FDX */ 172 #define GTCR_ADV_1000THDX 0x0100 /* adv. 1000baseT HDX */ 173 174 /* This is also the 1000baseT status register */ 175 #define MII_100T2SR 0x0a /* 100base-T2 status register */ 176 #define GTSR_MAN_MS_FLT 0x8000 /* master/slave config fault */ 177 #define GTSR_MS_RES 0x4000 /* result: 1 = master, 0 = slave */ 178 #define GTSR_LRS 0x2000 /* local rx status, 1 = ok */ 179 #define GTSR_RRS 0x1000 /* remove rx status, 1 = ok */ 180 #define GTSR_LP_1000TFDX 0x0800 /* link partner 1000baseT FDX capable */ 181 #define GTSR_LP_1000THDX 0x0400 /* link partner 1000baseT HDX capable */ 182 #define GTSR_LP_ASM_DIR 0x0200 /* link partner asym. pause dir. capable */ 183 #define GTSR_IDLE_ERR 0x00ff /* IDLE error count */ 184 185 #define MII_EXTSR 0x0f /* Extended status register */ 186 #define EXTSR_1000XFDX 0x8000 /* 1000X full-duplex capable */ 187 #define EXTSR_1000XHDX 0x4000 /* 1000X half-duplex capable */ 188 #define EXTSR_1000TFDX 0x2000 /* 1000T full-duplex capable */ 189 #define EXTSR_1000THDX 0x1000 /* 1000T half-duplex capable */ 190 191 #define EXTSR_MEDIAMASK (EXTSR_1000XFDX|EXTSR_1000XHDX| \ 192 EXTSR_1000TFDX|EXTSR_1000THDX) 193 194 #endif /* _DEV_MII_MII_H_ */ 195