xref: /netbsd/sys/dev/mii/miidevs_data.h (revision bf9ec67e)
1 /*	$NetBSD: miidevs_data.h,v 1.27 2002/05/15 22:48:42 matt Exp $	*/
2 
3 /*
4  * THIS FILE AUTOMATICALLY GENERATED.  DO NOT EDIT.
5  *
6  * generated from:
7  *	NetBSD: miidevs,v 1.37 2002/05/15 22:48:17 matt Exp
8  */
9 
10 /*-
11  * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
12  * All rights reserved.
13  *
14  * This code is derived from software contributed to The NetBSD Foundation
15  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
16  * NASA Ames Research Center.
17  *
18  * Redistribution and use in source and binary forms, with or without
19  * modification, are permitted provided that the following conditions
20  * are met:
21  * 1. Redistributions of source code must retain the above copyright
22  *    notice, this list of conditions and the following disclaimer.
23  * 2. Redistributions in binary form must reproduce the above copyright
24  *    notice, this list of conditions and the following disclaimer in the
25  *    documentation and/or other materials provided with the distribution.
26  * 3. All advertising materials mentioning features or use of this software
27  *    must display the following acknowledgement:
28  *	This product includes software developed by the NetBSD
29  *	Foundation, Inc. and its contributors.
30  * 4. Neither the name of The NetBSD Foundation nor the names of its
31  *    contributors may be used to endorse or promote products derived
32  *    from this software without specific prior written permission.
33  *
34  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
35  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
36  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
37  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
38  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
39  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
40  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
41  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
42  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
43  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
44  * POSSIBILITY OF SUCH DAMAGE.
45  */
46 struct mii_knowndev mii_knowndevs[] = {
47  { MII_OUI_ALTIMA, MII_MODEL_ALTIMA_ACXXX, MII_STR_ALTIMA_ACXXX },
48  { MII_OUI_ALTIMA, MII_MODEL_ALTIMA_AC101, MII_STR_ALTIMA_AC101 },
49  { MII_OUI_xxAMD, MII_MODEL_xxAMD_79C873, MII_STR_xxAMD_79C873 },
50  { MII_OUI_yyAMD, MII_MODEL_yyAMD_79C972_10T, MII_STR_yyAMD_79C972_10T },
51  { MII_OUI_yyAMD, MII_MODEL_yyAMD_79c973phy, MII_STR_yyAMD_79c973phy },
52  { MII_OUI_yyAMD, MII_MODEL_yyAMD_79c901, MII_STR_yyAMD_79c901 },
53  { MII_OUI_yyAMD, MII_MODEL_yyAMD_79c901home, MII_STR_yyAMD_79c901home },
54  { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_3C905B, MII_STR_xxBROADCOM_3C905B },
55  { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_3C905C, MII_STR_xxBROADCOM_3C905C },
56  { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_BCM5201, MII_STR_xxBROADCOM_BCM5201 },
57  { MII_OUI_xxBROADCOM, MII_MODEL_xxBROADCOM_BCM5221, MII_STR_xxBROADCOM_BCM5221 },
58  { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5400, MII_STR_BROADCOM_BCM5400 },
59  { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5401, MII_STR_BROADCOM_BCM5401 },
60  { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5411, MII_STR_BROADCOM_BCM5411 },
61  { MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9101, MII_STR_xxDAVICOM_DM9101 },
62  { MII_OUI_ICS, MII_MODEL_ICS_1890, MII_STR_ICS_1890 },
63  { MII_OUI_ICS, MII_MODEL_ICS_1893, MII_STR_ICS_1893 },
64  { MII_OUI_xxINTEL, MII_MODEL_xxINTEL_I82553, MII_STR_xxINTEL_I82553 },
65  { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82555, MII_STR_yyINTEL_I82555 },
66  { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82562EH, MII_STR_yyINTEL_I82562EH },
67  { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82562EM, MII_STR_yyINTEL_I82562EM },
68  { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82562ET, MII_STR_yyINTEL_I82562ET },
69  { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82553, MII_STR_yyINTEL_I82553 },
70  { MII_OUI_xxLEVEL1, MII_MODEL_xxLEVEL1_LXT970, MII_STR_xxLEVEL1_LXT970 },
71  { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT971, MII_STR_LEVEL1_LXT971 },
72  { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT1000_OLD, MII_STR_LEVEL1_LXT1000_OLD },
73  { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT1000, MII_STR_LEVEL1_LXT1000 },
74  { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1000_3, MII_STR_xxMARVELL_E1000_3 },
75  { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_E1000_5, MII_STR_xxMARVELL_E1000_5 },
76  { MII_OUI_xxMYSON, MII_MODEL_xxMYSON_MTD972, MII_STR_xxMYSON_MTD972 },
77  { MII_OUI_xxNATSEMI, MII_MODEL_xxNATSEMI_DP83840, MII_STR_xxNATSEMI_DP83840 },
78  { MII_OUI_xxNATSEMI, MII_MODEL_xxNATSEMI_DP83843, MII_STR_xxNATSEMI_DP83843 },
79  { MII_OUI_xxNATSEMI, MII_MODEL_xxNATSEMI_DP83815, MII_STR_xxNATSEMI_DP83815 },
80  { MII_OUI_xxNATSEMI, MII_MODEL_xxNATSEMI_DP83891, MII_STR_xxNATSEMI_DP83891 },
81  { MII_OUI_xxNATSEMI, MII_MODEL_xxNATSEMI_DP83861, MII_STR_xxNATSEMI_DP83861 },
82  { MII_OUI_xxPMCSIERRA, MII_MODEL_xxPMCSIERRA_PM8351, MII_STR_xxPMCSIERRA_PM8351 },
83  { MII_OUI_xxPMCSIERRA2, MII_MODEL_xxPMCSIERRA2_PM8352, MII_STR_xxPMCSIERRA2_PM8352 },
84  { MII_OUI_xxPMCSIERRA2, MII_MODEL_xxPMCSIERRA2_PM8353, MII_STR_xxPMCSIERRA2_PM8353 },
85  { MII_OUI_PMCSIERRA, MII_MODEL_PMCSIERRA_PM8354, MII_STR_PMCSIERRA_PM8354 },
86  { MII_OUI_xxQUALSEMI, MII_MODEL_xxQUALSEMI_QS6612, MII_STR_xxQUALSEMI_QS6612 },
87  { MII_OUI_SEEQ, MII_MODEL_SEEQ_80220, MII_STR_SEEQ_80220 },
88  { MII_OUI_SEEQ, MII_MODEL_SEEQ_84220, MII_STR_SEEQ_84220 },
89  { MII_OUI_SEEQ, MII_MODEL_SEEQ_80225, MII_STR_SEEQ_80225 },
90  { MII_OUI_SIS, MII_MODEL_SIS_900, MII_STR_SIS_900 },
91  { MII_OUI_TI, MII_MODEL_TI_TLAN10T, MII_STR_TI_TLAN10T },
92  { MII_OUI_TI, MII_MODEL_TI_100VGPMI, MII_STR_TI_100VGPMI },
93  { MII_OUI_TI, MII_MODEL_TI_TNETE2101, MII_STR_TI_TNETE2101 },
94  { MII_OUI_xxTSC, MII_MODEL_xxTSC_78Q2120, MII_STR_xxTSC_78Q2120 },
95  { MII_OUI_xxTSC, MII_MODEL_xxTSC_78Q2121, MII_STR_xxTSC_78Q2121 },
96  { MII_OUI_xxXAQTI, MII_MODEL_xxXAQTI_XMACII, MII_STR_xxXAQTI_XMACII },
97  { 0, 0, NULL }
98 };
99