1 /* $NetBSD: clock_pcctwo.c,v 1.4 2002/10/02 16:34:26 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Steve C. Woodford. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Glue for the Peripheral Channel Controller Two (PCCChip2) timers, 41 * the Memory Controller ASIC (MCchip, and the Mostek clock chip found 42 * on the MVME-1[67]7, MVME-1[67]2 and MVME-187 series of boards. 43 */ 44 45 #include <sys/param.h> 46 #include <sys/kernel.h> 47 #include <sys/systm.h> 48 #include <sys/device.h> 49 50 #include <machine/psl.h> 51 #include <machine/bus.h> 52 53 #include <dev/mvme/clockvar.h> 54 #include <dev/mvme/pcctwovar.h> 55 #include <dev/mvme/pcctworeg.h> 56 57 58 int clock_pcctwo_match __P((struct device *, struct cfdata *, void *)); 59 void clock_pcctwo_attach __P((struct device *, struct device *, void *)); 60 61 struct clock_pcctwo_softc { 62 struct device sc_dev; 63 struct clock_attach_args sc_clock_args; 64 u_char sc_clock_lvl; 65 }; 66 67 CFATTACH_DECL(clock_pcctwo, sizeof(struct device), 68 clock_pcctwo_match, clock_pcctwo_attach, NULL, NULL); 69 70 extern struct cfdriver clock_cd; 71 72 static int clock_pcctwo_profintr __P((void *)); 73 static int clock_pcctwo_statintr __P((void *)); 74 static void clock_pcctwo_initclocks __P((void *, int, int)); 75 static long clock_pcctwo_microtime __P((void *)); 76 static void clock_pcctwo_shutdown __P((void *)); 77 78 static struct clock_pcctwo_softc *clock_pcctwo_sc; 79 80 /* ARGSUSED */ 81 int 82 clock_pcctwo_match(parent, cf, aux) 83 struct device *parent; 84 struct cfdata *cf; 85 void *aux; 86 { 87 struct pcctwo_attach_args *pa = aux; 88 89 /* Only one clock, please. */ 90 if (clock_pcctwo_sc) 91 return (0); 92 93 if (strcmp(pa->pa_name, clock_cd.cd_name)) 94 return (0); 95 96 pa->pa_ipl = cf->pcctwocf_ipl; 97 98 return (1); 99 } 100 101 /* ARGSUSED */ 102 void 103 clock_pcctwo_attach(parent, self, aux) 104 struct device *parent; 105 struct device *self; 106 void *aux; 107 { 108 struct clock_pcctwo_softc *sc; 109 struct pcctwo_attach_args *pa; 110 111 sc = clock_pcctwo_sc = (struct clock_pcctwo_softc *) self; 112 pa = aux; 113 114 if (pa->pa_ipl != CLOCK_LEVEL) 115 panic("clock_pcctwo_attach: wrong interrupt level"); 116 117 sc->sc_clock_args.ca_arg = sc; 118 sc->sc_clock_args.ca_initfunc = clock_pcctwo_initclocks; 119 sc->sc_clock_args.ca_microtime = clock_pcctwo_microtime; 120 121 /* Do common portions of clock config. */ 122 clock_config(self, &sc->sc_clock_args, pcctwointr_evcnt(pa->pa_ipl)); 123 124 /* Ensure our interrupts get disabled at shutdown time. */ 125 (void) shutdownhook_establish(clock_pcctwo_shutdown, NULL); 126 127 sc->sc_clock_lvl = (pa->pa_ipl & PCCTWO_ICR_LEVEL_MASK) | 128 PCCTWO_ICR_ICLR | PCCTWO_ICR_IEN; 129 130 /* Attach the interrupt handlers. */ 131 pcctwointr_establish(PCCTWOV_TIMER1, clock_pcctwo_profintr, 132 pa->pa_ipl, NULL, &clock_profcnt); 133 pcctwointr_establish(PCCTWOV_TIMER2, clock_pcctwo_statintr, 134 pa->pa_ipl, NULL, &clock_statcnt); 135 } 136 137 void 138 clock_pcctwo_initclocks(arg, proftick, stattick) 139 void *arg; 140 int proftick; 141 int stattick; 142 { 143 struct clock_pcctwo_softc *sc; 144 145 sc = arg; 146 147 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER1_CONTROL, PCCTWO_TT_CTRL_COVF); 148 pcc2_reg_write32(sys_pcctwo, PCC2REG_TIMER1_COUNTER, 0); 149 pcc2_reg_write32(sys_pcctwo, PCC2REG_TIMER1_COMPARE, 150 PCCTWO_US2LIM(proftick)); 151 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER1_CONTROL, 152 PCCTWO_TT_CTRL_CEN | PCCTWO_TT_CTRL_COC | PCCTWO_TT_CTRL_COVF); 153 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER1_ICSR, sc->sc_clock_lvl); 154 155 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER2_CONTROL, PCCTWO_TT_CTRL_COVF); 156 pcc2_reg_write32(sys_pcctwo, PCC2REG_TIMER2_COUNTER, 0); 157 pcc2_reg_write32(sys_pcctwo, PCC2REG_TIMER2_COMPARE, 158 PCCTWO_US2LIM(stattick)); 159 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER2_CONTROL, 160 PCCTWO_TT_CTRL_CEN | PCCTWO_TT_CTRL_COC | PCCTWO_TT_CTRL_COVF); 161 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER2_ICSR, sc->sc_clock_lvl); 162 } 163 164 /* ARGSUSED */ 165 long 166 clock_pcctwo_microtime(arg) 167 void *arg; 168 { 169 static int ovfl_adj[] = { 170 0, 10000, 20000, 30000, 171 40000, 50000, 60000, 70000, 172 80000, 90000, 100000, 110000, 173 120000, 130000, 140000, 150000}; 174 u_int8_t cr; 175 u_int32_t tc, tc2; 176 177 /* 178 * There's no way to latch the counter and overflow registers 179 * without pausing the clock, so compensate for the possible 180 * race by checking for counter wrap-around and re-reading the 181 * overflow counter if necessary. 182 * 183 * Note: This only works because we're called at splhigh(). 184 */ 185 tc = pcc2_reg_read32(sys_pcctwo, PCC2REG_TIMER1_COUNTER); 186 cr = pcc2_reg_read(sys_pcctwo, PCC2REG_TIMER1_CONTROL); 187 if (tc > (tc2 = pcc2_reg_read32(sys_pcctwo, PCC2REG_TIMER1_COUNTER))) { 188 cr = pcc2_reg_read(sys_pcctwo, PCC2REG_TIMER1_CONTROL); 189 tc = tc2; 190 } 191 192 return ((long) PCCTWO_LIM2US(tc) + ovfl_adj[PCCTWO_TT_CTRL_OVF(cr)]); 193 } 194 195 int 196 clock_pcctwo_profintr(frame) 197 void *frame; 198 { 199 u_int8_t cr; 200 u_int32_t tc; 201 int s; 202 203 s = splhigh(); 204 tc = pcc2_reg_read32(sys_pcctwo, PCC2REG_TIMER1_COUNTER); 205 cr = pcc2_reg_read(sys_pcctwo, PCC2REG_TIMER1_CONTROL); 206 if (tc > pcc2_reg_read32(sys_pcctwo, PCC2REG_TIMER1_COUNTER)) 207 cr = pcc2_reg_read(sys_pcctwo, PCC2REG_TIMER1_CONTROL); 208 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER1_CONTROL, 209 PCCTWO_TT_CTRL_CEN | PCCTWO_TT_CTRL_COC | PCCTWO_TT_CTRL_COVF); 210 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER1_ICSR, 211 clock_pcctwo_sc->sc_clock_lvl); 212 splx(s); 213 214 for (cr = PCCTWO_TT_CTRL_OVF(cr); cr; cr--) 215 hardclock(frame); 216 217 return (1); 218 } 219 220 int 221 clock_pcctwo_statintr(frame) 222 void *frame; 223 { 224 225 /* Disable the timer interrupt while we handle it. */ 226 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER2_ICSR, 0); 227 228 statclock((struct clockframe *) frame); 229 230 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER2_CONTROL, PCCTWO_TT_CTRL_COVF); 231 pcc2_reg_write32(sys_pcctwo, PCC2REG_TIMER2_COUNTER, 0); 232 pcc2_reg_write32(sys_pcctwo, PCC2REG_TIMER2_COMPARE, 233 PCCTWO_US2LIM(CLOCK_NEWINT(clock_statvar, clock_statmin))); 234 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER2_CONTROL, 235 PCCTWO_TT_CTRL_CEN | PCCTWO_TT_CTRL_COC | PCCTWO_TT_CTRL_COVF); 236 237 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER2_ICSR, 238 clock_pcctwo_sc->sc_clock_lvl); 239 240 return (1); 241 } 242 243 /* ARGSUSED */ 244 void 245 clock_pcctwo_shutdown(arg) 246 void *arg; 247 { 248 249 /* Make sure the timer interrupts are turned off. */ 250 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER1_CONTROL, PCCTWO_TT_CTRL_COVF); 251 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER1_ICSR, 0); 252 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER2_CONTROL, PCCTWO_TT_CTRL_COVF); 253 pcc2_reg_write(sys_pcctwo, PCC2REG_TIMER2_ICSR, 0); 254 } 255