1 /* $NetBSD: if_ie_mvme.c,v 1.1 2002/02/12 20:38:43 scw Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Steve C. Woodford. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/mbuf.h> 42 #include <sys/errno.h> 43 #include <sys/device.h> 44 #include <sys/protosw.h> 45 #include <sys/socket.h> 46 47 #include <net/if.h> 48 #include <net/if_dl.h> 49 #include <net/if_types.h> 50 #include <net/if_ether.h> 51 #include <net/if_media.h> 52 53 #include <uvm/uvm_extern.h> 54 55 #include <machine/autoconf.h> 56 #include <machine/cpu.h> 57 #include <machine/bus.h> 58 59 #include <dev/ic/i82586reg.h> 60 #include <dev/ic/i82586var.h> 61 62 #include <dev/mvme/if_iereg.h> 63 #include <dev/mvme/pcctwovar.h> 64 #include <dev/mvme/pcctworeg.h> 65 66 67 int ie_pcctwo_match __P((struct device *, struct cfdata *, void *)); 68 void ie_pcctwo_attach __P((struct device *, struct device *, void *)); 69 70 struct ie_pcctwo_softc { 71 struct ie_softc ps_ie; 72 bus_space_tag_t ps_bust; 73 bus_space_handle_t ps_bush; 74 struct evcnt ps_evcnt; 75 }; 76 77 struct cfattach ie_pcctwo_ca = { 78 sizeof(struct ie_pcctwo_softc), ie_pcctwo_match, ie_pcctwo_attach 79 }; 80 81 extern struct cfdriver ie_cd; 82 83 84 /* Functions required by the i82586 MI driver */ 85 static void ie_reset __P((struct ie_softc *, int)); 86 static int ie_intrhook __P((struct ie_softc *, int)); 87 static void ie_hwinit __P((struct ie_softc *)); 88 static void ie_atten __P((struct ie_softc *, int)); 89 90 static void ie_copyin __P((struct ie_softc *, void *, int, size_t)); 91 static void ie_copyout __P((struct ie_softc *, const void *, int, size_t)); 92 93 static u_int16_t ie_read_16 __P((struct ie_softc *, int)); 94 static void ie_write_16 __P((struct ie_softc *, int, u_int16_t)); 95 static void ie_write_24 __P((struct ie_softc *, int, int)); 96 97 /* 98 * i82596 Support Routines for MVME1[67][27] and MVME187 Boards 99 */ 100 static void 101 ie_reset(sc, why) 102 struct ie_softc *sc; 103 int why; 104 { 105 struct ie_pcctwo_softc *ps; 106 u_int32_t scp_addr; 107 108 ps = (struct ie_pcctwo_softc *) sc; 109 110 switch (why) { 111 case CHIP_PROBE: 112 case CARD_RESET: 113 bus_space_write_2(ps->ps_bust, ps->ps_bush, IE_MPUREG_UPPER, 114 IE_PORT_RESET); 115 bus_space_write_2(ps->ps_bust, ps->ps_bush, IE_MPUREG_LOWER, 0); 116 delay(1000); 117 118 /* 119 * Set the BUSY and BUS_USE bytes here, since the MI code 120 * incorrectly assumes it can use byte addressing to set it. 121 * (due to wrong-endianess of the chip) 122 */ 123 ie_write_16(sc, IE_ISCP_BUSY(sc->iscp), 1); 124 ie_write_16(sc, IE_SCP_BUS_USE(sc->scp), IE_BUS_USE); 125 126 scp_addr = sc->scp + (u_int) sc->sc_iobase; 127 scp_addr |= IE_PORT_ALT_SCP; 128 129 bus_space_write_2(ps->ps_bust, ps->ps_bush, IE_MPUREG_UPPER, 130 scp_addr & 0xffff); 131 bus_space_write_2(ps->ps_bust, ps->ps_bush, IE_MPUREG_LOWER, 132 (scp_addr >> 16) & 0xffff); 133 delay(1000); 134 break; 135 } 136 } 137 138 /* ARGSUSED */ 139 static int 140 ie_intrhook(sc, when) 141 struct ie_softc *sc; 142 int when; 143 { 144 struct ie_pcctwo_softc *ps; 145 u_int8_t reg; 146 147 ps = (struct ie_pcctwo_softc *) sc; 148 149 if (when == INTR_EXIT) { 150 reg = pcc2_reg_read(sys_pcctwo, PCC2REG_ETH_ICSR); 151 reg |= PCCTWO_ICR_ICLR; 152 pcc2_reg_write(sys_pcctwo, PCC2REG_ETH_ICSR, reg); 153 } 154 return (0); 155 } 156 157 /* ARGSUSED */ 158 static void 159 ie_hwinit(sc) 160 struct ie_softc *sc; 161 { 162 u_int8_t reg; 163 164 reg = pcc2_reg_read(sys_pcctwo, PCC2REG_ETH_ICSR); 165 reg |= PCCTWO_ICR_IEN | PCCTWO_ICR_ICLR; 166 pcc2_reg_write(sys_pcctwo, PCC2REG_ETH_ICSR, reg); 167 } 168 169 /* ARGSUSED */ 170 static void 171 ie_atten(sc, reason) 172 struct ie_softc *sc; 173 int reason; 174 { 175 struct ie_pcctwo_softc *ps; 176 177 ps = (struct ie_pcctwo_softc *) sc; 178 bus_space_write_4(ps->ps_bust, ps->ps_bush, IE_MPUREG_CA, 0); 179 } 180 181 static void 182 ie_copyin(sc, dst, offset, size) 183 struct ie_softc *sc; 184 void *dst; 185 int offset; 186 size_t size; 187 { 188 if (size == 0) /* This *can* happen! */ 189 return; 190 191 #if 0 192 bus_space_read_region_1(sc->bt, sc->bh, offset, dst, size); 193 #else 194 /* A minor optimisation ;-) */ 195 memcpy(dst, (void *) ((u_long) sc->bh + (u_long) offset), size); 196 #endif 197 } 198 199 static void 200 ie_copyout(sc, src, offset, size) 201 struct ie_softc *sc; 202 const void *src; 203 int offset; 204 size_t size; 205 { 206 if (size == 0) /* This *can* happen! */ 207 return; 208 209 #if 0 210 bus_space_write_region_1(sc->bt, sc->bh, offset, src, size); 211 #else 212 /* A minor optimisation ;-) */ 213 memcpy((void *) ((u_long) sc->bh + (u_long) offset), src, size); 214 #endif 215 } 216 217 static u_int16_t 218 ie_read_16(sc, offset) 219 struct ie_softc *sc; 220 int offset; 221 { 222 223 return (bus_space_read_2(sc->bt, sc->bh, offset)); 224 } 225 226 static void 227 ie_write_16(sc, offset, value) 228 struct ie_softc *sc; 229 int offset; 230 u_int16_t value; 231 { 232 233 bus_space_write_2(sc->bt, sc->bh, offset, value); 234 } 235 236 static void 237 ie_write_24(sc, offset, addr) 238 struct ie_softc *sc; 239 int offset; 240 int addr; 241 { 242 243 addr += (int) sc->sc_iobase; 244 245 bus_space_write_2(sc->bt, sc->bh, offset, addr & 0xffff); 246 bus_space_write_2(sc->bt, sc->bh, offset + 2, (addr >> 16) & 0x00ff); 247 } 248 249 /* ARGSUSED */ 250 int 251 ie_pcctwo_match(parent, cf, args) 252 struct device *parent; 253 struct cfdata *cf; 254 void *args; 255 { 256 struct pcctwo_attach_args *pa; 257 258 pa = args; 259 260 if (strcmp(pa->pa_name, ie_cd.cd_name)) 261 return (0); 262 263 pa->pa_ipl = cf->pcctwocf_ipl; 264 265 return (1); 266 } 267 268 /* ARGSUSED */ 269 void 270 ie_pcctwo_attach(parent, self, args) 271 struct device *parent; 272 struct device *self; 273 void *args; 274 { 275 struct pcctwo_attach_args *pa; 276 struct ie_pcctwo_softc *ps; 277 struct ie_softc *sc; 278 bus_dma_segment_t seg; 279 int rseg; 280 281 pa = (struct pcctwo_attach_args *) args; 282 ps = (struct ie_pcctwo_softc *) self; 283 sc = (struct ie_softc *) self; 284 285 /* Map the MPU controller registers in PCCTWO space */ 286 ps->ps_bust = pa->pa_bust; 287 bus_space_map(pa->pa_bust, pa->pa_offset, IE_MPUREG_SIZE, 288 0, &ps->ps_bush); 289 290 /* Get contiguous DMA-able memory for the IE chip */ 291 if (bus_dmamem_alloc(pa->pa_dmat, ether_data_buff_size, NBPG, 0, 292 &seg, 1, &rseg, 293 BUS_DMA_NOWAIT | BUS_DMA_ONBOARD_RAM | BUS_DMA_24BIT) != 0) { 294 printf("%s: Failed to allocate ether buffer\n", self->dv_xname); 295 return; 296 } 297 if (bus_dmamem_map(pa->pa_dmat, &seg, rseg, ether_data_buff_size, 298 (caddr_t *) & sc->sc_maddr, BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) { 299 printf("%s: Failed to map ether buffer\n", self->dv_xname); 300 bus_dmamem_free(pa->pa_dmat, &seg, rseg); 301 return; 302 } 303 sc->bt = pa->pa_bust; 304 sc->bh = (bus_space_handle_t) sc->sc_maddr; /* XXXSCW Better way? */ 305 sc->sc_iobase = (void *) seg.ds_addr; 306 sc->sc_msize = ether_data_buff_size; 307 memset(sc->sc_maddr, 0, ether_data_buff_size); 308 309 sc->hwreset = ie_reset; 310 sc->hwinit = ie_hwinit; 311 sc->chan_attn = ie_atten; 312 sc->intrhook = ie_intrhook; 313 sc->memcopyin = ie_copyin; 314 sc->memcopyout = ie_copyout; 315 sc->ie_bus_barrier = NULL; 316 sc->ie_bus_read16 = ie_read_16; 317 sc->ie_bus_write16 = ie_write_16; 318 sc->ie_bus_write24 = ie_write_24; 319 sc->sc_mediachange = NULL; 320 sc->sc_mediastatus = NULL; 321 322 sc->scp = 0; 323 sc->iscp = sc->scp + ((IE_SCP_SZ + 15) & ~15); 324 sc->scb = sc->iscp + IE_ISCP_SZ; 325 sc->buf_area = sc->scb + IE_SCB_SZ; 326 sc->buf_area_sz = sc->sc_msize - (sc->buf_area - sc->scp); 327 328 /* 329 * BUS_USE -> Interrupt Active High (edge-triggered), 330 * Lock function enabled, 331 * Internal bus throttle timer triggering, 332 * 82586 operating mode. 333 */ 334 ie_write_16(sc, IE_SCP_BUS_USE(sc->scp), IE_BUS_USE); 335 ie_write_24(sc, IE_SCP_ISCP(sc->scp), sc->iscp); 336 ie_write_16(sc, IE_ISCP_SCB(sc->iscp), sc->scb); 337 ie_write_24(sc, IE_ISCP_BASE(sc->iscp), sc->scp); 338 339 /* This has the side-effect of resetting the chip */ 340 i82586_proberam(sc); 341 342 /* Attach the MI back-end */ 343 i82586_attach(sc, "onboard", mvme_ea, NULL, 0, 0); 344 345 /* Register the event counter */ 346 evcnt_attach_dynamic(&ps->ps_evcnt, EVCNT_TYPE_INTR, 347 pcctwointr_evcnt(pa->pa_ipl), "ether", sc->sc_dev.dv_xname); 348 349 /* Finally, hook the hardware interrupt */ 350 pcctwointr_establish(PCCTWOV_LANC_IRQ, i82586_intr, pa->pa_ipl, sc, 351 &ps->ps_evcnt); 352 } 353