1 /* $NetBSD: if_ie_mvme.c,v 1.4 2002/10/02 16:34:26 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Steve C. Woodford. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/mbuf.h> 42 #include <sys/errno.h> 43 #include <sys/device.h> 44 #include <sys/protosw.h> 45 #include <sys/socket.h> 46 47 #include <net/if.h> 48 #include <net/if_dl.h> 49 #include <net/if_types.h> 50 #include <net/if_ether.h> 51 #include <net/if_media.h> 52 53 #include <uvm/uvm_extern.h> 54 55 #include <machine/autoconf.h> 56 #include <machine/cpu.h> 57 #include <machine/bus.h> 58 59 #include <dev/ic/i82586reg.h> 60 #include <dev/ic/i82586var.h> 61 62 #include <dev/mvme/if_iereg.h> 63 #include <dev/mvme/pcctwovar.h> 64 #include <dev/mvme/pcctworeg.h> 65 66 67 int ie_pcctwo_match __P((struct device *, struct cfdata *, void *)); 68 void ie_pcctwo_attach __P((struct device *, struct device *, void *)); 69 70 struct ie_pcctwo_softc { 71 struct ie_softc ps_ie; 72 bus_space_tag_t ps_bust; 73 bus_space_handle_t ps_bush; 74 struct evcnt ps_evcnt; 75 }; 76 77 CFATTACH_DECL(ie_pcctwo, sizeof(struct ie_pcctwo_softc), 78 ie_pcctwo_match, ie_pcctwo_attach, NULL, NULL); 79 80 extern struct cfdriver ie_cd; 81 82 83 /* Functions required by the i82586 MI driver */ 84 static void ie_reset __P((struct ie_softc *, int)); 85 static int ie_intrhook __P((struct ie_softc *, int)); 86 static void ie_hwinit __P((struct ie_softc *)); 87 static void ie_atten __P((struct ie_softc *, int)); 88 89 static void ie_copyin __P((struct ie_softc *, void *, int, size_t)); 90 static void ie_copyout __P((struct ie_softc *, const void *, int, size_t)); 91 92 static u_int16_t ie_read_16 __P((struct ie_softc *, int)); 93 static void ie_write_16 __P((struct ie_softc *, int, u_int16_t)); 94 static void ie_write_24 __P((struct ie_softc *, int, int)); 95 96 /* 97 * i82596 Support Routines for MVME1[67][27] and MVME187 Boards 98 */ 99 static void 100 ie_reset(sc, why) 101 struct ie_softc *sc; 102 int why; 103 { 104 struct ie_pcctwo_softc *ps; 105 u_int32_t scp_addr; 106 107 ps = (struct ie_pcctwo_softc *) sc; 108 109 switch (why) { 110 case CHIP_PROBE: 111 case CARD_RESET: 112 bus_space_write_2(ps->ps_bust, ps->ps_bush, IE_MPUREG_UPPER, 113 IE_PORT_RESET); 114 bus_space_write_2(ps->ps_bust, ps->ps_bush, IE_MPUREG_LOWER, 0); 115 delay(1000); 116 117 /* 118 * Set the BUSY and BUS_USE bytes here, since the MI code 119 * incorrectly assumes it can use byte addressing to set it. 120 * (due to wrong-endianess of the chip) 121 */ 122 ie_write_16(sc, IE_ISCP_BUSY(sc->iscp), 1); 123 ie_write_16(sc, IE_SCP_BUS_USE(sc->scp), IE_BUS_USE); 124 125 scp_addr = sc->scp + (u_int) sc->sc_iobase; 126 scp_addr |= IE_PORT_ALT_SCP; 127 128 bus_space_write_2(ps->ps_bust, ps->ps_bush, IE_MPUREG_UPPER, 129 scp_addr & 0xffff); 130 bus_space_write_2(ps->ps_bust, ps->ps_bush, IE_MPUREG_LOWER, 131 (scp_addr >> 16) & 0xffff); 132 delay(1000); 133 break; 134 } 135 } 136 137 /* ARGSUSED */ 138 static int 139 ie_intrhook(sc, when) 140 struct ie_softc *sc; 141 int when; 142 { 143 struct ie_pcctwo_softc *ps; 144 u_int8_t reg; 145 146 ps = (struct ie_pcctwo_softc *) sc; 147 148 if (when == INTR_EXIT) { 149 reg = pcc2_reg_read(sys_pcctwo, PCC2REG_ETH_ICSR); 150 reg |= PCCTWO_ICR_ICLR; 151 pcc2_reg_write(sys_pcctwo, PCC2REG_ETH_ICSR, reg); 152 } 153 return (0); 154 } 155 156 /* ARGSUSED */ 157 static void 158 ie_hwinit(sc) 159 struct ie_softc *sc; 160 { 161 u_int8_t reg; 162 163 reg = pcc2_reg_read(sys_pcctwo, PCC2REG_ETH_ICSR); 164 reg |= PCCTWO_ICR_IEN | PCCTWO_ICR_ICLR; 165 pcc2_reg_write(sys_pcctwo, PCC2REG_ETH_ICSR, reg); 166 } 167 168 /* ARGSUSED */ 169 static void 170 ie_atten(sc, reason) 171 struct ie_softc *sc; 172 int reason; 173 { 174 struct ie_pcctwo_softc *ps; 175 176 ps = (struct ie_pcctwo_softc *) sc; 177 bus_space_write_4(ps->ps_bust, ps->ps_bush, IE_MPUREG_CA, 0); 178 } 179 180 static void 181 ie_copyin(sc, dst, offset, size) 182 struct ie_softc *sc; 183 void *dst; 184 int offset; 185 size_t size; 186 { 187 if (size == 0) /* This *can* happen! */ 188 return; 189 190 #if 0 191 bus_space_read_region_1(sc->bt, sc->bh, offset, dst, size); 192 #else 193 /* A minor optimisation ;-) */ 194 memcpy(dst, (void *) ((u_long) sc->bh + (u_long) offset), size); 195 #endif 196 } 197 198 static void 199 ie_copyout(sc, src, offset, size) 200 struct ie_softc *sc; 201 const void *src; 202 int offset; 203 size_t size; 204 { 205 if (size == 0) /* This *can* happen! */ 206 return; 207 208 #if 0 209 bus_space_write_region_1(sc->bt, sc->bh, offset, src, size); 210 #else 211 /* A minor optimisation ;-) */ 212 memcpy((void *) ((u_long) sc->bh + (u_long) offset), src, size); 213 #endif 214 } 215 216 static u_int16_t 217 ie_read_16(sc, offset) 218 struct ie_softc *sc; 219 int offset; 220 { 221 222 return (bus_space_read_2(sc->bt, sc->bh, offset)); 223 } 224 225 static void 226 ie_write_16(sc, offset, value) 227 struct ie_softc *sc; 228 int offset; 229 u_int16_t value; 230 { 231 232 bus_space_write_2(sc->bt, sc->bh, offset, value); 233 } 234 235 static void 236 ie_write_24(sc, offset, addr) 237 struct ie_softc *sc; 238 int offset; 239 int addr; 240 { 241 242 addr += (int) sc->sc_iobase; 243 244 bus_space_write_2(sc->bt, sc->bh, offset, addr & 0xffff); 245 bus_space_write_2(sc->bt, sc->bh, offset + 2, (addr >> 16) & 0x00ff); 246 } 247 248 /* ARGSUSED */ 249 int 250 ie_pcctwo_match(parent, cf, args) 251 struct device *parent; 252 struct cfdata *cf; 253 void *args; 254 { 255 struct pcctwo_attach_args *pa; 256 257 pa = args; 258 259 if (strcmp(pa->pa_name, ie_cd.cd_name)) 260 return (0); 261 262 pa->pa_ipl = cf->pcctwocf_ipl; 263 264 return (1); 265 } 266 267 /* ARGSUSED */ 268 void 269 ie_pcctwo_attach(parent, self, args) 270 struct device *parent; 271 struct device *self; 272 void *args; 273 { 274 struct pcctwo_attach_args *pa; 275 struct ie_pcctwo_softc *ps; 276 struct ie_softc *sc; 277 bus_dma_segment_t seg; 278 int rseg; 279 280 pa = (struct pcctwo_attach_args *) args; 281 ps = (struct ie_pcctwo_softc *) self; 282 sc = (struct ie_softc *) self; 283 284 /* Map the MPU controller registers in PCCTWO space */ 285 ps->ps_bust = pa->pa_bust; 286 bus_space_map(pa->pa_bust, pa->pa_offset, IE_MPUREG_SIZE, 287 0, &ps->ps_bush); 288 289 /* Get contiguous DMA-able memory for the IE chip */ 290 if (bus_dmamem_alloc(pa->pa_dmat, ether_data_buff_size, NBPG, 0, 291 &seg, 1, &rseg, 292 BUS_DMA_NOWAIT | BUS_DMA_ONBOARD_RAM | BUS_DMA_24BIT) != 0) { 293 printf("%s: Failed to allocate ether buffer\n", self->dv_xname); 294 return; 295 } 296 if (bus_dmamem_map(pa->pa_dmat, &seg, rseg, ether_data_buff_size, 297 (caddr_t *) & sc->sc_maddr, BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) { 298 printf("%s: Failed to map ether buffer\n", self->dv_xname); 299 bus_dmamem_free(pa->pa_dmat, &seg, rseg); 300 return; 301 } 302 sc->bt = pa->pa_bust; 303 sc->bh = (bus_space_handle_t) sc->sc_maddr; /* XXXSCW Better way? */ 304 sc->sc_iobase = (void *) seg.ds_addr; 305 sc->sc_msize = ether_data_buff_size; 306 memset(sc->sc_maddr, 0, ether_data_buff_size); 307 308 sc->hwreset = ie_reset; 309 sc->hwinit = ie_hwinit; 310 sc->chan_attn = ie_atten; 311 sc->intrhook = ie_intrhook; 312 sc->memcopyin = ie_copyin; 313 sc->memcopyout = ie_copyout; 314 sc->ie_bus_barrier = NULL; 315 sc->ie_bus_read16 = ie_read_16; 316 sc->ie_bus_write16 = ie_write_16; 317 sc->ie_bus_write24 = ie_write_24; 318 sc->sc_mediachange = NULL; 319 sc->sc_mediastatus = NULL; 320 321 sc->scp = 0; 322 sc->iscp = sc->scp + ((IE_SCP_SZ + 15) & ~15); 323 sc->scb = sc->iscp + IE_ISCP_SZ; 324 sc->buf_area = sc->scb + IE_SCB_SZ; 325 sc->buf_area_sz = sc->sc_msize - (sc->buf_area - sc->scp); 326 327 /* 328 * BUS_USE -> Interrupt Active High (edge-triggered), 329 * Lock function enabled, 330 * Internal bus throttle timer triggering, 331 * 82586 operating mode. 332 */ 333 ie_write_16(sc, IE_SCP_BUS_USE(sc->scp), IE_BUS_USE); 334 ie_write_24(sc, IE_SCP_ISCP(sc->scp), sc->iscp); 335 ie_write_16(sc, IE_ISCP_SCB(sc->iscp), sc->scb); 336 ie_write_24(sc, IE_ISCP_BASE(sc->iscp), sc->scp); 337 338 /* This has the side-effect of resetting the chip */ 339 i82586_proberam(sc); 340 341 /* Attach the MI back-end */ 342 i82586_attach(sc, "onboard", mvme_ea, NULL, 0, 0); 343 344 /* Register the event counter */ 345 evcnt_attach_dynamic(&ps->ps_evcnt, EVCNT_TYPE_INTR, 346 pcctwointr_evcnt(pa->pa_ipl), "ether", sc->sc_dev.dv_xname); 347 348 /* Finally, hook the hardware interrupt */ 349 pcctwointr_establish(PCCTWOV_LANC_IRQ, i82586_intr, pa->pa_ipl, sc, 350 &ps->ps_evcnt); 351 } 352