xref: /netbsd/sys/dev/pci/agp_amd.c (revision bf9ec67e)
1 /*	$NetBSD: agp_amd.c,v 1.8 2002/01/12 16:17:05 tsutsui Exp $	*/
2 
3 /*-
4  * Copyright (c) 2000 Doug Rabson
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  *
28  *	$FreeBSD: src/sys/pci/agp_amd.c,v 1.6 2001/07/05 21:28:46 jhb Exp $
29  */
30 
31 #include <sys/cdefs.h>
32 __KERNEL_RCSID(0, "$NetBSD: agp_amd.c,v 1.8 2002/01/12 16:17:05 tsutsui Exp $");
33 
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/malloc.h>
37 #include <sys/kernel.h>
38 #include <sys/lock.h>
39 #include <sys/proc.h>
40 #include <sys/conf.h>
41 #include <sys/device.h>
42 #include <sys/agpio.h>
43 
44 #include <uvm/uvm_extern.h>
45 
46 #include <dev/pci/pcivar.h>
47 #include <dev/pci/pcireg.h>
48 #include <dev/pci/agpvar.h>
49 #include <dev/pci/agpreg.h>
50 
51 #include <dev/pci/pcidevs.h>
52 
53 #define READ2(off)	bus_space_read_2(asc->iot, asc->ioh, off)
54 #define READ4(off)	bus_space_read_4(asc->iot, asc->ioh, off)
55 #define WRITE2(off,v)	bus_space_write_2(asc->iot, asc->ioh, off, v)
56 #define WRITE4(off,v)	bus_space_write_4(asc->iot, asc->ioh, off, v)
57 
58 struct agp_amd_gatt {
59 	bus_dmamap_t	ag_dmamap;
60 	bus_dma_segment_t ag_dmaseg;
61 	int		ag_nseg;
62 	u_int32_t	ag_entries;
63 	u_int32_t      *ag_vdir;	/* virtual address of page dir */
64 	bus_addr_t	ag_pdir;	/* bus address of page dir */
65 	u_int32_t      *ag_virtual;	/* virtual address of gatt */
66 	bus_addr_t	ag_physical;	/* bus address of gatt */
67 	size_t		ag_size;
68 };
69 
70 struct agp_amd_softc {
71 	u_int32_t	initial_aperture; /* aperture size at startup */
72 	struct agp_amd_gatt *gatt;
73 	bus_space_handle_t ioh;
74 	bus_space_tag_t iot;
75 };
76 
77 static u_int32_t agp_amd_get_aperture(struct agp_softc *);
78 static int agp_amd_set_aperture(struct agp_softc *, u_int32_t);
79 static int agp_amd_bind_page(struct agp_softc *, off_t, bus_addr_t);
80 static int agp_amd_unbind_page(struct agp_softc *, off_t);
81 static void agp_amd_flush_tlb(struct agp_softc *);
82 
83 
84 struct agp_methods agp_amd_methods = {
85 	agp_amd_get_aperture,
86 	agp_amd_set_aperture,
87 	agp_amd_bind_page,
88 	agp_amd_unbind_page,
89 	agp_amd_flush_tlb,
90 	agp_generic_enable,
91 	agp_generic_alloc_memory,
92 	agp_generic_free_memory,
93 	agp_generic_bind_memory,
94 	agp_generic_unbind_memory,
95 };
96 
97 
98 static struct agp_amd_gatt *
99 agp_amd_alloc_gatt(struct agp_softc *sc)
100 {
101 	u_int32_t apsize = AGP_GET_APERTURE(sc);
102 	u_int32_t entries = apsize >> AGP_PAGE_SHIFT;
103 	struct agp_amd_gatt *gatt;
104 	int i, npages;
105 	caddr_t vdir;
106 
107 	gatt = malloc(sizeof(struct agp_amd_gatt), M_AGP, M_NOWAIT);
108 	if (!gatt)
109 		return 0;
110 
111 	if (agp_alloc_dmamem(sc->as_dmat,
112 	    AGP_PAGE_SIZE + entries * sizeof(u_int32_t), 0,
113 	    &gatt->ag_dmamap, &vdir, &gatt->ag_pdir,
114 	    &gatt->ag_dmaseg, 1, &gatt->ag_nseg) != 0) {
115 		printf("failed to allocate GATT\n");
116 		free(gatt, M_AGP);
117 		return NULL;
118 	}
119 
120 	gatt->ag_vdir = (u_int32_t *)vdir;
121 	gatt->ag_entries = entries;
122 	gatt->ag_virtual = (u_int32_t *)(vdir + AGP_PAGE_SIZE);
123 	gatt->ag_physical = gatt->ag_pdir + AGP_PAGE_SIZE;
124 	gatt->ag_size = AGP_PAGE_SIZE + entries * sizeof(u_int32_t);
125 
126 	memset(gatt->ag_vdir, 0, AGP_PAGE_SIZE);
127 	memset(gatt->ag_virtual, 0, entries * sizeof(u_int32_t));
128 
129 	/*
130 	 * Map the pages of the GATT into the page directory.
131 	 */
132 	npages = ((entries * sizeof(u_int32_t) + AGP_PAGE_SIZE - 1)
133 		  >> AGP_PAGE_SHIFT);
134 
135 	for (i = 0; i < npages; i++)
136 		gatt->ag_vdir[i] = (gatt->ag_physical + i * AGP_PAGE_SIZE) | 1;
137 
138 	/*
139 	 * Make sure the chipset can see everything.
140 	 */
141 	agp_flush_cache();
142 
143 	return gatt;
144 }
145 
146 #if 0
147 static void
148 agp_amd_free_gatt(struct agp_softc *sc, struct agp_amd_gatt *gatt)
149 {
150 	agp_free_dmamem(sc->as_dmat, gatt->ag_size,
151 	    gatt->ag_dmamap, (caddr_t)gatt->ag_virtual, &gatt->ag_dmaseg,
152 	    gatt->ag_nseg);
153 	free(gatt, M_AGP);
154 }
155 #endif
156 
157 int
158 agp_amd_match(const struct pci_attach_args *pa)
159 {
160 
161 	switch (PCI_PRODUCT(pa->pa_id)) {
162 	case PCI_PRODUCT_AMD_SC751_SC:
163 	case PCI_PRODUCT_AMD_SC762_NB:
164 		return 1;
165 	}
166 
167 	return 0;
168 }
169 
170 int
171 agp_amd_attach(struct device *parent, struct device *self, void *aux)
172 {
173 	struct agp_softc *sc = (void *)self;
174 	struct agp_amd_softc *asc;
175 	struct pci_attach_args *pa = aux;
176 	struct agp_amd_gatt *gatt;
177 	pcireg_t reg;
178 	int error;
179 
180 	asc = malloc(sizeof *asc, M_AGP, M_NOWAIT|M_ZERO);
181 	if (asc == NULL) {
182 		printf(": can't allocate softc\n");
183 		/* agp_generic_detach(sc) */
184 		return ENOMEM;
185 	}
186 
187 	error = pci_mapreg_map(pa, AGP_AMD751_REGISTERS, PCI_MAPREG_TYPE_MEM, 0,
188 	    &asc->iot, &asc->ioh, NULL, NULL);
189 	if (error != 0) {
190 		printf(": can't map AGP registers\n");
191 		agp_generic_detach(sc);
192 		return error;
193 	}
194 
195 	if (agp_map_aperture(pa, sc) != 0) {
196 		printf(": can't map aperture\n");
197 		agp_generic_detach(sc);
198 		free(asc, M_AGP);
199 		return ENXIO;
200 	}
201 	pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_AGP, &sc->as_capoff,
202 	    NULL);
203 	sc->as_methods = &agp_amd_methods;
204 	sc->as_chipc = asc;
205 	asc->initial_aperture = AGP_GET_APERTURE(sc);
206 
207 	for (;;) {
208 		gatt = agp_amd_alloc_gatt(sc);
209 		if (gatt)
210 			break;
211 
212 		/*
213 		 * Probably contigmalloc failure. Try reducing the
214 		 * aperture so that the gatt size reduces.
215 		 */
216 		if (AGP_SET_APERTURE(sc, AGP_GET_APERTURE(sc) / 2)) {
217 			printf(": can't set aperture\n");
218 			return ENOMEM;
219 		}
220 	}
221 	asc->gatt = gatt;
222 
223 	/* Install the gatt. */
224 	WRITE4(AGP_AMD751_ATTBASE, gatt->ag_physical);
225 
226 	/* Enable synchronisation between host and agp. */
227 	reg = pci_conf_read(pa->pa_pc, pa->pa_tag, AGP_AMD751_MODECTRL);
228 	reg &= ~0x00ff00ff;
229 	reg |= (AGP_AMD751_MODECTRL_SYNEN) | (AGP_AMD751_MODECTRL2_GPDCE << 16);
230 	pci_conf_write(pa->pa_pc, pa->pa_tag, AGP_AMD751_MODECTRL, reg);
231 	/* Enable the TLB and flush */
232 	WRITE2(AGP_AMD751_STATUS,
233 	       READ2(AGP_AMD751_STATUS) | AGP_AMD751_STATUS_GCE);
234 	AGP_FLUSH_TLB(sc);
235 
236 	return 0;
237 }
238 
239 #if 0
240 static int
241 agp_amd_detach(struct agp_softc *sc)
242 {
243 	pcireg_t reg;
244 	struct agp_amd_softc *asc = sc->as_chipc;
245 
246 	/* Disable the TLB.. */
247 	WRITE2(AGP_AMD751_STATUS,
248 	       READ2(AGP_AMD751_STATUS) & ~AGP_AMD751_STATUS_GCE);
249 
250 	/* Disable host-agp sync */
251 	reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_AMD751_MODECTRL);
252 	reg &= 0xffffff00;
253 	pci_conf_write(sc->as_pc, sc->as_tag, AGP_AMD751_MODECTRL, reg);
254 
255 	/* Clear the GATT base */
256 	WRITE4(AGP_AMD751_ATTBASE, 0);
257 
258 	/* Put the aperture back the way it started. */
259 	AGP_SET_APERTURE(sc, asc->initial_aperture);
260 
261 	agp_amd_free_gatt(sc, asc->gatt);
262 
263 	/* XXXfvdl no pci_mapreg_unmap */
264 
265 	return 0;
266 }
267 #endif
268 
269 static u_int32_t
270 agp_amd_get_aperture(struct agp_softc *sc)
271 {
272 	int vas;
273 
274 	vas = (pci_conf_read(sc->as_pc, sc->as_tag, AGP_AMD751_APCTRL) & 0x06);
275 	vas >>= 1;
276 	/*
277 	 * The aperture size is equal to 32M<<vas.
278 	 */
279 	return (32*1024*1024) << vas;
280 }
281 
282 static int
283 agp_amd_set_aperture(struct agp_softc *sc, u_int32_t aperture)
284 {
285 	int vas;
286 	pcireg_t reg;
287 
288 	/*
289 	 * Check for a power of two and make sure its within the
290 	 * programmable range.
291 	 */
292 	if (aperture & (aperture - 1)
293 	    || aperture < 32*1024*1024
294 	    || aperture > 2U*1024*1024*1024)
295 		return EINVAL;
296 
297 	vas = ffs(aperture / 32*1024*1024) - 1;
298 
299 	reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_AMD751_APCTRL);
300 	reg = (reg & ~0x06) | (vas << 1);
301 	pci_conf_write(sc->as_pc, sc->as_tag, AGP_AMD751_APCTRL, reg);
302 
303 	return 0;
304 }
305 
306 static int
307 agp_amd_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical)
308 {
309 	struct agp_amd_softc *asc = sc->as_chipc;
310 
311 	if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT))
312 		return EINVAL;
313 
314 	asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical | 1;
315 	return 0;
316 }
317 
318 static int
319 agp_amd_unbind_page(struct agp_softc *sc, off_t offset)
320 {
321 	struct agp_amd_softc *asc = sc->as_chipc;
322 
323 	if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT))
324 		return EINVAL;
325 
326 	asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0;
327 	return 0;
328 }
329 
330 static void
331 agp_amd_flush_tlb(struct agp_softc *sc)
332 {
333 	struct agp_amd_softc *asc = sc->as_chipc;
334 
335 	/* Set the cache invalidate bit and wait for the chipset to clear */
336 	WRITE4(AGP_AMD751_TLBCTRL, 1);
337 	do {
338 		DELAY(1);
339 	} while (READ4(AGP_AMD751_TLBCTRL));
340 }
341