xref: /netbsd/sys/dev/pci/cmpci.c (revision c4a72b64)
1 /*	$NetBSD: cmpci.c,v 1.16 2002/10/02 16:51:05 thorpej Exp $	*/
2 
3 /*
4  * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Takuya SHIOZAKI <tshiozak@netbsd.org> .
9  *
10  * This code is derived from software contributed to The NetBSD Foundation
11  * by ITOH Yasufumi.
12  *
13  * Redistribution and use in source and binary forms, with or without
14  * modification, are permitted provided that the following conditions
15  * are met:
16  * 1. Redistributions of source code must retain the above copyright
17  *    notice, this list of conditions and the following disclaimer.
18  * 2. Redistributions in binary form must reproduce the above copyright
19  *    notice, this list of conditions and the following disclaimer in the
20  *    documentation and/or other materials provided with the distribution.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  *
34  */
35 
36 /*
37  * C-Media CMI8x38 Audio Chip Support.
38  *
39  * TODO:
40  *   - 4ch / 6ch support.
41  *   - Joystick support.
42  *
43  */
44 
45 #include <sys/cdefs.h>
46 __KERNEL_RCSID(0, "$NetBSD: cmpci.c,v 1.16 2002/10/02 16:51:05 thorpej Exp $");
47 
48 #if defined(AUDIO_DEBUG) || defined(DEBUG)
49 #define DPRINTF(x) if (cmpcidebug) printf x
50 int cmpcidebug = 0;
51 #else
52 #define DPRINTF(x)
53 #endif
54 
55 #include "mpu.h"
56 
57 #include <sys/param.h>
58 #include <sys/systm.h>
59 #include <sys/kernel.h>
60 #include <sys/malloc.h>
61 #include <sys/device.h>
62 #include <sys/proc.h>
63 
64 #include <dev/pci/pcidevs.h>
65 #include <dev/pci/pcivar.h>
66 
67 #include <sys/audioio.h>
68 #include <dev/audio_if.h>
69 #include <dev/midi_if.h>
70 
71 #include <dev/mulaw.h>
72 #include <dev/auconv.h>
73 #include <dev/pci/cmpcireg.h>
74 #include <dev/pci/cmpcivar.h>
75 
76 #include <dev/ic/mpuvar.h>
77 #include <machine/bus.h>
78 #include <machine/intr.h>
79 
80 /*
81  * Low-level HW interface
82  */
83 static __inline uint8_t cmpci_mixerreg_read __P((struct cmpci_softc *,
84 						 uint8_t));
85 static __inline void cmpci_mixerreg_write __P((struct cmpci_softc *,
86 					       uint8_t, uint8_t));
87 static __inline void cmpci_reg_partial_write_1 __P((struct cmpci_softc *,
88 						    int, int,
89 						    unsigned, unsigned));
90 static __inline void cmpci_reg_partial_write_4 __P((struct cmpci_softc *,
91 						    int, int,
92 						    uint32_t, uint32_t));
93 static __inline void cmpci_reg_set_1 __P((struct cmpci_softc *,
94 					  int, uint8_t));
95 static __inline void cmpci_reg_clear_1 __P((struct cmpci_softc *,
96 					    int, uint8_t));
97 static __inline void cmpci_reg_set_4 __P((struct cmpci_softc *,
98 					  int, uint32_t));
99 static __inline void cmpci_reg_clear_4 __P((struct cmpci_softc *,
100 					    int, uint32_t));
101 static int cmpci_rate_to_index __P((int));
102 static __inline int cmpci_index_to_rate __P((int));
103 static __inline int cmpci_index_to_divider __P((int));
104 
105 static int cmpci_adjust __P((int, int));
106 static void cmpci_set_mixer_gain __P((struct cmpci_softc *, int));
107 static void cmpci_set_out_ports __P((struct cmpci_softc *));
108 static int cmpci_set_in_ports __P((struct cmpci_softc *));
109 
110 
111 /*
112  * autoconf interface
113  */
114 static int cmpci_match __P((struct device *, struct cfdata *, void *));
115 static void cmpci_attach __P((struct device *, struct device *, void *));
116 
117 CFATTACH_DECL(cmpci, sizeof (struct cmpci_softc),
118     cmpci_match, cmpci_attach, NULL, NULL);
119 
120 /* interrupt */
121 static int cmpci_intr __P((void *));
122 
123 
124 /*
125  * DMA stuffs
126  */
127 static int cmpci_alloc_dmamem __P((struct cmpci_softc *,
128 				   size_t, int, int, caddr_t *));
129 static int cmpci_free_dmamem __P((struct cmpci_softc *, caddr_t, int));
130 static struct cmpci_dmanode * cmpci_find_dmamem __P((struct cmpci_softc *,
131 						     caddr_t));
132 
133 
134 /*
135  * interface to machine independent layer
136  */
137 static int cmpci_open __P((void *, int));
138 static void cmpci_close __P((void *));
139 static int cmpci_query_encoding __P((void *, struct audio_encoding *));
140 static int cmpci_set_params __P((void *, int, int,
141 				 struct audio_params *,
142 				 struct audio_params *));
143 static int cmpci_round_blocksize __P((void *, int));
144 static int cmpci_halt_output __P((void *));
145 static int cmpci_halt_input __P((void *));
146 static int cmpci_getdev __P((void *, struct audio_device *));
147 static int cmpci_set_port __P((void *, mixer_ctrl_t *));
148 static int cmpci_get_port __P((void *, mixer_ctrl_t *));
149 static int cmpci_query_devinfo __P((void *, mixer_devinfo_t *));
150 static void *cmpci_allocm __P((void *, int, size_t, int, int));
151 static void cmpci_freem __P((void *, void *, int));
152 static size_t cmpci_round_buffersize __P((void *, int, size_t));
153 static paddr_t cmpci_mappage __P((void *, void *, off_t, int));
154 static int cmpci_get_props __P((void *));
155 static int cmpci_trigger_output __P((void *, void *, void *, int,
156 				     void (*)(void *), void *,
157 				     struct audio_params *));
158 static int cmpci_trigger_input __P((void *, void *, void *, int,
159 				    void (*)(void *), void *,
160 				    struct audio_params *));
161 
162 static struct audio_hw_if cmpci_hw_if = {
163 	cmpci_open,		/* open */
164 	cmpci_close,		/* close */
165 	NULL,			/* drain */
166 	cmpci_query_encoding,	/* query_encoding */
167 	cmpci_set_params,	/* set_params */
168 	cmpci_round_blocksize,	/* round_blocksize */
169 	NULL,			/* commit_settings */
170 	NULL,			/* init_output */
171 	NULL,			/* init_input */
172 	NULL,			/* start_output */
173 	NULL,			/* start_input */
174 	cmpci_halt_output,	/* halt_output */
175 	cmpci_halt_input,	/* halt_input */
176 	NULL,			/* speaker_ctl */
177 	cmpci_getdev,		/* getdev */
178 	NULL,			/* setfd */
179 	cmpci_set_port,		/* set_port */
180 	cmpci_get_port,		/* get_port */
181 	cmpci_query_devinfo,	/* query_devinfo */
182 	cmpci_allocm,		/* allocm */
183 	cmpci_freem,		/* freem */
184 	cmpci_round_buffersize,/* round_buffersize */
185 	cmpci_mappage,		/* mappage */
186 	cmpci_get_props,	/* get_props */
187 	cmpci_trigger_output,	/* trigger_output */
188 	cmpci_trigger_input,	/* trigger_input */
189 	NULL,			/* dev_ioctl */
190 };
191 
192 
193 /*
194  * Low-level HW interface
195  */
196 
197 /* mixer register read/write */
198 static __inline uint8_t
199 cmpci_mixerreg_read(sc, no)
200 	struct cmpci_softc *sc;
201 	uint8_t no;
202 {
203 	uint8_t ret;
204 
205 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no);
206 	delay(10);
207 	ret = bus_space_read_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA);
208 	delay(10);
209 	return ret;
210 }
211 
212 static __inline void
213 cmpci_mixerreg_write(sc, no, val)
214 	struct cmpci_softc *sc;
215 	uint8_t no, val;
216 {
217 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no);
218 	delay(10);
219 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA, val);
220 	delay(10);
221 }
222 
223 
224 /* register partial write */
225 static __inline void
226 cmpci_reg_partial_write_1(sc, no, shift, mask, val)
227 	struct cmpci_softc *sc;
228 	int no, shift;
229 	unsigned mask, val;
230 {
231 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
232 	    (val<<shift) |
233 	    (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift)));
234 	delay(10);
235 }
236 
237 static __inline void
238 cmpci_reg_partial_write_4(sc, no, shift, mask, val)
239 	struct cmpci_softc *sc;
240 	int no, shift;
241 	uint32_t mask, val;
242 {
243 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
244 	    (val<<shift) |
245 	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift)));
246 	delay(10);
247 }
248 
249 /* register set/clear bit */
250 static __inline void
251 cmpci_reg_set_1(sc, no, mask)
252 	struct cmpci_softc *sc;
253 	int no;
254 	uint8_t mask;
255 {
256 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
257 	    (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) | mask));
258 	delay(10);
259 }
260 
261 static __inline void
262 cmpci_reg_clear_1(sc, no, mask)
263 	struct cmpci_softc *sc;
264 	int no;
265 	uint8_t mask;
266 {
267 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
268 	    (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~mask));
269 	delay(10);
270 }
271 
272 
273 static __inline void
274 cmpci_reg_set_4(sc, no, mask)
275 	struct cmpci_softc *sc;
276 	int no;
277 	uint32_t mask;
278 {
279 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
280 	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) | mask));
281 	delay(10);
282 }
283 
284 static __inline void
285 cmpci_reg_clear_4(sc, no, mask)
286 	struct cmpci_softc *sc;
287 	int no;
288 	uint32_t mask;
289 {
290 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
291 	    (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~mask));
292 	delay(10);
293 }
294 
295 
296 /* rate */
297 static const struct {
298 	int rate;
299 	int divider;
300 } cmpci_rate_table[CMPCI_REG_NUMRATE] = {
301 #define _RATE(n) { n, CMPCI_REG_RATE_ ## n }
302 	_RATE(5512),
303 	_RATE(8000),
304 	_RATE(11025),
305 	_RATE(16000),
306 	_RATE(22050),
307 	_RATE(32000),
308 	_RATE(44100),
309 	_RATE(48000)
310 #undef	_RATE
311 };
312 
313 static int
314 cmpci_rate_to_index(rate)
315 	int rate;
316 {
317 	int i;
318 
319 	for (i = 0; i < CMPCI_REG_NUMRATE - 1; i++)
320 		if (rate <=
321 		    (cmpci_rate_table[i].rate+cmpci_rate_table[i+1].rate) / 2)
322 			return i;
323 	return i;  /* 48000 */
324 }
325 
326 static __inline int
327 cmpci_index_to_rate(index)
328 	int index;
329 {
330 	return cmpci_rate_table[index].rate;
331 }
332 
333 static __inline int
334 cmpci_index_to_divider(index)
335 	int index;
336 {
337 	return cmpci_rate_table[index].divider;
338 }
339 
340 
341 /*
342  * interface to configure the device.
343  */
344 
345 static int
346 cmpci_match(parent, match, aux)
347 	struct device *parent;
348 	struct cfdata *match;
349 	void *aux;
350 {
351 	struct pci_attach_args *pa = (struct pci_attach_args *)aux;
352 
353 	if ( PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CMEDIA &&
354 	     (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338A ||
355 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8338B ||
356 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738 ||
357 	      PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CMEDIA_CMI8738B) )
358 		return 1;
359 
360 	return 0;
361 }
362 
363 static void
364 cmpci_attach(parent, self, aux)
365 	struct device *parent, *self;
366 	void *aux;
367 {
368 	struct cmpci_softc *sc = (struct cmpci_softc *)self;
369 	struct pci_attach_args *pa = (struct pci_attach_args *)aux;
370 	struct audio_attach_args aa;
371 	pci_intr_handle_t ih;
372 	char const *strintr;
373 	char devinfo[256];
374 	int i, v;
375 
376 	sc->sc_id = pa->pa_id;
377 	sc->sc_class = pa->pa_class;
378 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
379 	printf(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(sc->sc_class));
380 	switch (PCI_PRODUCT(sc->sc_id)) {
381 	case PCI_PRODUCT_CMEDIA_CMI8338A:
382 		/*FALLTHROUGH*/
383 	case PCI_PRODUCT_CMEDIA_CMI8338B:
384 		sc->sc_capable = CMPCI_CAP_CMI8338;
385 		break;
386 	case PCI_PRODUCT_CMEDIA_CMI8738:
387 		/*FALLTHROUGH*/
388 	case PCI_PRODUCT_CMEDIA_CMI8738B:
389 		sc->sc_capable = CMPCI_CAP_CMI8738;
390 		break;
391 	}
392 
393 	/* map I/O space */
394 	if (pci_mapreg_map(pa, CMPCI_PCI_IOBASEREG, PCI_MAPREG_TYPE_IO, 0,
395 		&sc->sc_iot, &sc->sc_ioh, NULL, NULL)) {
396 		printf("%s: failed to map I/O space\n", sc->sc_dev.dv_xname);
397 		return;
398 	}
399 
400 	/* interrupt */
401 	if (pci_intr_map(pa, &ih)) {
402 		printf("%s: failed to map interrupt\n", sc->sc_dev.dv_xname);
403 		return;
404 	}
405 	strintr = pci_intr_string(pa->pa_pc, ih);
406 	sc->sc_ih=pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, cmpci_intr, sc);
407 	if (sc->sc_ih == NULL) {
408 		printf("%s: failed to establish interrupt",
409 		    sc->sc_dev.dv_xname);
410 		if (strintr != NULL)
411 			printf(" at %s", strintr);
412 		printf("\n");
413 		return;
414 	}
415 	printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, strintr);
416 
417 	sc->sc_dmat = pa->pa_dmat;
418 
419 	audio_attach_mi(&cmpci_hw_if, sc, &sc->sc_dev);
420 
421 	/* attach OPL device */
422 	aa.type = AUDIODEV_TYPE_OPL;
423 	aa.hwif = NULL;
424 	aa.hdl = NULL;
425 	(void)config_found(&sc->sc_dev, &aa, audioprint);
426 
427 	/* attach MPU-401 device */
428 	aa.type = AUDIODEV_TYPE_MPU;
429 	aa.hwif = NULL;
430 	aa.hdl = NULL;
431 	if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
432 	    CMPCI_REG_MPU_BASE, CMPCI_REG_MPU_SIZE, &sc->sc_mpu_ioh) == 0)
433 		sc->sc_mpudev = config_found(&sc->sc_dev, &aa, audioprint);
434 
435 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_RESET, 0);
436 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, 0);
437 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, 0);
438 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX,
439 	    CMPCI_SB16_SW_CD|CMPCI_SB16_SW_MIC | CMPCI_SB16_SW_LINE);
440 	for (i = 0; i < CMPCI_NDEVS; i++) {
441 		switch(i) {
442 		/*
443 		 * CMI8738 defaults are
444 		 *  master:	0xe0	(0x00 - 0xf8)
445 		 *  FM, DAC:	0xc0	(0x00 - 0xf8)
446 		 *  PC speaker:	0x80	(0x00 - 0xc0)
447 		 *  others:	0
448 		 */
449 		/* volume */
450 		case CMPCI_MASTER_VOL:
451 			v = 128;	/* 224 */
452 			break;
453 		case CMPCI_FM_VOL:
454 		case CMPCI_DAC_VOL:
455 			v = 192;
456 			break;
457 		case CMPCI_PCSPEAKER:
458 			v = 128;
459 			break;
460 
461 		/* booleans, set to true */
462 		case CMPCI_CD_MUTE:
463 		case CMPCI_MIC_MUTE:
464 		case CMPCI_LINE_IN_MUTE:
465 		case CMPCI_AUX_IN_MUTE:
466 			v = 1;
467 			break;
468 
469 		/* volume with inital value 0 */
470 		case CMPCI_CD_VOL:
471 		case CMPCI_LINE_IN_VOL:
472 		case CMPCI_AUX_IN_VOL:
473 		case CMPCI_MIC_VOL:
474 		case CMPCI_MIC_RECVOL:
475 			/* FALLTHROUGH */
476 
477 		/* others are cleared */
478 		case CMPCI_MIC_PREAMP:
479 		case CMPCI_RECORD_SOURCE:
480 		case CMPCI_PLAYBACK_MODE:
481 		case CMPCI_SPDIF_IN_SELECT:
482 		case CMPCI_SPDIF_IN_PHASE:
483 		case CMPCI_SPDIF_LOOP:
484 		case CMPCI_SPDIF_OUT_PLAYBACK:
485 		case CMPCI_SPDIF_OUT_VOLTAGE:
486 		case CMPCI_MONITOR_DAC:
487 		case CMPCI_REAR:
488 		case CMPCI_INDIVIDUAL:
489 		case CMPCI_REVERSE:
490 		case CMPCI_SURROUND:
491 		default:
492 			v = 0;
493 			break;
494 		}
495 		sc->sc_gain[i][CMPCI_LEFT] = sc->sc_gain[i][CMPCI_RIGHT] = v;
496 		cmpci_set_mixer_gain(sc, i);
497 	}
498 }
499 
500 
501 static int
502 cmpci_intr(handle)
503 	void *handle;
504 {
505 	struct cmpci_softc *sc = handle;
506 	uint32_t intrstat;
507 
508 	intrstat = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
509 	    CMPCI_REG_INTR_STATUS);
510 
511 	if (!(intrstat & CMPCI_REG_ANY_INTR))
512 		return 0;
513 
514 	delay(10);
515 
516 	/* disable and reset intr */
517 	if (intrstat & CMPCI_REG_CH0_INTR)
518 		cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL,
519 		   CMPCI_REG_CH0_INTR_ENABLE);
520 	if (intrstat & CMPCI_REG_CH1_INTR)
521 		cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL,
522 		    CMPCI_REG_CH1_INTR_ENABLE);
523 
524 	if (intrstat & CMPCI_REG_CH0_INTR) {
525 		if (sc->sc_play.intr != NULL)
526 			(*sc->sc_play.intr)(sc->sc_play.intr_arg);
527 	}
528 	if (intrstat & CMPCI_REG_CH1_INTR) {
529 		if (sc->sc_rec.intr != NULL)
530 			(*sc->sc_rec.intr)(sc->sc_rec.intr_arg);
531 	}
532 
533 	/* enable intr */
534 	if (intrstat & CMPCI_REG_CH0_INTR)
535 		cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL,
536 		    CMPCI_REG_CH0_INTR_ENABLE);
537 	if (intrstat & CMPCI_REG_CH1_INTR)
538 		cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL,
539 		    CMPCI_REG_CH1_INTR_ENABLE);
540 
541 #if NMPU > 0
542 	if (intrstat & CMPCI_REG_UART_INTR && sc->sc_mpudev != NULL)
543 		mpu_intr(sc->sc_mpudev);
544 #endif
545 
546 	return 1;
547 }
548 
549 
550 /* open/close */
551 static int
552 cmpci_open(handle, flags)
553 	void *handle;
554 	int flags;
555 {
556 	return 0;
557 }
558 
559 static void
560 cmpci_close(handle)
561 	void *handle;
562 {
563 }
564 
565 static int
566 cmpci_query_encoding(handle, fp)
567 	void *handle;
568 	struct audio_encoding *fp;
569 {
570 	switch (fp->index) {
571 	case 0:
572 		strcpy(fp->name, AudioEulinear);
573 		fp->encoding = AUDIO_ENCODING_ULINEAR;
574 		fp->precision = 8;
575 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
576 		break;
577 	case 1:
578 		strcpy(fp->name, AudioEmulaw);
579 		fp->encoding = AUDIO_ENCODING_ULAW;
580 		fp->precision = 8;
581 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
582 		break;
583 	case 2:
584 		strcpy(fp->name, AudioEalaw);
585 		fp->encoding = AUDIO_ENCODING_ALAW;
586 		fp->precision = 8;
587 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
588 		break;
589 	case 3:
590 		strcpy(fp->name, AudioEslinear);
591 		fp->encoding = AUDIO_ENCODING_SLINEAR;
592 		fp->precision = 8;
593 		fp->flags = 0;
594 		break;
595 	case 4:
596 		strcpy(fp->name, AudioEslinear_le);
597 		fp->encoding = AUDIO_ENCODING_SLINEAR_LE;
598 		fp->precision = 16;
599 		fp->flags = 0;
600 		break;
601 	case 5:
602 		strcpy(fp->name, AudioEulinear_le);
603 		fp->encoding = AUDIO_ENCODING_ULINEAR_LE;
604 		fp->precision = 16;
605 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
606 		break;
607 	case 6:
608 		strcpy(fp->name, AudioEslinear_be);
609 		fp->encoding = AUDIO_ENCODING_SLINEAR_BE;
610 		fp->precision = 16;
611 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
612 		break;
613 	case 7:
614 		strcpy(fp->name, AudioEulinear_be);
615 		fp->encoding = AUDIO_ENCODING_ULINEAR_BE;
616 		fp->precision = 16;
617 		fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
618 		break;
619 	default:
620 		return EINVAL;
621 	}
622 	return 0;
623 }
624 
625 
626 static int
627 cmpci_set_params(handle, setmode, usemode, play, rec)
628 	void *handle;
629 	int setmode, usemode;
630 	struct audio_params *play, *rec;
631 {
632 	int i;
633 	struct cmpci_softc *sc = handle;
634 
635 	for (i = 0; i < 2; i++) {
636 		int md_format;
637 		int md_divide;
638 		int md_index;
639 		int mode;
640 		struct audio_params *p;
641 
642 		switch (i) {
643 		case 0:
644 			mode = AUMODE_PLAY;
645 			p = play;
646 			break;
647 		case 1:
648 			mode = AUMODE_RECORD;
649 			p = rec;
650 			break;
651 		}
652 
653 		if (!(setmode & mode))
654 			continue;
655 
656 
657 		/* format */
658 		p->sw_code = NULL;
659 		switch ( p->channels ) {
660 		case 1:
661 			md_format = CMPCI_REG_FORMAT_MONO;
662 			break;
663 		case 2:
664 			md_format = CMPCI_REG_FORMAT_STEREO;
665 			break;
666 		default:
667 			return (EINVAL);
668 		}
669 		switch (p->encoding) {
670 		case AUDIO_ENCODING_ULAW:
671 			if (p->precision != 8)
672 				return (EINVAL);
673 			if (mode & AUMODE_PLAY) {
674 				p->factor = 2;
675 				p->sw_code = mulaw_to_slinear16_le;
676 				md_format |= CMPCI_REG_FORMAT_16BIT;
677 			} else {
678 				p->sw_code = ulinear8_to_mulaw;
679 				md_format |= CMPCI_REG_FORMAT_8BIT;
680 			}
681 			break;
682 		case AUDIO_ENCODING_ALAW:
683 			if (p->precision != 8)
684 				return (EINVAL);
685 			if (mode & AUMODE_PLAY) {
686 				p->factor = 2;
687 				p->sw_code = alaw_to_slinear16_le;
688 				md_format |= CMPCI_REG_FORMAT_16BIT;
689 			} else {
690 				p->sw_code = ulinear8_to_alaw;
691 				md_format |= CMPCI_REG_FORMAT_8BIT;
692 			}
693 			break;
694 		case AUDIO_ENCODING_SLINEAR_LE:
695 			switch (p->precision) {
696 			case 8:
697 				p->sw_code = change_sign8;
698 				md_format |= CMPCI_REG_FORMAT_8BIT;
699 				break;
700 			case 16:
701 				md_format |= CMPCI_REG_FORMAT_16BIT;
702 				break;
703 			default:
704 				return (EINVAL);
705 			}
706 			break;
707 		case AUDIO_ENCODING_SLINEAR_BE:
708 			switch (p->precision) {
709 			case 8:
710 				md_format |= CMPCI_REG_FORMAT_8BIT;
711 				p->sw_code = change_sign8;
712 				break;
713 			case 16:
714 				md_format |= CMPCI_REG_FORMAT_16BIT;
715 				p->sw_code = swap_bytes;
716 				break;
717 			default:
718 				return (EINVAL);
719 			}
720 			break;
721 		case AUDIO_ENCODING_ULINEAR_LE:
722 			switch (p->precision) {
723 			case 8:
724 				md_format |= CMPCI_REG_FORMAT_8BIT;
725 				break;
726 			case 16:
727 				md_format |= CMPCI_REG_FORMAT_16BIT;
728 				p->sw_code = change_sign16_le;
729 				break;
730 			default:
731 				return (EINVAL);
732 			}
733 			break;
734 		case AUDIO_ENCODING_ULINEAR_BE:
735 			switch (p->precision) {
736 			case 8:
737 				md_format |= CMPCI_REG_FORMAT_8BIT;
738 				break;
739 			case 16:
740 				md_format |= CMPCI_REG_FORMAT_16BIT;
741 				if (mode & AUMODE_PLAY)
742 					p->sw_code =
743 					    swap_bytes_change_sign16_le;
744 				else
745 					p->sw_code =
746 					    change_sign16_swap_bytes_le;
747 				break;
748 			default:
749 				return (EINVAL);
750 			}
751 			break;
752 		default:
753 			return (EINVAL);
754 		}
755 		if (mode & AUMODE_PLAY)
756 			cmpci_reg_partial_write_4(sc,
757 			   CMPCI_REG_CHANNEL_FORMAT,
758 			   CMPCI_REG_CH0_FORMAT_SHIFT,
759 			   CMPCI_REG_CH0_FORMAT_MASK, md_format);
760 		else
761 			cmpci_reg_partial_write_4(sc,
762 			   CMPCI_REG_CHANNEL_FORMAT,
763 			   CMPCI_REG_CH1_FORMAT_SHIFT,
764 			   CMPCI_REG_CH1_FORMAT_MASK, md_format);
765 		/* sample rate */
766 		md_index = cmpci_rate_to_index(p->sample_rate);
767 		md_divide = cmpci_index_to_divider(md_index);
768 		p->sample_rate = cmpci_index_to_rate(md_index);
769 		DPRINTF(("%s: sample:%d, divider=%d\n",
770 			 sc->sc_dev.dv_xname, (int)p->sample_rate, md_divide));
771 		if (mode & AUMODE_PLAY) {
772 			cmpci_reg_partial_write_4(sc,
773 			    CMPCI_REG_FUNC_1, CMPCI_REG_DAC_FS_SHIFT,
774 			    CMPCI_REG_DAC_FS_MASK, md_divide);
775 			sc->sc_play.md_divide = md_divide;
776 		} else {
777 			cmpci_reg_partial_write_4(sc,
778 			    CMPCI_REG_FUNC_1, CMPCI_REG_ADC_FS_SHIFT,
779 			    CMPCI_REG_ADC_FS_MASK, md_divide);
780 			sc->sc_rec.md_divide = md_divide;
781 		}
782 		cmpci_set_out_ports(sc);
783 		cmpci_set_in_ports(sc);
784 	}
785 	return 0;
786 }
787 
788 /* ARGSUSED */
789 static int
790 cmpci_round_blocksize(handle, block)
791 	void *handle;
792 	int block;
793 {
794 	return (block & -4);
795 }
796 
797 static int
798 cmpci_halt_output(handle)
799     void *handle;
800 {
801 	struct cmpci_softc *sc = handle;
802 	int s;
803 
804 	s = splaudio();
805 	sc->sc_play.intr = NULL;
806 	cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE);
807 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE);
808 	/* wait for reset DMA */
809 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET);
810 	delay(10);
811 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET);
812 	splx(s);
813 
814 	return 0;
815 }
816 
817 static int
818 cmpci_halt_input(handle)
819 	void *handle;
820 {
821 	struct cmpci_softc *sc = handle;
822 	int s;
823 
824 	s = splaudio();
825 	sc->sc_rec.intr = NULL;
826 	cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE);
827 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE);
828 	/* wait for reset DMA */
829 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET);
830 	delay(10);
831 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET);
832 	splx(s);
833 
834 	return 0;
835 }
836 
837 
838 /* get audio device information */
839 static int
840 cmpci_getdev(handle, ad)
841 	void *handle;
842 	struct audio_device *ad;
843 {
844 	struct cmpci_softc *sc = handle;
845 
846 	strncpy(ad->name, "CMI PCI Audio", sizeof(ad->name));
847 	snprintf(ad->version, sizeof(ad->version), "0x%02x",
848 		 PCI_REVISION(sc->sc_class));
849 	switch (PCI_PRODUCT(sc->sc_id)) {
850 	case PCI_PRODUCT_CMEDIA_CMI8338A:
851 		strncpy(ad->config, "CMI8338A", sizeof(ad->config));
852 		break;
853 	case PCI_PRODUCT_CMEDIA_CMI8338B:
854 		strncpy(ad->config, "CMI8338B", sizeof(ad->config));
855 		break;
856 	case PCI_PRODUCT_CMEDIA_CMI8738:
857 		strncpy(ad->config, "CMI8738", sizeof(ad->config));
858 		break;
859 	case PCI_PRODUCT_CMEDIA_CMI8738B:
860 		strncpy(ad->config, "CMI8738B", sizeof(ad->config));
861 		break;
862 	default:
863 		strncpy(ad->config, "unknown", sizeof(ad->config));
864 	}
865 
866 	return 0;
867 }
868 
869 
870 /* mixer device information */
871 int
872 cmpci_query_devinfo(handle, dip)
873 	void *handle;
874 	mixer_devinfo_t *dip;
875 {
876 	static const char *const mixer_port_names[] = {
877 		AudioNdac, AudioNfmsynth, AudioNcd, AudioNline, AudioNaux,
878 		AudioNmicrophone
879 	};
880 	static const char *const mixer_classes[] = {
881 		AudioCinputs, AudioCoutputs, AudioCrecord, CmpciCplayback,
882 		CmpciCspdif
883 	};
884 	struct cmpci_softc *sc = handle;
885 	int i;
886 
887 	dip->prev = dip->next = AUDIO_MIXER_LAST;
888 
889 	switch (dip->index) {
890 	case CMPCI_INPUT_CLASS:
891 	case CMPCI_OUTPUT_CLASS:
892 	case CMPCI_RECORD_CLASS:
893 	case CMPCI_PLAYBACK_CLASS:
894 	case CMPCI_SPDIF_CLASS:
895 		dip->type = AUDIO_MIXER_CLASS;
896 		dip->mixer_class = dip->index;
897 		strcpy(dip->label.name,
898 		    mixer_classes[dip->index - CMPCI_INPUT_CLASS]);
899 		return 0;
900 
901 	case CMPCI_AUX_IN_VOL:
902 		dip->un.v.delta = 1 << (8 - CMPCI_REG_AUX_VALBITS);
903 		goto vol1;
904 	case CMPCI_DAC_VOL:
905 	case CMPCI_FM_VOL:
906 	case CMPCI_CD_VOL:
907 	case CMPCI_LINE_IN_VOL:
908 	case CMPCI_MIC_VOL:
909 		dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS);
910 	vol1:	dip->mixer_class = CMPCI_INPUT_CLASS;
911 		dip->next = dip->index + 6;	/* CMPCI_xxx_MUTE */
912 		strcpy(dip->label.name, mixer_port_names[dip->index]);
913 		dip->un.v.num_channels = (dip->index == CMPCI_MIC_VOL ? 1 : 2);
914 	vol:
915 		dip->type = AUDIO_MIXER_VALUE;
916 		strcpy(dip->un.v.units.name, AudioNvolume);
917 		return 0;
918 
919 	case CMPCI_MIC_MUTE:
920 		dip->next = CMPCI_MIC_PREAMP;
921 		/* FALLTHROUGH */
922 	case CMPCI_DAC_MUTE:
923 	case CMPCI_FM_MUTE:
924 	case CMPCI_CD_MUTE:
925 	case CMPCI_LINE_IN_MUTE:
926 	case CMPCI_AUX_IN_MUTE:
927 		dip->prev = dip->index - 6;	/* CMPCI_xxx_VOL */
928 		dip->mixer_class = CMPCI_INPUT_CLASS;
929 		strcpy(dip->label.name, AudioNmute);
930 		goto on_off;
931 	on_off:
932 		dip->type = AUDIO_MIXER_ENUM;
933 		dip->un.e.num_mem = 2;
934 		strcpy(dip->un.e.member[0].label.name, AudioNoff);
935 		dip->un.e.member[0].ord = 0;
936 		strcpy(dip->un.e.member[1].label.name, AudioNon);
937 		dip->un.e.member[1].ord = 1;
938 		return 0;
939 
940 	case CMPCI_MIC_PREAMP:
941 		dip->mixer_class = CMPCI_INPUT_CLASS;
942 		dip->prev = CMPCI_MIC_MUTE;
943 		strcpy(dip->label.name, AudioNpreamp);
944 		goto on_off;
945 	case CMPCI_PCSPEAKER:
946 		dip->mixer_class = CMPCI_INPUT_CLASS;
947 		strcpy(dip->label.name, AudioNspeaker);
948 		dip->un.v.num_channels = 1;
949 		dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_SPEAKER_VALBITS);
950 		goto vol;
951 	case CMPCI_RECORD_SOURCE:
952 		dip->mixer_class = CMPCI_RECORD_CLASS;
953 		strcpy(dip->label.name, AudioNsource);
954 		dip->type = AUDIO_MIXER_SET;
955 		dip->un.s.num_mem = 7;
956 		strcpy(dip->un.s.member[0].label.name, AudioNmicrophone);
957 		dip->un.s.member[0].mask = CMPCI_RECORD_SOURCE_MIC;
958 		strcpy(dip->un.s.member[1].label.name, AudioNcd);
959 		dip->un.s.member[1].mask = CMPCI_RECORD_SOURCE_CD;
960 		strcpy(dip->un.s.member[2].label.name, AudioNline);
961 		dip->un.s.member[2].mask = CMPCI_RECORD_SOURCE_LINE_IN;
962 		strcpy(dip->un.s.member[3].label.name, AudioNaux);
963 		dip->un.s.member[3].mask = CMPCI_RECORD_SOURCE_AUX_IN;
964 		strcpy(dip->un.s.member[4].label.name, AudioNwave);
965 		dip->un.s.member[4].mask = CMPCI_RECORD_SOURCE_WAVE;
966 		strcpy(dip->un.s.member[5].label.name, AudioNfmsynth);
967 		dip->un.s.member[5].mask = CMPCI_RECORD_SOURCE_FM;
968 		strcpy(dip->un.s.member[6].label.name, CmpciNspdif);
969 		dip->un.s.member[6].mask = CMPCI_RECORD_SOURCE_SPDIF;
970 		return 0;
971 	case CMPCI_MIC_RECVOL:
972 		dip->mixer_class = CMPCI_RECORD_CLASS;
973 		strcpy(dip->label.name, AudioNmicrophone);
974 		dip->un.v.num_channels = 1;
975 		dip->un.v.delta = 1 << (8 - CMPCI_REG_ADMIC_VALBITS);
976 		goto vol;
977 
978 	case CMPCI_PLAYBACK_MODE:
979 		dip->mixer_class = CMPCI_PLAYBACK_CLASS;
980 		dip->type = AUDIO_MIXER_ENUM;
981 		strcpy(dip->label.name, AudioNmode);
982 		dip->un.e.num_mem = 2;
983 		strcpy(dip->un.e.member[0].label.name, AudioNdac);
984 		dip->un.e.member[0].ord = CMPCI_PLAYBACK_MODE_WAVE;
985 		strcpy(dip->un.e.member[1].label.name, CmpciNspdif);
986 		dip->un.e.member[1].ord = CMPCI_PLAYBACK_MODE_SPDIF;
987 		return 0;
988 	case CMPCI_SPDIF_IN_SELECT:
989 		dip->mixer_class = CMPCI_SPDIF_CLASS;
990 		dip->type = AUDIO_MIXER_ENUM;
991 		dip->next = CMPCI_SPDIF_IN_PHASE;
992 		strcpy(dip->label.name, AudioNinput);
993 		i = 0;
994 		strcpy(dip->un.e.member[i].label.name, CmpciNspdin1);
995 		dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN1;
996 		if (CMPCI_ISCAP(sc, 2ND_SPDIN)) {
997 			strcpy(dip->un.e.member[i].label.name, CmpciNspdin2);
998 			dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDIN2;
999 		}
1000 		strcpy(dip->un.e.member[i].label.name, CmpciNspdout);
1001 		dip->un.e.member[i++].ord = CMPCI_SPDIF_IN_SPDOUT;
1002 		dip->un.e.num_mem = i;
1003 		return 0;
1004 	case CMPCI_SPDIF_IN_PHASE:
1005 		dip->mixer_class = CMPCI_SPDIF_CLASS;
1006 		dip->prev = CMPCI_SPDIF_IN_SELECT;
1007 		strcpy(dip->label.name, CmpciNphase);
1008 		dip->type = AUDIO_MIXER_ENUM;
1009 		dip->un.e.num_mem = 2;
1010 		strcpy(dip->un.e.member[0].label.name, CmpciNpositive);
1011 		dip->un.e.member[0].ord = CMPCI_SPDIF_IN_PHASE_POSITIVE;
1012 		strcpy(dip->un.e.member[1].label.name, CmpciNnegative);
1013 		dip->un.e.member[1].ord = CMPCI_SPDIF_IN_PHASE_NEGATIVE;
1014 		return 0;
1015 	case CMPCI_SPDIF_LOOP:
1016 		dip->mixer_class = CMPCI_SPDIF_CLASS;
1017 		dip->next = CMPCI_SPDIF_OUT_PLAYBACK;
1018 		strcpy(dip->label.name, AudioNoutput);
1019 		dip->type = AUDIO_MIXER_ENUM;
1020 		dip->un.e.num_mem = 2;
1021 		strcpy(dip->un.e.member[0].label.name, CmpciNplayback);
1022 		dip->un.e.member[0].ord = CMPCI_SPDIF_LOOP_OFF;
1023 		strcpy(dip->un.e.member[1].label.name, CmpciNspdin);
1024 		dip->un.e.member[1].ord = CMPCI_SPDIF_LOOP_ON;
1025 		return 0;
1026 	case CMPCI_SPDIF_OUT_PLAYBACK:
1027 		dip->mixer_class = CMPCI_SPDIF_CLASS;
1028 		dip->prev = CMPCI_SPDIF_LOOP;
1029 		dip->next = CMPCI_SPDIF_OUT_VOLTAGE;
1030 		strcpy(dip->label.name, CmpciNplayback);
1031 		dip->type = AUDIO_MIXER_ENUM;
1032 		dip->un.e.num_mem = 2;
1033 		strcpy(dip->un.e.member[0].label.name, AudioNwave);
1034 		dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_PLAYBACK_WAVE;
1035 		strcpy(dip->un.e.member[1].label.name, CmpciNlegacy);
1036 		dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_PLAYBACK_LEGACY;
1037 		return 0;
1038 	case CMPCI_SPDIF_OUT_VOLTAGE:
1039 		dip->mixer_class = CMPCI_SPDIF_CLASS;
1040 		dip->prev = CMPCI_SPDIF_OUT_PLAYBACK;
1041 		strcpy(dip->label.name, CmpciNvoltage);
1042 		dip->type = AUDIO_MIXER_ENUM;
1043 		dip->un.e.num_mem = 2;
1044 		strcpy(dip->un.e.member[0].label.name, CmpciNlow_v);
1045 		dip->un.e.member[0].ord = CMPCI_SPDIF_OUT_VOLTAGE_LOW;
1046 		strcpy(dip->un.e.member[1].label.name, CmpciNhigh_v);
1047 		dip->un.e.member[1].ord = CMPCI_SPDIF_OUT_VOLTAGE_HIGH;
1048 		return 0;
1049 	case CMPCI_MONITOR_DAC:
1050 		dip->mixer_class = CMPCI_SPDIF_CLASS;
1051 		strcpy(dip->label.name, AudioNmonitor);
1052 		dip->type = AUDIO_MIXER_ENUM;
1053 		dip->un.e.num_mem = 3;
1054 		strcpy(dip->un.e.member[0].label.name, AudioNoff);
1055 		dip->un.e.member[0].ord = CMPCI_MONITOR_DAC_OFF;
1056 		strcpy(dip->un.e.member[1].label.name, CmpciNspdin);
1057 		dip->un.e.member[1].ord = CMPCI_MONITOR_DAC_SPDIN;
1058 		strcpy(dip->un.e.member[2].label.name, CmpciNspdout);
1059 		dip->un.e.member[2].ord = CMPCI_MONITOR_DAC_SPDOUT;
1060 		return 0;
1061 
1062 	case CMPCI_MASTER_VOL:
1063 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
1064 		strcpy(dip->label.name, AudioNmaster);
1065 		dip->un.v.num_channels = 2;
1066 		dip->un.v.delta = 1 << (8 - CMPCI_SB16_MIXER_VALBITS);
1067 		goto vol;
1068 	case CMPCI_REAR:
1069 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
1070 		dip->next = CMPCI_INDIVIDUAL;
1071 		strcpy(dip->label.name, CmpciNrear);
1072 		goto on_off;
1073 	case CMPCI_INDIVIDUAL:
1074 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
1075 		dip->prev = CMPCI_REAR;
1076 		dip->next = CMPCI_REVERSE;
1077 		strcpy(dip->label.name, CmpciNindividual);
1078 		goto on_off;
1079 	case CMPCI_REVERSE:
1080 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
1081 		dip->prev = CMPCI_INDIVIDUAL;
1082 		strcpy(dip->label.name, CmpciNreverse);
1083 		goto on_off;
1084 	case CMPCI_SURROUND:
1085 		dip->mixer_class = CMPCI_OUTPUT_CLASS;
1086 		strcpy(dip->label.name, CmpciNsurround);
1087 		goto on_off;
1088 	}
1089 
1090 	return ENXIO;
1091 }
1092 
1093 static int
1094 cmpci_alloc_dmamem(sc, size, type, flags, r_addr)
1095 	struct cmpci_softc *sc;
1096 	size_t size;
1097 	int type, flags;
1098 	caddr_t *r_addr;
1099 {
1100 	int error = 0;
1101 	struct cmpci_dmanode *n;
1102 	int w;
1103 
1104 	n = malloc(sizeof(struct cmpci_dmanode), type, flags);
1105 	if (n == NULL) {
1106 		error = ENOMEM;
1107 		goto quit;
1108 	}
1109 
1110 	w = (flags & M_NOWAIT) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK;
1111 #define CMPCI_DMABUF_ALIGN    0x4
1112 #define CMPCI_DMABUF_BOUNDARY 0x0
1113 	n->cd_tag = sc->sc_dmat;
1114 	n->cd_size = size;
1115 	error = bus_dmamem_alloc(n->cd_tag, n->cd_size,
1116 	    CMPCI_DMABUF_ALIGN, CMPCI_DMABUF_BOUNDARY, n->cd_segs,
1117 	    sizeof(n->cd_segs)/sizeof(n->cd_segs[0]), &n->cd_nsegs, w);
1118 	if (error)
1119 		goto mfree;
1120 	error = bus_dmamem_map(n->cd_tag, n->cd_segs, n->cd_nsegs, n->cd_size,
1121 	    &n->cd_addr, w | BUS_DMA_COHERENT);
1122 	if (error)
1123 		goto dmafree;
1124 	error = bus_dmamap_create(n->cd_tag, n->cd_size, 1, n->cd_size, 0,
1125 	    w, &n->cd_map);
1126 	if (error)
1127 		goto unmap;
1128 	error = bus_dmamap_load(n->cd_tag, n->cd_map, n->cd_addr, n->cd_size,
1129 	    NULL, w);
1130 	if (error)
1131 		goto destroy;
1132 
1133 	n->cd_next = sc->sc_dmap;
1134 	sc->sc_dmap = n;
1135 	*r_addr = KVADDR(n);
1136 	return 0;
1137 
1138  destroy:
1139 	bus_dmamap_destroy(n->cd_tag, n->cd_map);
1140  unmap:
1141 	bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size);
1142  dmafree:
1143 	bus_dmamem_free(n->cd_tag,
1144 			n->cd_segs, sizeof(n->cd_segs)/sizeof(n->cd_segs[0]));
1145  mfree:
1146 	free(n, type);
1147  quit:
1148 	return error;
1149 }
1150 
1151 static int
1152 cmpci_free_dmamem(sc, addr, type)
1153 	struct cmpci_softc *sc;
1154 	caddr_t addr;
1155 	int type;
1156 {
1157 	struct cmpci_dmanode **nnp;
1158 
1159 	for (nnp = &sc->sc_dmap; *nnp; nnp= &(*nnp)->cd_next) {
1160 		if ((*nnp)->cd_addr == addr) {
1161 			struct cmpci_dmanode *n = *nnp;
1162 			bus_dmamap_unload(n->cd_tag, n->cd_map);
1163 			bus_dmamap_destroy(n->cd_tag, n->cd_map);
1164 			bus_dmamem_unmap(n->cd_tag, n->cd_addr, n->cd_size);
1165 			bus_dmamem_free(n->cd_tag, n->cd_segs,
1166 			    sizeof(n->cd_segs)/sizeof(n->cd_segs[0]));
1167 			free(n, type);
1168 			return 0;
1169 		}
1170 	}
1171 	return -1;
1172 }
1173 
1174 static struct cmpci_dmanode *
1175 cmpci_find_dmamem(sc, addr)
1176 	struct cmpci_softc *sc;
1177 	caddr_t addr;
1178 {
1179 	struct cmpci_dmanode *p;
1180 
1181 	for (p=sc->sc_dmap; p; p=p->cd_next)
1182 		if ( KVADDR(p) == (void *)addr )
1183 			break;
1184 	return p;
1185 }
1186 
1187 
1188 #if 0
1189 static void
1190 cmpci_print_dmamem __P((struct cmpci_dmanode *p));
1191 static void
1192 cmpci_print_dmamem(p)
1193 	struct cmpci_dmanode *p;
1194 {
1195 	DPRINTF(("DMA at virt:%p, dmaseg:%p, mapseg:%p, size:%p\n",
1196 		 (void *)p->cd_addr, (void *)p->cd_segs[0].ds_addr,
1197 		 (void *)DMAADDR(p), (void *)p->cd_size));
1198 }
1199 #endif /* DEBUG */
1200 
1201 
1202 static void *
1203 cmpci_allocm(handle, direction, size, type, flags)
1204 	void  *handle;
1205 	int    direction;
1206 	size_t size;
1207 	int    type, flags;
1208 {
1209 	struct cmpci_softc *sc = handle;
1210 	caddr_t addr;
1211 
1212 	if (cmpci_alloc_dmamem(sc, size, type, flags, &addr))
1213 		return NULL;
1214 	return addr;
1215 }
1216 
1217 static void
1218 cmpci_freem(handle, addr, type)
1219 	void	*handle;
1220 	void	*addr;
1221 	int	type;
1222 {
1223 	struct cmpci_softc *sc = handle;
1224 
1225 	cmpci_free_dmamem(sc, addr, type);
1226 }
1227 
1228 
1229 #define MAXVAL 256
1230 static int
1231 cmpci_adjust(val, mask)
1232 	int val, mask;
1233 {
1234 	val += (MAXVAL - mask) >> 1;
1235 	if (val >= MAXVAL)
1236 		val = MAXVAL-1;
1237 	return val & mask;
1238 }
1239 
1240 static void
1241 cmpci_set_mixer_gain(sc, port)
1242 	struct cmpci_softc *sc;
1243 	int port;
1244 {
1245 	int src;
1246 	int bits, mask;
1247 
1248 	switch (port) {
1249 	case CMPCI_MIC_VOL:
1250 		cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_MIC,
1251 		    CMPCI_ADJUST_MIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
1252 		break;
1253 	case CMPCI_MASTER_VOL:
1254 		src = CMPCI_SB16_MIXER_MASTER_L;
1255 		break;
1256 	case CMPCI_LINE_IN_VOL:
1257 		src = CMPCI_SB16_MIXER_LINE_L;
1258 		break;
1259 	case CMPCI_AUX_IN_VOL:
1260 		bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MIXER_AUX,
1261 		    CMPCI_ADJUST_AUX_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT],
1262 					      sc->sc_gain[port][CMPCI_RIGHT]));
1263 		return;
1264 	case CMPCI_MIC_RECVOL:
1265 		cmpci_reg_partial_write_1(sc, CMPCI_REG_MIXER25,
1266 		    CMPCI_REG_ADMIC_SHIFT, CMPCI_REG_ADMIC_MASK,
1267 		    CMPCI_ADJUST_ADMIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
1268 		return;
1269 	case CMPCI_DAC_VOL:
1270 		src = CMPCI_SB16_MIXER_VOICE_L;
1271 		break;
1272 	case CMPCI_FM_VOL:
1273 		src = CMPCI_SB16_MIXER_FM_L;
1274 		break;
1275 	case CMPCI_CD_VOL:
1276 		src = CMPCI_SB16_MIXER_CDDA_L;
1277 		break;
1278 	case CMPCI_PCSPEAKER:
1279 		cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_SPEAKER,
1280 		    CMPCI_ADJUST_2_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
1281 		return;
1282 	case CMPCI_MIC_PREAMP:
1283 		if (sc->sc_gain[port][CMPCI_LR])
1284 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
1285 			    CMPCI_REG_MICGAINZ);
1286 		else
1287 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
1288 			    CMPCI_REG_MICGAINZ);
1289 		return;
1290 
1291 	case CMPCI_DAC_MUTE:
1292 		if (sc->sc_gain[port][CMPCI_LR])
1293 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1294 			    CMPCI_REG_WSMUTE);
1295 		else
1296 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1297 			    CMPCI_REG_WSMUTE);
1298 		return;
1299 	case CMPCI_FM_MUTE:
1300 		if (sc->sc_gain[port][CMPCI_LR])
1301 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1302 			    CMPCI_REG_FMMUTE);
1303 		else
1304 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1305 			    CMPCI_REG_FMMUTE);
1306 		return;
1307 	case CMPCI_AUX_IN_MUTE:
1308 		if (sc->sc_gain[port][CMPCI_LR])
1309 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
1310 			    CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM);
1311 		else
1312 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
1313 			    CMPCI_REG_VAUXRM|CMPCI_REG_VAUXLM);
1314 		return;
1315 	case CMPCI_CD_MUTE:
1316 		mask = CMPCI_SB16_SW_CD;
1317 		goto sbmute;
1318 	case CMPCI_MIC_MUTE:
1319 		mask = CMPCI_SB16_SW_MIC;
1320 		goto sbmute;
1321 	case CMPCI_LINE_IN_MUTE:
1322 		mask = CMPCI_SB16_SW_LINE;
1323 	sbmute:
1324 		bits = cmpci_mixerreg_read(sc, CMPCI_SB16_MIXER_OUTMIX);
1325 		if (sc->sc_gain[port][CMPCI_LR])
1326 			bits = bits & ~mask;
1327 		else
1328 			bits = bits | mask;
1329 		cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, bits);
1330 		return;
1331 
1332 	case CMPCI_SPDIF_IN_SELECT:
1333 	case CMPCI_MONITOR_DAC:
1334 	case CMPCI_PLAYBACK_MODE:
1335 	case CMPCI_SPDIF_LOOP:
1336 	case CMPCI_SPDIF_OUT_PLAYBACK:
1337 		cmpci_set_out_ports(sc);
1338 		return;
1339 	case CMPCI_SPDIF_OUT_VOLTAGE:
1340 		if (CMPCI_ISCAP(sc, SPDOUT_VOLTAGE)) {
1341 			if (sc->sc_gain[CMPCI_SPDIF_OUT_VOLTAGE][CMPCI_LR]
1342 			    == CMPCI_SPDIF_OUT_VOLTAGE_LOW)
1343 				cmpci_reg_clear_4(sc, CMPCI_REG_MISC,
1344 						  CMPCI_REG_5V);
1345 			else
1346 				cmpci_reg_set_4(sc, CMPCI_REG_MISC,
1347 						CMPCI_REG_5V);
1348 		}
1349 		return;
1350 	case CMPCI_SURROUND:
1351 		if (CMPCI_ISCAP(sc, SURROUND)) {
1352 			if (sc->sc_gain[CMPCI_SURROUND][CMPCI_LR])
1353 				cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1354 						CMPCI_REG_SURROUND);
1355 			else
1356 				cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1357 						  CMPCI_REG_SURROUND);
1358 		}
1359 		return;
1360 	case CMPCI_REAR:
1361 		if (CMPCI_ISCAP(sc, REAR)) {
1362 			if (sc->sc_gain[CMPCI_REAR][CMPCI_LR])
1363 				cmpci_reg_set_4(sc, CMPCI_REG_MISC,
1364 						CMPCI_REG_N4SPK3D);
1365 			else
1366 				cmpci_reg_clear_4(sc, CMPCI_REG_MISC,
1367 						  CMPCI_REG_N4SPK3D);
1368 		}
1369 		return;
1370 	case CMPCI_INDIVIDUAL:
1371 		if (CMPCI_ISCAP(sc, INDIVIDUAL_REAR)) {
1372 			if (sc->sc_gain[CMPCI_REAR][CMPCI_LR])
1373 				cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1374 						CMPCI_REG_INDIVIDUAL);
1375 			else
1376 				cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1377 						  CMPCI_REG_INDIVIDUAL);
1378 		}
1379 		return;
1380 	case CMPCI_REVERSE:
1381 		if (CMPCI_ISCAP(sc, REVERSE_FR)) {
1382 			if (sc->sc_gain[CMPCI_REVERSE][CMPCI_LR])
1383 				cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1384 						CMPCI_REG_REVERSE_FR);
1385 			else
1386 				cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1387 						  CMPCI_REG_REVERSE_FR);
1388 		}
1389 		return;
1390 	case CMPCI_SPDIF_IN_PHASE:
1391 		if (CMPCI_ISCAP(sc, SPDIN_PHASE)) {
1392 			if (sc->sc_gain[CMPCI_SPDIF_IN_PHASE][CMPCI_LR]
1393 			    == CMPCI_SPDIF_IN_PHASE_POSITIVE)
1394 				cmpci_reg_clear_1(sc, CMPCI_REG_CHANNEL_FORMAT,
1395 						  CMPCI_REG_SPDIN_PHASE);
1396 			else
1397 				cmpci_reg_set_1(sc, CMPCI_REG_CHANNEL_FORMAT,
1398 						CMPCI_REG_SPDIN_PHASE);
1399 		}
1400 		return;
1401 	default:
1402 		return;
1403 	}
1404 
1405 	cmpci_mixerreg_write(sc, src,
1406 	    CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT]));
1407 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_L_TO_R(src),
1408 	    CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_RIGHT]));
1409 }
1410 
1411 static void
1412 cmpci_set_out_ports(sc)
1413 	struct cmpci_softc *sc;
1414 {
1415 	u_int8_t v;
1416 	int enspdout = 0;
1417 
1418 	if (!CMPCI_ISCAP(sc, SPDLOOP))
1419 		return;
1420 
1421 	/* SPDIF/out select */
1422 	if (sc->sc_gain[CMPCI_SPDIF_LOOP][CMPCI_LR] == CMPCI_SPDIF_LOOP_OFF) {
1423 		/* playback */
1424 		cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP);
1425 	} else {
1426 		/* monitor SPDIF/in */
1427 		cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP);
1428 	}
1429 
1430 	/* SPDIF in select */
1431 	v = sc->sc_gain[CMPCI_SPDIF_IN_SELECT][CMPCI_LR];
1432 	if (v & CMPCI_SPDIFIN_SPDIFIN2)
1433 		cmpci_reg_set_4(sc, CMPCI_REG_MISC, CMPCI_REG_2ND_SPDIFIN);
1434 	else
1435 		cmpci_reg_clear_4(sc, CMPCI_REG_MISC, CMPCI_REG_2ND_SPDIFIN);
1436 	if (v & CMPCI_SPDIFIN_SPDIFOUT)
1437 		cmpci_reg_set_4(sc, CMPCI_REG_MISC, CMPCI_REG_SPDFLOOPI);
1438 	else
1439 		cmpci_reg_clear_4(sc, CMPCI_REG_MISC, CMPCI_REG_SPDFLOOPI);
1440 
1441 	/* playback to ... */
1442 	if (CMPCI_ISCAP(sc, SPDOUT) &&
1443 	    sc->sc_gain[CMPCI_PLAYBACK_MODE][CMPCI_LR]
1444 		== CMPCI_PLAYBACK_MODE_SPDIF &&
1445 	    (sc->sc_play.md_divide == CMPCI_REG_RATE_44100 ||
1446 		(CMPCI_ISCAP(sc, SPDOUT_48K) &&
1447 		    sc->sc_play.md_divide==CMPCI_REG_RATE_48000))) {
1448 		/* playback to SPDIF */
1449 		cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF0_ENABLE);
1450 		enspdout = 1;
1451 		if (sc->sc_play.md_divide==CMPCI_REG_RATE_48000)
1452 			cmpci_reg_set_4(sc, CMPCI_REG_MISC,
1453 					CMPCI_REG_SPDIF_48K);
1454 		else
1455 			cmpci_reg_clear_4(sc, CMPCI_REG_MISC,
1456 					CMPCI_REG_SPDIF_48K);
1457 	} else {
1458 		/* playback to DAC */
1459 		cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1,
1460 				  CMPCI_REG_SPDIF0_ENABLE);
1461 		if (CMPCI_ISCAP(sc, SPDOUT_48K))
1462 			cmpci_reg_clear_4(sc, CMPCI_REG_MISC,
1463 					  CMPCI_REG_SPDIF_48K);
1464 	}
1465 
1466 	/* legacy to SPDIF/out or not */
1467 	if (CMPCI_ISCAP(sc, SPDLEGACY)) {
1468 		if (sc->sc_gain[CMPCI_SPDIF_OUT_PLAYBACK][CMPCI_LR]
1469 		    == CMPCI_SPDIF_OUT_PLAYBACK_WAVE)
1470 			cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL,
1471 					CMPCI_REG_LEGACY_SPDIF_ENABLE);
1472 		else {
1473 			cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL,
1474 					CMPCI_REG_LEGACY_SPDIF_ENABLE);
1475 			enspdout = 1;
1476 		}
1477 	}
1478 
1479 	/* enable/disable SPDIF/out */
1480 	if (CMPCI_ISCAP(sc, XSPDOUT) && enspdout)
1481 		cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL,
1482 				CMPCI_REG_XSPDIF_ENABLE);
1483 	else
1484 		cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL,
1485 				CMPCI_REG_XSPDIF_ENABLE);
1486 
1487 	/* SPDIF monitor (digital to alalog output) */
1488 	if (CMPCI_ISCAP(sc, SPDIN_MONITOR)) {
1489 		v = sc->sc_gain[CMPCI_MONITOR_DAC][CMPCI_LR];
1490 		if (!(v & CMPCI_MONDAC_ENABLE))
1491 			cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1492 					CMPCI_REG_SPDIN_MONITOR);
1493 		if (v & CMPCI_MONDAC_SPDOUT)
1494 			cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1,
1495 					CMPCI_REG_SPDIFOUT_DAC);
1496 		else
1497 			cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1,
1498 					CMPCI_REG_SPDIFOUT_DAC);
1499 		if (v & CMPCI_MONDAC_ENABLE)
1500 			cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1501 					CMPCI_REG_SPDIN_MONITOR);
1502 	}
1503 }
1504 
1505 static int
1506 cmpci_set_in_ports(sc)
1507 	struct cmpci_softc *sc;
1508 {
1509 	int mask;
1510 	int bitsl, bitsr;
1511 
1512 	mask = sc->sc_in_mask;
1513 
1514 	/*
1515 	 * Note CMPCI_RECORD_SOURCE_CD, CMPCI_RECORD_SOURCE_LINE_IN and
1516 	 * CMPCI_RECORD_SOURCE_FM are defined to the corresponding bit
1517 	 * of the mixer register.
1518 	 */
1519 	bitsr = mask & (CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN |
1520 	    CMPCI_RECORD_SOURCE_FM);
1521 
1522 	bitsl = CMPCI_SB16_MIXER_SRC_R_TO_L(bitsr);
1523 	if (mask & CMPCI_RECORD_SOURCE_MIC) {
1524 		bitsl |= CMPCI_SB16_MIXER_MIC_SRC;
1525 		bitsr |= CMPCI_SB16_MIXER_MIC_SRC;
1526 	}
1527 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, bitsl);
1528 	cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, bitsr);
1529 
1530 	if (mask & CMPCI_RECORD_SOURCE_AUX_IN)
1531 		cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
1532 		    CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN);
1533 	else
1534 		cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
1535 		    CMPCI_REG_RAUXREN | CMPCI_REG_RAUXLEN);
1536 
1537 	if (mask & CMPCI_RECORD_SOURCE_WAVE)
1538 		cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
1539 		    CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR);
1540 	else
1541 		cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
1542 		    CMPCI_REG_WAVEINL | CMPCI_REG_WAVEINR);
1543 
1544 	if (CMPCI_ISCAP(sc, SPDIN) &&
1545 	    (sc->sc_rec.md_divide == CMPCI_REG_RATE_44100 ||
1546 		(CMPCI_ISCAP(sc, SPDOUT_48K) &&
1547 		    sc->sc_rec.md_divide == CMPCI_REG_RATE_48000/* XXX? */))) {
1548 		if (mask & CMPCI_RECORD_SOURCE_SPDIF) {
1549 			/* enable SPDIF/in */
1550 			cmpci_reg_set_4(sc,
1551 					CMPCI_REG_FUNC_1,
1552 					CMPCI_REG_SPDIF1_ENABLE);
1553 		} else {
1554 			cmpci_reg_clear_4(sc,
1555 					CMPCI_REG_FUNC_1,
1556 					CMPCI_REG_SPDIF1_ENABLE);
1557 		}
1558 	}
1559 
1560 	return 0;
1561 }
1562 
1563 static int
1564 cmpci_set_port(handle, cp)
1565 	void *handle;
1566 	mixer_ctrl_t *cp;
1567 {
1568 	struct cmpci_softc *sc = handle;
1569 	int lgain, rgain;
1570 
1571 	switch (cp->dev) {
1572 	case CMPCI_MIC_VOL:
1573 	case CMPCI_PCSPEAKER:
1574 	case CMPCI_MIC_RECVOL:
1575 		if (cp->un.value.num_channels != 1)
1576 			return EINVAL;
1577 		/* FALLTHROUGH */
1578 	case CMPCI_DAC_VOL:
1579 	case CMPCI_FM_VOL:
1580 	case CMPCI_CD_VOL:
1581 	case CMPCI_LINE_IN_VOL:
1582 	case CMPCI_AUX_IN_VOL:
1583 	case CMPCI_MASTER_VOL:
1584 		if (cp->type != AUDIO_MIXER_VALUE)
1585 			return EINVAL;
1586 		switch (cp->un.value.num_channels) {
1587 		case 1:
1588 			lgain = rgain =
1589 			    cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
1590 			break;
1591 		case 2:
1592 			lgain = cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT];
1593 			rgain = cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT];
1594 			break;
1595 		default:
1596 			return EINVAL;
1597 		}
1598 		sc->sc_gain[cp->dev][CMPCI_LEFT]  = lgain;
1599 		sc->sc_gain[cp->dev][CMPCI_RIGHT] = rgain;
1600 
1601 		cmpci_set_mixer_gain(sc, cp->dev);
1602 		break;
1603 
1604 	case CMPCI_RECORD_SOURCE:
1605 		if (cp->type != AUDIO_MIXER_SET)
1606 			return EINVAL;
1607 
1608 		if (cp->un.mask & ~(CMPCI_RECORD_SOURCE_MIC |
1609 		    CMPCI_RECORD_SOURCE_CD | CMPCI_RECORD_SOURCE_LINE_IN |
1610 		    CMPCI_RECORD_SOURCE_AUX_IN | CMPCI_RECORD_SOURCE_WAVE |
1611 		    CMPCI_RECORD_SOURCE_FM | CMPCI_RECORD_SOURCE_SPDIF))
1612 			return EINVAL;
1613 
1614 		if (cp->un.mask & CMPCI_RECORD_SOURCE_SPDIF)
1615 			cp->un.mask = CMPCI_RECORD_SOURCE_SPDIF;
1616 
1617 		sc->sc_in_mask = cp->un.mask;
1618 		return cmpci_set_in_ports(sc);
1619 
1620 	/* boolean */
1621 	case CMPCI_DAC_MUTE:
1622 	case CMPCI_FM_MUTE:
1623 	case CMPCI_CD_MUTE:
1624 	case CMPCI_LINE_IN_MUTE:
1625 	case CMPCI_AUX_IN_MUTE:
1626 	case CMPCI_MIC_MUTE:
1627 	case CMPCI_MIC_PREAMP:
1628 	case CMPCI_PLAYBACK_MODE:
1629 	case CMPCI_SPDIF_IN_PHASE:
1630 	case CMPCI_SPDIF_LOOP:
1631 	case CMPCI_SPDIF_OUT_PLAYBACK:
1632 	case CMPCI_SPDIF_OUT_VOLTAGE:
1633 	case CMPCI_REAR:
1634 	case CMPCI_INDIVIDUAL:
1635 	case CMPCI_REVERSE:
1636 	case CMPCI_SURROUND:
1637 		if (cp->type != AUDIO_MIXER_ENUM)
1638 			return EINVAL;
1639 		sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord != 0;
1640 		cmpci_set_mixer_gain(sc, cp->dev);
1641 		break;
1642 
1643 	case CMPCI_SPDIF_IN_SELECT:
1644 		switch (cp->un.ord) {
1645 		case CMPCI_SPDIF_IN_SPDIN1:
1646 		case CMPCI_SPDIF_IN_SPDIN2:
1647 		case CMPCI_SPDIF_IN_SPDOUT:
1648 			break;
1649 		default:
1650 			return EINVAL;
1651 		}
1652 		goto xenum;
1653 	case CMPCI_MONITOR_DAC:
1654 		switch (cp->un.ord) {
1655 		case CMPCI_MONITOR_DAC_OFF:
1656 		case CMPCI_MONITOR_DAC_SPDIN:
1657 		case CMPCI_MONITOR_DAC_SPDOUT:
1658 			break;
1659 		default:
1660 			return EINVAL;
1661 		}
1662 	xenum:
1663 		if (cp->type != AUDIO_MIXER_ENUM)
1664 			return EINVAL;
1665 		sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord;
1666 		cmpci_set_mixer_gain(sc, cp->dev);
1667 		break;
1668 
1669 	default:
1670 	    return EINVAL;
1671 	}
1672 
1673 	return 0;
1674 }
1675 
1676 static int
1677 cmpci_get_port(handle, cp)
1678 	void *handle;
1679 	mixer_ctrl_t *cp;
1680 {
1681 	struct cmpci_softc *sc = handle;
1682 
1683 	switch (cp->dev) {
1684 	case CMPCI_MIC_VOL:
1685 	case CMPCI_PCSPEAKER:
1686 	case CMPCI_MIC_RECVOL:
1687 		if (cp->un.value.num_channels != 1)
1688 			return EINVAL;
1689 		/*FALLTHROUGH*/
1690 	case CMPCI_DAC_VOL:
1691 	case CMPCI_FM_VOL:
1692 	case CMPCI_CD_VOL:
1693 	case CMPCI_LINE_IN_VOL:
1694 	case CMPCI_AUX_IN_VOL:
1695 	case CMPCI_MASTER_VOL:
1696 		switch (cp->un.value.num_channels) {
1697 		case 1:
1698 			cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
1699 				sc->sc_gain[cp->dev][CMPCI_LEFT];
1700 			break;
1701 		case 2:
1702 			cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
1703 				sc->sc_gain[cp->dev][CMPCI_LEFT];
1704 			cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
1705 				sc->sc_gain[cp->dev][CMPCI_RIGHT];
1706 			break;
1707 		default:
1708 			return EINVAL;
1709 		}
1710 		break;
1711 
1712 	case CMPCI_RECORD_SOURCE:
1713 		cp->un.mask = sc->sc_in_mask;
1714 		break;
1715 
1716 	case CMPCI_DAC_MUTE:
1717 	case CMPCI_FM_MUTE:
1718 	case CMPCI_CD_MUTE:
1719 	case CMPCI_LINE_IN_MUTE:
1720 	case CMPCI_AUX_IN_MUTE:
1721 	case CMPCI_MIC_MUTE:
1722 	case CMPCI_MIC_PREAMP:
1723 	case CMPCI_PLAYBACK_MODE:
1724 	case CMPCI_SPDIF_IN_SELECT:
1725 	case CMPCI_SPDIF_IN_PHASE:
1726 	case CMPCI_SPDIF_LOOP:
1727 	case CMPCI_SPDIF_OUT_PLAYBACK:
1728 	case CMPCI_SPDIF_OUT_VOLTAGE:
1729 	case CMPCI_MONITOR_DAC:
1730 	case CMPCI_REAR:
1731 	case CMPCI_INDIVIDUAL:
1732 	case CMPCI_REVERSE:
1733 	case CMPCI_SURROUND:
1734 		cp->un.ord = sc->sc_gain[cp->dev][CMPCI_LR];
1735 		break;
1736 
1737 	default:
1738 		return EINVAL;
1739 	}
1740 
1741 	return 0;
1742 }
1743 
1744 /* ARGSUSED */
1745 static size_t
1746 cmpci_round_buffersize(handle, direction, bufsize)
1747 	void *handle;
1748 	int direction;
1749 	size_t bufsize;
1750 {
1751 	if (bufsize > 0x10000)
1752 		bufsize = 0x10000;
1753 
1754 	return bufsize;
1755 }
1756 
1757 
1758 static paddr_t
1759 cmpci_mappage(handle, addr, offset, prot)
1760 	void *handle;
1761 	void *addr;
1762 	off_t offset;
1763 	int prot;
1764 {
1765 	struct cmpci_softc *sc = handle;
1766 	struct cmpci_dmanode *p;
1767 
1768 	if (offset < 0 || NULL == (p = cmpci_find_dmamem(sc, addr)))
1769 		return -1;
1770 
1771 	return bus_dmamem_mmap(p->cd_tag, p->cd_segs,
1772 		   sizeof(p->cd_segs)/sizeof(p->cd_segs[0]),
1773 		   offset, prot, BUS_DMA_WAITOK);
1774 }
1775 
1776 
1777 /* ARGSUSED */
1778 static int
1779 cmpci_get_props(handle)
1780 	void *handle;
1781 {
1782 	return AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX;
1783 }
1784 
1785 
1786 static int
1787 cmpci_trigger_output(handle, start, end, blksize, intr, arg, param)
1788 	void *handle;
1789 	void *start, *end;
1790 	int blksize;
1791 	void (*intr) __P((void *));
1792 	void *arg;
1793 	struct audio_params *param;
1794 {
1795 	struct cmpci_softc *sc = handle;
1796 	struct cmpci_dmanode *p;
1797 	int bps;
1798 
1799 	sc->sc_play.intr = intr;
1800 	sc->sc_play.intr_arg = arg;
1801 	bps = param->channels*param->precision*param->factor / 8;
1802 	if (!bps)
1803 		return EINVAL;
1804 
1805 	/* set DMA frame */
1806 	if (!(p = cmpci_find_dmamem(sc, start)))
1807 		return EINVAL;
1808 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BASE,
1809 	    DMAADDR(p));
1810 	delay(10);
1811 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BYTES,
1812 	    ((caddr_t)end - (caddr_t)start + 1) / bps - 1);
1813 	delay(10);
1814 
1815 	/* set interrupt count */
1816 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_SAMPLES,
1817 			  (blksize + bps - 1) / bps - 1);
1818 	delay(10);
1819 
1820 	/* start DMA */
1821 	cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_DIR); /* PLAY */
1822 	cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE);
1823 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE);
1824 
1825 	return 0;
1826 }
1827 
1828 static int
1829 cmpci_trigger_input(handle, start, end, blksize, intr, arg, param)
1830 	void *handle;
1831 	void *start, *end;
1832 	int blksize;
1833 	void (*intr) __P((void *));
1834 	void *arg;
1835 	struct audio_params *param;
1836 {
1837 	struct cmpci_softc *sc = handle;
1838 	struct cmpci_dmanode *p;
1839 	int bps;
1840 
1841 	sc->sc_rec.intr = intr;
1842 	sc->sc_rec.intr_arg = arg;
1843 	bps = param->channels*param->precision*param->factor/8;
1844 	if (!bps)
1845 		return EINVAL;
1846 
1847 	/* set DMA frame */
1848 	if (!(p=cmpci_find_dmamem(sc, start)))
1849 		return EINVAL;
1850 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BASE,
1851 	    DMAADDR(p));
1852 	delay(10);
1853 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BYTES,
1854 	    ((caddr_t)end - (caddr_t)start + 1) / bps - 1);
1855 	delay(10);
1856 
1857 	/* set interrupt count */
1858 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_SAMPLES,
1859 	    (blksize + bps - 1) / bps - 1);
1860 	delay(10);
1861 
1862 	/* start DMA */
1863 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_DIR); /* REC */
1864 	cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE);
1865 	cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE);
1866 
1867 	return 0;
1868 }
1869 
1870 
1871 /* end of file */
1872