1 /* $NetBSD: genfb_pci.c,v 1.27 2011/01/22 15:14:28 cegger Exp $ */ 2 3 /*- 4 * Copyright (c) 2007 Michael Lorenz 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: genfb_pci.c,v 1.27 2011/01/22 15:14:28 cegger Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/device.h> 36 #include <sys/proc.h> 37 #include <sys/mutex.h> 38 #include <sys/ioctl.h> 39 #include <sys/kernel.h> 40 #include <sys/systm.h> 41 #include <sys/kauth.h> 42 43 #include <dev/pci/pcidevs.h> 44 #include <dev/pci/pcireg.h> 45 #include <dev/pci/pcivar.h> 46 #include <dev/pci/pciio.h> 47 48 #include <dev/wsfb/genfbvar.h> 49 #include <dev/pci/wsdisplay_pci.h> 50 51 #include <dev/pci/genfb_pcivar.h> 52 53 #include "opt_wsfb.h" 54 #include "opt_genfb.h" 55 56 #ifdef GENFB_PCI_DEBUG 57 # define DPRINTF printf 58 #else 59 # define DPRINTF while (0) printf 60 #endif 61 62 static int pci_genfb_match(device_t, cfdata_t, void *); 63 static void pci_genfb_attach(device_t, device_t, void *); 64 static int pci_genfb_ioctl(void *, void *, u_long, void *, int, 65 struct lwp *); 66 static paddr_t pci_genfb_mmap(void *, void *, off_t, int); 67 static int pci_genfb_borrow(void *, bus_addr_t, bus_space_handle_t *); 68 static int pci_genfb_drm_print(void *, const char *); 69 70 CFATTACH_DECL_NEW(genfb_pci, sizeof(struct pci_genfb_softc), 71 pci_genfb_match, pci_genfb_attach, NULL, NULL); 72 73 static int 74 pci_genfb_match(device_t parent, cfdata_t match, void *aux) 75 { 76 struct pci_attach_args *pa = aux; 77 int matchlvl = 1; 78 79 if (!genfb_is_enabled()) 80 return 0; /* explicitly disabled by MD code */ 81 82 if (genfb_is_console()) 83 matchlvl = 5; /* beat VGA */ 84 85 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE && 86 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_CONTROL) 87 return matchlvl; 88 89 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_DISPLAY) 90 return matchlvl; 91 92 return 0; 93 } 94 95 static void 96 pci_genfb_attach(device_t parent, device_t self, void *aux) 97 { 98 struct pci_genfb_softc *sc = device_private(self); 99 struct pci_attach_args *pa = aux; 100 struct genfb_ops ops; 101 pcireg_t rom; 102 int idx, bar, type; 103 char devinfo[256]; 104 105 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 106 aprint_naive("\n"); 107 aprint_normal(": %s\n", devinfo); 108 109 sc->sc_gen.sc_dev = self; 110 sc->sc_memt = pa->pa_memt; 111 sc->sc_iot = pa->pa_iot; 112 sc->sc_pc = pa->pa_pc; 113 sc->sc_pcitag = pa->pa_tag; 114 sc->sc_want_wsfb = 0; 115 116 genfb_init(&sc->sc_gen); 117 118 /* firmware / MD code responsible for restoring the display */ 119 if (sc->sc_gen.sc_pmfcb == NULL) 120 pmf_device_register(self, NULL, NULL); 121 else 122 pmf_device_register(self, 123 sc->sc_gen.sc_pmfcb->gpc_suspend, 124 sc->sc_gen.sc_pmfcb->gpc_resume); 125 126 if ((sc->sc_gen.sc_width == 0) || (sc->sc_gen.sc_fbsize == 0)) { 127 aprint_debug_dev(self, "not configured by firmware\n"); 128 return; 129 } 130 131 if (bus_space_map(sc->sc_memt, sc->sc_gen.sc_fboffset, 132 sc->sc_gen.sc_fbsize, BUS_SPACE_MAP_LINEAR, &sc->sc_memh) != 0) { 133 134 aprint_error_dev(self, "unable to map the framebuffer\n"); 135 return; 136 } 137 sc->sc_gen.sc_fbaddr = bus_space_vaddr(sc->sc_memt, sc->sc_memh); 138 139 /* mmap()able bus ranges */ 140 idx = 0; 141 bar = 0x10; 142 while (bar < 0x34) { 143 144 type = pci_mapreg_type(sc->sc_pc, sc->sc_pcitag, bar); 145 if ((type == PCI_MAPREG_TYPE_MEM) || 146 (type == PCI_MAPREG_TYPE_ROM)) { 147 148 pci_mapreg_info(sc->sc_pc, sc->sc_pcitag, bar, type, 149 &sc->sc_ranges[idx].offset, 150 &sc->sc_ranges[idx].size, 151 &sc->sc_ranges[idx].flags); 152 idx++; 153 } 154 sc->sc_bars[(bar - 0x10) >> 2] = rom = 155 pci_conf_read(sc->sc_pc, sc->sc_pcitag, bar); 156 if ((bar == PCI_MAPREG_ROM) && (rom != 0)) { 157 pci_conf_write(sc->sc_pc, sc->sc_pcitag, bar, rom | 158 PCI_MAPREG_ROM_ENABLE); 159 } 160 bar += 4; 161 } 162 163 sc->sc_ranges_used = idx; 164 165 ops.genfb_ioctl = pci_genfb_ioctl; 166 ops.genfb_mmap = pci_genfb_mmap; 167 ops.genfb_borrow = pci_genfb_borrow; 168 169 if (genfb_attach(&sc->sc_gen, &ops) == 0) { 170 171 /* now try to attach a DRM */ 172 config_found_ia(self, "drm", aux, pci_genfb_drm_print); 173 } 174 } 175 176 static int 177 pci_genfb_drm_print(void *aux, const char *pnp) 178 { 179 if (pnp) 180 aprint_normal("drm at %s", pnp); 181 return (UNCONF); 182 } 183 184 185 static int 186 pci_genfb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, 187 struct lwp *l) 188 { 189 struct pci_genfb_softc *sc = v; 190 191 switch (cmd) { 192 case WSDISPLAYIO_GTYPE: 193 *(u_int *)data = WSDISPLAY_TYPE_PCIMISC; 194 return 0; 195 196 /* PCI config read/write passthrough. */ 197 case PCI_IOC_CFGREAD: 198 case PCI_IOC_CFGWRITE: 199 return pci_devioctl(sc->sc_pc, sc->sc_pcitag, 200 cmd, data, flag, l); 201 202 case WSDISPLAYIO_GET_BUSID: 203 return wsdisplayio_busid_pci(sc->sc_gen.sc_dev, sc->sc_pc, 204 sc->sc_pcitag, data); 205 206 case WSDISPLAYIO_SMODE: { 207 int new_mode = *(int*)data, i; 208 if (new_mode == WSDISPLAYIO_MODE_EMUL) { 209 for (i = 0; i < 9; i++) 210 pci_conf_write(sc->sc_pc, 211 sc->sc_pcitag, 212 0x10 + (i << 2), 213 sc->sc_bars[i]); 214 } 215 } 216 return 0; 217 } 218 219 return EPASSTHROUGH; 220 } 221 222 static paddr_t 223 pci_genfb_mmap(void *v, void *vs, off_t offset, int prot) 224 { 225 struct pci_genfb_softc *sc = v; 226 struct range *r; 227 int i; 228 229 if (offset == 0) 230 sc->sc_want_wsfb = 1; 231 232 /* 233 * regular fb mapping at 0 234 * since some Sun firmware likes to put PCI resources low enough 235 * to collide with the wsfb mapping we only allow it after asking 236 * for offset 0 237 */ 238 DPRINTF("%s: %08x limit %08x\n", __func__, (uint32_t)offset, 239 (uint32_t)sc->sc_gen.sc_fbsize); 240 if ((offset >= 0) && (offset < sc->sc_gen.sc_fbsize) && 241 (sc->sc_want_wsfb == 1)) { 242 243 return bus_space_mmap(sc->sc_memt, sc->sc_gen.sc_fboffset, 244 offset, prot, BUS_SPACE_MAP_LINEAR); 245 } 246 247 /* 248 * restrict all other mappings to processes with superuser privileges 249 * or the kernel itself 250 */ 251 if (kauth_authorize_generic(kauth_cred_get(), KAUTH_GENERIC_ISSUSER, 252 NULL) != 0) { 253 aprint_normal_dev(sc->sc_gen.sc_dev, "mmap() rejected.\n"); 254 return -1; 255 } 256 257 #ifdef WSFB_FAKE_VGA_FB 258 if ((offset >= 0xa0000) && (offset < 0xbffff)) { 259 260 return bus_space_mmap(sc->sc_memt, sc->sc_gen.sc_fboffset, 261 offset - 0xa0000, prot, BUS_SPACE_MAP_LINEAR); 262 } 263 #endif 264 265 /* 266 * XXX this should be generalized, let's just 267 * #define PCI_IOAREA_PADDR 268 * #define PCI_IOAREA_OFFSET 269 * #define PCI_IOAREA_SIZE 270 * somewhere in a MD header and compile this code only if all are 271 * present 272 */ 273 /* 274 * no. 275 * PCI_IOAREA_PADDR would be completely, utterly wrong and completely 276 * useless for the following reasons: 277 * - it's a bus address, not a physical address 278 * - there's no guarantee it's the same for each host bridge 279 * - it's already taken care of by the IO tag 280 * PCI_IOAREA_OFFSET is the same as PCI_MAGIC_IO_RANGE 281 * PCI_IOAREA_SIZE is also useless: 282 * - many cards don't decode more than 16 bit IO anyway 283 * - even machines with more than 64kB IO space try to keep everything 284 * within 64kB for the reason above 285 * - IO ranges tend to be small so in most cases you can't cram enough 286 * cards into a single machine to exhaust 64kB IO space 287 * - machines which need this tend to prefer memory space anyway 288 * - the only use for this right now is to allow the Xserver to map 289 * VGA registers on macppc and a few other powerpc ports, shark uses 290 * a similar mechanism, and what they need is always within 64kB 291 */ 292 #ifdef PCI_MAGIC_IO_RANGE 293 /* allow to map our IO space */ 294 if ((offset >= PCI_MAGIC_IO_RANGE) && 295 (offset < PCI_MAGIC_IO_RANGE + 0x10000)) { 296 return bus_space_mmap(sc->sc_iot, offset - PCI_MAGIC_IO_RANGE, 297 0, prot, BUS_SPACE_MAP_LINEAR); 298 } 299 #endif 300 301 /* allow to mmap() our BARs */ 302 /* maybe the ROM BAR too? */ 303 for (i = 0; i < sc->sc_ranges_used; i++) { 304 305 r = &sc->sc_ranges[i]; 306 if ((offset >= r->offset) && (offset < (r->offset + r->size))) { 307 return bus_space_mmap(sc->sc_memt, offset, 0, prot, 308 r->flags); 309 } 310 } 311 312 return -1; 313 } 314 315 int 316 pci_genfb_borrow(void *opaque, bus_addr_t addr, bus_space_handle_t *hdlp) 317 { 318 struct pci_genfb_softc *sc = opaque; 319 320 if (sc == NULL) 321 return 0; 322 if (!sc->sc_gen.sc_fboffset) 323 return 0; 324 if (sc->sc_gen.sc_fboffset != addr) 325 return 0; 326 *hdlp = sc->sc_memh; 327 return 1; 328 } 329