1 /* $NetBSD: if_stgereg.h,v 1.1 2001/07/25 00:11:51 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #ifndef _DEV_PCI_IF_STGEREG_H_ 40 #define _DEV_PCI_IF_STGEREG_H_ 41 42 /* 43 * Register description for the Sundance Tech. TC9021 10/100/1000 44 * Ethernet controller. 45 * 46 * Note that while DMA addresses are all in 64-bit fields, only 47 * the lower 40 bits of a DMA address are valid. 48 */ 49 50 /* 51 * TC9021 buffer fragment descriptor. 52 */ 53 struct stge_frag { 54 uint64_t frag_word0; /* address, length */ 55 } __attribute__((__packed__)); 56 57 #define FRAG_ADDR(x) (((uint64_t)(x)) << 0) 58 #define FRAG_ADDR_MASK FRAG_ADDR(0xfffffffffULL) 59 #define FRAG_LEN(x) (((uint64_t)(x)) << 48) 60 #define FRAG_LEN_MASK FRAG_LEN(0xffffULL) 61 62 /* 63 * TC9021 Transmit Frame Descriptor. Note the number of fragments 64 * here is arbitrary, but we can't have any more than than 15. 65 */ 66 #define STGE_NTXFRAGS 12 67 struct stge_tfd { 68 uint64_t tfd_next; /* next TFD in list */ 69 uint64_t tfd_control; /* control bits */ 70 /* the buffer fragments */ 71 struct stge_frag tfd_frags[STGE_NTXFRAGS]; 72 } __attribute__((__packed__)); 73 74 #define TFD_FrameId(x) ((x) << 0) 75 #define TFD_FrameId_MAX 0xffff 76 #define TFD_WordAlign(x) ((x) << 16) 77 #define TFD_WordAlign_dword 0 /* align to dword in TxFIFO */ 78 #define TFD_WordAlign_word 2 /* align to word in TxFIFO */ 79 #define TFD_WordAlign_disable 1 /* disable alignment */ 80 #define TFD_TCPChecksumEnable (1ULL << 18) 81 #define TFD_UDPChecksumEnable (1ULL << 19) 82 #define TFD_IPChecksumEnable (1ULL << 20) 83 #define TFD_FcsAppendDisable (1ULL << 21) 84 #define TFD_TxIndicate (1ULL << 22) 85 #define TFD_TxDMAIndicate (1ULL << 23) 86 #define TFD_FragCount(x) ((x) << 24) 87 #define TFD_VLANTagInsert (1ULL << 28) 88 #define TFD_TFDDone (1ULL << 31) 89 #define TFD_VID(x) (((uint64_t)(x)) << 32) 90 #define TFD_CFI (1ULL << 44) 91 #define TFD_UserPriority(x) (((uint64_t)(x)) << 45) 92 93 /* 94 * TC9021 Receive Frame Descriptor. Each RFD has a single fragment 95 * in it, and the chip tells us the beginning and end of the frame. 96 */ 97 struct stge_rfd { 98 uint64_t rfd_next; /* next RFD in list */ 99 uint64_t rfd_status; /* status bits */ 100 struct stge_frag rfd_frag; /* the buffer */ 101 } __attribute__((__packed__)); 102 103 #define RFD_RxDMAFrameLen(x) ((x) & 0xffff) 104 #define RFD_RxFIFOOverrun (1ULL << 16) 105 #define RFD_RxRuntFrame (1ULL << 17) 106 #define RFD_RxAlignmentError (1ULL << 18) 107 #define RFD_RxFCSError (1ULL << 19) 108 #define RFD_RxOversizedFrame (1ULL << 20) 109 #define RFD_RxLengthError (1ULL << 21) 110 #define RFD_VLANDetected (1ULL << 22) 111 #define RFD_TCPDetected (1ULL << 23) 112 #define RFD_TCPError (1ULL << 24) 113 #define RFD_UDPDetected (1ULL << 25) 114 #define RFD_UDPError (1ULL << 26) 115 #define RFD_IPDetected (1ULL << 27) 116 #define RFD_IPError (1ULL << 28) 117 #define RFD_FrameStart (1ULL << 29) 118 #define RFD_FrameEnd (1ULL << 30) 119 #define RFD_RFDDone (1ULL << 31) 120 #define RFD_TCI(x) ((((uint64_t)(x)) >> 32) & 0xffff) 121 122 /* 123 * PCI configuration registers used by the TC9021. 124 */ 125 126 #define STGE_PCI_IOBA (PCI_MAPREG_START + 0x00) 127 #define STGE_PCI_MMBA (PCI_MAPREG_START + 0x04) 128 129 /* 130 * EEPROM offsets. 131 */ 132 #define STGE_EEPROM_ConfigParam 0x00 133 #define STGE_EEPROM_AsicCtrl 0x01 134 #define STGE_EEPROM_SubSystemVendorId 0x02 135 #define STGE_EEPROM_SubSystemId 0x03 136 #define STGE_EEPROM_StationAddress0 0x10 137 #define STGE_EEPROM_StationAddress1 0x11 138 #define STGE_EEPROM_StationAddress2 0x12 139 140 /* 141 * The TC9021 register space. 142 */ 143 144 #define STGE_DMACtrl 0x00 145 #define DMAC_RxDMAComplete (1U << 3) 146 #define DMAC_RxDMAPollNow (1U << 4) 147 #define DMAC_TxDMAComplete (1U << 11) 148 #define DMAC_TxDMAPollNow (1U << 12) 149 #define DMAC_TxDMAInProg (1U << 15) 150 #define DMAC_RxEarlyDisable (1U << 16) 151 #define DMAC_MWIDisable (1U << 18) 152 #define DMAC_TxWiteBackDisable (1U << 19) 153 #define DMAC_TxBurstLimit(x) ((x) << 20) 154 #define DMAC_TargetAbort (1U << 30) 155 #define DMAC_MasterAbort (1U << 31) 156 157 #define STGE_RxDMAStatus 0x08 158 159 #define STGE_TFDListPtrLo 0x10 160 161 #define STGE_TFDListPtrHi 0x14 162 163 #define STGE_TxDMABurstThresh 0x18 /* 8-bit */ 164 165 #define STGE_TxDMAUrgentThresh 0x19 /* 8-bit */ 166 167 #define STGE_TxDMAPollPeriod 0x1a /* 8-bit */ 168 169 #define STGE_RFDListPtrLo 0x1c 170 171 #define STGE_RFDListPtrHi 0x20 172 173 #define STGE_RxDMABurstThresh 0x24 /* 8-bit */ 174 175 #define STGE_RxDMAUrgentThresh 0x25 /* 8-bit */ 176 177 #define STGE_RxDMAPollPeriod 0x26 /* 8-bit */ 178 179 #define STGE_RxDMAIntCtrl 0x28 180 #define RDIC_RxFrameCount(x) ((x) & 0xff) 181 #define RDIC_PriorityThresh(x) ((x) << 10) 182 #define RDIC_RxDMAWaitTime(x) ((x) << 16) 183 184 #define STGE_DebugCtrl 0x2c /* 16-bit */ 185 #define DC_GPIO0Ctrl (1U << 0) 186 #define DC_GPIO1Ctrl (1U << 1) 187 #define DC_GPIO0 (1U << 2) 188 #define DC_GPIO1 (1U << 3) 189 190 #define STGE_AsicCtrl 0x30 191 #define AC_ExpRomDisable (1U << 0) 192 #define AC_ExpRomSize (1U << 1) 193 #define AC_PhySpeed10 (1U << 4) 194 #define AC_PhySpeed100 (1U << 5) 195 #define AC_PhySpeed1000 (1U << 6) 196 #define AC_PhyMedia (1U << 7) 197 #define AC_ForcedConfig(x) ((x) << 8) 198 #define AC_ForcedConfig_MASK AC_ForcedConfig(7) 199 #define AC_D3ResetDisable (1U << 11) 200 #define AC_SpeedupMode (1U << 13) 201 #define AC_LEDMode (1U << 14) 202 #define AC_RstOutPolarity (1U << 15) 203 #define AC_GlobalReset (1U << 16) 204 #define AC_RxReset (1U << 17) 205 #define AC_TxReset (1U << 18) 206 #define AC_DMA (1U << 19) 207 #define AC_FIFO (1U << 20) 208 #define AC_Network (1U << 21) 209 #define AC_Host (1U << 22) 210 #define AC_AutoInit (1U << 23) 211 #define AC_RstOut (1U << 24) 212 #define AC_InterruptRequest (1U << 25) 213 #define AC_ResetBusy (1U << 26) 214 215 #define STGE_FIFOCtrl 0x38 /* 16-bit */ 216 #define FC_RAMTestMode (1U << 0) 217 #define FC_Transmitting (1U << 14) 218 #define FC_Receiving (1U << 15) 219 220 #define STGE_RxEarlyThresh 0x3a /* 16-bit */ 221 222 #define STGE_FlowOffThresh 0x3c /* 16-bit */ 223 224 #define STGE_FlowOnTresh 0x3e /* 16-bit */ 225 226 #define STGE_TxStartThresh 0x44 /* 16-bit */ 227 228 #define STGE_EepromData 0x48 /* 16-bit */ 229 230 #define STGE_EepromCtrl 0x4a /* 16-bit */ 231 #define EC_EepromAddress(x) ((x) & 0xff) 232 #define EC_EepromOpcode(x) ((x) << 8) 233 #define EC_OP_WE 0 234 #define EC_OP_WR 1 235 #define EC_OP_RR 2 236 #define EC_OP_ER 3 237 #define EC_EepromBusy (1U << 15) 238 239 #define STGE_ExpRomAddr 0x4c 240 241 #define STGE_ExpRomData 0x50 /* 8-bit */ 242 243 #define STGE_WakeEvent 0x51 /* 8-bit */ 244 245 #define STGE_Countdown 0x54 246 #define CD_Count(x) ((x) & 0xffff) 247 #define CD_CountdownSpeed (1U << 24) 248 #define CD_CountdownMode (1U << 25) 249 #define CD_CountdownIntEnabled (1U << 26) 250 251 #define STGE_IntStatusAck 0x5a /* 16-bit */ 252 253 #define STGE_IntEnable 0x5c /* 16-bit */ 254 #define IE_HostError (1U << 1) 255 #define IE_TxComplete (1U << 2) 256 #define IE_MACControlFrame (1U << 3) 257 #define IE_RxComplete (1U << 4) 258 #define IE_RxEarly (1U << 5) 259 #define IE_InRequested (1U << 6) 260 #define IE_UpdateStats (1U << 7) 261 #define IE_LinkEvent (1U << 8) 262 #define IE_TxDMAComplete (1U << 9) 263 #define IE_RxDMAComplete (1U << 10) 264 #define IE_RFDListEnd (1U << 11) 265 #define IE_RxDMAPriority (1U << 12) 266 267 #define STGE_IntStatus 0x5e /* 16-bit */ 268 #define IS_InterruptStatus (1U << 0) 269 270 #define STGE_TxStatus 0x60 271 #define TS_TxError (1U << 0) 272 #define TS_LateCollision (1U << 2) 273 #define TS_MaxCollisions (1U << 3) 274 #define TS_TxUnderrun (1U << 4) 275 #define TS_TxIndicateReqd (1U << 6) 276 #define TS_TxComplete (1U << 7) 277 #define TS_TxFrameId_get(x) ((x) >> 16) 278 279 #define STGE_MACCtrl 0x6c 280 #define MC_IFSSelect(x) ((x) & 3) 281 #define MC_DuplexSelect (1U << 5) 282 #define MC_RcvLargeFrames (1U << 6) 283 #define MC_TxFlowControlEnable (1U << 7) 284 #define MC_RxFlowControlEnable (1U << 8) 285 #define MC_RcvFCS (1U << 9) 286 #define MC_FIFOLoopback (1U << 10) 287 #define MC_MACLoopback (1U << 11) 288 #define MC_AutoVLANtagging (1U << 12) 289 #define MC_AutoVLANuntagging (1U << 13) 290 #define MC_CollisionDetect (1U << 16) 291 #define MC_CarrierSense (1U << 17) 292 #define MC_StatisticsEnable (1U << 21) 293 #define MC_StatisticsDisable (1U << 22) 294 #define MC_StatisticsEnabled (1U << 23) 295 #define MC_TxEnable (1U << 24) 296 #define MC_TxDisable (1U << 25) 297 #define MC_TxEnabled (1U << 26) 298 #define MC_RxEnable (1U << 27) 299 #define MC_RxDisable (1U << 28) 300 #define MC_RxEnabled (1U << 29) 301 #define MC_Paused (1U << 30) 302 303 #define STGE_VLANTag 0x70 304 305 #define STGE_PhyCtrl 0x76 /* 8-bit */ 306 #define PC_MgmtClk (1U << 0) 307 #define PC_MgmtData (1U << 1) 308 #define PC_MgmtDir (1U << 2) /* MAC->PHY */ 309 #define PC_PhyDuplexPolarity (1U << 3) 310 #define PC_PhyDuplexStatus (1U << 4) 311 #define PC_PhyLnkPolarity (1U << 5) 312 #define PC_LinkSpeed(x) (((x) >> 6) & 3) 313 #define PC_LinkSpeed_Down 0 314 #define PC_LinkSpeed_10 1 315 #define PC_LinkSpeed_100 2 316 #define PC_LinkSpeed_1000 3 317 318 #define STGE_StationAddress0 0x78 /* 16-bit */ 319 320 #define STGE_StationAddress1 0x7a /* 16-bit */ 321 322 #define STGE_StationAddress2 0x7c /* 16-bit */ 323 324 #define STGE_VLANHashTable 0x7e /* 16-bit */ 325 326 #define STGE_VLANId 0x80 327 328 #define STGE_MaxFrameSize 0x84 329 330 #define STGE_ReceiveMode 0x88 /* 16-bit */ 331 #define RM_ReceiveUnicast (1U << 0) 332 #define RM_ReceiveMulticast (1U << 1) 333 #define RM_ReceiveBroadcast (1U << 2) 334 #define RM_ReceiveAllFrames (1U << 3) 335 #define RM_ReceiveMulticastHash (1U << 4) 336 #define RM_ReceiveIPMulticast (1U << 5) 337 #define RM_ReceiveVLANMatch (1U << 8) 338 #define RM_ReceiveVLANHash (1U << 9) 339 340 #define STGE_HashTable0 0x8c 341 342 #define STGE_HashTable1 0x90 343 344 #define STGE_RMONStatisticsMask 0x98 /* set to disable */ 345 346 #define STGE_StatisticsMask 0x9c /* set to disable */ 347 348 #define STGE_RxJumboFrames 0xbc /* 16-bit */ 349 350 #define STGE_TCPCheckSumErrors 0xc0 /* 16-bit */ 351 352 #define STGE_IPCheckSumErrors 0xc2 /* 16-bit */ 353 354 #define STGE_UDPCheckSumErrors 0xc4 /* 16-bit */ 355 356 #define STGE_TxJumboFrames 0xf4 /* 16-bit */ 357 358 /* 359 * TC9021 statistics. Available memory and I/O mapped. 360 */ 361 362 #define STGE_OctetRcvOk 0xa8 363 364 #define STGE_McstOctetRcvdOk 0xac 365 366 #define STGE_BcstOctetRcvdOk 0xb0 367 368 #define STGE_FramesRcvdOk 0xb4 369 370 #define STGE_McstFramesRcvdOk 0xb8 371 372 #define STGE_BcstFramesRcvdOk 0xbe /* 16-bit */ 373 374 #define STGE_MacControlFramesRcvd 0xc6 /* 16-bit */ 375 376 #define STGE_FrameTooLongErrors 0xc8 /* 16-bit */ 377 378 #define STGE_InRangeLengthErrors 0xca /* 16-bit */ 379 380 #define STGE_FramesCheckSeqErrors 0xcc /* 16-bit */ 381 382 #define STGE_FramesLostRxErrors 0xce /* 16-bit */ 383 384 #define STGE_OctetXmtdOk 0xd0 385 386 #define STGE_McstOctetXmtdOk 0xd4 387 388 #define STGE_BcstOctetXmtdOk 0xd8 389 390 #define STGE_FramesXmtdOk 0xdc 391 392 #define STGE_McstFramesXmtdOk 0xe0 393 394 #define STGE_FramesWDeferredXmt 0xe4 395 396 #define STGE_LateCollisions 0xe8 397 398 #define STGE_MultiColFrames 0xec 399 400 #define STGE_SingleColFrames 0xf0 401 402 #define STGE_BcstFramesXmtdOk 0xf6 /* 16-bit */ 403 404 #define STGE_CarrierSenseErrors 0xf8 /* 16-bit */ 405 406 #define STGE_MacControlFramesXmtd 0xfa /* 16-bit */ 407 408 #define STGE_FramesAbortXSColls 0xfc /* 16-bit */ 409 410 #define STGE_FramesWEXDeferal 0xfe /* 16-bit */ 411 412 /* 413 * RMON-compatible statistics. Only accessible if memory-mapped. 414 */ 415 416 #define STGE_EtherStatsCollisions 0x100 417 418 #define STGE_EtherStatsOctetsTransmit 0x104 419 420 #define STGE_EtherStatsPktsTransmit 0x108 421 422 #define STGE_EtherStatsPkts64OctetsTransmit 0x10c 423 424 #define STGE_EtherStatsPkts64to127OctetsTransmit 0x110 425 426 #define STGE_EtherStatsPkts128to255OctetsTransmit 0x114 427 428 #define STGE_EtherStatsPkts256to511OctetsTransmit 0x118 429 430 #define STGE_EtherStatsPkts512to1023OctetsTransmit 0x11c 431 432 #define STGE_EtherStatsPkts1024to1518OctetsTransmit 0x120 433 434 #define STGE_EtherStatsCRCAlignErrors 0x124 435 436 #define STGE_EtherStatsUndersizePkts 0x128 437 438 #define STGE_EtherStatsFragments 0x12c 439 440 #define STGE_EtherStatsJabbers 0x130 441 442 #define STGE_EtherStatsOctets 0x134 443 444 #define STGE_EtherStatsPkts 0x138 445 446 #define STGE_EtherStatsPkts64Octets 0x13c 447 448 #define STGE_EtherStatsPkts65to127Octets 0x140 449 450 #define STGE_EtherStatsPkts128to255Octets 0x144 451 452 #define STGE_EtherStatsPkts256to511Octets 0x148 453 454 #define STGE_EtherStatsPkts512to1023Octets 0x14c 455 456 #define STGE_EtherStatsPkts1024to1518Octets 0x150 457 458 #endif /* _DEV_PCI_IF_STGEREG_H_ */ 459