1 /* $NetBSD: if_tlp_pci.c,v 1.65 2002/04/17 02:19:14 mycroft Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.65 2002/04/17 02:19:14 mycroft Exp $"); 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/device.h> 57 58 #include <machine/endian.h> 59 60 #include <net/if.h> 61 #include <net/if_dl.h> 62 #include <net/if_media.h> 63 #include <net/if_ether.h> 64 65 #include <machine/bus.h> 66 #include <machine/intr.h> 67 68 #include <dev/mii/miivar.h> 69 #include <dev/mii/mii_bitbang.h> 70 71 #include <dev/ic/tulipreg.h> 72 #include <dev/ic/tulipvar.h> 73 74 #include <dev/pci/pcivar.h> 75 #include <dev/pci/pcireg.h> 76 #include <dev/pci/pcidevs.h> 77 78 /* 79 * PCI configuration space registers used by the Tulip. 80 */ 81 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 82 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 83 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 84 85 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 86 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 87 88 struct tulip_pci_softc { 89 struct tulip_softc sc_tulip; /* real Tulip softc */ 90 91 /* PCI-specific goo. */ 92 void *sc_ih; /* interrupt handle */ 93 94 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 95 pcitag_t sc_pcitag; /* our PCI tag */ 96 97 int sc_flags; /* flags; see below */ 98 99 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 100 LIST_ENTRY(tulip_pci_softc) sc_intrq; 101 102 /* Our {ROM,interrupt} master. */ 103 struct tulip_pci_softc *sc_master; 104 }; 105 106 /* sc_flags */ 107 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 108 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 109 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 110 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 111 112 int tlp_pci_match __P((struct device *, struct cfdata *, void *)); 113 void tlp_pci_attach __P((struct device *, struct device *, void *)); 114 115 struct cfattach tlp_pci_ca = { 116 sizeof(struct tulip_pci_softc), tlp_pci_match, tlp_pci_attach, 117 }; 118 119 const struct tulip_pci_product { 120 u_int32_t tpp_vendor; /* PCI vendor ID */ 121 u_int32_t tpp_product; /* PCI product ID */ 122 tulip_chip_t tpp_chip; /* base Tulip chip type */ 123 } tlp_pci_products[] = { 124 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 125 TULIP_CHIP_21040 }, 126 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 127 TULIP_CHIP_21041 }, 128 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 129 TULIP_CHIP_21140 }, 130 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 131 TULIP_CHIP_21142 }, 132 133 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 134 TULIP_CHIP_82C168 }, 135 136 /* 137 * Note: This is like a MX98725 with Wake-On-LAN and a 138 * 128-bit multicast hash table. 139 */ 140 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 141 TULIP_CHIP_82C115 }, 142 143 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 144 TULIP_CHIP_MX98713 }, 145 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 146 TULIP_CHIP_MX98715 }, 147 148 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 149 TULIP_CHIP_MX98713 }, 150 151 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 152 TULIP_CHIP_WB89C840F }, 153 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 154 TULIP_CHIP_WB89C840F }, 155 156 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 157 TULIP_CHIP_DM9102 }, 158 159 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 160 TULIP_CHIP_AL981 }, 161 162 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985, 163 TULIP_CHIP_AN985 }, 164 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 165 TULIP_CHIP_AN985 }, 166 167 #if 0 168 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 169 TULIP_CHIP_AX88140 }, 170 #endif 171 172 { 0, 0, 173 TULIP_CHIP_INVALID }, 174 }; 175 176 struct tlp_pci_quirks { 177 void (*tpq_func) __P((struct tulip_pci_softc *, 178 const u_int8_t *)); 179 u_int8_t tpq_oui[3]; 180 }; 181 182 void tlp_pci_dec_quirks __P((struct tulip_pci_softc *, 183 const u_int8_t *)); 184 185 void tlp_pci_znyx_21040_quirks __P((struct tulip_pci_softc *, 186 const u_int8_t *)); 187 void tlp_pci_smc_21040_quirks __P((struct tulip_pci_softc *, 188 const u_int8_t *)); 189 void tlp_pci_cogent_21040_quirks __P((struct tulip_pci_softc *, 190 const u_int8_t *)); 191 void tlp_pci_accton_21040_quirks __P((struct tulip_pci_softc *, 192 const u_int8_t *)); 193 194 void tlp_pci_cobalt_21142_quirks __P((struct tulip_pci_softc *, 195 const u_int8_t *)); 196 void tlp_pci_algor_21142_quirks __P((struct tulip_pci_softc *, 197 const u_int8_t *)); 198 void tlp_pci_netwinder_21142_quirks __P((struct tulip_pci_softc *, 199 const u_int8_t *)); 200 201 void tlp_pci_adaptec_quirks __P((struct tulip_pci_softc *, 202 const u_int8_t *)); 203 204 const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 205 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 206 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 207 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 208 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 209 { NULL, { 0, 0, 0 } } 210 }; 211 212 const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 213 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 214 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 215 { NULL, { 0, 0, 0 } } 216 }; 217 218 void tlp_pci_asante_21140_quirks __P((struct tulip_pci_softc *, 219 const u_int8_t *)); 220 void tlp_pci_smc_21140_quirks __P((struct tulip_pci_softc *, 221 const u_int8_t *)); 222 223 const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 224 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 225 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 226 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 227 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } }, 228 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 229 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } }, 230 { NULL, { 0, 0, 0 } } 231 }; 232 233 const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 234 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 235 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 236 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 237 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 238 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 239 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } }, 240 { NULL, { 0, 0, 0 } } 241 }; 242 243 int tlp_pci_shared_intr __P((void *)); 244 245 const struct tulip_pci_product *tlp_pci_lookup 246 __P((const struct pci_attach_args *)); 247 void tlp_pci_get_quirks __P((struct tulip_pci_softc *, const u_int8_t *, 248 const struct tlp_pci_quirks *)); 249 void tlp_pci_check_slaved __P((struct tulip_pci_softc *, int, int)); 250 251 const struct tulip_pci_product * 252 tlp_pci_lookup(pa) 253 const struct pci_attach_args *pa; 254 { 255 const struct tulip_pci_product *tpp; 256 257 for (tpp = tlp_pci_products; 258 tlp_chip_names[tpp->tpp_chip] != NULL; 259 tpp++) { 260 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 261 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 262 return (tpp); 263 } 264 return (NULL); 265 } 266 267 void 268 tlp_pci_get_quirks(psc, enaddr, tpq) 269 struct tulip_pci_softc *psc; 270 const u_int8_t *enaddr; 271 const struct tlp_pci_quirks *tpq; 272 { 273 274 for (; tpq->tpq_func != NULL; tpq++) { 275 if (tpq->tpq_oui[0] == enaddr[0] && 276 tpq->tpq_oui[1] == enaddr[1] && 277 tpq->tpq_oui[2] == enaddr[2]) { 278 (*tpq->tpq_func)(psc, enaddr); 279 return; 280 } 281 } 282 } 283 284 void 285 tlp_pci_check_slaved(psc, shared, slaved) 286 struct tulip_pci_softc *psc; 287 int shared, slaved; 288 { 289 extern struct cfdriver tlp_cd; 290 struct tulip_pci_softc *cur, *best = NULL; 291 struct tulip_softc *sc = &psc->sc_tulip; 292 int i; 293 294 /* 295 * First of all, find the lowest pcidev numbered device on our 296 * bus marked as shared. That should be our master. 297 */ 298 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 299 if ((cur = tlp_cd.cd_devs[i]) == NULL) 300 continue; 301 if (cur->sc_tulip.sc_dev.dv_parent != sc->sc_dev.dv_parent) 302 continue; 303 if ((cur->sc_flags & shared) == 0) 304 continue; 305 if (cur == psc) 306 continue; 307 if (best == NULL || 308 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 309 best = cur; 310 } 311 312 if (best != NULL) { 313 psc->sc_master = best; 314 psc->sc_flags |= (shared | slaved); 315 } 316 } 317 318 int 319 tlp_pci_match(parent, match, aux) 320 struct device *parent; 321 struct cfdata *match; 322 void *aux; 323 { 324 struct pci_attach_args *pa = aux; 325 326 if (tlp_pci_lookup(pa) != NULL) 327 return (10); /* beat if_de.c */ 328 329 return (0); 330 } 331 332 void 333 tlp_pci_attach(parent, self, aux) 334 struct device *parent, *self; 335 void *aux; 336 { 337 struct tulip_pci_softc *psc = (void *) self; 338 struct tulip_softc *sc = &psc->sc_tulip; 339 struct pci_attach_args *pa = aux; 340 pci_chipset_tag_t pc = pa->pa_pc; 341 pci_intr_handle_t ih; 342 const char *intrstr = NULL; 343 bus_space_tag_t iot, memt; 344 bus_space_handle_t ioh, memh; 345 int ioh_valid, memh_valid, i, j; 346 const struct tulip_pci_product *tpp; 347 u_int8_t enaddr[ETHER_ADDR_LEN]; 348 u_int32_t val; 349 pcireg_t reg; 350 int pmreg; 351 352 sc->sc_devno = pa->pa_device; 353 psc->sc_pc = pa->pa_pc; 354 psc->sc_pcitag = pa->pa_tag; 355 356 LIST_INIT(&psc->sc_intrslaves); 357 358 tpp = tlp_pci_lookup(pa); 359 if (tpp == NULL) { 360 printf("\n"); 361 panic("tlp_pci_attach: impossible"); 362 } 363 sc->sc_chip = tpp->tpp_chip; 364 365 /* 366 * By default, Tulip registers are 8 bytes long (4 bytes 367 * followed by a 4 byte pad). 368 */ 369 sc->sc_regshift = 3; 370 371 /* 372 * No power management hooks. 373 * XXX Maybe we should add some! 374 */ 375 sc->sc_flags |= TULIPF_ENABLED; 376 377 /* 378 * Get revision info, and set some chip-specific variables. 379 */ 380 sc->sc_rev = PCI_REVISION(pa->pa_class); 381 switch (sc->sc_chip) { 382 case TULIP_CHIP_21140: 383 if (sc->sc_rev >= 0x20) 384 sc->sc_chip = TULIP_CHIP_21140A; 385 break; 386 387 case TULIP_CHIP_21142: 388 if (sc->sc_rev >= 0x20) 389 sc->sc_chip = TULIP_CHIP_21143; 390 break; 391 392 case TULIP_CHIP_82C168: 393 if (sc->sc_rev >= 0x20) 394 sc->sc_chip = TULIP_CHIP_82C169; 395 break; 396 397 case TULIP_CHIP_MX98713: 398 if (sc->sc_rev >= 0x10) 399 sc->sc_chip = TULIP_CHIP_MX98713A; 400 break; 401 402 case TULIP_CHIP_MX98715: 403 if (sc->sc_rev >= 0x20) 404 sc->sc_chip = TULIP_CHIP_MX98715A; 405 if (sc->sc_rev >= 0x25) 406 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 407 if (sc->sc_rev >= 0x30) 408 sc->sc_chip = TULIP_CHIP_MX98725; 409 break; 410 411 case TULIP_CHIP_WB89C840F: 412 sc->sc_regshift = 2; 413 break; 414 415 case TULIP_CHIP_AN985: 416 /* 417 * The AN983 and AN985 are very similar, and are 418 * differentiated by a "signature" register that 419 * is like, but not identical, to a PCI ID register. 420 */ 421 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 422 switch (reg) { 423 case 0x09811317: 424 sc->sc_chip = TULIP_CHIP_AN985; 425 break; 426 427 case 0x09851317: 428 sc->sc_chip = TULIP_CHIP_AN983; 429 break; 430 431 default: 432 /* Unknown -- use default. */ 433 break; 434 } 435 break; 436 437 case TULIP_CHIP_AX88140: 438 if (sc->sc_rev >= 0x10) 439 sc->sc_chip = TULIP_CHIP_AX88141; 440 break; 441 442 case TULIP_CHIP_DM9102: 443 if (sc->sc_rev >= 0x30) 444 sc->sc_chip = TULIP_CHIP_DM9102A; 445 break; 446 447 default: 448 /* Nothing. */ 449 break; 450 } 451 452 printf(": %s Ethernet, pass %d.%d\n", 453 tlp_chip_names[sc->sc_chip], 454 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 455 456 switch (sc->sc_chip) { 457 case TULIP_CHIP_21040: 458 if (sc->sc_rev < 0x20) { 459 printf("%s: 21040 must be at least pass 2.0\n", 460 sc->sc_dev.dv_xname); 461 return; 462 } 463 break; 464 465 case TULIP_CHIP_21140: 466 if (sc->sc_rev < 0x11) { 467 printf("%s: 21140 must be at least pass 1.1\n", 468 sc->sc_dev.dv_xname); 469 return; 470 } 471 break; 472 473 default: 474 /* Nothing. */ 475 break; 476 } 477 478 /* 479 * Check to see if the device is in power-save mode, and 480 * being it out if necessary. 481 */ 482 switch (sc->sc_chip) { 483 case TULIP_CHIP_21140: 484 case TULIP_CHIP_21140A: 485 case TULIP_CHIP_21142: 486 case TULIP_CHIP_21143: 487 case TULIP_CHIP_MX98713A: 488 case TULIP_CHIP_MX98715: 489 case TULIP_CHIP_MX98715A: 490 case TULIP_CHIP_MX98715AEC_X: 491 case TULIP_CHIP_MX98725: 492 case TULIP_CHIP_DM9102: 493 case TULIP_CHIP_DM9102A: 494 /* 495 * Clear the "sleep mode" bit in the CFDA register. 496 */ 497 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 498 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 499 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 500 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 501 break; 502 503 default: 504 /* Nothing. */ 505 break; 506 } 507 508 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 509 reg = pci_conf_read(pc, pa->pa_tag, pmreg + 4); 510 switch (reg & PCI_PMCSR_STATE_MASK) { 511 case PCI_PMCSR_STATE_D1: 512 case PCI_PMCSR_STATE_D2: 513 printf(": waking up from power state D%d\n%s", 514 reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname); 515 pci_conf_write(pc, pa->pa_tag, pmreg + 4, 516 (reg & ~PCI_PMCSR_STATE_MASK) | 517 PCI_PMCSR_STATE_D0); 518 break; 519 case PCI_PMCSR_STATE_D3: 520 /* 521 * The card has lost all configuration data in 522 * this state, so punt. 523 */ 524 printf(": unable to wake up from power state D3, " 525 "reboot required.\n"); 526 pci_conf_write(pc, pa->pa_tag, pmreg + 4, 527 (reg & ~PCI_PMCSR_STATE_MASK) | 528 PCI_PMCSR_STATE_D0); 529 return; 530 } 531 } 532 533 /* 534 * Map the device. 535 */ 536 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 537 PCI_MAPREG_TYPE_IO, 0, 538 &iot, &ioh, NULL, NULL) == 0); 539 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 540 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 541 &memt, &memh, NULL, NULL) == 0); 542 543 if (memh_valid) { 544 sc->sc_st = memt; 545 sc->sc_sh = memh; 546 } else if (ioh_valid) { 547 sc->sc_st = iot; 548 sc->sc_sh = ioh; 549 } else { 550 printf(": unable to map device registers\n"); 551 return; 552 } 553 554 sc->sc_dmat = pa->pa_dmat; 555 556 /* 557 * Make sure bus mastering is enabled. 558 */ 559 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 560 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 561 PCI_COMMAND_MASTER_ENABLE); 562 563 /* 564 * Get the cacheline size. 565 */ 566 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 567 PCI_BHLC_REG)); 568 569 /* 570 * Get PCI data moving command info. 571 */ 572 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 573 sc->sc_flags |= TULIPF_MRL; 574 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 575 sc->sc_flags |= TULIPF_MRM; 576 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 577 sc->sc_flags |= TULIPF_MWI; 578 579 /* 580 * Read the contents of the Ethernet Address ROM/SROM. 581 */ 582 switch (sc->sc_chip) { 583 case TULIP_CHIP_21040: 584 sc->sc_srom_addrbits = 6; 585 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 586 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 587 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 588 for (j = 0; j < 10000; j++) { 589 val = TULIP_READ(sc, CSR_MIIROM); 590 if ((val & MIIROM_DN) == 0) 591 break; 592 } 593 sc->sc_srom[i] = val & MIIROM_DATA; 594 } 595 break; 596 597 case TULIP_CHIP_82C168: 598 case TULIP_CHIP_82C169: 599 { 600 sc->sc_srom_addrbits = 2; 601 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 602 603 /* 604 * The Lite-On PNIC stores the Ethernet address in 605 * the first 3 words of the EEPROM. EEPROM access 606 * is not like the other Tulip chips. 607 */ 608 for (i = 0; i < 6; i += 2) { 609 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 610 PNIC_SROMCTL_READ | (i >> 1)); 611 for (j = 0; j < 500; j++) { 612 delay(2); 613 val = TULIP_READ(sc, CSR_MIIROM); 614 if ((val & PNIC_MIIROM_BUSY) == 0) 615 break; 616 } 617 if (val & PNIC_MIIROM_BUSY) { 618 printf("%s: EEPROM timed out\n", 619 sc->sc_dev.dv_xname); 620 return; 621 } 622 val &= PNIC_MIIROM_DATA; 623 sc->sc_srom[i] = val >> 8; 624 sc->sc_srom[i + 1] = val & 0xff; 625 } 626 break; 627 } 628 629 default: 630 #ifdef algor 631 /* 632 * XXX This should be done with device properties, but 633 * XXX we don't have those yet. 634 */ 635 if (algor_get_ethaddr(pa, NULL)) { 636 extern int tlp_srom_debug; 637 sc->sc_srom_addrbits = 6; 638 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 639 M_NOWAIT|M_ZERO); 640 algor_get_ethaddr(pa, sc->sc_srom); 641 if (tlp_srom_debug) { 642 printf("SROM CONTENTS:"); 643 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 644 if ((i % 8) == 0) 645 printf("\n\t"); 646 printf("0x%02x ", sc->sc_srom[i]); 647 } 648 printf("\n"); 649 } 650 break; 651 } 652 #endif /* algor */ 653 654 /* Check for a slaved ROM on a multi-port board. */ 655 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 656 TULIP_PCI_SLAVEROM); 657 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 658 sc->sc_srom_addrbits = 659 psc->sc_master->sc_tulip.sc_srom_addrbits; 660 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 661 enaddr[5] += 662 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 663 } 664 else if (tlp_read_srom(sc) == 0) 665 goto cant_cope; 666 break; 667 } 668 669 /* 670 * Deal with chip/board quirks. This includes setting up 671 * the mediasw, and extracting the Ethernet address from 672 * the rombuf. 673 */ 674 switch (sc->sc_chip) { 675 case TULIP_CHIP_21040: 676 /* 677 * Parse the Ethernet Address ROM. 678 */ 679 if (tlp_parse_old_srom(sc, enaddr) == 0) 680 goto cant_cope; 681 682 683 /* 684 * All 21040 boards start out with the same 685 * media switch. 686 */ 687 sc->sc_mediasw = &tlp_21040_mediasw; 688 689 /* 690 * Deal with any quirks this board might have. 691 */ 692 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 693 break; 694 695 case TULIP_CHIP_21041: 696 /* Check for new format SROM. */ 697 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 698 /* 699 * Not an ISV SROM; try the old DEC Ethernet Address 700 * ROM format. 701 */ 702 if (tlp_parse_old_srom(sc, enaddr) == 0) 703 goto cant_cope; 704 } 705 706 /* 707 * All 21041 boards use the same media switch; they all 708 * work basically the same! Yippee! 709 */ 710 sc->sc_mediasw = &tlp_21041_mediasw; 711 712 /* 713 * Deal with any quirks this board might have. 714 */ 715 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 716 break; 717 718 case TULIP_CHIP_21140: 719 case TULIP_CHIP_21140A: 720 /* Check for new format SROM. */ 721 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 722 /* 723 * Not an ISV SROM; try the old DEC Ethernet Address 724 * ROM format. 725 */ 726 if (tlp_parse_old_srom(sc, enaddr) == 0) 727 goto cant_cope; 728 } else { 729 /* 730 * We start out with the 2114x ISV media switch. 731 * When we search for quirks, we may change to 732 * a different switch. 733 */ 734 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 735 } 736 737 /* 738 * Deal with any quirks this board might have. 739 */ 740 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 741 742 /* 743 * Bail out now if we can't deal with this board. 744 */ 745 if (sc->sc_mediasw == NULL) 746 goto cant_cope; 747 break; 748 749 case TULIP_CHIP_21142: 750 case TULIP_CHIP_21143: 751 /* Check for new format SROM. */ 752 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 753 /* 754 * Not an ISV SROM; try the old DEC Ethernet Address 755 * ROM format. 756 */ 757 if (tlp_parse_old_srom(sc, enaddr) == 0) { 758 /* 759 * One last try: just copy the address 760 * from offset 20 and try to look 761 * up quirks. 762 */ 763 memcpy(enaddr, &sc->sc_srom[20], 764 ETHER_ADDR_LEN); 765 } 766 } else { 767 /* 768 * We start out with the 2114x ISV media switch. 769 * When we search for quirks, we may change to 770 * a different switch. 771 */ 772 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 773 } 774 775 /* 776 * Deal with any quirks this board might have. 777 */ 778 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 779 780 /* 781 * Bail out now if we can't deal with this board. 782 */ 783 if (sc->sc_mediasw == NULL) 784 goto cant_cope; 785 break; 786 787 case TULIP_CHIP_82C168: 788 case TULIP_CHIP_82C169: 789 /* 790 * Lite-On PNIC's Ethernet address is the first 6 791 * bytes of its EEPROM. 792 */ 793 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 794 795 /* 796 * Lite-On PNICs always use the same mediasw; we 797 * select MII vs. internal NWAY automatically. 798 */ 799 sc->sc_mediasw = &tlp_pnic_mediasw; 800 break; 801 802 case TULIP_CHIP_MX98713: 803 /* 804 * The Macronix MX98713 has an MII and GPIO, but no 805 * internal Nway block. This chip is basically a 806 * perfect 21140A clone, with the exception of the 807 * a magic register frobbing in order to make the 808 * interface function. 809 */ 810 if (tlp_isv_srom_enaddr(sc, enaddr)) { 811 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 812 break; 813 } 814 /* FALLTHROUGH */ 815 816 case TULIP_CHIP_82C115: 817 /* 818 * Yippee! The Lite-On 82C115 is a clone of 819 * the MX98725 (the data sheet even says `MXIC' 820 * on it)! Imagine that, a clone of a clone. 821 * 822 * The differences are really minimal: 823 * 824 * - Wake-On-LAN support 825 * - 128-bit multicast hash table, rather than 826 * the standard 512-bit hash table 827 */ 828 /* FALLTHROUGH */ 829 830 case TULIP_CHIP_MX98713A: 831 case TULIP_CHIP_MX98715A: 832 case TULIP_CHIP_MX98715AEC_X: 833 case TULIP_CHIP_MX98725: 834 /* 835 * The MX98713A has an MII as well as an internal Nway block, 836 * but no GPIO. The MX98715 and MX98725 have an internal 837 * Nway block only. 838 * 839 * The internal Nway block, unlike the Lite-On PNIC's, does 840 * just that - performs Nway. Once autonegotiation completes, 841 * we must program the GPR media information into the chip. 842 * 843 * The byte offset of the Ethernet address is stored at 844 * offset 0x70. 845 */ 846 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 847 sc->sc_mediasw = &tlp_pmac_mediasw; 848 break; 849 850 case TULIP_CHIP_WB89C840F: 851 /* 852 * Winbond 89C840F's Ethernet address is the first 853 * 6 bytes of its EEPROM. 854 */ 855 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 856 857 /* 858 * Winbond 89C840F has an MII attached to the SIO. 859 */ 860 sc->sc_mediasw = &tlp_sio_mii_mediasw; 861 break; 862 863 case TULIP_CHIP_AL981: 864 /* 865 * The ADMtek AL981's Ethernet address is located 866 * at offset 8 of its EEPROM. 867 */ 868 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 869 870 /* 871 * ADMtek AL981 has a built-in PHY accessed through 872 * special registers. 873 */ 874 sc->sc_mediasw = &tlp_al981_mediasw; 875 break; 876 877 case TULIP_CHIP_AN983: 878 case TULIP_CHIP_AN985: 879 /* 880 * The ADMtek AN985's Ethernet address is located 881 * at offset 8 of its EEPROM. 882 */ 883 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 884 885 /* 886 * The ADMtek AN985 can be configured in Single-Chip 887 * mode or MAC-only mode. Single-Chip uses the built-in 888 * PHY, MAC-only has an external PHY (usually HomePNA). 889 * The selection is based on an EEPROM setting, and both 890 * PHYs are accessed via MII attached to SIO. 891 * 892 * The AN985 "ghosts" the internal PHY onto all 893 * MII addresses, so we have to use a media init 894 * routine that limits the search. 895 * XXX How does this work with MAC-only mode? 896 */ 897 sc->sc_mediasw = &tlp_an985_mediasw; 898 break; 899 900 case TULIP_CHIP_DM9102: 901 case TULIP_CHIP_DM9102A: 902 /* 903 * Some boards with the Davicom chip have an ISV 904 * SROM (mostly DM9102A boards -- trying to describe 905 * the HomePNA PHY, probably) although the data in 906 * them is generally wrong. Check for ISV format 907 * and grab the Ethernet address that way, and if 908 * that fails, fall back on grabbing it from an 909 * observed offset of 20 (which is where it would 910 * be in an ISV SROM anyhow, tho ISV can cope with 911 * multi-port boards). 912 */ 913 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 914 #ifdef __sparc__ 915 if (!sc->sc_srom[20] && !sc->sc_srom[21] && 916 !sc->sc_srom[22]) { 917 extern void myetheraddr __P((u_char *)); 918 myetheraddr(enaddr); 919 } else 920 #endif 921 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 922 } 923 924 /* 925 * Davicom chips all have an internal MII interface 926 * and a built-in PHY. DM9102A also has a an external 927 * MII interface, usually with a HomePNA PHY attached 928 * to it. 929 */ 930 sc->sc_mediasw = &tlp_dm9102_mediasw; 931 break; 932 933 default: 934 cant_cope: 935 printf("%s: sorry, unable to handle your board\n", 936 sc->sc_dev.dv_xname); 937 return; 938 } 939 940 /* 941 * Handle shared interrupts. 942 */ 943 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 944 if (psc->sc_master) 945 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 946 else { 947 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 948 TULIP_PCI_SLAVEINTR); 949 if (psc->sc_master == NULL) 950 psc->sc_master = psc; 951 } 952 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 953 psc, sc_intrq); 954 } 955 956 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 957 printf("%s: sharing interrupt with %s\n", 958 sc->sc_dev.dv_xname, 959 psc->sc_master->sc_tulip.sc_dev.dv_xname); 960 } else { 961 /* 962 * Map and establish our interrupt. 963 */ 964 if (pci_intr_map(pa, &ih)) { 965 printf("%s: unable to map interrupt\n", 966 sc->sc_dev.dv_xname); 967 return; 968 } 969 intrstr = pci_intr_string(pc, ih); 970 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 971 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 972 tlp_pci_shared_intr : tlp_intr, sc); 973 if (psc->sc_ih == NULL) { 974 printf("%s: unable to establish interrupt", 975 sc->sc_dev.dv_xname); 976 if (intrstr != NULL) 977 printf(" at %s", intrstr); 978 printf("\n"); 979 return; 980 } 981 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 982 intrstr); 983 } 984 985 /* 986 * Finish off the attach. 987 */ 988 tlp_attach(sc, enaddr); 989 } 990 991 int 992 tlp_pci_shared_intr(arg) 993 void *arg; 994 { 995 struct tulip_pci_softc *master = arg, *slave; 996 int rv = 0; 997 998 for (slave = LIST_FIRST(&master->sc_intrslaves); 999 slave != NULL; 1000 slave = LIST_NEXT(slave, sc_intrq)) 1001 rv |= tlp_intr(&slave->sc_tulip); 1002 1003 return (rv); 1004 } 1005 1006 void 1007 tlp_pci_dec_quirks(psc, enaddr) 1008 struct tulip_pci_softc *psc; 1009 const u_int8_t *enaddr; 1010 { 1011 struct tulip_softc *sc = &psc->sc_tulip; 1012 1013 /* 1014 * This isn't really a quirk-gathering device, really. We 1015 * just want to get the spiffy DEC board name from the SROM. 1016 */ 1017 strcpy(sc->sc_name, "DEC "); 1018 1019 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1020 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1021 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1022 } 1023 1024 void 1025 tlp_pci_znyx_21040_quirks(psc, enaddr) 1026 struct tulip_pci_softc *psc; 1027 const u_int8_t *enaddr; 1028 { 1029 struct tulip_softc *sc = &psc->sc_tulip; 1030 u_int16_t id = 0; 1031 1032 /* 1033 * If we have a slaved ROM, just copy the bits from the master. 1034 * This is in case we fail the ROM ID check (older boards) and 1035 * need to fall back on Ethernet address model checking; that 1036 * will fail for slave chips. 1037 */ 1038 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1039 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1040 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1041 psc->sc_flags |= 1042 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1043 return; 1044 } 1045 1046 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1047 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1048 switch (id) { 1049 zx312: 1050 case 0x0602: /* ZX312 */ 1051 strcpy(sc->sc_name, "ZNYX ZX312"); 1052 return; 1053 1054 case 0x0622: /* ZX312T */ 1055 strcpy(sc->sc_name, "ZNYX ZX312T"); 1056 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1057 return; 1058 1059 zx314_inta: 1060 case 0x0701: /* ZX314 INTA */ 1061 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1062 /* FALLTHROUGH */ 1063 case 0x0711: /* ZX314 */ 1064 strcpy(sc->sc_name, "ZNYX ZX314"); 1065 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1066 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1067 return; 1068 1069 zx315_inta: 1070 case 0x0801: /* ZX315 INTA */ 1071 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1072 /* FALLTHROUGH */ 1073 case 0x0811: /* ZX315 */ 1074 strcpy(sc->sc_name, "ZNYX ZX315"); 1075 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1076 return; 1077 1078 default: 1079 id = 0; 1080 break; 1081 } 1082 } 1083 1084 /* 1085 * Deal with boards that have broken ROMs. 1086 */ 1087 if (id == 0) { 1088 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1089 goto zx314_inta; 1090 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1091 goto zx315_inta; 1092 if ((enaddr[3] & ~3) == 0xec) 1093 goto zx312; 1094 } 1095 1096 strcpy(sc->sc_name, "ZNYX ZX31x"); 1097 } 1098 1099 void 1100 tlp_pci_smc_21040_quirks(psc, enaddr) 1101 struct tulip_pci_softc *psc; 1102 const u_int8_t *enaddr; 1103 { 1104 struct tulip_softc *sc = &psc->sc_tulip; 1105 u_int16_t id1, id2, ei; 1106 int auibnc = 0, utp = 0; 1107 char *cp; 1108 1109 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1110 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1111 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1112 1113 strcpy(sc->sc_name, "SMC 8432"); 1114 cp = &sc->sc_name[8]; 1115 1116 if ((id1 & 1) == 0) { 1117 *cp++ = 'B'; 1118 auibnc = 1; 1119 } 1120 if ((id1 & 0xff) > 0x32) { 1121 *cp++ = 'T'; 1122 utp = 1; 1123 } 1124 if ((id1 & 0x4000) == 0) { 1125 *cp++ = 'A'; 1126 auibnc = 1; 1127 } 1128 if (id2 == 0x15) { 1129 sc->sc_name[7] = '4'; 1130 *cp++ = '-'; 1131 *cp++ = 'C'; 1132 *cp++ = 'H'; 1133 *cp++ = ei ? '2' : '1'; 1134 } 1135 *cp = '\0'; 1136 1137 if (utp != 0 && auibnc == 0) 1138 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1139 else if (utp == 0 && auibnc != 0) 1140 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1141 } 1142 1143 void 1144 tlp_pci_cogent_21040_quirks(psc, enaddr) 1145 struct tulip_pci_softc *psc; 1146 const u_int8_t *enaddr; 1147 { 1148 1149 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1150 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1151 } 1152 1153 void 1154 tlp_pci_accton_21040_quirks(psc, enaddr) 1155 struct tulip_pci_softc *psc; 1156 const u_int8_t *enaddr; 1157 { 1158 1159 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1160 } 1161 1162 void tlp_pci_asante_21140_reset __P((struct tulip_softc *)); 1163 1164 void 1165 tlp_pci_asante_21140_quirks(psc, enaddr) 1166 struct tulip_pci_softc *psc; 1167 const u_int8_t *enaddr; 1168 { 1169 struct tulip_softc *sc = &psc->sc_tulip; 1170 1171 /* 1172 * Some Asante boards don't use the ISV SROM format. For 1173 * those that don't, we initialize the GPIO direction bits, 1174 * and provide our own reset hook, which resets the MII. 1175 * 1176 * All of these boards use SIO-attached-MII media. 1177 */ 1178 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1179 return; 1180 1181 strcpy(sc->sc_name, "Asante"); 1182 1183 sc->sc_gp_dir = 0xbf; 1184 sc->sc_reset = tlp_pci_asante_21140_reset; 1185 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1186 } 1187 1188 void 1189 tlp_pci_asante_21140_reset(sc) 1190 struct tulip_softc *sc; 1191 { 1192 1193 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1194 TULIP_WRITE(sc, CSR_GPP, 0x8); 1195 delay(100); 1196 TULIP_WRITE(sc, CSR_GPP, 0); 1197 } 1198 1199 /* 1200 * SMC 9332DST media switch. 1201 */ 1202 void tlp_smc9332dst_tmsw_init __P((struct tulip_softc *)); 1203 1204 const struct tulip_mediasw tlp_smc9332dst_mediasw = { 1205 tlp_smc9332dst_tmsw_init, 1206 tlp_21140_gpio_get, 1207 tlp_21140_gpio_set 1208 }; 1209 1210 void 1211 tlp_pci_smc_21140_quirks(psc, enaddr) 1212 struct tulip_pci_softc *psc; 1213 const u_int8_t *enaddr; 1214 { 1215 struct tulip_softc *sc = &psc->sc_tulip; 1216 1217 if (sc->sc_mediasw != NULL) { 1218 return; 1219 } 1220 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST"); 1221 sc->sc_mediasw = &tlp_smc9332dst_mediasw; 1222 } 1223 1224 void 1225 tlp_smc9332dst_tmsw_init(sc) 1226 struct tulip_softc *sc; 1227 { 1228 struct tulip_21x4x_media *tm; 1229 const char *sep = ""; 1230 uint32_t reg; 1231 int i, cnt; 1232 1233 sc->sc_gp_dir = GPP_SMC9332DST_PINS; 1234 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1235 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1236 1237 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1238 tlp_mediastatus); 1239 printf("%s: ", sc->sc_dev.dv_xname); 1240 1241 #define ADD(m, c) \ 1242 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1243 tm->tm_opmode = (c); \ 1244 tm->tm_gpdata = GPP_SMC9332DST_INIT; \ 1245 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1246 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1247 1248 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM); 1249 PRINT("10baseT"); 1250 1251 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 1252 OPMODE_TTM | OPMODE_FD); 1253 PRINT("10baseT-FDX"); 1254 1255 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1256 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1257 PRINT("100baseTX"); 1258 1259 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 1260 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1261 PRINT("100baseTX-FDX"); 1262 1263 #undef ADD 1264 #undef PRINT 1265 1266 printf("\n"); 1267 1268 tlp_reset(sc); 1269 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR); 1270 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1271 delay(10); 1272 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT); 1273 delay(200000); 1274 cnt = 0; 1275 for (i = 1000; i > 0; i--) { 1276 reg = TULIP_READ(sc, CSR_GPP); 1277 if ((~reg & (GPP_SMC9332DST_OK10 | 1278 GPP_SMC9332DST_OK100)) == 0) { 1279 if (cnt++ > 100) { 1280 break; 1281 } 1282 } else if ((reg & GPP_SMC9332DST_OK10) == 0) { 1283 break; 1284 } else { 1285 cnt = 0; 1286 } 1287 delay(1000); 1288 } 1289 if (cnt > 100) { 1290 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1291 } else { 1292 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 1293 } 1294 } 1295 1296 void tlp_pci_cobalt_21142_reset __P((struct tulip_softc *)); 1297 1298 void 1299 tlp_pci_cobalt_21142_quirks(psc, enaddr) 1300 struct tulip_pci_softc *psc; 1301 const u_int8_t *enaddr; 1302 { 1303 struct tulip_softc *sc = &psc->sc_tulip; 1304 1305 /* 1306 * Cobalt Networks interfaces are just MII-on-SIO. 1307 */ 1308 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1309 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1310 1311 /* 1312 * The Cobalt systems tend to fall back to store-and-forward 1313 * pretty quickly, so we select that from the beginning to 1314 * avoid initial timeouts. 1315 */ 1316 sc->sc_txthresh = TXTH_SF; 1317 } 1318 1319 void 1320 tlp_pci_cobalt_21142_reset(sc) 1321 struct tulip_softc *sc; 1322 { 1323 /* 1324 * Reset PHY. 1325 */ 1326 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1327 delay(10); 1328 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1329 delay(10); 1330 } 1331 1332 void 1333 tlp_pci_algor_21142_quirks(psc, enaddr) 1334 struct tulip_pci_softc *psc; 1335 const u_int8_t *enaddr; 1336 { 1337 struct tulip_softc *sc = &psc->sc_tulip; 1338 1339 /* 1340 * Algorithmics boards just have MII-on-SIO. 1341 * 1342 * XXX They also have AUI on the serial interface. 1343 * XXX Deal with this. 1344 */ 1345 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1346 } 1347 1348 /* 1349 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch. 1350 */ 1351 void tlp_cogent_em1x0_tmsw_init __P((struct tulip_softc *)); 1352 1353 const struct tulip_mediasw tlp_cogent_em1x0_mediasw = { 1354 tlp_cogent_em1x0_tmsw_init, 1355 tlp_21140_gpio_get, 1356 tlp_21140_gpio_set 1357 }; 1358 1359 void 1360 tlp_pci_adaptec_quirks(psc, enaddr) 1361 struct tulip_pci_softc *psc; 1362 const u_int8_t *enaddr; 1363 { 1364 struct tulip_softc *sc = &psc->sc_tulip; 1365 uint8_t *srom = sc->sc_srom, id0; 1366 uint16_t id1, id2; 1367 1368 if (sc->sc_mediasw == NULL) { 1369 id0 = srom[32]; 1370 switch (id0) { 1371 case 0x12: 1372 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX"); 1373 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1374 break; 1375 1376 case 0x15: 1377 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX"); 1378 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1379 break; 1380 1381 #if 0 1382 case XXX: 1383 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX"); 1384 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1385 break; 1386 #endif 1387 1388 default: 1389 printf("%s: unknown Cogent board ID 0x%02x\n", 1390 sc->sc_dev.dv_xname, id0); 1391 } 1392 return; 1393 } 1394 1395 id1 = TULIP_ROM_GETW(srom, 0); 1396 id2 = TULIP_ROM_GETW(srom, 2); 1397 if (id1 != 0x1109) { 1398 goto unknown; 1399 } 1400 1401 switch (id2) { 1402 case 0x1900: 1403 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911"); 1404 break; 1405 1406 case 0x2400: 1407 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A"); 1408 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1409 break; 1410 1411 case 0x2b00: 1412 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A"); 1413 break; 1414 1415 case 0x3000: 1416 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922"); 1417 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1418 break; 1419 1420 default: 1421 unknown: 1422 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n", 1423 sc->sc_dev.dv_xname, id1, id2); 1424 } 1425 } 1426 1427 void 1428 tlp_cogent_em1x0_tmsw_init(sc) 1429 struct tulip_softc *sc; 1430 { 1431 struct tulip_21x4x_media *tm; 1432 const char *sep = ""; 1433 1434 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS; 1435 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1436 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1437 1438 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1439 tlp_mediastatus); 1440 printf("%s: ", sc->sc_dev.dv_xname); 1441 1442 #define ADD(m, c) \ 1443 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1444 tm->tm_opmode = (c); \ 1445 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \ 1446 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1447 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1448 1449 if (sc->sc_srom[32] == 0x15) { 1450 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0), 1451 OPMODE_PS | OPMODE_PCS); 1452 PRINT("100baseFX"); 1453 1454 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1455 OPMODE_PS | OPMODE_PCS | OPMODE_FD); 1456 PRINT("100baseFX-FDX"); 1457 printf("\n"); 1458 1459 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_FX); 1460 } else { 1461 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1462 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1463 PRINT("100baseTX"); 1464 1465 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1466 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1467 PRINT("100baseTX-FDX"); 1468 printf("\n"); 1469 1470 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1471 } 1472 1473 #undef ADD 1474 #undef PRINT 1475 } 1476 1477 void tlp_pci_netwinder_21142_reset(struct tulip_softc *); 1478 1479 void 1480 tlp_pci_netwinder_21142_quirks(psc, enaddr) 1481 struct tulip_pci_softc *psc; 1482 const u_int8_t *enaddr; 1483 { 1484 struct tulip_softc *sc = &psc->sc_tulip; 1485 1486 /* 1487 * Netwinders just use MII-on_SIO. 1488 */ 1489 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1490 sc->sc_reset = tlp_pci_netwinder_21142_reset; 1491 } 1492 1493 void 1494 tlp_pci_netwinder_21142_reset(sc) 1495 struct tulip_softc *sc; 1496 { 1497 1498 /* 1499 * Reset the PHY. 1500 */ 1501 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16); 1502 delay(10); 1503 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16); 1504 delay(10); 1505 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16); 1506 delay(10); 1507 } 1508