xref: /netbsd/sys/dev/pci/pci_map.c (revision bf9ec67e)
1 /*	$NetBSD: pci_map.c,v 1.10 2001/11/13 07:48:47 lukem Exp $	*/
2 
3 /*-
4  * Copyright (c) 1998, 2000 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Charles M. Hannum; by William R. Studenmund; by Jason R. Thorpe.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *        This product includes software developed by the NetBSD
21  *        Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 /*
40  * PCI device mapping.
41  */
42 
43 #include <sys/cdefs.h>
44 __KERNEL_RCSID(0, "$NetBSD: pci_map.c,v 1.10 2001/11/13 07:48:47 lukem Exp $");
45 
46 #include <sys/param.h>
47 #include <sys/systm.h>
48 #include <sys/device.h>
49 
50 #include <dev/pci/pcireg.h>
51 #include <dev/pci/pcivar.h>
52 
53 static int
54 pci_io_find(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t type,
55     bus_addr_t *basep, bus_size_t *sizep, int *flagsp)
56 {
57 	pcireg_t address, mask;
58 	int s;
59 
60 	if (reg < PCI_MAPREG_START ||
61 #if 0
62 	    /*
63 	     * Can't do this check; some devices have mapping registers
64 	     * way out in left field.
65 	     */
66 	    reg >= PCI_MAPREG_END ||
67 #endif
68 	    (reg & 3))
69 		panic("pci_io_find: bad request");
70 
71 	/*
72 	 * Section 6.2.5.1, `Address Maps', tells us that:
73 	 *
74 	 * 1) The builtin software should have already mapped the device in a
75 	 * reasonable way.
76 	 *
77 	 * 2) A device which wants 2^n bytes of memory will hardwire the bottom
78 	 * n bits of the address to 0.  As recommended, we write all 1s and see
79 	 * what we get back.
80 	 */
81 	s = splhigh();
82 	address = pci_conf_read(pc, tag, reg);
83 	pci_conf_write(pc, tag, reg, 0xffffffff);
84 	mask = pci_conf_read(pc, tag, reg);
85 	pci_conf_write(pc, tag, reg, address);
86 	splx(s);
87 
88 	if (PCI_MAPREG_TYPE(address) != PCI_MAPREG_TYPE_IO) {
89 		printf("pci_io_find: expected type i/o, found mem\n");
90 		return (1);
91 	}
92 
93 	if (PCI_MAPREG_IO_SIZE(mask) == 0) {
94 		printf("pci_io_find: void region\n");
95 		return (1);
96 	}
97 
98 	if (basep != 0)
99 		*basep = PCI_MAPREG_IO_ADDR(address);
100 	if (sizep != 0)
101 		*sizep = PCI_MAPREG_IO_SIZE(mask);
102 	if (flagsp != 0)
103 		*flagsp = 0;
104 
105 	return (0);
106 }
107 
108 static int
109 pci_mem_find(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t type,
110     bus_addr_t *basep, bus_size_t *sizep, int *flagsp)
111 {
112 	pcireg_t address, mask, address1 = 0, mask1 = 0xffffffff;
113 	u_int64_t waddress, wmask;
114 	int s, is64bit;
115 
116 	is64bit = (PCI_MAPREG_MEM_TYPE(type) == PCI_MAPREG_MEM_TYPE_64BIT);
117 
118 	if (reg < PCI_MAPREG_START ||
119 #if 0
120 	    /*
121 	     * Can't do this check; some devices have mapping registers
122 	     * way out in left field.
123 	     */
124 	    reg >= PCI_MAPREG_END ||
125 #endif
126 	    (reg & 3))
127 		panic("pci_mem_find: bad request");
128 
129 	if (is64bit && (reg + 4) >= PCI_MAPREG_END)
130 		panic("pci_mem_find: bad 64-bit request");
131 
132 	/*
133 	 * Section 6.2.5.1, `Address Maps', tells us that:
134 	 *
135 	 * 1) The builtin software should have already mapped the device in a
136 	 * reasonable way.
137 	 *
138 	 * 2) A device which wants 2^n bytes of memory will hardwire the bottom
139 	 * n bits of the address to 0.  As recommended, we write all 1s and see
140 	 * what we get back.
141 	 */
142 	s = splhigh();
143 	address = pci_conf_read(pc, tag, reg);
144 	pci_conf_write(pc, tag, reg, 0xffffffff);
145 	mask = pci_conf_read(pc, tag, reg);
146 	pci_conf_write(pc, tag, reg, address);
147 	if (is64bit) {
148 		address1 = pci_conf_read(pc, tag, reg + 4);
149 		pci_conf_write(pc, tag, reg + 4, 0xffffffff);
150 		mask1 = pci_conf_read(pc, tag, reg + 4);
151 		pci_conf_write(pc, tag, reg + 4, address1);
152 	}
153 	splx(s);
154 
155 	if (PCI_MAPREG_TYPE(address) != PCI_MAPREG_TYPE_MEM) {
156 		printf("pci_mem_find: expected type mem, found i/o\n");
157 		return (1);
158 	}
159 	if (PCI_MAPREG_MEM_TYPE(address) != PCI_MAPREG_MEM_TYPE(type)) {
160 		printf("pci_mem_find: expected mem type %08x, found %08x\n",
161 		    PCI_MAPREG_MEM_TYPE(type),
162 		    PCI_MAPREG_MEM_TYPE(address));
163 		return (1);
164 	}
165 
166 	waddress = (u_int64_t)address1 << 32UL | address;
167 	wmask = (u_int64_t)mask1 << 32UL | mask;
168 
169 	if (PCI_MAPREG_MEM64_SIZE(wmask) == 0) {
170 		printf("pci_mem_find: void region\n");
171 		return (1);
172 	}
173 
174 	switch (PCI_MAPREG_MEM_TYPE(address)) {
175 	case PCI_MAPREG_MEM_TYPE_32BIT:
176 	case PCI_MAPREG_MEM_TYPE_32BIT_1M:
177 		break;
178 	case PCI_MAPREG_MEM_TYPE_64BIT:
179 		/*
180 		 * Handle the case of a 64-bit memory register on a
181 		 * platform with 32-bit addressing.  Make sure that
182 		 * the address assigned and the device's memory size
183 		 * fit in 32 bits.  We implicitly assume that if
184 		 * bus_addr_t is 64-bit, then so is bus_size_t.
185 		 */
186 		if (sizeof(u_int64_t) > sizeof(bus_addr_t) &&
187 		    (address1 != 0 || mask1 != 0xffffffff)) {
188 			printf("pci_mem_find: 64-bit memory map which is "
189 			    "inaccessible on a 32-bit platform\n");
190 			return (1);
191 		}
192 		break;
193 	default:
194 		printf("pci_mem_find: reserved mapping register type\n");
195 		return (1);
196 	}
197 
198 	if (sizeof(u_int64_t) > sizeof(bus_addr_t)) {
199 		if (basep != 0)
200 			*basep = PCI_MAPREG_MEM_ADDR(address);
201 		if (sizep != 0)
202 			*sizep = PCI_MAPREG_MEM_SIZE(mask);
203 	} else {
204 		if (basep != 0)
205 			*basep = PCI_MAPREG_MEM64_ADDR(waddress);
206 		if (sizep != 0)
207 			*sizep = PCI_MAPREG_MEM64_SIZE(wmask);
208 	}
209 	if (flagsp != 0)
210 		*flagsp = PCI_MAPREG_MEM_PREFETCHABLE(address) ?
211 		    BUS_SPACE_MAP_PREFETCHABLE : 0;
212 
213 	return (0);
214 }
215 
216 pcireg_t
217 pci_mapreg_type(pci_chipset_tag_t pc, pcitag_t tag, int reg)
218 {
219 	pcireg_t rv;
220 
221 	rv = pci_conf_read(pc, tag, reg);
222 	if (PCI_MAPREG_TYPE(rv) == PCI_MAPREG_TYPE_IO)
223 		rv &= PCI_MAPREG_TYPE_MASK;
224 	else
225 		rv &= PCI_MAPREG_TYPE_MASK|PCI_MAPREG_MEM_TYPE_MASK;
226 	return (rv);
227 }
228 
229 int
230 pci_mapreg_info(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t type,
231     bus_addr_t *basep, bus_size_t *sizep, int *flagsp)
232 {
233 
234 	if (PCI_MAPREG_TYPE(type) == PCI_MAPREG_TYPE_IO)
235 		return (pci_io_find(pc, tag, reg, type, basep, sizep,
236 		    flagsp));
237 	else
238 		return (pci_mem_find(pc, tag, reg, type, basep, sizep,
239 		    flagsp));
240 }
241 
242 int
243 pci_mapreg_map(struct pci_attach_args *pa, int reg, pcireg_t type,
244     int busflags, bus_space_tag_t *tagp, bus_space_handle_t *handlep,
245     bus_addr_t *basep, bus_size_t *sizep)
246 {
247 	bus_space_tag_t tag;
248 	bus_space_handle_t handle;
249 	bus_addr_t base;
250 	bus_size_t size;
251 	int flags;
252 
253 	if (PCI_MAPREG_TYPE(type) == PCI_MAPREG_TYPE_IO) {
254 		if ((pa->pa_flags & PCI_FLAGS_IO_ENABLED) == 0)
255 			return (1);
256 		if (pci_io_find(pa->pa_pc, pa->pa_tag, reg, type, &base,
257 		    &size, &flags))
258 			return (1);
259 		tag = pa->pa_iot;
260 	} else {
261 		if ((pa->pa_flags & PCI_FLAGS_MEM_ENABLED) == 0)
262 			return (1);
263 		if (pci_mem_find(pa->pa_pc, pa->pa_tag, reg, type, &base,
264 		    &size, &flags))
265 			return (1);
266 		tag = pa->pa_memt;
267 	}
268 
269 	if (bus_space_map(tag, base, size, busflags | flags, &handle))
270 		return (1);
271 
272 	if (tagp != 0)
273 		*tagp = tag;
274 	if (handlep != 0)
275 		*handlep = handle;
276 	if (basep != 0)
277 		*basep = base;
278 	if (sizep != 0)
279 		*sizep = size;
280 
281 	return (0);
282 }
283