xref: /netbsd/sys/dev/pci/vga_pci.c (revision bf9ec67e)
1 /* $NetBSD: vga_pci.c,v 1.10 2002/03/17 19:41:00 atatat Exp $ */
2 
3 /*
4  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
5  * All rights reserved.
6  *
7  * Author: Chris G. Demetriou
8  *
9  * Permission to use, copy, modify and distribute this software and
10  * its documentation is hereby granted, provided that both the copyright
11  * notice and this permission notice appear in all copies of the
12  * software, derivative works or modified versions, and any portions
13  * thereof, and that both notices appear in supporting documentation.
14  *
15  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18  *
19  * Carnegie Mellon requests users of this software to return to
20  *
21  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
22  *  School of Computer Science
23  *  Carnegie Mellon University
24  *  Pittsburgh PA 15213-3890
25  *
26  * any improvements or extensions that they make and grant Carnegie the
27  * rights to redistribute these changes.
28  */
29 
30 #include <sys/cdefs.h>
31 __KERNEL_RCSID(0, "$NetBSD: vga_pci.c,v 1.10 2002/03/17 19:41:00 atatat Exp $");
32 
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/device.h>
37 #include <sys/malloc.h>
38 
39 #include <dev/pci/pcireg.h>
40 #include <dev/pci/pcivar.h>
41 #include <dev/pci/pcidevs.h>
42 #include <dev/pci/pciio.h>
43 
44 #include <dev/ic/mc6845reg.h>
45 #include <dev/ic/pcdisplayvar.h>
46 #include <dev/ic/vgareg.h>
47 #include <dev/ic/vgavar.h>
48 #include <dev/pci/vga_pcivar.h>
49 
50 #include <dev/isa/isareg.h>	/* For legacy VGA address ranges */
51 
52 #include <dev/wscons/wsconsio.h>
53 #include <dev/wscons/wsdisplayvar.h>
54 
55 #define	NBARS		6	/* number of PCI BARs */
56 
57 struct vga_bar {
58 	bus_addr_t vb_base;
59 	bus_size_t vb_size;
60 	pcireg_t vb_type;
61 	int vb_flags;
62 };
63 
64 struct vga_pci_softc {
65 	struct vga_softc sc_vga;
66 
67 	pci_chipset_tag_t sc_pc;
68 	pcitag_t sc_pcitag;
69 
70 	struct vga_bar sc_bars[NBARS];
71 	struct vga_bar sc_rom;
72 };
73 
74 int	vga_pci_match(struct device *, struct cfdata *, void *);
75 void	vga_pci_attach(struct device *, struct device *, void *);
76 
77 struct cfattach vga_pci_ca = {
78 	sizeof(struct vga_pci_softc),
79 	vga_pci_match,
80 	vga_pci_attach,
81 };
82 
83 int	vga_pci_ioctl(void *, u_long, caddr_t, int, struct proc *);
84 paddr_t	vga_pci_mmap(void *, off_t, int);
85 
86 const struct vga_funcs vga_pci_funcs = {
87 	vga_pci_ioctl,
88 	vga_pci_mmap,
89 };
90 
91 int
92 vga_pci_match(struct device *parent, struct cfdata *match, void *aux)
93 {
94 	struct pci_attach_args *pa = aux;
95 	int potential;
96 
97 	potential = 0;
98 
99 	/*
100 	 * If it's prehistoric/vga or display/vga, we might match.
101 	 * For the console device, this is jut a sanity check.
102 	 */
103 	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_PREHISTORIC &&
104 	    PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_PREHISTORIC_VGA)
105 		potential = 1;
106 	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_DISPLAY &&
107 	     PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_DISPLAY_VGA)
108 		potential = 1;
109 
110 	if (!potential)
111 		return (0);
112 
113 	/* check whether it is disabled by firmware */
114 	if ((pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG)
115 	    & (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE))
116 	    != (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE))
117 		return (0);
118 
119 	/* If it's the console, we have a winner! */
120 	if (vga_is_console(pa->pa_iot, WSDISPLAY_TYPE_PCIVGA))
121 		return (1);
122 
123 	/*
124 	 * If we might match, make sure that the card actually looks OK.
125 	 */
126 	if (!vga_common_probe(pa->pa_iot, pa->pa_memt))
127 		return (0);
128 
129 	return (1);
130 }
131 
132 void
133 vga_pci_attach(struct device *parent, struct device *self, void *aux)
134 {
135 	struct vga_pci_softc *psc = (void *) self;
136 	struct vga_softc *sc = &psc->sc_vga;
137 	struct pci_attach_args *pa = aux;
138 	char devinfo[256];
139 	int bar, reg;
140 
141 	psc->sc_pc = pa->pa_pc;
142 	psc->sc_pcitag = pa->pa_tag;
143 
144 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
145 	printf(": %s (rev. 0x%02x)\n", devinfo,
146 	    PCI_REVISION(pa->pa_class));
147 
148 	/*
149 	 * Gather info about all the BARs.  These are used to allow
150 	 * the X server to map the VGA device.
151 	 */
152 	for (bar = 0; bar < NBARS; bar++) {
153 		reg = PCI_MAPREG_START + (bar * 4);
154 		psc->sc_bars[bar].vb_type = pci_mapreg_type(psc->sc_pc,
155 		    psc->sc_pcitag, reg);
156 		if (PCI_MAPREG_TYPE(psc->sc_bars[bar].vb_type) ==
157 		    PCI_MAPREG_TYPE_IO) {
158 			/* Don't bother fetching I/O BARs. */
159 			continue;
160 		}
161 		if (PCI_MAPREG_MEM_TYPE(psc->sc_bars[bar].vb_type) ==
162 		    PCI_MAPREG_MEM_TYPE_64BIT) {
163 			/* XXX */
164 			printf("%s: WARNING: ignoring 64-bit BAR @ 0x%02x\n",
165 			    sc->sc_dev.dv_xname, reg);
166 			continue;
167 		}
168 		/* Ignore errors (unimplemented BARs). */
169 		(void) pci_mapreg_info(psc->sc_pc, psc->sc_pcitag, reg,
170 		     psc->sc_bars[bar].vb_type,
171 		     &psc->sc_bars[bar].vb_base,
172 		     &psc->sc_bars[bar].vb_size,
173 		     &psc->sc_bars[bar].vb_flags);
174 	}
175 
176 	/* XXX Expansion ROM? */
177 
178 	vga_common_attach(sc, pa->pa_iot, pa->pa_memt, WSDISPLAY_TYPE_PCIVGA,
179 	    &vga_pci_funcs);
180 }
181 
182 int
183 vga_pci_cnattach(bus_space_tag_t iot, bus_space_tag_t memt,
184     pci_chipset_tag_t pc, int bus, int device, int function)
185 {
186 	return (vga_cnattach(iot, memt, WSDISPLAY_TYPE_PCIVGA, 0));
187 }
188 
189 int
190 vga_pci_ioctl(void *v, u_long cmd, caddr_t data, int flag, struct proc *p)
191 {
192 	struct vga_config *vc = v;
193 	struct vga_pci_softc *psc = (void *) vc->softc;
194 
195 	switch (cmd) {
196 	/* PCI config read/write passthrough. */
197 	case PCI_IOC_CFGREAD:
198 	case PCI_IOC_CFGWRITE:
199 		return (pci_devioctl(psc->sc_pc, psc->sc_pcitag,
200 		    cmd, data, flag, p));
201 
202 	default:
203 		return (EPASSTHROUGH);
204 	}
205 }
206 
207 paddr_t
208 vga_pci_mmap(void *v, off_t offset, int prot)
209 {
210 	struct vga_config *vc = v;
211 	struct vga_pci_softc *psc = (void *) vc->softc;
212 	struct vga_bar *vb;
213 	int bar;
214 
215 	for (bar = 0; bar < NBARS; bar++) {
216 		vb = &psc->sc_bars[bar];
217 		if (vb->vb_size == 0)
218 			continue;
219 		if (offset >= vb->vb_base &&
220 		    offset < (vb->vb_base + vb->vb_size)) {
221 			/* XXX This the right thing to do with flags? */
222 			return (bus_space_mmap(vc->hdl.vh_memt, vb->vb_base,
223 			    (offset - vb->vb_base), prot, vb->vb_flags));
224 		}
225 	}
226 
227 	/* XXX Expansion ROM? */
228 
229 	/*
230 	 * Allow mmap access to the legacy ISA hole.  This is where
231 	 * the legacy video BIOS will be located, and also where
232 	 * the legacy VGA display buffer is located.
233 	 *
234 	 * XXX Security implications, here?
235 	 */
236 	if (offset >= IOM_BEGIN && offset < IOM_END)
237 		return (bus_space_mmap(vc->hdl.vh_memt, IOM_BEGIN,
238 		    (offset - IOM_BEGIN), prot, 0));
239 
240 	/* Range not found. */
241 	return (-1);
242 }
243