1 /* $NetBSD: uda.c,v 1.47 2002/10/02 16:52:31 thorpej Exp $ */ 2 /* 3 * Copyright (c) 1996 Ludd, University of Lule}, Sweden. 4 * Copyright (c) 1988 Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * Chris Torek. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * @(#)uda.c 7.32 (Berkeley) 2/13/91 39 */ 40 41 /* 42 * UDA50 disk device driver 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: uda.c,v 1.47 2002/10/02 16:52:31 thorpej Exp $"); 47 48 #include <sys/param.h> 49 #include <sys/kernel.h> 50 #include <sys/systm.h> 51 #include <sys/device.h> 52 #include <sys/buf.h> 53 #include <sys/malloc.h> 54 55 #include <machine/bus.h> 56 #include <machine/sid.h> 57 58 #include <dev/qbus/ubavar.h> 59 60 #include <dev/mscp/mscp.h> 61 #include <dev/mscp/mscpreg.h> 62 #include <dev/mscp/mscpvar.h> 63 64 #include "ioconf.h" 65 66 /* 67 * Software status, per controller. 68 */ 69 struct uda_softc { 70 struct device sc_dev; /* Autoconfig info */ 71 struct evcnt sc_intrcnt; /* Interrupt counting */ 72 struct uba_unit sc_unit; /* Struct common for UBA to communicate */ 73 struct ubinfo sc_ui; 74 bus_dma_tag_t sc_dmat; 75 bus_space_tag_t sc_iot; 76 bus_space_handle_t sc_iph; 77 bus_space_handle_t sc_sah; 78 struct mscp_softc *sc_softc; /* MSCP info (per mscpvar.h) */ 79 int sc_inq; 80 }; 81 82 static int udamatch(struct device *, struct cfdata *, void *); 83 static void udaattach(struct device *, struct device *, void *); 84 static void udareset(struct device *); 85 static void udaintr(void *); 86 static int udaready(struct uba_unit *); 87 static void udactlrdone(struct device *); 88 static int udaprint(void *, const char *); 89 static void udasaerror(struct device *, int); 90 static void udago(struct device *, struct mscp_xi *); 91 92 CFATTACH_DECL(mtc, sizeof(struct uda_softc), 93 udamatch, udaattach, NULL, NULL); 94 95 CFATTACH_DECL(uda, sizeof(struct uda_softc), 96 udamatch, udaattach, NULL, NULL); 97 98 /* 99 * More driver definitions, for generic MSCP code. 100 */ 101 struct mscp_ctlr uda_mscp_ctlr = { 102 udactlrdone, 103 udago, 104 udasaerror, 105 }; 106 107 int 108 udaprint(void *aux, const char *name) 109 { 110 if (name) 111 printf("%s: mscpbus", name); 112 return UNCONF; 113 } 114 115 /* 116 * Poke at a supposed UDA50 to see if it is there. 117 */ 118 int 119 udamatch(struct device *parent, struct cfdata *cf, void *aux) 120 { 121 struct uba_attach_args *ua = aux; 122 struct mscp_softc mi; /* Nice hack */ 123 struct uba_softc *ubasc; 124 int tries; 125 126 /* Get an interrupt vector. */ 127 ubasc = (void *)parent; 128 129 mi.mi_iot = ua->ua_iot; 130 mi.mi_iph = ua->ua_ioh; 131 mi.mi_sah = ua->ua_ioh + 2; 132 mi.mi_swh = ua->ua_ioh + 2; 133 134 /* 135 * Initialise the controller (partially). The UDA50 programmer's 136 * manual states that if initialisation fails, it should be retried 137 * at least once, but after a second failure the port should be 138 * considered `down'; it also mentions that the controller should 139 * initialise within ten seconds. Or so I hear; I have not seen 140 * this manual myself. 141 */ 142 tries = 0; 143 again: 144 145 bus_space_write_2(mi.mi_iot, mi.mi_iph, 0, 0); /* Start init */ 146 if (mscp_waitstep(&mi, MP_STEP1, MP_STEP1) == 0) 147 return 0; /* Nothing here... */ 148 149 bus_space_write_2(mi.mi_iot, mi.mi_sah, 0, 150 MP_ERR | (NCMDL2 << 11) | (NRSPL2 << 8) | MP_IE | 151 ((ubasc->uh_lastiv - 4) >> 2)); 152 153 if (mscp_waitstep(&mi, MP_STEP2, MP_STEP2) == 0) { 154 printf("udaprobe: init step2 no change. sa=%x\n", 155 bus_space_read_2(mi.mi_iot, mi.mi_sah, 0)); 156 goto bad; 157 } 158 159 /* should have interrupted by now */ 160 return 1; 161 bad: 162 if (++tries < 2) 163 goto again; 164 return 0; 165 } 166 167 void 168 udaattach(struct device *parent, struct device *self, void *aux) 169 { 170 struct uda_softc *sc = (void *)self; 171 struct uba_attach_args *ua = aux; 172 struct uba_softc *uh = (void *)parent; 173 struct mscp_attach_args ma; 174 int error; 175 176 printf("\n"); 177 178 uh->uh_lastiv -= 4; /* remove dynamic interrupt vector */ 179 180 uba_intr_establish(ua->ua_icookie, ua->ua_cvec, 181 udaintr, sc, &sc->sc_intrcnt); 182 uba_reset_establish(udareset, &sc->sc_dev); 183 evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, ua->ua_evcnt, 184 sc->sc_dev.dv_xname, "intr"); 185 186 sc->sc_iot = ua->ua_iot; 187 sc->sc_iph = ua->ua_ioh; 188 sc->sc_sah = ua->ua_ioh + 2; 189 sc->sc_dmat = ua->ua_dmat; 190 191 /* 192 * Fill in the uba_unit struct, so we can communicate with the uba. 193 */ 194 sc->sc_unit.uu_softc = sc; /* Backpointer to softc */ 195 sc->sc_unit.uu_ready = udaready;/* go routine called from adapter */ 196 sc->sc_unit.uu_keepbdp = vax_cputype == VAX_750 ? 1 : 0; 197 198 /* 199 * Map the communication area and command and 200 * response packets into Unibus space. 201 */ 202 sc->sc_ui.ui_size = sizeof(struct mscp_pack); 203 if ((error = ubmemalloc((void *)parent, &sc->sc_ui, UBA_CANTWAIT))) 204 return printf("ubmemalloc failed: %d\n", error); 205 206 bzero(sc->sc_ui.ui_vaddr, sizeof (struct mscp_pack)); 207 208 /* 209 * The only thing that differ UDA's and Tape ctlr's is 210 * their vcid. Beacuse there are no way to determine which 211 * ctlr type it is, we check what is generated and later 212 * set the correct vcid. 213 */ 214 ma.ma_type = (strcmp(self->dv_cfdata->cf_name, "mtc") ? 215 MSCPBUS_DISK : MSCPBUS_TAPE); 216 217 ma.ma_mc = &uda_mscp_ctlr; 218 ma.ma_type |= MSCPBUS_UDA; 219 ma.ma_uda = (struct mscp_pack *)sc->sc_ui.ui_vaddr; 220 ma.ma_softc = &sc->sc_softc; 221 ma.ma_iot = sc->sc_iot; 222 ma.ma_iph = sc->sc_iph; 223 ma.ma_sah = sc->sc_sah; 224 ma.ma_swh = sc->sc_sah; 225 ma.ma_dmat = sc->sc_dmat; 226 ma.ma_dmam = sc->sc_ui.ui_dmam; 227 ma.ma_ivec = uh->uh_lastiv; 228 ma.ma_ctlrnr = (ua->ua_iaddr == 0172150 ? 0 : 1); /* XXX */ 229 ma.ma_adapnr = uh->uh_nr; 230 config_found(&sc->sc_dev, &ma, udaprint); 231 } 232 233 /* 234 * Start a transfer if there are free resources available, otherwise 235 * let it go in udaready, forget it for now. 236 * Called from mscp routines. 237 */ 238 void 239 udago(struct device *usc, struct mscp_xi *mxi) 240 { 241 struct uda_softc *sc = (void *)usc; 242 struct uba_unit *uu; 243 struct buf *bp = mxi->mxi_bp; 244 int err; 245 246 /* 247 * If we already have transfers queued, don't try to load 248 * the map again. 249 */ 250 if (sc->sc_inq == 0) { 251 err = bus_dmamap_load(sc->sc_dmat, mxi->mxi_dmam, 252 bp->b_data, bp->b_bcount, 253 (bp->b_flags & B_PHYS ? bp->b_proc : 0), BUS_DMA_NOWAIT); 254 if (err == 0) { 255 mscp_dgo(sc->sc_softc, mxi); 256 return; 257 } 258 } 259 uu = malloc(sizeof(struct uba_unit), M_DEVBUF, M_NOWAIT); 260 if (uu == 0) 261 panic("udago: no mem"); 262 uu->uu_ready = udaready; 263 uu->uu_softc = sc; 264 uu->uu_ref = mxi; 265 uba_enqueue(uu); 266 sc->sc_inq++; 267 } 268 269 /* 270 * Called if we have been blocked for resources, and resources 271 * have been freed again. Return 1 if we could start all 272 * transfers again, 0 if we still are waiting. 273 * Called from uba resource free routines. 274 */ 275 int 276 udaready(struct uba_unit *uu) 277 { 278 struct uda_softc *sc = uu->uu_softc; 279 struct mscp_xi *mxi = uu->uu_ref; 280 struct buf *bp = mxi->mxi_bp; 281 int err; 282 283 err = bus_dmamap_load(sc->sc_dmat, mxi->mxi_dmam, bp->b_data, 284 bp->b_bcount, (bp->b_flags & B_PHYS ? bp->b_proc : 0), 285 BUS_DMA_NOWAIT); 286 287 if (err) 288 return 0; 289 mscp_dgo(sc->sc_softc, mxi); 290 sc->sc_inq--; 291 free(uu, M_DEVBUF); 292 return 1; 293 } 294 295 static struct saerr { 296 int code; /* error code (including UDA_ERR) */ 297 char *desc; /* what it means: Efoo => foo error */ 298 } saerr[] = { 299 { 0100001, "Eunibus packet read" }, 300 { 0100002, "Eunibus packet write" }, 301 { 0100003, "EUDA ROM and RAM parity" }, 302 { 0100004, "EUDA RAM parity" }, 303 { 0100005, "EUDA ROM parity" }, 304 { 0100006, "Eunibus ring read" }, 305 { 0100007, "Eunibus ring write" }, 306 { 0100010, " unibus interrupt master failure" }, 307 { 0100011, "Ehost access timeout" }, 308 { 0100012, " host exceeded command limit" }, 309 { 0100013, " unibus bus master failure" }, 310 { 0100014, " DM XFC fatal error" }, 311 { 0100015, " hardware timeout of instruction loop" }, 312 { 0100016, " invalid virtual circuit id" }, 313 { 0100017, "Eunibus interrupt write" }, 314 { 0104000, "Efatal sequence" }, 315 { 0104040, " D proc ALU" }, 316 { 0104041, "ED proc control ROM parity" }, 317 { 0105102, "ED proc w/no BD#2 or RAM parity" }, 318 { 0105105, "ED proc RAM buffer" }, 319 { 0105152, "ED proc SDI" }, 320 { 0105153, "ED proc write mode wrap serdes" }, 321 { 0105154, "ED proc read mode serdes, RSGEN & ECC" }, 322 { 0106040, "EU proc ALU" }, 323 { 0106041, "EU proc control reg" }, 324 { 0106042, " U proc DFAIL/cntl ROM parity/BD #1 test CNT" }, 325 { 0106047, " U proc const PROM err w/D proc running SDI test" }, 326 { 0106055, " unexpected trap" }, 327 { 0106071, "EU proc const PROM" }, 328 { 0106072, "EU proc control ROM parity" }, 329 { 0106200, "Estep 1 data" }, 330 { 0107103, "EU proc RAM parity" }, 331 { 0107107, "EU proc RAM buffer" }, 332 { 0107115, " test count wrong (BD 12)" }, 333 { 0112300, "Estep 2" }, 334 { 0122240, "ENPR" }, 335 { 0122300, "Estep 3" }, 336 { 0142300, "Estep 4" }, 337 { 0, " unknown error code" } 338 }; 339 340 /* 341 * If the error bit was set in the controller status register, gripe, 342 * then (optionally) reset the controller and requeue pending transfers. 343 */ 344 void 345 udasaerror(struct device *usc, int doreset) 346 { 347 struct uda_softc *sc = (void *)usc; 348 int code = bus_space_read_2(sc->sc_iot, sc->sc_sah, 0); 349 struct saerr *e; 350 351 if ((code & MP_ERR) == 0) 352 return; 353 for (e = saerr; e->code; e++) 354 if (e->code == code) 355 break; 356 printf("%s: controller error, sa=0%o (%s%s)\n", 357 sc->sc_dev.dv_xname, code, e->desc + 1, 358 *e->desc == 'E' ? " error" : ""); 359 #if 0 /* XXX we just avoid panic when autoconfig non-existent KFQSA devices */ 360 if (doreset) { 361 mscp_requeue(sc->sc_softc); 362 /* (void) udainit(sc); XXX */ 363 } 364 #endif 365 } 366 367 /* 368 * Interrupt routine. Depending on the state of the controller, 369 * continue initialisation, or acknowledge command and response 370 * interrupts, and process responses. 371 */ 372 static void 373 udaintr(void *arg) 374 { 375 struct uda_softc *sc = arg; 376 struct uba_softc *uh; 377 378 /* ctlr fatal error */ 379 if (bus_space_read_2(sc->sc_iot, sc->sc_sah, 0) & MP_ERR) { 380 udasaerror(&sc->sc_dev, 1); 381 return; 382 } 383 /* 384 * Handle buffer purge requests. 385 * XXX - should be done in bus_dma_sync(). 386 */ 387 uh = (void *)sc->sc_dev.dv_parent; 388 #ifdef notyet 389 if (ud->mp_ca.ca_bdp) { 390 if (uh->uh_ubapurge) 391 (*uh->uh_ubapurge)(uh, ud->mp_ca.ca_bdp); 392 /* signal purge complete */ 393 bus_space_write_2(sc->sc_iot, sc->sc_sah, 0, 0); 394 } 395 #endif 396 397 mscp_intr(sc->sc_softc); 398 } 399 400 /* 401 * A Unibus reset has occurred on UBA uban. Reinitialise the controller(s) 402 * on that Unibus, and requeue outstanding I/O. 403 */ 404 static void 405 udareset(struct device *dev) 406 { 407 struct uda_softc *sc = (void *)dev; 408 /* 409 * Our BDP (if any) is gone; our command (if any) is 410 * flushed; the device is no longer mapped; and the 411 * UDA50 is not yet initialised. 412 */ 413 if (sc->sc_unit.uu_bdp) { 414 /* printf("<%d>", UBAI_BDP(sc->sc_unit.uu_bdp)); */ 415 sc->sc_unit.uu_bdp = 0; 416 } 417 418 /* reset queues and requeue pending transfers */ 419 mscp_requeue(sc->sc_softc); 420 421 /* 422 * If it fails to initialise we will notice later and 423 * try again (and again...). Do not call udastart() 424 * here; it will be done after the controller finishes 425 * initialisation. 426 */ 427 /* XXX if (udainit(sc)) */ 428 printf(" (hung)"); 429 } 430 431 void 432 udactlrdone(struct device *usc) 433 { 434 struct uda_softc *sc = (void *)usc; 435 int s; 436 437 s = spluba(); 438 uba_done((struct uba_softc *)sc->sc_dev.dv_parent); 439 splx(s); 440 } 441