1 /* $NetBSD: if_le.c,v 1.26 2002/10/02 16:52:38 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum; Jason R. Thorpe of the Numerical Aerospace 9 * Simulation Facility, NASA Ames Research Center; Paul Kranenburg. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: if_le.c,v 1.26 2002/10/02 16:52:38 thorpej Exp $"); 42 43 #include "opt_inet.h" 44 #include "bpfilter.h" 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/mbuf.h> 49 #include <sys/syslog.h> 50 #include <sys/socket.h> 51 #include <sys/device.h> 52 #include <sys/malloc.h> 53 54 #include <net/if.h> 55 #include <net/if_ether.h> 56 #include <net/if_media.h> 57 58 #include <machine/bus.h> 59 #include <machine/intr.h> 60 #include <machine/autoconf.h> 61 62 #include <dev/sbus/sbusvar.h> 63 #include <dev/sbus/lebuffervar.h> /*XXX*/ 64 65 #include <dev/ic/lancereg.h> 66 #include <dev/ic/lancevar.h> 67 #include <dev/ic/am7990reg.h> 68 #include <dev/ic/am7990var.h> 69 70 /* 71 * LANCE registers. 72 */ 73 #define LEREG1_RDP 0 /* Register Data port */ 74 #define LEREG1_RAP 2 /* Register Address port */ 75 76 struct le_softc { 77 struct am7990_softc sc_am7990; /* glue to MI code */ 78 struct sbusdev sc_sd; /* sbus device */ 79 bus_space_tag_t sc_bustag; 80 bus_dma_tag_t sc_dmatag; 81 bus_dmamap_t sc_dmamap; 82 bus_space_handle_t sc_reg; 83 }; 84 85 #define MEMSIZE 0x4000 /* LANCE memory size */ 86 87 int lematch_sbus __P((struct device *, struct cfdata *, void *)); 88 void leattach_sbus __P((struct device *, struct device *, void *)); 89 90 /* 91 * Media types supported. 92 */ 93 static int lemedia[] = { 94 IFM_ETHER|IFM_10_5, 95 }; 96 #define NLEMEDIA (sizeof(lemedia) / sizeof(lemedia[0])) 97 98 CFATTACH_DECL(le_sbus, sizeof(struct le_softc), 99 lematch_sbus, leattach_sbus, NULL, NULL); 100 101 extern struct cfdriver le_cd; 102 103 #if defined(_KERNEL_OPT) 104 #include "opt_ddb.h" 105 #endif 106 107 #ifdef DDB 108 #define integrate 109 #define hide 110 #else 111 #define integrate static __inline 112 #define hide static 113 #endif 114 115 static void lewrcsr __P((struct lance_softc *, u_int16_t, u_int16_t)); 116 static u_int16_t lerdcsr __P((struct lance_softc *, u_int16_t)); 117 118 static void 119 lewrcsr(sc, port, val) 120 struct lance_softc *sc; 121 u_int16_t port, val; 122 { 123 struct le_softc *lesc = (struct le_softc *)sc; 124 125 bus_space_write_2(lesc->sc_bustag, lesc->sc_reg, LEREG1_RAP, port); 126 bus_space_write_2(lesc->sc_bustag, lesc->sc_reg, LEREG1_RDP, val); 127 128 #if defined(SUN4M) 129 /* 130 * We need to flush the Sbus->Mbus write buffers. This can most 131 * easily be accomplished by reading back the register that we 132 * just wrote (thanks to Chris Torek for this solution). 133 */ 134 if (CPU_ISSUN4M) { 135 volatile u_int16_t discard; 136 discard = bus_space_read_2(lesc->sc_bustag, lesc->sc_reg, 137 LEREG1_RDP); 138 } 139 #endif 140 } 141 142 static u_int16_t 143 lerdcsr(sc, port) 144 struct lance_softc *sc; 145 u_int16_t port; 146 { 147 struct le_softc *lesc = (struct le_softc *)sc; 148 149 bus_space_write_2(lesc->sc_bustag, lesc->sc_reg, LEREG1_RAP, port); 150 return (bus_space_read_2(lesc->sc_bustag, lesc->sc_reg, LEREG1_RDP)); 151 } 152 153 154 int 155 lematch_sbus(parent, cf, aux) 156 struct device *parent; 157 struct cfdata *cf; 158 void *aux; 159 { 160 struct sbus_attach_args *sa = aux; 161 162 return (strcmp(cf->cf_name, sa->sa_name) == 0); 163 } 164 165 void 166 leattach_sbus(parent, self, aux) 167 struct device *parent, *self; 168 void *aux; 169 { 170 struct sbus_attach_args *sa = aux; 171 struct le_softc *lesc = (struct le_softc *)self; 172 struct lance_softc *sc = &lesc->sc_am7990.lsc; 173 bus_dma_tag_t dmatag; 174 struct sbusdev *sd; 175 /* XXX the following declarations should be elsewhere */ 176 extern void myetheraddr __P((u_char *)); 177 178 179 lesc->sc_bustag = sa->sa_bustag; 180 lesc->sc_dmatag = dmatag = sa->sa_dmatag; 181 182 if (sbus_bus_map(sa->sa_bustag, 183 sa->sa_slot, 184 sa->sa_offset, 185 sa->sa_size, 186 0, &lesc->sc_reg) != 0) { 187 printf("%s @ sbus: cannot map registers\n", self->dv_xname); 188 return; 189 } 190 191 /* 192 * Look for an "unallocated" lebuffer and pair it with 193 * this `le' device on the assumption that we're on 194 * a pre-historic ROM that doesn't establish le<=>lebuffer 195 * parent-child relationships. 196 */ 197 for (sd = ((struct sbus_softc *)parent)->sc_sbdev; sd != NULL; 198 sd = sd->sd_bchain) { 199 200 struct lebuf_softc *lebuf = (struct lebuf_softc *)sd->sd_dev; 201 202 if (strncmp("lebuffer", sd->sd_dev->dv_xname, 8) != 0) 203 continue; 204 205 if (lebuf->attached != 0) 206 continue; 207 208 sc->sc_mem = lebuf->sc_buffer; 209 sc->sc_memsize = lebuf->sc_bufsiz; 210 sc->sc_addr = 0; /* Lance view is offset by buffer location */ 211 lebuf->attached = 1; 212 213 /* That old black magic... */ 214 sc->sc_conf3 = PROM_getpropint(sa->sa_node, 215 "busmaster-regval", 216 LE_C3_BSWP | LE_C3_ACON | LE_C3_BCON); 217 break; 218 } 219 220 lesc->sc_sd.sd_reset = (void *)lance_reset; 221 sbus_establish(&lesc->sc_sd, &sc->sc_dev); 222 223 if (sc->sc_mem == 0) { 224 bus_dma_segment_t seg; 225 int rseg, error; 226 227 #ifndef BUS_DMA_24BIT 228 /* XXX - This flag is not defined on all archs */ 229 #define BUS_DMA_24BIT 0 230 #endif 231 /* Get a DMA handle */ 232 if ((error = bus_dmamap_create(dmatag, MEMSIZE, 1, MEMSIZE, 0, 233 BUS_DMA_NOWAIT|BUS_DMA_24BIT, 234 &lesc->sc_dmamap)) != 0) { 235 printf("%s: DMA map create error %d\n", 236 self->dv_xname, error); 237 return; 238 } 239 240 /* Allocate DMA buffer */ 241 if ((error = bus_dmamem_alloc(dmatag, MEMSIZE, 0, 0, 242 &seg, 1, &rseg, 243 BUS_DMA_NOWAIT|BUS_DMA_24BIT)) != 0){ 244 printf("%s: DMA buffer allocation error %d\n", 245 self->dv_xname, error); 246 return; 247 } 248 249 /* Map DMA buffer into kernel space */ 250 if ((error = bus_dmamem_map(dmatag, &seg, rseg, MEMSIZE, 251 (caddr_t *)&sc->sc_mem, 252 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 253 printf("%s: DMA buffer map error %d\n", 254 self->dv_xname, error); 255 bus_dmamem_free(lesc->sc_dmatag, &seg, rseg); 256 return; 257 } 258 259 /* Load DMA buffer */ 260 if ((error = bus_dmamap_load(dmatag, lesc->sc_dmamap, sc->sc_mem, 261 MEMSIZE, NULL, BUS_DMA_NOWAIT)) != 0) { 262 printf("%s: DMA buffer map load error %d\n", 263 self->dv_xname, error); 264 bus_dmamem_free(dmatag, &seg, rseg); 265 bus_dmamem_unmap(dmatag, sc->sc_mem, MEMSIZE); 266 return; 267 } 268 269 sc->sc_addr = lesc->sc_dmamap->dm_segs[0].ds_addr & 0xffffff; 270 sc->sc_memsize = MEMSIZE; 271 sc->sc_conf3 = LE_C3_BSWP | LE_C3_ACON | LE_C3_BCON; 272 } 273 274 myetheraddr(sc->sc_enaddr); 275 276 sc->sc_supmedia = lemedia; 277 sc->sc_nsupmedia = NLEMEDIA; 278 sc->sc_defaultmedia = lemedia[0]; 279 280 sc->sc_copytodesc = lance_copytobuf_contig; 281 sc->sc_copyfromdesc = lance_copyfrombuf_contig; 282 sc->sc_copytobuf = lance_copytobuf_contig; 283 sc->sc_copyfrombuf = lance_copyfrombuf_contig; 284 sc->sc_zerobuf = lance_zerobuf_contig; 285 286 sc->sc_rdcsr = lerdcsr; 287 sc->sc_wrcsr = lewrcsr; 288 289 am7990_config(&lesc->sc_am7990); 290 291 /* Establish interrupt handler */ 292 if (sa->sa_nintr != 0) 293 (void)bus_intr_establish(lesc->sc_bustag, sa->sa_pri, 294 IPL_NET, 0, am7990_intr, sc); 295 } 296