xref: /netbsd/sys/dev/sbus/zxreg.h (revision c4a72b64)
1 /*	$NetBSD: zxreg.h,v 1.1 2002/09/13 14:03:53 ad Exp $	*/
2 
3 /*
4  *  Copyright (c) 2002 The NetBSD Foundation, Inc.
5  *  All rights reserved.
6  *
7  *  This code is derived from software contributed to The NetBSD Foundation
8  *  by Andrew Doran.
9  *
10  *  Redistribution and use in source and binary forms, with or without
11  *  modification, are permitted provided that the following conditions
12  *  are met:
13  *  1. Redistributions of source code must retain the above copyright
14  *     notice, this list of conditions and the following disclaimer.
15  *  2. Redistributions in binary form must reproduce the above copyright
16  *     notice, this list of conditions and the following disclaimer in the
17  *     documentation and/or other materials provided with the distribution.
18  *  3. All advertising materials mentioning features or use of this software
19  *     must display the following acknowledgement:
20  *         This product includes software developed by the NetBSD
21  *         Foundation, Inc. and its contributors.
22  *  4. Neither the name of The NetBSD Foundation nor the names of its
23  *     contributors may be used to endorse or promote products derived
24  *     from this software without specific prior written permission.
25  *
26  *  THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  *  TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  *  PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  *  BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  *  POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 /*
40  * Copyright (C) 1999, 2000 Jakub Jelinek (jakub@redhat.com)
41  *
42  * Permission is hereby granted, free of charge, to any person obtaining a copy
43  * of this software and associated documentation files (the "Software"), to deal
44  * in the Software without restriction, including without limitation the rights
45  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
46  * copies of the Software, and to permit persons to whom the Software is
47  * furnished to do so, subject to the following conditions:
48  *
49  * The above copyright notice and this permission notice shall be included in
50  * all copies or substantial portions of the Software.
51  *
52  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
53  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
54  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
55  * JAKUB JELINEK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
56  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
57  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
58  *
59  */
60 
61 #ifndef _DEV_SBUS_ZXREG_H_
62 #define _DEV_SBUS_ZXREG_H_
63 
64 /* Hardware offsets. */
65 #define ZX_OFF_UNK2		0x00000000
66 #define ZX_OFF_LC_SS0_KRN	0x00200000
67 #define ZX_OFF_LC_SS0_USR	0x00201000
68 #define ZX_OFF_LD_SS0		0x00400000
69 #define ZX_OFF_LD_GBL		0x00401000
70 #define ZX_OFF_LX_CROSS	0x00600000
71 #define ZX_OFF_LX_CURSOR	0x00601000
72 #define ZX_OFF_UNK		0x00602000
73 #define ZX_OFF_SS0		0x00800000
74 #define ZX_OFF_LC_SS1_KRN	0x01200000
75 #define ZX_OFF_LC_SS1_USR	0x01201000
76 #define ZX_OFF_LD_SS1		0x01400000
77 #define ZX_OFF_SS1		0x01800000
78 
79 /* ROP register */
80 #define ZX_ATTR_PICK_DISABLE	0x00000000
81 #define ZX_ATTR_PICK_2D	0x80000000
82 #define ZX_ATTR_PICK_3D	0xa0000000
83 #define ZX_ATTR_PICK_2D_REND	0xc0000000
84 #define ZX_ATTR_PICK_3D_REND	0xe0000000
85 
86 #define ZX_ATTR_DCE_DISABLE	0x00000000
87 #define ZX_ATTR_DCE_ENABLE	0x10000000
88 
89 #define ZX_ATTR_APE_DISABLE	0x00000000
90 #define ZX_ATTR_APE_ENABLE	0x08000000
91 
92 #define ZX_ATTR_COLOR_VAR	0x00000000
93 #define ZX_ATTR_COLOR_CONST	0x04000000
94 
95 #define ZX_ATTR_AA_DISABLE	0x02000000
96 #define ZX_ATTR_AA_ENABLE	0x01000000
97 
98 #define ZX_ATTR_ABE_BG		0x00000000	/* dst + alpha * (src - bg) */
99 #define ZX_ATTR_ABE_FB		0x00800000	/* dst + alpha * (src - dst) */
100 
101 #define ZX_ATTR_ABE_DISABLE	0x00000000
102 #define ZX_ATTR_ABE_ENABLE	0x00400000
103 
104 #define ZX_ATTR_BLTSRC_A	0x00000000
105 #define ZX_ATTR_BLTSRC_B	0x00200000
106 
107 #define ZX_ROP_ZERO		(0x0 << 18)
108 #define ZX_ROP_NEW_AND_OLD	(0x8 << 18)
109 #define ZX_ROP_NEW_AND_NOLD	(0x4 << 18)
110 #define ZX_ROP_NEW		(0xc << 18)
111 #define ZX_ROP_NNEW_AND_OLD	(0x2 << 18)
112 #define ZX_ROP_OLD		(0xa << 18)
113 #define ZX_ROP_NEW_XOR_OLD	(0x6 << 18)
114 #define ZX_ROP_NEW_OR_OLD	(0xe << 18)
115 #define ZX_ROP_NNEW_AND_NOLD	(0x1 << 18)
116 #define ZX_ROP_NNEW_XOR_NOLD	(0x9 << 18)
117 #define ZX_ROP_NOLD		(0x5 << 18)
118 #define ZX_ROP_NEW_OR_NOLD	(0xd << 18)
119 #define ZX_ROP_NNEW		(0x3 << 18)
120 #define ZX_ROP_NNEW_OR_OLD	(0xb << 18)
121 #define ZX_ROP_NNEW_OR_NOLD	(0x7 << 18)
122 #define ZX_ROP_ONES		(0xf << 18)
123 
124 #define ZX_ATTR_HSR_DISABLE	0x00000000
125 #define ZX_ATTR_HSR_ENABLE	0x00020000
126 
127 #define ZX_ATTR_WRITEZ_DISABLE	0x00000000
128 #define ZX_ATTR_WRITEZ_ENABLE	0x00010000
129 
130 #define ZX_ATTR_Z_VAR		0x00000000
131 #define ZX_ATTR_Z_CONST	0x00008000
132 
133 #define ZX_ATTR_WCLIP_DISABLE	0x00000000
134 #define ZX_ATTR_WCLIP_ENABLE	0x00004000
135 
136 #define ZX_ATTR_MONO		0x00000000
137 #define ZX_ATTR_STEREO_LEFT	0x00001000
138 #define ZX_ATTR_STEREO_RIGHT	0x00003000
139 
140 #define ZX_ATTR_WE_DISABLE	0x00000000
141 #define ZX_ATTR_WE_ENABLE	0x00000800
142 
143 #define ZX_ATTR_FCE_DISABLE	0x00000000
144 #define ZX_ATTR_FCE_ENABLE	0x00000400
145 
146 #define ZX_ATTR_RE_DISABLE	0x00000000
147 #define ZX_ATTR_RE_ENABLE	0x00000200
148 
149 #define ZX_ATTR_GE_DISABLE	0x00000000
150 #define ZX_ATTR_GE_ENABLE	0x00000100
151 
152 #define ZX_ATTR_BE_DISABLE	0x00000000
153 #define ZX_ATTR_BE_ENABLE	0x00000080
154 
155 #define ZX_ATTR_RGBE_DISABLE	0x00000000
156 #define ZX_ATTR_RGBE_ENABLE	0x00000380
157 
158 #define ZX_ATTR_OE_DISABLE	0x00000000
159 #define ZX_ATTR_OE_ENABLE	0x00000040
160 
161 #define ZX_ATTR_ZE_DISABLE	0x00000000
162 #define ZX_ATTR_ZE_ENABLE	0x00000020
163 
164 #define ZX_ATTR_FORCE_WID	0x00000010
165 
166 #define ZX_ATTR_FC_PLANE_MASK	0x0000000e
167 
168 #define ZX_ATTR_BUFFER_A	0x00000000
169 #define ZX_ATTR_BUFFER_B	0x00000001
170 
171 /* CSR */
172 #define ZX_CSR_BLT_BUSY	0x20000000
173 
174 struct zx_draw {
175 	u_int32_t	zd_pad0[896];
176 	u_int32_t	zd_csr;
177 	u_int32_t	zd_wid;
178 	u_int32_t	zd_wmask;
179 	u_int32_t	zd_widclip;
180 	u_int32_t	zd_vclipmin;
181 	u_int32_t	zd_vclipmax;
182 	u_int32_t	zd_pickmin;	/* SS1 only */
183 	u_int32_t	zd_pickmax;	/* SS1 only */
184 	u_int32_t	zd_fg;
185 	u_int32_t	zd_bg;
186 	u_int32_t	zd_src;		/* Copy/Scroll (SS0 only) */
187 	u_int32_t	zd_dst;		/* Copy/Scroll/Fill (SS0 only) */
188 	u_int32_t	zd_extent;	/* Copy/Scroll/Fill size (SS0 only) */
189 	u_int32_t	zd_pad1[3];
190 	u_int32_t	zd_setsem;	/* SS1 only */
191 	u_int32_t	zd_clrsem;	/* SS1 only */
192 	u_int32_t	zd_clrpick;	/* SS1 only */
193 	u_int32_t	zd_clrdat;	/* SS1 only */
194 	u_int32_t	zd_alpha;	/* SS1 only */
195 	u_int32_t	zd_pad2[11];
196 	u_int32_t	zd_winbg;
197 	u_int32_t	zd_planemask;
198 	u_int32_t	zd_rop;
199 	u_int32_t	zd_z;
200 	u_int32_t	zd_dczf;	/* SS1 only */
201 	u_int32_t	zd_dczb;	/* SS1 only */
202 	u_int32_t	zd_dcs;		/* SS1 only */
203 	u_int32_t	zd_dczs;	/* SS1 only */
204 	u_int32_t	zd_pickfb;	/* SS1 only */
205 	u_int32_t	zd_pickbb;	/* SS1 only */
206 	u_int32_t	zd_dcfc;	/* SS1 only */
207 	u_int32_t	zd_forcecol;	/* SS1 only */
208 	u_int32_t	zd_door[8];	/* SS1 only */
209 	u_int32_t	zd_pick[5];	/* SS1 only */
210 } __attribute__ ((__packed__));
211 
212 struct zx_draw_ss1 {
213 	u_int32_t	zd_pad0[957];
214 	u_int32_t	zd_misc;
215 } __attribute__ ((__packed__));
216 #define	ZX_SS1_MISC_ENABLE	0x00000001
217 #define	ZX_SS1_MISC_STEREO	0x00000002
218 
219 #define ZX_ADDRSPC_OBGR		0x00
220 #define ZX_ADDRSPC_Z		0x01
221 #define ZX_ADDRSPC_W		0x02
222 #define ZX_ADDRSPC_FONT_OBGR	0x04
223 #define ZX_ADDRSPC_FONT_Z	0x05
224 #define ZX_ADDRSPC_FONT_W	0x06
225 #define ZX_ADDRSPC_O		0x08
226 #define ZX_ADDRSPC_B		0x09
227 #define ZX_ADDRSPC_G		0x0a
228 #define ZX_ADDRSPC_R		0x0b
229 
230 struct zx_command {
231 	u_int32_t	zc_csr;
232 	u_int32_t	zc_addrspace;
233 	u_int32_t 	zc_fontmsk;
234 	u_int32_t	zc_fontt;
235 	u_int32_t	zc_extent;
236 	u_int32_t	zc_src;
237 	u_int32_t	zc_dst;
238 	u_int32_t	zc_copy;
239 	u_int32_t	zc_fill;
240 } __attribute__ ((__packed__));
241 
242 #define ZX_CROSS_TYPE_CLUT0	0x00001000
243 #define ZX_CROSS_TYPE_CLUT1	0x00001001
244 #define ZX_CROSS_TYPE_CLUT2	0x00001002
245 #define ZX_CROSS_TYPE_WID	0x00001003
246 #define ZX_CROSS_TYPE_UNK	0x00001006
247 #define ZX_CROSS_TYPE_VIDEO	0x00002003
248 #define ZX_CROSS_TYPE_CLUTDATA	0x00004000
249 
250 #define ZX_CROSS_CSR_ENABLE	0x00000008
251 #define ZX_CROSS_CSR_PROGRESS	0x00000004
252 #define ZX_CROSS_CSR_UNK	0x00000002
253 #define ZX_CROSS_CSR_UNK2	0x00000001
254 
255 struct zx_cross {
256 	u_int32_t	zx_type;
257 	u_int32_t	zx_csr;
258 	u_int32_t	zx_value;
259 } __attribute__ ((__packed__));
260 
261 struct zx_cursor {
262 	u_int32_t	zcu_pad0[4];
263 	u_int32_t	zcu_type;
264 	u_int32_t	zcu_misc;
265 	u_int32_t	zcu_sxy;
266 	u_int32_t	zcu_data;
267 } __attribute__ ((__packed__));
268 
269 #endif	/* !_DEV_SBUS_ZXREG_H_ */
270