1 /* $NetBSD: scsi_disk.h,v 1.21 2002/07/24 23:45:03 mjacob Exp $ */ 2 3 /* 4 * SCSI-specific interface description 5 */ 6 7 /* 8 * Some lines of this file come from a file of the name "scsi.h" 9 * distributed by OSF as part of mach2.5, 10 * so the following disclaimer has been kept. 11 * 12 * Copyright 1990 by Open Software Foundation, 13 * Grenoble, FRANCE 14 * 15 * All Rights Reserved 16 * 17 * Permission to use, copy, modify, and distribute this software and 18 * its documentation for any purpose and without fee is hereby granted, 19 * provided that the above copyright notice appears in all copies and 20 * that both the copyright notice and this permission notice appear in 21 * supporting documentation, and that the name of OSF or Open Software 22 * Foundation not be used in advertising or publicity pertaining to 23 * distribution of the software without specific, written prior 24 * permission. 25 * 26 * OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE 27 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, 28 * IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR 29 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM 30 * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT, 31 * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION 32 * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 33 */ 34 35 /* 36 * Largely written by Julian Elischer (julian@tfs.com) 37 * for TRW Financial Systems. 38 * 39 * TRW Financial Systems, in accordance with their agreement with Carnegie 40 * Mellon University, makes this software available to CMU to distribute 41 * or use in any manner that they see fit as long as this message is kept with 42 * the software. For this reason TFS also grants any other persons or 43 * organisations permission to use or modify this software. 44 * 45 * TFS supplies this software to be publicly redistributed 46 * on the understanding that TFS is not responsible for the correct 47 * functioning of this software in any circumstances. 48 * 49 * Ported to run under 386BSD by Julian Elischer (julian@tfs.com) Sept 1992 50 */ 51 52 /* 53 * SCSI command format 54 */ 55 56 /* 57 * XXX Is this also used by ATAPI? 58 */ 59 #define SCSI_FORMAT_UNIT 0x04 60 struct scsi_format_unit { 61 u_int8_t opcode; 62 u_int8_t flags; 63 #define SFU_DLF_MASK 0x07 64 #define SFU_CMPLST 0x08 65 #define SFU_FMTDATA 0x10 66 u_int8_t vendor_specific; 67 u_int8_t interleave[2]; 68 u_int8_t control; 69 }; 70 71 /* 72 * If the FmtData bit is set, a FORMAT UNIT parameter list is transfered 73 * to the target during the DATA OUT phase. The parameter list includes 74 * 75 * Defect list header 76 * Initialization pattern descriptor (if any) 77 * Defect descriptor(s) (if any) 78 */ 79 80 struct scsi_format_unit_defect_list_header { 81 u_int8_t reserved; 82 u_int8_t flags; 83 #define DLH_VS 0x01 /* vendor specific */ 84 #define DLH_IMMED 0x02 /* immediate return */ 85 #define DLH_DSP 0x04 /* disable saving parameters */ 86 #define DLH_IP 0x08 /* initialization pattern */ 87 #define DLH_STPF 0x10 /* stop format */ 88 #define DLH_DCRT 0x20 /* disable certification */ 89 #define DLH_DPRY 0x40 /* disable primary */ 90 #define DLH_FOV 0x80 /* format options valid */ 91 u_int8_t defect_lst_len[2]; 92 }; 93 94 /* 95 * See Table 117 of the SCSI-2 specification for a description of 96 * the IP modifier. 97 */ 98 struct scsi_initialization_pattern_descriptor { 99 u_int8_t ip_modifier; 100 u_int8_t pattern_type; 101 #define IP_TYPE_DEFAULT 0x01 102 #define IP_TYPE_REPEAT 0x01 103 /* 0x02 -> 0x7f: reserved */ 104 /* 0x80 -> 0xff: vendor-specific */ 105 u_int8_t pattern_length[2]; 106 #if 0 107 u_int8_t pattern[...]; 108 #endif 109 }; 110 111 /* 112 * Defect desciptors. These are used as the defect lists in the FORMAT UNIT 113 * and READ DEFECT DATA commands, and as the translate page of the 114 * SEND DIAGNOSTIC and RECEIVE DIAGNOSTIC RESULTS commands. 115 */ 116 117 /* Block format */ 118 struct scsi_defect_descriptor_bf { 119 u_int8_t block_address[4]; 120 }; 121 122 /* Bytes from index format */ 123 struct scsi_defect_descriptor_bfif { 124 u_int8_t cylinder[3]; 125 u_int8_t head; 126 u_int8_t bytes_from_index[4]; 127 }; 128 129 /* Physical sector format */ 130 struct scsi_defect_descriptor_psf { 131 u_int8_t cylinder[3]; 132 u_int8_t head; 133 u_int8_t sector[4]; 134 }; 135 136 /* 137 * XXX for now this isn't in the ATAPI specs, but if there are on day 138 * ATAPI hard disks, it is likely that they implement this command (or a 139 * command like this ? 140 */ 141 #define SCSI_REASSIGN_BLOCKS 0x07 142 struct scsi_reassign_blocks { 143 u_int8_t opcode; 144 u_int8_t byte2; 145 u_int8_t unused[3]; 146 u_int8_t control; 147 }; 148 149 /* 150 * XXX Is this also used by ATAPI? 151 */ 152 #define SCSI_REZERO_UNIT 0x01 153 struct scsi_rezero_unit { 154 u_int8_t opcode; 155 u_int8_t byte2; 156 u_int8_t reserved[3]; 157 u_int8_t control; 158 }; 159 160 #define SCSI_READ_COMMAND 0x08 161 #define SCSI_WRITE_COMMAND 0x0a 162 struct scsi_rw { 163 u_int8_t opcode; 164 u_int8_t addr[3]; 165 #define SRW_TOPADDR 0x1F /* only 5 bits here */ 166 u_int8_t length; 167 u_int8_t control; 168 }; 169 170 /* 171 * XXX Does ATAPI have an equivalent? 172 */ 173 #define SCSI_SYNCHRONIZE_CACHE 0x35 174 struct scsi_synchronize_cache { 175 u_int8_t opcode; 176 u_int8_t flags; 177 #define SSC_RELADR 0x01 178 #define SSC_IMMED 0x02 179 u_int8_t addr[4]; 180 u_int8_t reserved; 181 u_int8_t length[2]; 182 u_int8_t control; 183 }; 184 185 /* DATAs definitions for the above commands */ 186 187 struct scsi_reassign_blocks_data { 188 u_int8_t reserved[2]; 189 u_int8_t length[2]; 190 struct { 191 u_int8_t dlbaddr[4]; 192 } defect_descriptor[1]; 193 }; 194 195 union scsi_disk_pages { 196 #define DISK_PGCODE 0x3F /* only 6 bits valid */ 197 struct page_disk_format { 198 u_int8_t pg_code; /* page code (should be 3) */ 199 u_int8_t pg_length; /* page length (should be 0x16) */ 200 u_int8_t trk_z[2]; /* tracks per zone */ 201 u_int8_t alt_sec[2]; /* alternate sectors per zone */ 202 u_int8_t alt_trk_z[2]; /* alternate tracks per zone */ 203 u_int8_t alt_trk_v[2]; /* alternate tracks per volume */ 204 u_int8_t ph_sec_t[2]; /* physical sectors per track */ 205 u_int8_t bytes_s[2]; /* bytes per sector */ 206 u_int8_t interleave[2]; /* interleave */ 207 u_int8_t trk_skew[2]; /* track skew factor */ 208 u_int8_t cyl_skew[2]; /* cylinder skew */ 209 u_int8_t flags; /* various */ 210 #define DISK_FMT_SURF 0x10 211 #define DISK_FMT_RMB 0x20 212 #define DISK_FMT_HSEC 0x40 213 #define DISK_FMT_SSEC 0x80 214 u_int8_t reserved2; 215 u_int8_t reserved3; 216 } disk_format; 217 struct page_rigid_geometry { 218 u_int8_t pg_code; /* page code (should be 4) */ 219 u_int8_t pg_length; /* page length (should be 0x16) */ 220 u_int8_t ncyl[3]; /* number of cylinders */ 221 u_int8_t nheads; /* number of heads */ 222 u_int8_t st_cyl_wp[3]; /* starting cyl., write precomp */ 223 u_int8_t st_cyl_rwc[3]; /* starting cyl., red. write cur */ 224 u_int8_t driv_step[2]; /* drive step rate */ 225 u_int8_t land_zone[3]; /* landing zone cylinder */ 226 u_int8_t sp_sync_ctl; /* spindle synch control */ 227 #define SPINDLE_SYNCH_MASK 0x03 /* mask of valid bits */ 228 #define SPINDLE_SYNCH_NONE 0x00 /* synch disabled or not supported */ 229 #define SPINDLE_SYNCH_SLAVE 0x01 /* disk is a slave */ 230 #define SPINDLE_SYNCH_MASTER 0x02 /* disk is a master */ 231 #define SPINDLE_SYNCH_MCONTROL 0x03 /* disk is a master control */ 232 u_int8_t rot_offset; /* rotational offset (for spindle synch) */ 233 u_int8_t reserved1; 234 u_int8_t rpm[2]; /* media rotation speed */ 235 u_int8_t reserved2; 236 u_int8_t reserved3; 237 } rigid_geometry; 238 struct page_flex_geometry { 239 u_int8_t pg_code; /* page code (should be 5) */ 240 u_int8_t pg_length; /* page length (should be 0x1e) */ 241 u_int8_t xfr_rate[2]; 242 u_int8_t nheads; /* number of heads */ 243 u_int8_t ph_sec_tr; /* physical sectors per track */ 244 u_int8_t bytes_s[2]; /* bytes per sector */ 245 u_int8_t ncyl[2]; /* number of cylinders */ 246 u_int8_t st_cyl_wp[2]; /* start cyl., write precomp */ 247 u_int8_t st_cyl_rwc[2]; /* start cyl., red. write cur */ 248 u_int8_t driv_step[2]; /* drive step rate */ 249 u_int8_t driv_step_w; /* drive step pulse width */ 250 u_int8_t head_settle[2];/* head settle delay */ 251 u_int8_t motor_on; /* motor on delay */ 252 u_int8_t motor_off; /* motor off delay */ 253 u_int8_t flags; /* various flags */ 254 #define MOTOR_ON 0x20 /* motor on (pin 16)? */ 255 #define START_AT_SECTOR_1 0x40 /* start at sector 1 */ 256 #define READY_VALID 0x20 /* RDY (pin 34) valid */ 257 u_int8_t step_p_cyl; /* step pulses per cylinder */ 258 u_int8_t write_pre; /* write precompensation */ 259 u_int8_t head_load; /* head load delay */ 260 u_int8_t head_unload; /* head unload delay */ 261 u_int8_t pin_34_2; /* pin 34 (6) pin 2 (7/11) definition */ 262 u_int8_t pin_4_1; /* pin 4 (8/9) pin 1 (13) definition */ 263 u_int8_t reserved1; 264 u_int8_t reserved2; 265 u_int8_t reserved3; 266 u_int8_t reserved4; 267 } flex_geometry; 268 struct page_caching { 269 u_int8_t pg_code; /* page code (should be 8) */ 270 u_int8_t pg_length; /* page length (should be 0x0a) */ 271 u_int8_t flags; /* cache parameter flags */ 272 #define CACHING_RCD 0x01 /* read cache disable */ 273 #define CACHING_MF 0x02 /* multiplcation factor */ 274 #define CACHING_WCE 0x04 /* write cache enable (write-back) */ 275 #define CACHING_SIZE 0x08 /* use CACHE SEGMENT SIZE */ 276 #define CACHING_DISC 0x10 /* pftch across time discontinuities */ 277 #define CACHING_CAP 0x20 /* caching analysis permitted */ 278 #define CACHING_ABPF 0x40 /* abort prefetch */ 279 #define CACHING_IC 0x80 /* initiator control */ 280 u_int8_t ret_prio; /* retention priority */ 281 #define READ_RET_PRIO_SHIFT 4 282 #define RET_PRIO_DONT_DISTINGUISH 0x0 283 #define RET_PRIO_REPLACE_READ_WRITE 0x1 284 #define RET_PRIO_REPLACE_PREFETCH 0xf 285 u_int8_t dis_prefetch_xfer_len[2]; 286 u_int8_t min_prefetch[2]; 287 u_int8_t max_prefetch[2]; 288 u_int8_t max_prefetch_ceiling[2]; 289 u_int8_t flags2; /* additional cache param flags */ 290 #define CACHING2_VS0 0x08 /* vendor specific bit */ 291 #define CACHING2_VS1 0x10 /* vendor specific bit */ 292 #define CACHING2_DRA 0x20 /* disable read ahead */ 293 #define CACHING2_LBCSS 0x40 /* CACHE SEGMENT SIZE is blocks */ 294 #define CACHING2_FSW 0x80 /* force sequential write */ 295 u_int8_t num_cache_segments; 296 u_int8_t cache_segment_size[2]; 297 u_int8_t reserved1; 298 u_int8_t non_cache_segment_size[2]; 299 } caching_params; 300 }; 301