1 /* $NetBSD: cgsix.c,v 1.9 2002/10/23 09:13:53 jdolecek Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Paul Kranenburg. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1993 41 * The Regents of the University of California. All rights reserved. 42 * 43 * This software was developed by the Computer Systems Engineering group 44 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 45 * contributed to Berkeley. 46 * 47 * All advertising materials mentioning features or use of this software 48 * must display the following acknowledgement: 49 * This product includes software developed by the University of 50 * California, Lawrence Berkeley Laboratory. 51 * 52 * Redistribution and use in source and binary forms, with or without 53 * modification, are permitted provided that the following conditions 54 * are met: 55 * 1. Redistributions of source code must retain the above copyright 56 * notice, this list of conditions and the following disclaimer. 57 * 2. Redistributions in binary form must reproduce the above copyright 58 * notice, this list of conditions and the following disclaimer in the 59 * documentation and/or other materials provided with the distribution. 60 * 3. All advertising materials mentioning features or use of this software 61 * must display the following acknowledgement: 62 * This product includes software developed by the University of 63 * California, Berkeley and its contributors. 64 * 4. Neither the name of the University nor the names of its contributors 65 * may be used to endorse or promote products derived from this software 66 * without specific prior written permission. 67 * 68 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 69 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 70 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 71 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 72 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 73 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 74 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 75 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 76 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 77 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 78 * SUCH DAMAGE. 79 * 80 * @(#)cgsix.c 8.4 (Berkeley) 1/21/94 81 */ 82 83 /* 84 * color display (cgsix) driver. 85 * 86 * Does not handle interrupts, even though they can occur. 87 * 88 * XXX should defer colormap updates to vertical retrace interrupts 89 */ 90 91 #include <sys/cdefs.h> 92 __KERNEL_RCSID(0, "$NetBSD: cgsix.c,v 1.9 2002/10/23 09:13:53 jdolecek Exp $"); 93 94 #include <sys/param.h> 95 #include <sys/systm.h> 96 #include <sys/buf.h> 97 #include <sys/device.h> 98 #include <sys/ioctl.h> 99 #include <sys/malloc.h> 100 #include <sys/mman.h> 101 #include <sys/tty.h> 102 #include <sys/conf.h> 103 104 #ifdef DEBUG 105 #include <sys/proc.h> 106 #include <sys/syslog.h> 107 #endif 108 109 #include <uvm/uvm_extern.h> 110 111 #include <machine/bus.h> 112 113 #include <dev/sun/fbio.h> 114 #include <dev/sun/fbvar.h> 115 116 #include <dev/sun/btreg.h> 117 #include <dev/sun/btvar.h> 118 #include <dev/sun/cgsixreg.h> 119 #include <dev/sun/cgsixvar.h> 120 #include <dev/sun/pfourreg.h> 121 122 #ifdef RASTERCONSOLE 123 #include <dev/rasops/rasops.h> 124 #include <dev/wscons/wsconsio.h> 125 #endif 126 127 static void cg6_unblank(struct device *); 128 129 extern struct cfdriver cgsix_cd; 130 131 dev_type_open(cgsixopen); 132 dev_type_close(cgsixclose); 133 dev_type_ioctl(cgsixioctl); 134 dev_type_mmap(cgsixmmap); 135 136 const struct cdevsw cgsix_cdevsw = { 137 cgsixopen, cgsixclose, noread, nowrite, cgsixioctl, 138 nostop, notty, nopoll, cgsixmmap, nokqfilter, 139 }; 140 141 /* frame buffer generic driver */ 142 static struct fbdriver cg6_fbdriver = { 143 cg6_unblank, cgsixopen, cgsixclose, cgsixioctl, nopoll, cgsixmmap, 144 nokqfilter 145 }; 146 147 static void cg6_reset (struct cgsix_softc *); 148 static void cg6_loadcmap (struct cgsix_softc *, int, int); 149 static void cg6_loadomap (struct cgsix_softc *); 150 static void cg6_setcursor (struct cgsix_softc *);/* set position */ 151 static void cg6_loadcursor (struct cgsix_softc *);/* set shape */ 152 153 #ifdef RASTERCONSOLE 154 int cgsix_use_rasterconsole = 1; 155 156 /* 157 * cg6 accelerated console routines. 158 * 159 * Note that buried in this code in several places is the assumption 160 * that pixels are exactly one byte wide. Since this is cg6-specific 161 * code, this seems safe. This assumption resides in things like the 162 * use of ri_emuwidth without messing around with ri_pelbytes, or the 163 * assumption that ri_font->fontwidth is the right thing to multiply 164 * character-cell counts by to get byte counts. 165 */ 166 167 /* 168 * Magic values for blitter 169 */ 170 171 /* Values for the mode register */ 172 #define CG6_MODE ( \ 173 0x00200000 /* GX_BLIT_SRC */ \ 174 | 0x00020000 /* GX_MODE_COLOR8 */ \ 175 | 0x00008000 /* GX_DRAW_RENDER */ \ 176 | 0x00002000 /* GX_BWRITE0_ENABLE */ \ 177 | 0x00001000 /* GX_BWRITE1_DISABLE */ \ 178 | 0x00000200 /* GX_BREAD_0 */ \ 179 | 0x00000080 /* GX_BDISP_0 */ \ 180 ) 181 #define CG6_MODE_MASK ( \ 182 0x00300000 /* GX_BLIT_ALL */ \ 183 | 0x00060000 /* GX_MODE_ALL */ \ 184 | 0x00018000 /* GX_DRAW_ALL */ \ 185 | 0x00006000 /* GX_BWRITE0_ALL */ \ 186 | 0x00001800 /* GX_BWRITE1_ALL */ \ 187 | 0x00000600 /* GX_BREAD_ALL */ \ 188 | 0x00000180 /* GX_BDISP_ALL */ \ 189 ) 190 191 /* Value for the alu register for screen-to-screen copies */ 192 #define CG6_ALU_COPY ( \ 193 0x80000000 /* GX_PLANE_ONES (ignore planemask register) */ \ 194 | 0x20000000 /* GX_PIXEL_ONES (ignore pixelmask register) */ \ 195 | 0x00800000 /* GX_ATTR_SUPP (function unknown) */ \ 196 | 0x00000000 /* GX_RAST_BOOL (function unknown) */ \ 197 | 0x00000000 /* GX_PLOT_PLOT (function unknown) */ \ 198 | 0x08000000 /* GX_PATTERN_ONES (ignore pattern) */ \ 199 | 0x01000000 /* GX_POLYG_OVERLAP (unsure - handle overlap?) */ \ 200 | 0x0000cccc /* ALU = src */ \ 201 ) 202 203 /* Value for the alu register for region fills */ 204 #define CG6_ALU_FILL ( \ 205 0x80000000 /* GX_PLANE_ONES (ignore planemask register) */ \ 206 | 0x20000000 /* GX_PIXEL_ONES (ignore pixelmask register) */ \ 207 | 0x00800000 /* GX_ATTR_SUPP (function unknown) */ \ 208 | 0x00000000 /* GX_RAST_BOOL (function unknown) */ \ 209 | 0x00000000 /* GX_PLOT_PLOT (function unknown) */ \ 210 | 0x08000000 /* GX_PATTERN_ONES (ignore pattern) */ \ 211 | 0x01000000 /* GX_POLYG_OVERLAP (unsure - handle overlap?) */ \ 212 | 0x0000ff00 /* ALU = fg color */ \ 213 ) 214 215 /* Value for the alu register for toggling an area */ 216 #define CG6_ALU_FLIP ( \ 217 0x80000000 /* GX_PLANE_ONES (ignore planemask register) */ \ 218 | 0x20000000 /* GX_PIXEL_ONES (ignore pixelmask register) */ \ 219 | 0x00800000 /* GX_ATTR_SUPP (function unknown) */ \ 220 | 0x00000000 /* GX_RAST_BOOL (function unknown) */ \ 221 | 0x00000000 /* GX_PLOT_PLOT (function unknown) */ \ 222 | 0x08000000 /* GX_PATTERN_ONES (ignore pattern) */ \ 223 | 0x01000000 /* GX_POLYG_OVERLAP (unsure - handle overlap?) */ \ 224 | 0x00005555 /* ALU = ~dst */ \ 225 ) 226 227 /* 228 * Wait for a blit to finish. 229 * 0x8000000 bit: function unknown; 0x20000000 bit: GX_BLT_INPROGRESS 230 */ 231 #define CG6_BLIT_WAIT(fbc) do { \ 232 while (((fbc)->fbc_blit & 0xa0000000) == 0xa0000000) \ 233 /*EMPTY*/; \ 234 } while (0) 235 236 /* 237 * Wait for a drawing operation to finish, or at least get queued. 238 * 0x8000000 bit: function unknown; 0x20000000 bit: GX_FULL 239 */ 240 #define CG6_DRAW_WAIT(fbc) do { \ 241 while (((fbc)->fbc_draw & 0xa0000000) == 0xa0000000) \ 242 /*EMPTY*/; \ 243 } while (0) 244 245 /* 246 * Wait for the whole engine to go idle. This may not matter in our case; 247 * I'm not sure whether blits are actually queued or not. It more likely 248 * is intended for lines and such that do get queued. 249 * 0x10000000 bit: GX_INPROGRESS 250 */ 251 #define CG6_DRAIN(fbc) do { \ 252 while ((fbc)->fbc_s & 0x10000000) \ 253 /*EMPTY*/; \ 254 } while (0) 255 256 static void cg6_ras_init(struct cgsix_softc *); 257 static void cg6_ras_copyrows(void *, int, int, int); 258 static void cg6_ras_copycols(void *, int, int, int, int); 259 static void cg6_ras_erasecols(void *, int, int, int, long int); 260 static void cg6_ras_eraserows(void *, int, int, long int); 261 static void cg6_ras_do_cursor(struct rasops_info *); 262 263 static void 264 cg6_ras_init(struct cgsix_softc *sc) 265 { 266 volatile struct cg6_fbc *fbc = sc->sc_fbc; 267 268 CG6_DRAIN(fbc); 269 fbc->fbc_mode &= ~CG6_MODE_MASK; 270 fbc->fbc_mode |= CG6_MODE; 271 } 272 273 static void 274 cg6_ras_copyrows(void *cookie, int src, int dst, int n) 275 { 276 struct rasops_info *ri; 277 volatile struct cg6_fbc *fbc; 278 279 ri = cookie; 280 if (dst == src) 281 return; 282 if (src < 0) { 283 n += src; 284 src = 0; 285 } 286 if (src+n > ri->ri_rows) 287 n = ri->ri_rows - src; 288 if (dst < 0) { 289 n += dst; 290 dst = 0; 291 } 292 if (dst+n > ri->ri_rows) 293 n = ri->ri_rows - dst; 294 if (n <= 0) 295 return; 296 n *= ri->ri_font->fontheight; 297 src *= ri->ri_font->fontheight; 298 dst *= ri->ri_font->fontheight; 299 fbc = ((struct cgsix_softc *)ri->ri_hw)->sc_fbc; 300 fbc->fbc_clip = 0; 301 fbc->fbc_s = 0; 302 fbc->fbc_offx = 0; 303 fbc->fbc_offy = 0; 304 fbc->fbc_clipminx = 0; 305 fbc->fbc_clipminy = 0; 306 fbc->fbc_clipmaxx = ri->ri_width - 1; 307 fbc->fbc_clipmaxy = ri->ri_height - 1; 308 fbc->fbc_alu = CG6_ALU_COPY; 309 fbc->fbc_x0 = ri->ri_xorigin; 310 fbc->fbc_y0 = ri->ri_yorigin + src; 311 fbc->fbc_x1 = ri->ri_xorigin + ri->ri_emuwidth - 1; 312 fbc->fbc_y1 = ri->ri_yorigin + src + n - 1; 313 fbc->fbc_x2 = ri->ri_xorigin; 314 fbc->fbc_y2 = ri->ri_yorigin + dst; 315 fbc->fbc_x3 = ri->ri_xorigin + ri->ri_emuwidth - 1; 316 fbc->fbc_y3 = ri->ri_yorigin + dst + n - 1; 317 CG6_BLIT_WAIT(fbc); 318 CG6_DRAIN(fbc); 319 } 320 321 static void 322 cg6_ras_copycols(void *cookie, int row, int src, int dst, int n) 323 { 324 struct rasops_info *ri; 325 volatile struct cg6_fbc *fbc; 326 327 ri = cookie; 328 if (dst == src) 329 return; 330 if ((row < 0) || (row >= ri->ri_rows)) 331 return; 332 if (src < 0) { 333 n += src; 334 src = 0; 335 } 336 if (src+n > ri->ri_cols) 337 n = ri->ri_cols - src; 338 if (dst < 0) { 339 n += dst; 340 dst = 0; 341 } 342 if (dst+n > ri->ri_cols) 343 n = ri->ri_cols - dst; 344 if (n <= 0) 345 return; 346 n *= ri->ri_font->fontwidth; 347 src *= ri->ri_font->fontwidth; 348 dst *= ri->ri_font->fontwidth; 349 row *= ri->ri_font->fontheight; 350 fbc = ((struct cgsix_softc *)ri->ri_hw)->sc_fbc; 351 fbc->fbc_clip = 0; 352 fbc->fbc_s = 0; 353 fbc->fbc_offx = 0; 354 fbc->fbc_offy = 0; 355 fbc->fbc_clipminx = 0; 356 fbc->fbc_clipminy = 0; 357 fbc->fbc_clipmaxx = ri->ri_width - 1; 358 fbc->fbc_clipmaxy = ri->ri_height - 1; 359 fbc->fbc_alu = CG6_ALU_COPY; 360 fbc->fbc_x0 = ri->ri_xorigin + src; 361 fbc->fbc_y0 = ri->ri_yorigin + row; 362 fbc->fbc_x1 = ri->ri_xorigin + src + n - 1; 363 fbc->fbc_y1 = ri->ri_yorigin + row + ri->ri_font->fontheight - 1; 364 fbc->fbc_x2 = ri->ri_xorigin + dst; 365 fbc->fbc_y2 = ri->ri_yorigin + row; 366 fbc->fbc_x3 = ri->ri_xorigin + dst + n - 1; 367 fbc->fbc_y3 = ri->ri_yorigin + row + ri->ri_font->fontheight - 1; 368 CG6_BLIT_WAIT(fbc); 369 CG6_DRAIN(fbc); 370 } 371 372 static void 373 cg6_ras_erasecols(void *cookie, int row, int col, int n, long int attr) 374 { 375 struct rasops_info *ri; 376 volatile struct cg6_fbc *fbc; 377 378 ri = cookie; 379 if ((row < 0) || (row >= ri->ri_rows)) 380 return; 381 if (col < 0) { 382 n += col; 383 col = 0; 384 } 385 if (col+n > ri->ri_cols) 386 n = ri->ri_cols - col; 387 if (n <= 0) 388 return; 389 n *= ri->ri_font->fontwidth; 390 col *= ri->ri_font->fontwidth; 391 row *= ri->ri_font->fontheight; 392 fbc = ((struct cgsix_softc *)ri->ri_hw)->sc_fbc; 393 fbc->fbc_clip = 0; 394 fbc->fbc_s = 0; 395 fbc->fbc_offx = 0; 396 fbc->fbc_offy = 0; 397 fbc->fbc_clipminx = 0; 398 fbc->fbc_clipminy = 0; 399 fbc->fbc_clipmaxx = ri->ri_width - 1; 400 fbc->fbc_clipmaxy = ri->ri_height - 1; 401 fbc->fbc_alu = CG6_ALU_FILL; 402 fbc->fbc_fg = ri->ri_devcmap[(attr >> 16) & 0xf]; 403 fbc->fbc_arecty = ri->ri_yorigin + row; 404 fbc->fbc_arectx = ri->ri_xorigin + col; 405 fbc->fbc_arecty = ri->ri_yorigin + row + ri->ri_font->fontheight - 1; 406 fbc->fbc_arectx = ri->ri_xorigin + col + n - 1; 407 CG6_DRAW_WAIT(fbc); 408 CG6_DRAIN(fbc); 409 } 410 411 static void 412 cg6_ras_eraserows(void *cookie, int row, int n, long int attr) 413 { 414 struct rasops_info *ri; 415 volatile struct cg6_fbc *fbc; 416 417 ri = cookie; 418 if (row < 0) { 419 n += row; 420 row = 0; 421 } 422 if (row+n > ri->ri_rows) 423 n = ri->ri_rows - row; 424 if (n <= 0) 425 return; 426 fbc = ((struct cgsix_softc *)ri->ri_hw)->sc_fbc; 427 fbc->fbc_clip = 0; 428 fbc->fbc_s = 0; 429 fbc->fbc_offx = 0; 430 fbc->fbc_offy = 0; 431 fbc->fbc_clipminx = 0; 432 fbc->fbc_clipminy = 0; 433 fbc->fbc_clipmaxx = ri->ri_width - 1; 434 fbc->fbc_clipmaxy = ri->ri_height - 1; 435 fbc->fbc_alu = CG6_ALU_FILL; 436 fbc->fbc_fg = ri->ri_devcmap[(attr >> 16) & 0xf]; 437 if ((n == ri->ri_rows) && (ri->ri_flg & RI_FULLCLEAR)) { 438 fbc->fbc_arecty = 0; 439 fbc->fbc_arectx = 0; 440 fbc->fbc_arecty = ri->ri_height - 1; 441 fbc->fbc_arectx = ri->ri_width - 1; 442 } else { 443 row *= ri->ri_font->fontheight; 444 fbc->fbc_arecty = ri->ri_yorigin + row; 445 fbc->fbc_arectx = ri->ri_xorigin; 446 fbc->fbc_arecty = ri->ri_yorigin + row + (n * ri->ri_font->fontheight) - 1; 447 fbc->fbc_arectx = ri->ri_xorigin + ri->ri_emuwidth - 1; 448 } 449 CG6_DRAW_WAIT(fbc); 450 CG6_DRAIN(fbc); 451 } 452 453 /* 454 * Really want something more like fg^bg here, but that would be more 455 * or less impossible to migrate to colors. So we hope there's 456 * something not too inappropriate in the colormap...besides, it's what 457 * the non-accelerated code did. :-) 458 */ 459 static void 460 cg6_ras_do_cursor(struct rasops_info *ri) 461 { 462 volatile struct cg6_fbc *fbc; 463 int row; 464 int col; 465 466 row = ri->ri_crow * ri->ri_font->fontheight; 467 col = ri->ri_ccol * ri->ri_font->fontwidth; 468 fbc = ((struct cgsix_softc *)ri->ri_hw)->sc_fbc; 469 fbc->fbc_clip = 0; 470 fbc->fbc_s = 0; 471 fbc->fbc_offx = 0; 472 fbc->fbc_offy = 0; 473 fbc->fbc_clipminx = 0; 474 fbc->fbc_clipminy = 0; 475 fbc->fbc_clipmaxx = ri->ri_width - 1; 476 fbc->fbc_clipmaxy = ri->ri_height - 1; 477 fbc->fbc_alu = CG6_ALU_FLIP; 478 fbc->fbc_arecty = ri->ri_yorigin + row; 479 fbc->fbc_arectx = ri->ri_xorigin + col; 480 fbc->fbc_arecty = ri->ri_yorigin + row + ri->ri_font->fontheight - 1; 481 fbc->fbc_arectx = ri->ri_xorigin + col + ri->ri_font->fontwidth - 1; 482 CG6_DRAW_WAIT(fbc); 483 CG6_DRAIN(fbc); 484 } 485 #endif /* RASTERCONSOLE */ 486 487 void 488 cg6attach(sc, name, isconsole) 489 struct cgsix_softc *sc; 490 char *name; 491 int isconsole; 492 { 493 struct fbdevice *fb = &sc->sc_fb; 494 495 fb->fb_driver = &cg6_fbdriver; 496 497 /* Don't have to map the pfour register on the cgsix. */ 498 fb->fb_pfour = NULL; 499 500 fb->fb_type.fb_cmsize = 256; 501 fb->fb_type.fb_size = fb->fb_type.fb_height * fb->fb_linebytes; 502 printf(": %s, %d x %d", name, 503 fb->fb_type.fb_width, fb->fb_type.fb_height); 504 505 sc->sc_fhcrev = (*sc->sc_fhc >> FHC_REV_SHIFT) & 506 (FHC_REV_MASK >> FHC_REV_SHIFT); 507 508 printf(", rev %d", sc->sc_fhcrev); 509 510 /* reset cursor & frame buffer controls */ 511 cg6_reset(sc); 512 513 /* enable video */ 514 sc->sc_thc->thc_misc |= THC_MISC_VIDEN; 515 516 if (isconsole) { 517 printf(" (console)"); 518 #ifdef RASTERCONSOLE 519 if (cgsix_use_rasterconsole) { 520 fbrcons_init(&sc->sc_fb); 521 sc->sc_fb.fb_rinfo.ri_hw = sc; 522 sc->sc_fb.fb_rinfo.ri_ops.copyrows = cg6_ras_copyrows; 523 sc->sc_fb.fb_rinfo.ri_ops.copycols = cg6_ras_copycols; 524 sc->sc_fb.fb_rinfo.ri_ops.erasecols = cg6_ras_erasecols; 525 sc->sc_fb.fb_rinfo.ri_ops.eraserows = cg6_ras_eraserows; 526 sc->sc_fb.fb_rinfo.ri_do_cursor = cg6_ras_do_cursor; 527 cg6_ras_init(sc); 528 } 529 #endif 530 } 531 532 printf("\n"); 533 fb_attach(&sc->sc_fb, isconsole); 534 } 535 536 537 int 538 cgsixopen(dev, flags, mode, p) 539 dev_t dev; 540 int flags, mode; 541 struct proc *p; 542 { 543 int unit = minor(dev); 544 545 if (unit >= cgsix_cd.cd_ndevs || cgsix_cd.cd_devs[unit] == NULL) 546 return (ENXIO); 547 return (0); 548 } 549 550 int 551 cgsixclose(dev, flags, mode, p) 552 dev_t dev; 553 int flags, mode; 554 struct proc *p; 555 { 556 struct cgsix_softc *sc = cgsix_cd.cd_devs[minor(dev)]; 557 558 cg6_reset(sc); 559 560 /* (re-)initialize the default color map */ 561 bt_initcmap(&sc->sc_cmap, 256); 562 cg6_loadcmap(sc, 0, 256); 563 564 return (0); 565 } 566 567 int 568 cgsixioctl(dev, cmd, data, flags, p) 569 dev_t dev; 570 u_long cmd; 571 caddr_t data; 572 int flags; 573 struct proc *p; 574 { 575 struct cgsix_softc *sc = cgsix_cd.cd_devs[minor(dev)]; 576 u_int count; 577 int v, error; 578 union cursor_cmap tcm; 579 580 switch (cmd) { 581 582 case FBIOGTYPE: 583 *(struct fbtype *)data = sc->sc_fb.fb_type; 584 break; 585 586 case FBIOGATTR: 587 #define fba ((struct fbgattr *)data) 588 fba->real_type = sc->sc_fb.fb_type.fb_type; 589 fba->owner = 0; /* XXX ??? */ 590 fba->fbtype = sc->sc_fb.fb_type; 591 fba->sattr.flags = 0; 592 fba->sattr.emu_type = sc->sc_fb.fb_type.fb_type; 593 fba->sattr.dev_specific[0] = -1; 594 fba->emu_types[0] = sc->sc_fb.fb_type.fb_type; 595 fba->emu_types[1] = -1; 596 #undef fba 597 break; 598 599 case FBIOGETCMAP: 600 #define p ((struct fbcmap *)data) 601 return (bt_getcmap(p, &sc->sc_cmap, 256, 1)); 602 603 case FBIOPUTCMAP: 604 /* copy to software map */ 605 error = bt_putcmap(p, &sc->sc_cmap, 256, 1); 606 if (error) 607 return (error); 608 /* now blast them into the chip */ 609 /* XXX should use retrace interrupt */ 610 cg6_loadcmap(sc, p->index, p->count); 611 #undef p 612 break; 613 614 case FBIOGVIDEO: 615 *(int *)data = sc->sc_blanked; 616 break; 617 618 case FBIOSVIDEO: 619 if (*(int *)data) 620 cg6_unblank(&sc->sc_dev); 621 else if (!sc->sc_blanked) { 622 sc->sc_blanked = 1; 623 sc->sc_thc->thc_misc &= ~THC_MISC_VIDEN; 624 } 625 break; 626 627 /* these are for both FBIOSCURSOR and FBIOGCURSOR */ 628 #define p ((struct fbcursor *)data) 629 #define cc (&sc->sc_cursor) 630 631 case FBIOGCURSOR: 632 /* do not quite want everything here... */ 633 p->set = FB_CUR_SETALL; /* close enough, anyway */ 634 p->enable = cc->cc_enable; 635 p->pos = cc->cc_pos; 636 p->hot = cc->cc_hot; 637 p->size = cc->cc_size; 638 639 /* begin ugh ... can we lose some of this crap?? */ 640 if (p->image != NULL) { 641 count = cc->cc_size.y * 32 / NBBY; 642 error = copyout((caddr_t)cc->cc_bits[1], 643 (caddr_t)p->image, count); 644 if (error) 645 return (error); 646 error = copyout((caddr_t)cc->cc_bits[0], 647 (caddr_t)p->mask, count); 648 if (error) 649 return (error); 650 } 651 if (p->cmap.red != NULL) { 652 error = bt_getcmap(&p->cmap, 653 (union bt_cmap *)&cc->cc_color, 2, 1); 654 if (error) 655 return (error); 656 } else { 657 p->cmap.index = 0; 658 p->cmap.count = 2; 659 } 660 /* end ugh */ 661 break; 662 663 case FBIOSCURSOR: 664 /* 665 * For setcmap and setshape, verify parameters, so that 666 * we do not get halfway through an update and then crap 667 * out with the software state screwed up. 668 */ 669 v = p->set; 670 if (v & FB_CUR_SETCMAP) { 671 /* 672 * This use of a temporary copy of the cursor 673 * colormap is not terribly efficient, but these 674 * copies are small (8 bytes)... 675 */ 676 tcm = cc->cc_color; 677 error = bt_putcmap(&p->cmap, (union bt_cmap *)&tcm, 2, 1); 678 if (error) 679 return (error); 680 } 681 if (v & FB_CUR_SETSHAPE) { 682 if ((u_int)p->size.x > 32 || (u_int)p->size.y > 32) 683 return (EINVAL); 684 count = p->size.y * 32 / NBBY; 685 if (!uvm_useracc(p->image, count, B_READ) || 686 !uvm_useracc(p->mask, count, B_READ)) 687 return (EFAULT); 688 } 689 690 /* parameters are OK; do it */ 691 if (v & (FB_CUR_SETCUR | FB_CUR_SETPOS | FB_CUR_SETHOT)) { 692 if (v & FB_CUR_SETCUR) 693 cc->cc_enable = p->enable; 694 if (v & FB_CUR_SETPOS) 695 cc->cc_pos = p->pos; 696 if (v & FB_CUR_SETHOT) 697 cc->cc_hot = p->hot; 698 cg6_setcursor(sc); 699 } 700 if (v & FB_CUR_SETCMAP) { 701 cc->cc_color = tcm; 702 cg6_loadomap(sc); /* XXX defer to vertical retrace */ 703 } 704 if (v & FB_CUR_SETSHAPE) { 705 cc->cc_size = p->size; 706 count = p->size.y * 32 / NBBY; 707 bzero((caddr_t)cc->cc_bits, sizeof cc->cc_bits); 708 copyin(p->mask, (caddr_t)cc->cc_bits[0], count); 709 copyin(p->image, (caddr_t)cc->cc_bits[1], count); 710 cg6_loadcursor(sc); 711 } 712 break; 713 714 #undef p 715 #undef cc 716 717 case FBIOGCURPOS: 718 *(struct fbcurpos *)data = sc->sc_cursor.cc_pos; 719 break; 720 721 case FBIOSCURPOS: 722 sc->sc_cursor.cc_pos = *(struct fbcurpos *)data; 723 cg6_setcursor(sc); 724 break; 725 726 case FBIOGCURMAX: 727 /* max cursor size is 32x32 */ 728 ((struct fbcurpos *)data)->x = 32; 729 ((struct fbcurpos *)data)->y = 32; 730 break; 731 732 default: 733 #ifdef DEBUG 734 log(LOG_NOTICE, "cgsixioctl(0x%lx) (%s[%d])\n", cmd, 735 p->p_comm, p->p_pid); 736 #endif 737 return (ENOTTY); 738 } 739 return (0); 740 } 741 742 /* 743 * Clean up hardware state (e.g., after bootup or after X crashes). 744 */ 745 static void 746 cg6_reset(sc) 747 struct cgsix_softc *sc; 748 { 749 volatile struct cg6_tec_xxx *tec; 750 int fhc; 751 volatile struct bt_regs *bt; 752 753 /* hide the cursor, just in case */ 754 sc->sc_thc->thc_cursxy = (THC_CURSOFF << 16) | THC_CURSOFF; 755 756 /* turn off frobs in transform engine (makes X11 work) */ 757 tec = sc->sc_tec; 758 tec->tec_mv = 0; 759 tec->tec_clip = 0; 760 tec->tec_vdc = 0; 761 762 /* take care of hardware bugs in old revisions */ 763 if (sc->sc_fhcrev < 5) { 764 /* 765 * Keep current resolution; set cpu to 68020, set test 766 * window (size 1Kx1K), and for rev 1, disable dest cache. 767 */ 768 fhc = (*sc->sc_fhc & FHC_RES_MASK) | FHC_CPU_68020 | 769 FHC_TEST | 770 (11 << FHC_TESTX_SHIFT) | (11 << FHC_TESTY_SHIFT); 771 if (sc->sc_fhcrev < 2) 772 fhc |= FHC_DST_DISABLE; 773 *sc->sc_fhc = fhc; 774 } 775 776 /* Enable cursor in Brooktree DAC. */ 777 bt = sc->sc_bt; 778 bt->bt_addr = 0x06 << 24; 779 bt->bt_ctrl |= 0x03 << 24; 780 } 781 782 static void 783 cg6_setcursor(sc) 784 struct cgsix_softc *sc; 785 { 786 787 /* we need to subtract the hot-spot value here */ 788 #define COORD(f) (sc->sc_cursor.cc_pos.f - sc->sc_cursor.cc_hot.f) 789 sc->sc_thc->thc_cursxy = sc->sc_cursor.cc_enable ? 790 ((COORD(x) << 16) | (COORD(y) & 0xffff)) : 791 (THC_CURSOFF << 16) | THC_CURSOFF; 792 #undef COORD 793 } 794 795 static void 796 cg6_loadcursor(sc) 797 struct cgsix_softc *sc; 798 { 799 volatile struct cg6_thc *thc; 800 u_int edgemask, m; 801 int i; 802 803 /* 804 * Keep the top size.x bits. Here we *throw out* the top 805 * size.x bits from an all-one-bits word, introducing zeros in 806 * the top size.x bits, then invert all the bits to get what 807 * we really wanted as our mask. But this fails if size.x is 808 * 32---a sparc uses only the low 5 bits of the shift count--- 809 * so we have to special case that. 810 */ 811 edgemask = ~0; 812 if (sc->sc_cursor.cc_size.x < 32) 813 edgemask = ~(edgemask >> sc->sc_cursor.cc_size.x); 814 thc = sc->sc_thc; 815 for (i = 0; i < 32; i++) { 816 m = sc->sc_cursor.cc_bits[0][i] & edgemask; 817 thc->thc_cursmask[i] = m; 818 thc->thc_cursbits[i] = m & sc->sc_cursor.cc_bits[1][i]; 819 } 820 } 821 822 /* 823 * Load a subset of the current (new) colormap into the color DAC. 824 */ 825 static void 826 cg6_loadcmap(sc, start, ncolors) 827 struct cgsix_softc *sc; 828 int start, ncolors; 829 { 830 volatile struct bt_regs *bt; 831 u_int *ip, i; 832 int count; 833 834 ip = &sc->sc_cmap.cm_chip[BT_D4M3(start)]; /* start/4 * 3 */ 835 count = BT_D4M3(start + ncolors - 1) - BT_D4M3(start) + 3; 836 bt = sc->sc_bt; 837 bt->bt_addr = BT_D4M4(start) << 24; 838 while (--count >= 0) { 839 i = *ip++; 840 /* hardware that makes one want to pound boards with hammers */ 841 bt->bt_cmap = i; 842 bt->bt_cmap = i << 8; 843 bt->bt_cmap = i << 16; 844 bt->bt_cmap = i << 24; 845 } 846 } 847 848 /* 849 * Load the cursor (overlay `foreground' and `background') colors. 850 */ 851 static void 852 cg6_loadomap(sc) 853 struct cgsix_softc *sc; 854 { 855 volatile struct bt_regs *bt; 856 u_int i; 857 858 bt = sc->sc_bt; 859 bt->bt_addr = 0x01 << 24; /* set background color */ 860 i = sc->sc_cursor.cc_color.cm_chip[0]; 861 bt->bt_omap = i; /* R */ 862 bt->bt_omap = i << 8; /* G */ 863 bt->bt_omap = i << 16; /* B */ 864 865 bt->bt_addr = 0x03 << 24; /* set foreground color */ 866 bt->bt_omap = i << 24; /* R */ 867 i = sc->sc_cursor.cc_color.cm_chip[1]; 868 bt->bt_omap = i; /* G */ 869 bt->bt_omap = i << 8; /* B */ 870 } 871 872 static void 873 cg6_unblank(dev) 874 struct device *dev; 875 { 876 struct cgsix_softc *sc = (struct cgsix_softc *)dev; 877 878 if (sc->sc_blanked) { 879 sc->sc_blanked = 0; 880 sc->sc_thc->thc_misc |= THC_MISC_VIDEN; 881 } 882 } 883 884 /* XXX the following should be moved to a "user interface" header */ 885 /* 886 * Base addresses at which users can mmap() the various pieces of a cg6. 887 * Note that although the Brooktree color registers do not occupy 8K, 888 * the X server dies if we do not allow it to map 8K there (it just maps 889 * from 0x70000000 forwards, as a contiguous chunk). 890 */ 891 #define CG6_USER_FBC 0x70000000 892 #define CG6_USER_TEC 0x70001000 893 #define CG6_USER_BTREGS 0x70002000 894 #define CG6_USER_FHC 0x70004000 895 #define CG6_USER_THC 0x70005000 896 #define CG6_USER_ROM 0x70006000 897 #define CG6_USER_RAM 0x70016000 898 #define CG6_USER_DHC 0x80000000 899 900 struct mmo { 901 u_long mo_uaddr; /* user (virtual) address */ 902 u_long mo_size; /* size, or 0 for video ram size */ 903 u_long mo_physoff; /* offset from sc_physadr */ 904 }; 905 906 /* 907 * Return the address that would map the given device at the given 908 * offset, allowing for the given protection, or return -1 for error. 909 * 910 * XXX needs testing against `demanding' applications (e.g., aviator) 911 */ 912 paddr_t 913 cgsixmmap(dev, off, prot) 914 dev_t dev; 915 off_t off; 916 int prot; 917 { 918 struct cgsix_softc *sc = cgsix_cd.cd_devs[minor(dev)]; 919 struct mmo *mo; 920 u_int u, sz; 921 static struct mmo mmo[] = { 922 { CG6_USER_RAM, 0, CGSIX_RAM_OFFSET }, 923 924 /* do not actually know how big most of these are! */ 925 { CG6_USER_FBC, 1, CGSIX_FBC_OFFSET }, 926 { CG6_USER_TEC, 1, CGSIX_TEC_OFFSET }, 927 { CG6_USER_BTREGS, 8192 /* XXX */, CGSIX_BT_OFFSET }, 928 { CG6_USER_FHC, 1, CGSIX_FHC_OFFSET }, 929 { CG6_USER_THC, sizeof(struct cg6_thc), CGSIX_THC_OFFSET }, 930 { CG6_USER_ROM, 65536, CGSIX_ROM_OFFSET }, 931 { CG6_USER_DHC, 1, CGSIX_DHC_OFFSET }, 932 }; 933 #define NMMO (sizeof mmo / sizeof *mmo) 934 935 if (off & PGOFSET) 936 panic("cgsixmmap"); 937 938 /* 939 * Entries with size 0 map video RAM (i.e., the size in fb data). 940 * 941 * Since we work in pages, the fact that the map offset table's 942 * sizes are sometimes bizarre (e.g., 1) is effectively ignored: 943 * one byte is as good as one page. 944 */ 945 for (mo = mmo; mo < &mmo[NMMO]; mo++) { 946 if ((u_long)off < mo->mo_uaddr) 947 continue; 948 u = off - mo->mo_uaddr; 949 sz = mo->mo_size ? mo->mo_size : sc->sc_fb.fb_type.fb_size; 950 if (u < sz) { 951 return (bus_space_mmap(sc->sc_bustag, 952 sc->sc_paddr, u+mo->mo_physoff, 953 prot, BUS_SPACE_MAP_LINEAR)); 954 } 955 } 956 957 #ifdef DEBUG 958 { 959 struct proc *p = curproc; /* XXX */ 960 log(LOG_NOTICE, "cgsixmmap(0x%llx) (%s[%d])\n", 961 (long long)off, p->p_comm, p->p_pid); 962 } 963 #endif 964 return (-1); /* not a user-map offset */ 965 } 966