xref: /netbsd/sys/dev/sun/cgsixreg.h (revision bf9ec67e)
1 /*	$NetBSD: cgsixreg.h,v 1.4 2001/01/10 14:58:08 tsutsui Exp $ */
2 
3 /*
4  * Copyright (c) 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This software was developed by the Computer Systems Engineering group
8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9  * contributed to Berkeley.
10  *
11  * All advertising materials mentioning features or use of this software
12  * must display the following acknowledgement:
13  *	This product includes software developed by the University of
14  *	California, Lawrence Berkeley Laboratory.
15  *
16  * Redistribution and use in source and binary forms, with or without
17  * modification, are permitted provided that the following conditions
18  * are met:
19  * 1. Redistributions of source code must retain the above copyright
20  *    notice, this list of conditions and the following disclaimer.
21  * 2. Redistributions in binary form must reproduce the above copyright
22  *    notice, this list of conditions and the following disclaimer in the
23  *    documentation and/or other materials provided with the distribution.
24  * 3. All advertising materials mentioning features or use of this software
25  *    must display the following acknowledgement:
26  *	This product includes software developed by the University of
27  *	California, Berkeley and its contributors.
28  * 4. Neither the name of the University nor the names of its contributors
29  *    may be used to endorse or promote products derived from this software
30  *    without specific prior written permission.
31  *
32  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
42  * SUCH DAMAGE.
43  *
44  *	@(#)cgsixreg.h	8.4 (Berkeley) 1/21/94
45  */
46 
47 /*
48  * CG6 display registers.  (Note, I got tired of writing `cgsix' about
49  * halfway through and changed everything to cg6, but I probably missed
50  * some.  Unfortunately, the way config works, we need to spell out `six'
51  * in some places anyway.)
52  *
53  * The cg6 is a complicated beastie.  We have been unable to extract any
54  * documentation and most of the following are guesses based on a limited
55  * amount of reverse engineering.
56  *
57  * A cg6 is composed of numerous groups of control registers, all with TLAs:
58  *	FBC - frame buffer control?
59  *	FHC - fbc hardware configuration / control? register (32 bits)
60  *	DHC - ???
61  *	TEC - transform engine control?
62  *	THC - TEC Hardware Configuration
63  *	ROM - a 64Kbyte ROM with who knows what in it.
64  *	colormap - see below
65  *	frame buffer memory (video RAM)
66  *	possible other stuff
67  *
68  * Like the cg3, the cg6 uses a Brooktree Video DAC (see btreg.h).
69  *
70  * Various revisions of the cgsix have various hardware bugs.  So far,
71  * we have only seen rev 1 & 2.
72  */
73 
74 /* Control register banks offsets */
75 #define CGSIX_ROM_OFFSET	0x000000
76 #define CGSIX_BT_OFFSET		0x200000
77 #define CGSIX_DHC_OFFSET	0x240000
78 #define CGSIX_ALT_OFFSET	0x280000
79 #define CGSIX_FHC_OFFSET	0x300000
80 #define CGSIX_THC_OFFSET	0x301000
81 #define CGSIX_FBC_OFFSET	0x700000
82 #define CGSIX_TEC_OFFSET	0x701000
83 #define CGSIX_RAM_OFFSET	0x800000
84 
85 /* bits in FHC register */
86 #define	FHC_FBID_MASK	0xff000000	/* bits 24..31 are frame buffer ID */
87 #define	FHC_FBID_SHIFT	24
88 #define	FHC_REV_MASK	0x00f00000	/* bits 20..23 are revision */
89 #define	FHC_REV_SHIFT	20
90 #define	FHC_FROP_DISABLE 0x00080000	/* disable fast/font? rasterops */
91 #define	FHC_ROW_DISABLE	0x00040000	/* ??? */
92 #define	FHC_SRC_DISABLE	0x00020000	/* ??? */
93 #define	FHC_DST_DISABLE	0x00010000	/* disable destination cache */
94 #define	FHC_RESET	0x00008000	/* ??? */
95 #define	FHC_XXX0	0x00004000	/* ??? */
96 #define	FHC_LEBO	0x00002000	/* set little endian byte order? */
97 #define	FHC_RES_MASK	0x00001800	/* bits 11&12 are resolution */
98 #define	FHC_RES_1024	 0x00000000		/* res = 1024x768 */
99 #define	FHC_RES_1152	 0x00000800		/* res = 1152x900 */
100 #define	FHC_RES_1280	 0x00001000		/* res = 1280x1024 */
101 #define	FHC_RES_1600	 0x00001800		/* res = 1600x1200 */
102 #define	FHC_CPU_MASK	0x00000600	/* bits 9&10 are cpu type */
103 #define	FHC_CPU_SPARC	 0x00000000		/* cpu = sparc */
104 #define	FHC_CPU_68020	 0x00000200		/* cpu = 68020 */
105 #define	FHC_CPU_386	 0x00000400		/* cpu = 80386 */
106 #define	FHC_CPU_XXX	 0x00000600		/* ??? */
107 #define	FHC_TEST	0x00000100	/* ??? test window ??? */
108 #define	FHC_TESTX_MASK	0x000000f0	/* bits 4..7 are test window X */
109 #define	FHC_TESTX_SHIFT	4
110 #define	FHC_TESTY_MASK	0x0000000f	/* bits 0..3 are test window Y */
111 #define	FHC_TESTY_SHIFT	0
112 
113 /*
114  * The layout of the THC.
115  */
116 struct cg6_thc {
117 	u_int32_t	thc_xxx0[512];	/* ??? */
118 	u_int32_t	thc_hsync1;	/* horizontal sync timing */
119 	u_int32_t	thc_hsync2;	/* more hsync timing */
120 	u_int32_t	thc_hsync3;	/* yet more hsync timing */
121 	u_int32_t	thc_vsync1;	/* vertical sync timing */
122 	u_int32_t	thc_vsync2;	/* only two of these */
123 	u_int32_t	thc_refresh;	/* refresh counter */
124 	u_int32_t	thc_misc;	/* miscellaneous control & status */
125 	u_int32_t	thc_xxx1[56];	/* ??? */
126 	u_int32_t	thc_cursxy;	/* cursor x,y position (16 bits each) */
127 	u_int32_t	thc_cursmask[32];/* cursor mask bits */
128 	u_int32_t	thc_cursbits[32];/* what to show where mask enabled */
129 };
130 
131 /* bits in thc_misc */
132 #define	THC_MISC_XXX0		0xfff00000	/* unused */
133 #define	THC_MISC_REVMASK	0x000f0000	/* cg6 revision? */
134 #define	THC_MISC_REVSHIFT	16
135 #define	THC_MISC_XXX1		0x0000e000	/* unused */
136 #define	THC_MISC_RESET		0x00001000	/* ??? */
137 #define	THC_MISC_XXX2		0x00000800	/* unused */
138 #define	THC_MISC_VIDEN		0x00000400	/* video enable */
139 #define	THC_MISC_SYNC		0x00000200	/* not sure what ... */
140 #define	THC_MISC_VSYNC		0x00000100	/* ... these really are */
141 #define	THC_MISC_SYNCEN		0x00000080	/* sync enable */
142 #define	THC_MISC_CURSRES	0x00000040	/* cursor resolution */
143 #define	THC_MISC_INTEN		0x00000020	/* v.retrace intr enable */
144 #define	THC_MISC_INTR		0x00000010	/* intr pending / ack bit */
145 #define	THC_MISC_XXX		0x0000000f	/* ??? */
146 
147 /* cursor x / y position value for `off' */
148 #define	THC_CURSOFF	(65536-32)	/* i.e., USHRT_MAX+1-32 */
149 
150 /*
151  * Partial description of TEC (needed to get around FHC rev 1 bugs).
152  */
153 struct cg6_tec_xxx {
154 	u_int32_t	tec_mv;		/* matrix stuff */
155 	u_int32_t	tec_clip;	/* clipping stuff */
156 	u_int32_t	tec_vdc;	/* ??? */
157 };
158 
159 /*
160  * Partial description of FBC
161  *
162  * Most of this we don't care about; here are only the portions
163  * we need, most notably the blitter.  Comments are merely my
164  * best guesses as to register functions, based largely on the
165  * X11R6.4 sunGX code.  Some of these are here only so we can
166  * stuff canned values in them (eg, offx).
167  */
168 struct cg6_fbc {
169 	u_int32_t fbc_pad1[1];
170 	u_int32_t fbc_mode;		/* mode setting */
171 	u_int32_t fbc_clip;		/* function unknown */
172 	u_int32_t fbc_pad2[1];
173 	u_int32_t fbc_s;		/* global status */
174 	u_int32_t fbc_draw;		/* drawing pipeline status */
175 	u_int32_t fbc_blit;		/* blitter status */
176 	u_int32_t fbc_pad3[25];
177 	u_int32_t fbc_x0;		/* blitter, src llx */
178 	u_int32_t fbc_y0;		/* blitter, src lly */
179 	u_int32_t fbc_pad4[2];
180 	u_int32_t fbc_x1;		/* blitter, src urx */
181 	u_int32_t fbc_y1;		/* blitter, src ury */
182 	u_int32_t fbc_pad5[2];
183 	u_int32_t fbc_x2;		/* blitter, dst llx */
184 	u_int32_t fbc_y2;		/* blitter, dst lly */
185 	u_int32_t fbc_pad6[2];
186 	u_int32_t fbc_x3;		/* blitter, dst urx */
187 	u_int32_t fbc_y3;		/* blitter, dst ury */
188 	u_int32_t fbc_pad7[2];
189 	u_int32_t fbc_offx;		/* x offset for drawing */
190 	u_int32_t fbc_offy;		/* y offset for drawing */
191 	u_int32_t fbc_pad8[6];
192 	u_int32_t fbc_clipminx;		/* clip rectangle llx */
193 	u_int32_t fbc_clipminy;		/* clip rectangle lly */
194 	u_int32_t fbc_pad9[2];
195 	u_int32_t fbc_clipmaxx;		/* clip rectangle urx */
196 	u_int32_t fbc_clipmaxy;		/* clip rectangle ury */
197 	u_int32_t fbc_pad10[2];
198 	u_int32_t fbc_fg;		/* fg value for rop */
199 	u_int32_t fbc_pad11[1];
200 	u_int32_t fbc_alu;		/* operation to be performed */
201 	u_int32_t fbc_pad12[509];
202 	u_int32_t fbc_arectx;		/* rectangle drawing, x coord */
203 	u_int32_t fbc_arecty;		/* rectangle drawing, y coord */
204 	/* actually much more, but nothing more we need */
205 };
206 
207 #if _CG6_LAYOUT_NOT_USED_ANYMORE
208 /*
209  * This structure exists only to compute the layout of the CG6
210  * hardware.  Each of the individual substructures lives on a
211  * separate `page' (where a `page' is at least 4K), and many are
212  * very far apart.  We avoid large offsets (which make for lousy
213  * code) by using pointers to the individual interesting pieces,
214  * and map them in independently (to avoid using up PTEs unnecessarily).
215  */
216 struct cg6_layout {
217 	/* ROM at 0 */
218 	union {
219 		int un_id;		/* ID = ?? */
220 		char un_rom[65536];	/* 64K rom */
221 		char un_pad[0x200000];
222 	} cg6_rom_un;
223 
224 	/* Brooktree DAC at 0x200000 */
225 	union {
226 		struct bt_regs un_btregs;
227 		char un_pad[0x040000];
228 	} cg6_bt_un;
229 
230 	/* DHC, whatever that is, at 0x240000 */
231 	union {
232 		char un_pad[0x40000];
233 	} cg6_dhc_un;
234 
235 	/* ALT, whatever that is, at 0x280000 */
236 	union {
237 		char un_pad[0x80000];
238 	} cg6_alt_un;
239 
240 	/* FHC register at 0x300000 */
241 	union {
242 		int un_fhc;
243 		char un_pad[0x1000];
244 	} cg6_fhc_un;
245 
246 	/* THC at 0x301000 */
247 	union {
248 		struct cg6_thc un_thc;
249 		char un_pad[0x400000 - 0x1000];
250 	} cg6_thc_un;
251 
252 	/* FBC at 0x700000 */
253 	union {
254 		char un_pad[0x1000];
255 	} cg6_fbc_un;
256 
257 	/* TEC at 0x701000 */
258 	union {
259 		char un_pad[0x100000 - 0x1000];
260 		struct cg6_tec_xxx un_tec;
261 	} cg6_tec_un;
262 
263 	/* Video RAM at 0x800000 */
264 	char	cg6_ram[1024 * 1024];	/* approx.? */
265 };
266 #endif
267