1 /* $NetBSD: px.c,v 1.13 2002/03/17 19:41:02 atatat Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Driver for DEC PixelStamp graphics adapters (PMAG-C). 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: px.c,v 1.13 2002/03/17 19:41:02 atatat Exp $"); 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/device.h> 49 #include <sys/malloc.h> 50 #include <sys/callout.h> 51 52 #include <uvm/uvm_extern.h> 53 54 #if defined(pmax) 55 #include <mips/cpuregs.h> 56 #elif defined(alpha) 57 #include <alpha/alpha_cpu.h> 58 #endif 59 60 #include <machine/autoconf.h> 61 #include <machine/cpu.h> 62 #include <machine/bus.h> 63 64 #include <dev/cons.h> 65 66 #include <dev/wscons/wsconsio.h> 67 #include <dev/wscons/wsdisplayvar.h> 68 69 #include <dev/ic/bt459reg.h> 70 71 #include <dev/tc/tcvar.h> 72 #include <dev/tc/sticreg.h> 73 #include <dev/tc/sticio.h> 74 #include <dev/tc/sticvar.h> 75 76 #define PX_STIC_POLL_OFFSET 0x000000 /* STIC DMA poll space */ 77 #define PX_STAMP_OFFSET 0x0c0000 /* pixelstamp space on STIC */ 78 #define PX_STIC_OFFSET 0x180000 /* STIC registers */ 79 #define PX_VDAC_OFFSET 0x200000 /* VDAC registers (bt459) */ 80 #define PX_VDAC_RESET_OFFSET 0x300000 /* VDAC reset register */ 81 #define PX_ROM_OFFSET 0x300000 /* ROM code */ 82 83 #define PX_BUF_COUNT 16 84 #define PX_BUF_INC(x) ((x + 1) & (PX_BUF_COUNT - 1)) 85 86 /* 87 * We need enough aligned memory to hold: 88 * 89 * - Xserver communication area (4096 bytes) 90 * - 16 packet buffers (4096 bytes each) 91 * - 2 image buffers (5120 bytes each) 92 * 93 */ 94 #define PX_BUF_SIZE \ 95 (STIC_PACKET_SIZE * PX_BUF_COUNT + STIC_IMGBUF_SIZE*2 + STIC_XCOMM_SIZE) 96 #define PX_BUF_ALIGN 32768 97 98 #define PXF_QUEUE 0x01 99 100 void px_attach(struct device *, struct device *, void *); 101 void px_init(struct stic_info *, int); 102 int px_ioctl(struct stic_info *, u_long, caddr_t, int, struct proc *); 103 int px_match(struct device *, struct cfdata *, void *); 104 105 int px_intr(void *); 106 u_int32_t *px_pbuf_get(struct stic_info *); 107 int px_pbuf_post(struct stic_info *, u_int32_t *); 108 109 void px_cnattach(tc_addr_t); 110 111 struct px_softc { 112 struct device px_dv; 113 struct stic_info *px_si; 114 volatile u_int32_t *px_qpoll[PX_BUF_COUNT]; 115 }; 116 117 struct cfattach px_ca = { 118 sizeof(struct px_softc), px_match, px_attach 119 }; 120 121 int 122 px_match(struct device *parent, struct cfdata *match, void *aux) 123 { 124 struct tc_attach_args *ta; 125 126 ta = aux; 127 128 return (strncmp("PMAG-CA ", ta->ta_modname, TC_ROM_LLEN) == 0); 129 } 130 131 void 132 px_attach(struct device *parent, struct device *self, void *aux) 133 { 134 struct stic_info *si; 135 struct tc_attach_args *ta; 136 struct px_softc *px; 137 int console, i; 138 u_long v; 139 140 px = (struct px_softc *)self; 141 ta = (struct tc_attach_args *)aux; 142 143 if (ta->ta_addr == stic_consinfo.si_slotbase) { 144 si = &stic_consinfo; 145 console = 1; 146 } else { 147 if (stic_consinfo.si_slotbase == NULL) 148 si = &stic_consinfo; 149 else { 150 si = malloc(sizeof(*si), M_DEVBUF, M_NOWAIT|M_ZERO); 151 } 152 si->si_slotbase = ta->ta_addr; 153 px_init(si, 0); 154 console = 0; 155 } 156 157 px->px_si = si; 158 si->si_dv = self; 159 tc_intr_establish(parent, ta->ta_cookie, IPL_TTY, px_intr, si); 160 161 printf(": 8 plane, %dx%d stamp\n", si->si_stampw, si->si_stamph); 162 163 for (i = 0; i < PX_BUF_COUNT; i++) { 164 v = i * STIC_PACKET_SIZE + 165 si->si_buf_phys + STIC_XCOMM_SIZE; 166 v = ((v & 0xffff8000) << 3) | (v & 0x7fff); 167 px->px_qpoll[i] = (volatile u_int32_t *) 168 ((caddr_t)si->si_slotbase + (v >> 9)); 169 } 170 171 stic_attach(self, si, console); 172 } 173 174 void 175 px_cnattach(tc_addr_t addr) 176 { 177 struct stic_info *si; 178 179 si = &stic_consinfo; 180 si->si_slotbase = addr; 181 px_init(si, 1); 182 stic_cnattach(si); 183 } 184 185 void 186 px_init(struct stic_info *si, int bootstrap) 187 { 188 struct pglist pglist; 189 caddr_t kva, bva; 190 paddr_t bpa; 191 192 /* 193 * Allocate memory for the packet buffers. It must be located below 194 * 8MB, since the STIC can't access outside that region. Also, due 195 * to the holes in STIC address space, each buffer mustn't cross a 196 * 32kB boundary. 197 */ 198 if (bootstrap) { 199 /* 200 * UVM won't be initialised at this point, so grab memory 201 * directly from vm_physmem[]. 202 */ 203 bva = (caddr_t)uvm_pageboot_alloc(PX_BUF_SIZE + PX_BUF_ALIGN); 204 bpa = (STIC_KSEG_TO_PHYS(kva) + PX_BUF_ALIGN - 1) & 205 ~(PX_BUF_ALIGN - 1); 206 if (bpa + PX_BUF_SIZE > 8192*1024) 207 panic("px_init: allocation out of bounds"); 208 } else { 209 TAILQ_INIT(&pglist); 210 if (uvm_pglistalloc(PX_BUF_SIZE, 0, 8192*1024, PX_BUF_ALIGN, 211 0, &pglist, 1, 0) != 0) 212 panic("px_init: allocation failure"); 213 bpa = TAILQ_FIRST(&pglist)->phys_addr; 214 } 215 216 kva = (caddr_t)si->si_slotbase; 217 218 si->si_vdac = (u_int32_t *)(kva + PX_VDAC_OFFSET); 219 si->si_vdac_reset = (u_int32_t *)(kva + PX_VDAC_RESET_OFFSET); 220 si->si_stic = (volatile struct stic_regs *)(kva + PX_STIC_OFFSET); 221 si->si_stamp = (u_int32_t *)(kva + PX_STAMP_OFFSET); 222 si->si_buf = (u_int32_t *)TC_PHYS_TO_UNCACHED(bpa); 223 si->si_buf_phys = bpa; 224 si->si_buf_size = PX_BUF_SIZE; 225 si->si_disptype = WSDISPLAY_TYPE_PX; 226 si->si_depth = 8; 227 si->si_sxc = (volatile struct stic_xcomm *)si->si_buf; 228 229 si->si_pbuf_get = px_pbuf_get; 230 si->si_pbuf_post = px_pbuf_post; 231 si->si_ioctl = px_ioctl; 232 233 memset(si->si_buf, 0, PX_BUF_SIZE); 234 235 stic_init(si); 236 } 237 238 int 239 px_intr(void *cookie) 240 { 241 volatile struct stic_regs *sr; 242 volatile struct stic_xcomm *sxc; 243 struct stic_info *si; 244 struct px_softc *px; 245 int state; 246 247 si = cookie; 248 px = (struct px_softc *)si->si_dv; 249 sr = si->si_stic; 250 state = sr->sr_ipdvint; 251 sxc = si->si_sxc; 252 253 /* 254 * Vertical-retrace condition. 255 * 256 * Clear the flag and flush out any waiting VDAC updates. We do 257 * this at retrace time to avoid producing `shearing' and other 258 * nasty artifacts. 259 */ 260 if ((state & STIC_INT_V) != 0) { 261 sr->sr_ipdvint = STIC_INT_V_WE | STIC_INT_V_EN; 262 tc_wmb(); 263 stic_flush(si); 264 } 265 266 /* 267 * Error condition. 268 * 269 * Simply clear the flag and report the error. 270 */ 271 if ((state & STIC_INT_E) != 0) { 272 printf("%s: error intr, %x %x %x %x %x", px->px_dv.dv_xname, 273 sr->sr_ipdvint, sr->sr_sticsr, sr->sr_buscsr, 274 sr->sr_busadr, sr->sr_busdat); 275 sr->sr_ipdvint = STIC_INT_E_WE | STIC_INT_E_EN; 276 tc_wmb(); 277 } 278 279 /* 280 * Check for queue stalls. 281 */ 282 if (sxc->sxc_tail != sxc->sxc_head && !sxc->sxc_busy) 283 state |= STIC_INT_P; 284 285 /* 286 * Packet-done condition. 287 * 288 * If packet queueing is enabled, clear the condition, and increment 289 * the tail (submitted) pointer. 290 */ 291 if ((si->si_hwflags & PXF_QUEUE) != 0 && (state & STIC_INT_P) != 0) { 292 sr->sr_ipdvint = STIC_INT_P_WE | STIC_INT_P_EN; 293 tc_wmb(); 294 295 if (sxc->sxc_tail != sxc->sxc_head) { 296 sxc->sxc_done[sxc->sxc_tail] = 0; 297 sxc->sxc_tail = PX_BUF_INC(sxc->sxc_tail); 298 } 299 300 if (sxc->sxc_tail != sxc->sxc_head) { 301 if (*px->px_qpoll[sxc->sxc_tail] != STAMP_OK) { 302 sxc->sxc_nreject++; 303 sxc->sxc_busy = 0; 304 } else 305 sxc->sxc_busy = 1; 306 } else 307 sxc->sxc_busy = 0; 308 } 309 310 if ((si->si_hwflags & PXF_QUEUE) != 0 && (state & STIC_INT_P_EN) == 0) 311 printf("px_intr: STIC_INT_P_EN == 0\n"); 312 313 return (1); 314 } 315 316 u_int32_t * 317 px_pbuf_get(struct stic_info *si) 318 { 319 u_long off; 320 321 si->si_pbuf_select ^= STIC_PACKET_SIZE; 322 off = si->si_pbuf_select + STIC_XCOMM_SIZE; 323 return ((u_int32_t *)((caddr_t)si->si_buf + off)); 324 } 325 326 int 327 px_pbuf_post(struct stic_info *si, u_int32_t *buf) 328 { 329 volatile u_int32_t *poll, junk; 330 volatile struct stic_regs *sr; 331 u_long v; 332 int c; 333 334 sr = si->si_stic; 335 336 /* Get address of poll register for this buffer. */ 337 v = (u_long)STIC_KSEG_TO_PHYS(buf); 338 v = ((v & 0xffff8000) << 3) | (v & 0x7fff); 339 poll = (volatile u_int32_t *)((caddr_t)si->si_slotbase + (v >> 9)); 340 341 /* 342 * Read the poll register and make sure the stamp wants to accept 343 * our packet. This read will initiate the DMA. Don't wait for 344 * ever, just in case something's wrong. 345 */ 346 tc_mb(); 347 348 for (c = STAMP_RETRIES; c != 0; c--) { 349 if ((sr->sr_ipdvint & STIC_INT_P) != 0) { 350 sr->sr_ipdvint = STIC_INT_P_WE; 351 tc_wmb(); 352 junk = *poll; 353 return (0); 354 } 355 DELAY(STAMP_DELAY); 356 } 357 358 /* STIC has lost the plot, punish it. */ 359 stic_reset(si); 360 return (-1); 361 } 362 363 int 364 px_ioctl(struct stic_info *si, u_long cmd, caddr_t data, int flag, 365 struct proc *p) 366 { 367 volatile struct stic_xcomm *sxc; 368 volatile struct stic_regs *sr; 369 struct stic_xinfo *sxi; 370 int rv, s; 371 372 sr = si->si_stic; 373 374 switch (cmd) { 375 case STICIO_STARTQ: 376 if (si->si_dispmode != WSDISPLAYIO_MODE_MAPPED || 377 (si->si_hwflags & PXF_QUEUE) != 0) { 378 rv = EBUSY; 379 break; 380 } 381 382 sxc = si->si_sxc; 383 memset((void *)sxc->sxc_done, 0, sizeof(sxc->sxc_done)); 384 sxc->sxc_head = 0; 385 sxc->sxc_tail = 0; 386 sxc->sxc_nreject = 0; 387 sxc->sxc_nstall = 0; 388 389 s = spltty(); 390 si->si_hwflags |= PXF_QUEUE; 391 sr->sr_ipdvint = STIC_INT_P_WE | STIC_INT_P_EN; 392 tc_wmb(); 393 splx(s); 394 395 rv = 0; 396 break; 397 398 case STICIO_STOPQ: 399 s = spltty(); 400 si->si_hwflags &= ~PXF_QUEUE; 401 sr->sr_ipdvint = STIC_INT_P_WE | STIC_INT_P; 402 tc_wmb(); 403 splx(s); 404 rv = 0; 405 break; 406 407 case STICIO_GXINFO: 408 sxi = (struct stic_xinfo *)data; 409 sxi->sxi_unit = si->si_unit; 410 sxi->sxi_stampw = si->si_stampw; 411 sxi->sxi_stamph = si->si_stamph; 412 sxi->sxi_buf_size = si->si_buf_size; 413 sxi->sxi_buf_phys = (u_int)si->si_buf_phys; 414 sxi->sxi_buf_pktoff = STIC_XCOMM_SIZE; 415 sxi->sxi_buf_pktcnt = PX_BUF_COUNT; 416 sxi->sxi_buf_imgoff = 417 STIC_XCOMM_SIZE + STIC_PACKET_SIZE * PX_BUF_COUNT; 418 rv = 0; 419 break; 420 421 default: 422 rv = EPASSTHROUGH; 423 break; 424 } 425 426 return (rv); 427 } 428