xref: /netbsd/sys/dev/tc/tcds.c (revision bf9ec67e)
1 /* $NetBSD: tcds.c,v 1.3 2001/11/13 06:26:10 lukem Exp $ */
2 
3 /*-
4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9  * NASA Ames Research Center.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. All advertising materials mentioning features or use of this software
20  *    must display the following acknowledgement:
21  *	This product includes software developed by the NetBSD
22  *	Foundation, Inc. and its contributors.
23  * 4. Neither the name of The NetBSD Foundation nor the names of its
24  *    contributors may be used to endorse or promote products derived
25  *    from this software without specific prior written permission.
26  *
27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37  * POSSIBILITY OF SUCH DAMAGE.
38  */
39 
40 /*
41  * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
42  * All rights reserved.
43  *
44  * Author: Keith Bostic, Chris G. Demetriou
45  *
46  * Permission to use, copy, modify and distribute this software and
47  * its documentation is hereby granted, provided that both the copyright
48  * notice and this permission notice appear in all copies of the
49  * software, derivative works or modified versions, and any portions
50  * thereof, and that both notices appear in supporting documentation.
51  *
52  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
53  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
54  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
55  *
56  * Carnegie Mellon requests users of this software to return to
57  *
58  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
59  *  School of Computer Science
60  *  Carnegie Mellon University
61  *  Pittsburgh PA 15213-3890
62  *
63  * any improvements or extensions that they make and grant Carnegie the
64  * rights to redistribute these changes.
65  */
66 
67 #include <sys/cdefs.h>
68 __KERNEL_RCSID(0, "$NetBSD: tcds.c,v 1.3 2001/11/13 06:26:10 lukem Exp $");
69 
70 #include <sys/param.h>
71 #include <sys/kernel.h>
72 #include <sys/systm.h>
73 #include <sys/device.h>
74 #include <sys/malloc.h>
75 
76 #ifdef __alpha__
77 #include <machine/rpb.h>
78 #endif /* __alpha__ */
79 
80 #include <dev/scsipi/scsi_all.h>
81 #include <dev/scsipi/scsipi_all.h>
82 #include <dev/scsipi/scsiconf.h>
83 
84 #include <dev/ic/ncr53c9xvar.h>
85 
86 #include <machine/bus.h>
87 
88 #include <dev/tc/tcvar.h>
89 #include <dev/tc/tcdsreg.h>
90 #include <dev/tc/tcdsvar.h>
91 
92 #include "locators.h"
93 
94 struct tcds_softc {
95 	struct	device sc_dv;
96 	bus_space_tag_t sc_bst;
97 	bus_space_handle_t sc_bsh;
98 	bus_dma_tag_t sc_dmat;
99 	void	*sc_cookie;
100 	int	sc_flags;
101 	struct tcds_slotconfig sc_slots[2];
102 };
103 
104 /* sc_flags */
105 #define	TCDSF_BASEBOARD		0x01	/* baseboard on DEC 3000 */
106 #define	TCDSF_FASTSCSI		0x02	/* supports Fast SCSI */
107 
108 /* Definition of the driver for autoconfig. */
109 int	tcdsmatch __P((struct device *, struct cfdata *, void *));
110 void	tcdsattach __P((struct device *, struct device *, void *));
111 int     tcdsprint __P((void *, const char *));
112 int	tcdssubmatch __P((struct device *, struct cfdata *, void *));
113 
114 struct cfattach tcds_ca = {
115 	sizeof(struct tcds_softc), tcdsmatch, tcdsattach,
116 };
117 
118 /*static*/ int	tcds_intr __P((void *));
119 /*static*/ int	tcds_intrnull __P((void *));
120 
121 struct tcds_device {
122 	const char *td_name;
123 	int td_flags;
124 } tcds_devices[] = {
125 #ifdef __alpha__
126 	{ "PMAZ-DS ",	TCDSF_BASEBOARD },
127 	{ "PMAZ-FS ",	TCDSF_BASEBOARD|TCDSF_FASTSCSI },
128 #endif /* __alpha__ */
129 	{ "PMAZB-AA",	0 },
130 	{ "PMAZC-AA",	TCDSF_FASTSCSI },
131 	{ NULL,		0 },
132 };
133 
134 struct tcds_device *tcds_lookup __P((const char *));
135 void	tcds_params __P((struct tcds_softc *, int, int *, int *));
136 
137 struct tcds_device *
138 tcds_lookup(modname)
139 	const char *modname;
140 {
141 	struct tcds_device *td;
142 
143 	for (td = tcds_devices; td->td_name != NULL; td++)
144 		if (strncmp(td->td_name, modname, TC_ROM_LLEN) == 0)
145 			return (td);
146 
147 	return (NULL);
148 }
149 
150 int
151 tcdsmatch(parent, cfdata, aux)
152 	struct device *parent;
153 	struct cfdata *cfdata;
154 	void *aux;
155 {
156 	struct tc_attach_args *ta = aux;
157 
158 	return (tcds_lookup(ta->ta_modname) != NULL);
159 }
160 
161 void
162 tcdsattach(parent, self, aux)
163 	struct device *parent, *self;
164 	void *aux;
165 {
166 	struct tcds_softc *sc = (struct tcds_softc *)self;
167 	struct tc_attach_args *ta = aux;
168 	struct tcdsdev_attach_args tcdsdev;
169 	struct tcds_slotconfig *slotc;
170 	struct tcds_device *td;
171 	bus_space_handle_t sbsh[2];
172 	int i, gpi2;
173 	const struct evcnt *pevcnt;
174 
175 	td = tcds_lookup(ta->ta_modname);
176 	if (td == NULL)
177 		panic("\ntcdsattach: impossible");
178 
179 	printf(": TurboChannel Dual SCSI");
180 	if (td->td_flags & TCDSF_BASEBOARD)
181 		printf(" (baseboard)");
182 	printf("\n");
183 
184 	sc->sc_flags = td->td_flags;
185 
186 	sc->sc_bst = ta->ta_memt;
187 	sc->sc_dmat = ta->ta_dmat;
188 
189 	/*
190 	 * Map the device.
191 	 */
192 	if (bus_space_map(sc->sc_bst, ta->ta_addr,
193 	    (TCDS_SCSI1_OFFSET + 0x100), 0, &sc->sc_bsh)) {
194 		printf("%s: unable to map device\n", sc->sc_dv.dv_xname);
195 		return;
196 	}
197 
198 	/*
199 	 * Now, slice off two subregions for the individual NCR SCSI chips.
200 	 */
201 	if (bus_space_subregion(sc->sc_bst, sc->sc_bsh, TCDS_SCSI0_OFFSET,
202 	    0x100, &sbsh[0]) ||
203 	    bus_space_subregion(sc->sc_bst, sc->sc_bsh, TCDS_SCSI1_OFFSET,
204 	    0x100, &sbsh[1])) {
205 		printf("%s: unable to subregion SCSI chip space\n",
206 		    sc->sc_dv.dv_xname);
207 		return;
208 	}
209 
210 	sc->sc_cookie = ta->ta_cookie;
211 
212 	pevcnt = tc_intr_evcnt(parent, sc->sc_cookie);
213 	tc_intr_establish(parent, sc->sc_cookie, TC_IPL_BIO, tcds_intr, sc);
214 
215 	/*
216 	 * XXX
217 	 * IMER apparently has some random (or, not so random, but still
218 	 * not useful) bits set in it when the system boots.  Clear it.
219 	 */
220 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER, 0);
221 
222 	/* XXX Initial contents of CIR? */
223 
224 	/*
225 	 * Remember if GPI2 is set in the CIR; we'll need it later.
226 	 */
227 	gpi2 = (bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR) &
228 	    TCDS_CIR_GPI_2) != 0;
229 
230 	/*
231 	 * Set up the per-slot defintions for later use.
232 	 */
233 
234 	/* fill in common information first */
235 	for (i = 0; i < 2; i++) {
236 		char *cp;
237 
238 		slotc = &sc->sc_slots[i];
239 		bzero(slotc, sizeof *slotc);	/* clear everything */
240 
241 		cp = slotc->sc_name;
242 		snprintf(cp, sizeof(slotc->sc_name), "chip %d", i);
243 		evcnt_attach_dynamic(&slotc->sc_evcnt, EVCNT_TYPE_INTR,
244 		    pevcnt, sc->sc_dv.dv_xname, cp);
245 
246 		slotc->sc_slot = i;
247 		slotc->sc_bst = sc->sc_bst;
248 		slotc->sc_bsh = sc->sc_bsh;
249 		slotc->sc_intrhand = tcds_intrnull;
250 		slotc->sc_intrarg = (void *)(long)i;
251 	}
252 
253 	/* information for slot 0 */
254 	slotc = &sc->sc_slots[0];
255 	slotc->sc_resetbits = TCDS_CIR_SCSI0_RESET;
256 	slotc->sc_intrmaskbits =
257 	    TCDS_IMER_SCSI0_MASK | TCDS_IMER_SCSI0_ENB;
258 	slotc->sc_intrbits = TCDS_CIR_SCSI0_INT;
259 	slotc->sc_dmabits = TCDS_CIR_SCSI0_DMAENA;
260 	slotc->sc_errorbits = 0;				/* XXX */
261 	slotc->sc_sda = TCDS_SCSI0_DMA_ADDR;
262 	slotc->sc_dic = TCDS_SCSI0_DMA_INTR;
263 	slotc->sc_dud0 = TCDS_SCSI0_DMA_DUD0;
264 	slotc->sc_dud1 = TCDS_SCSI0_DMA_DUD1;
265 
266 	/* information for slot 1 */
267 	slotc = &sc->sc_slots[1];
268 	slotc->sc_resetbits = TCDS_CIR_SCSI1_RESET;
269 	slotc->sc_intrmaskbits =
270 	    TCDS_IMER_SCSI1_MASK | TCDS_IMER_SCSI1_ENB;
271 	slotc->sc_intrbits = TCDS_CIR_SCSI1_INT;
272 	slotc->sc_dmabits = TCDS_CIR_SCSI1_DMAENA;
273 	slotc->sc_errorbits = 0;				/* XXX */
274 	slotc->sc_sda = TCDS_SCSI1_DMA_ADDR;
275 	slotc->sc_dic = TCDS_SCSI1_DMA_INTR;
276 	slotc->sc_dud0 = TCDS_SCSI1_DMA_DUD0;
277 	slotc->sc_dud1 = TCDS_SCSI1_DMA_DUD1;
278 
279 	/* find the hardware attached to the TCDS ASIC */
280 	for (i = 0; i < 2; i++) {
281 		tcds_params(sc, i, &tcdsdev.tcdsda_id,
282 		    &tcdsdev.tcdsda_fast);
283 
284 		tcdsdev.tcdsda_bst = sc->sc_bst;
285 		tcdsdev.tcdsda_bsh = sbsh[i];
286 		tcdsdev.tcdsda_dmat = sc->sc_dmat;
287 		tcdsdev.tcdsda_chip = i;
288 		tcdsdev.tcdsda_sc = &sc->sc_slots[i];
289 		/*
290 		 * Determine the chip frequency.  TCDSF_FASTSCSI will be set
291 		 * for TC option cards.  For baseboard chips, GPI2 is set, for a
292 		 * 25MHz clock, else a 40MHz clock.
293 		 */
294 		if ((sc->sc_flags & TCDSF_BASEBOARD && gpi2 == 0) ||
295 		    sc->sc_flags & TCDSF_FASTSCSI) {
296 			tcdsdev.tcdsda_freq = 40000000;
297 			tcdsdev.tcdsda_period = tcdsdev.tcdsda_fast ? 4 : 8;
298 		} else {
299 			tcdsdev.tcdsda_freq = 25000000;
300 			tcdsdev.tcdsda_period = 5;
301 		}
302 		if (sc->sc_flags & TCDSF_BASEBOARD)
303 			tcdsdev.tcdsda_variant = NCR_VARIANT_NCR53C94;
304 		else
305 			tcdsdev.tcdsda_variant = NCR_VARIANT_NCR53C96;
306 
307 		tcds_scsi_reset(tcdsdev.tcdsda_sc);
308 
309 		config_found_sm(self, &tcdsdev, tcdsprint, tcdssubmatch);
310 #ifdef __alpha__
311 		/*
312 		 * The second SCSI chip isn't present on the baseboard TCDS
313 		 * on the DEC Alpha 3000/300 series.
314 		 */
315 		if (sc->sc_flags & TCDSF_BASEBOARD &&
316 		    cputype == ST_DEC_3000_300)
317 			break;
318 #endif /* __alpha__ */
319 	}
320 }
321 
322 int
323 tcdssubmatch(parent, cf, aux)
324 	struct device *parent;
325 	struct cfdata *cf;
326 	void *aux;
327 {
328 	struct tcdsdev_attach_args *tcdsdev = aux;
329 
330 	if (cf->cf_loc[TCDSCF_CHIP] != TCDSCF_CHIP_DEFAULT &&
331 	    cf->cf_loc[TCDSCF_CHIP] != tcdsdev->tcdsda_chip)
332 		return (0);
333 
334 	return ((*cf->cf_attach->ca_match)(parent, cf, aux));
335 }
336 
337 int
338 tcdsprint(aux, pnp)
339 	void *aux;
340 	const char *pnp;
341 {
342 	struct tcdsdev_attach_args *tcdsdev = aux;
343 
344 	/* Only ASCs can attach to TCDSs; easy. */
345 	if (pnp)
346 		printf("asc at %s", pnp);
347 
348 	printf(" chip %d", tcdsdev->tcdsda_chip);
349 
350 	return (UNCONF);
351 }
352 
353 void
354 tcds_intr_establish(tcds, slot, func, arg)
355 	struct device *tcds;
356 	int slot;
357 	int (*func) __P((void *));
358 	void *arg;
359 {
360 	struct tcds_softc *sc = (struct tcds_softc *)tcds;
361 
362 	if (sc->sc_slots[slot].sc_intrhand != tcds_intrnull)
363 		panic("tcds_intr_establish: chip %d twice", slot);
364 
365 	sc->sc_slots[slot].sc_intrhand = func;
366 	sc->sc_slots[slot].sc_intrarg = arg;
367 	tcds_scsi_reset(&sc->sc_slots[slot]);
368 }
369 
370 void
371 tcds_intr_disestablish(tcds, slot)
372 	struct device *tcds;
373 	int slot;
374 {
375 	struct tcds_softc *sc = (struct tcds_softc *)tcds;
376 
377 	if (sc->sc_slots[slot].sc_intrhand == tcds_intrnull)
378 		panic("tcds_intr_disestablish: chip %d missing intr",
379 		    slot);
380 
381 	sc->sc_slots[slot].sc_intrhand = tcds_intrnull;
382 	sc->sc_slots[slot].sc_intrarg = (void *)(u_long)slot;
383 
384 	tcds_dma_enable(&sc->sc_slots[slot], 0);
385 	tcds_scsi_enable(&sc->sc_slots[slot], 0);
386 }
387 
388 int
389 tcds_intrnull(val)
390 	void *val;
391 {
392 
393 	panic("tcds_intrnull: uncaught TCDS intr for chip %lu\n",
394 	    (u_long)val);
395 }
396 
397 void
398 tcds_scsi_reset(sc)
399 	struct tcds_slotconfig *sc;
400 {
401 	u_int32_t cir;
402 
403 	tcds_dma_enable(sc, 0);
404 	tcds_scsi_enable(sc, 0);
405 
406 	cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
407 	TCDS_CIR_CLR(cir, sc->sc_resetbits);
408 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir);
409 
410 	DELAY(1);
411 
412 	cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
413 	TCDS_CIR_SET(cir, sc->sc_resetbits);
414 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir);
415 
416 	tcds_scsi_enable(sc, 1);
417 	tcds_dma_enable(sc, 1);
418 }
419 
420 void
421 tcds_scsi_enable(sc, on)
422 	struct tcds_slotconfig *sc;
423 	int on;
424 {
425 	u_int32_t imer;
426 
427 	imer = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER);
428 
429 	if (on)
430 		imer |= sc->sc_intrmaskbits;
431 	else
432 		imer &= ~sc->sc_intrmaskbits;
433 
434 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER, imer);
435 }
436 
437 void
438 tcds_dma_enable(sc, on)
439 	struct tcds_slotconfig *sc;
440 	int on;
441 {
442 	u_int32_t cir;
443 
444 	cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
445 
446 	/* XXX Clear/set IOSLOT/PBS bits. */
447 	if (on)
448 		TCDS_CIR_SET(cir, sc->sc_dmabits);
449 	else
450 		TCDS_CIR_CLR(cir, sc->sc_dmabits);
451 
452 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir);
453 }
454 
455 int
456 tcds_scsi_isintr(sc, clear)
457 	struct tcds_slotconfig *sc;
458 	int clear;
459 {
460 	u_int32_t cir;
461 
462 	cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
463 
464 	if ((cir & sc->sc_intrbits) != 0) {
465 		if (clear) {
466 			TCDS_CIR_CLR(cir, sc->sc_intrbits);
467 			bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR,
468 			    cir);
469 		}
470 		return (1);
471 	} else
472 		return (0);
473 }
474 
475 int
476 tcds_scsi_iserr(sc)
477 	struct tcds_slotconfig *sc;
478 {
479 	u_int32_t cir;
480 
481 	cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
482 	return ((cir & sc->sc_errorbits) != 0);
483 }
484 
485 int
486 tcds_intr(arg)
487 	void *arg;
488 {
489 	struct tcds_softc *sc = arg;
490 	u_int32_t ir, ir0;
491 
492 	/*
493 	 * XXX
494 	 * Copy and clear (gag!) the interrupts.
495 	 */
496 	ir = ir0 = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
497 	TCDS_CIR_CLR(ir0, TCDS_CIR_ALLINTR);
498 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, ir0);
499 	tc_syncbus();
500 
501 #define	INCRINTRCNT(slot)	sc->sc_slots[slot].sc_evcnt.ev_count++
502 
503 #define	CHECKINTR(slot)							\
504 	if (ir & sc->sc_slots[slot].sc_intrbits) {			\
505 		INCRINTRCNT(slot);					\
506 		(void)(*sc->sc_slots[slot].sc_intrhand)			\
507 		    (sc->sc_slots[slot].sc_intrarg);			\
508 	}
509 	CHECKINTR(0);
510 	CHECKINTR(1);
511 #undef CHECKINTR
512 
513 #ifdef DIAGNOSTIC
514 	/*
515 	 * Interrupts not currently handled, but would like to know if they
516 	 * occur.
517 	 *
518 	 * XXX
519 	 * Don't know if we have to set the interrupt mask and enable bits
520 	 * in the IMER to allow some of them to happen?
521 	 */
522 #define	PRINTINTR(msg, bits)						\
523 	if (ir & bits)							\
524 		printf("%s: %s", sc->sc_dv.dv_xname, msg);
525 	PRINTINTR("SCSI0 DREQ interrupt.\n", TCDS_CIR_SCSI0_DREQ);
526 	PRINTINTR("SCSI1 DREQ interrupt.\n", TCDS_CIR_SCSI1_DREQ);
527 	PRINTINTR("SCSI0 prefetch interrupt.\n", TCDS_CIR_SCSI0_PREFETCH);
528 	PRINTINTR("SCSI1 prefetch interrupt.\n", TCDS_CIR_SCSI1_PREFETCH);
529 	PRINTINTR("SCSI0 DMA error.\n", TCDS_CIR_SCSI0_DMA);
530 	PRINTINTR("SCSI1 DMA error.\n", TCDS_CIR_SCSI1_DMA);
531 	PRINTINTR("SCSI0 DB parity error.\n", TCDS_CIR_SCSI0_DB);
532 	PRINTINTR("SCSI1 DB parity error.\n", TCDS_CIR_SCSI1_DB);
533 	PRINTINTR("SCSI0 DMA buffer parity error.\n", TCDS_CIR_SCSI0_DMAB_PAR);
534 	PRINTINTR("SCSI1 DMA buffer parity error.\n", TCDS_CIR_SCSI1_DMAB_PAR);
535 	PRINTINTR("SCSI0 DMA read parity error.\n", TCDS_CIR_SCSI0_DMAR_PAR);
536 	PRINTINTR("SCSI1 DMA read parity error.\n", TCDS_CIR_SCSI1_DMAR_PAR);
537 	PRINTINTR("TC write parity error.\n", TCDS_CIR_TCIOW_PAR);
538 	PRINTINTR("TC I/O address parity error.\n", TCDS_CIR_TCIOA_PAR);
539 #undef PRINTINTR
540 #endif
541 
542 	/*
543 	 * XXX
544 	 * The MACH source had this, with the comment:
545 	 *	This is wrong, but machine keeps dying.
546 	 */
547 	DELAY(1);
548 
549 	return (1);
550 }
551 
552 void
553 tcds_params(sc, chip, idp, fastp)
554 	struct tcds_softc *sc;
555 	int chip, *idp, *fastp;
556 {
557 	int id, fast;
558 	u_int32_t ids;
559 
560 #ifdef __alpha__
561 	if (sc->sc_flags & TCDSF_BASEBOARD) {
562 		extern u_int8_t dec_3000_scsiid[], dec_3000_scsifast[];
563 
564 		id = dec_3000_scsiid[chip];
565 		fast = dec_3000_scsifast[chip];
566 	} else
567 #endif /* __alpha__ */
568 	{
569 		/*
570 		 * SCSI IDs are stored in the EEPROM, along with whether or
571 		 * not the device is "fast".  Chip 0 is the high nibble,
572 		 * chip 1 the low nibble.
573 		 */
574 		ids = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_EEPROM_IDS);
575 		if (chip == 0)
576 			ids >>= 4;
577 
578 		id = ids & 0x7;
579 		fast = ids & 0x8;
580 	}
581 
582 	if (id < 0 || id > 7) {
583 		printf("%s: WARNING: bad SCSI ID %d for chip %d, using 7\n",
584 		    sc->sc_dv.dv_xname, id, chip);
585 		id = 7;
586 	}
587 
588 	if (fast)
589 		printf("%s: fast mode set for chip %d\n",
590 		    sc->sc_dv.dv_xname, chip);
591 
592 	*idp = id;
593 	*fastp = fast;
594 }
595