1*677dec6eSriastradh /* $NetBSD: smumgr.h,v 1.2 2021/12/18 23:45:26 riastradh Exp $ */ 21571a7a1Sriastradh 31571a7a1Sriastradh /* 41571a7a1Sriastradh * Copyright 2015 Advanced Micro Devices, Inc. 51571a7a1Sriastradh * 61571a7a1Sriastradh * Permission is hereby granted, free of charge, to any person obtaining a 71571a7a1Sriastradh * copy of this software and associated documentation files (the "Software"), 81571a7a1Sriastradh * to deal in the Software without restriction, including without limitation 91571a7a1Sriastradh * the rights to use, copy, modify, merge, publish, distribute, sublicense, 101571a7a1Sriastradh * and/or sell copies of the Software, and to permit persons to whom the 111571a7a1Sriastradh * Software is furnished to do so, subject to the following conditions: 121571a7a1Sriastradh * 131571a7a1Sriastradh * The above copyright notice and this permission notice shall be included in 141571a7a1Sriastradh * all copies or substantial portions of the Software. 151571a7a1Sriastradh * 161571a7a1Sriastradh * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 171571a7a1Sriastradh * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 181571a7a1Sriastradh * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 191571a7a1Sriastradh * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 201571a7a1Sriastradh * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 211571a7a1Sriastradh * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 221571a7a1Sriastradh * OTHER DEALINGS IN THE SOFTWARE. 231571a7a1Sriastradh * 241571a7a1Sriastradh */ 251571a7a1Sriastradh #ifndef _SMUMGR_H_ 261571a7a1Sriastradh #define _SMUMGR_H_ 271571a7a1Sriastradh #include <linux/types.h> 281571a7a1Sriastradh #include "amd_powerplay.h" 291571a7a1Sriastradh #include "hwmgr.h" 301571a7a1Sriastradh 311571a7a1Sriastradh enum SMU_TABLE { 321571a7a1Sriastradh SMU_UVD_TABLE = 0, 331571a7a1Sriastradh SMU_VCE_TABLE, 341571a7a1Sriastradh SMU_BIF_TABLE, 351571a7a1Sriastradh }; 361571a7a1Sriastradh 371571a7a1Sriastradh enum SMU_TYPE { 381571a7a1Sriastradh SMU_SoftRegisters = 0, 391571a7a1Sriastradh SMU_Discrete_DpmTable, 401571a7a1Sriastradh }; 411571a7a1Sriastradh 421571a7a1Sriastradh enum SMU_MEMBER { 431571a7a1Sriastradh HandshakeDisables = 0, 441571a7a1Sriastradh VoltageChangeTimeout, 451571a7a1Sriastradh AverageGraphicsActivity, 461571a7a1Sriastradh AverageMemoryActivity, 471571a7a1Sriastradh PreVBlankGap, 481571a7a1Sriastradh VBlankTimeout, 491571a7a1Sriastradh UcodeLoadStatus, 501571a7a1Sriastradh UvdBootLevel, 511571a7a1Sriastradh VceBootLevel, 521571a7a1Sriastradh LowSclkInterruptThreshold, 531571a7a1Sriastradh DRAM_LOG_ADDR_H, 541571a7a1Sriastradh DRAM_LOG_ADDR_L, 551571a7a1Sriastradh DRAM_LOG_PHY_ADDR_H, 561571a7a1Sriastradh DRAM_LOG_PHY_ADDR_L, 571571a7a1Sriastradh DRAM_LOG_BUFF_SIZE, 581571a7a1Sriastradh }; 591571a7a1Sriastradh 601571a7a1Sriastradh 611571a7a1Sriastradh enum SMU_MAC_DEFINITION { 621571a7a1Sriastradh SMU_MAX_LEVELS_GRAPHICS = 0, 631571a7a1Sriastradh SMU_MAX_LEVELS_MEMORY, 641571a7a1Sriastradh SMU_MAX_LEVELS_LINK, 651571a7a1Sriastradh SMU_MAX_ENTRIES_SMIO, 661571a7a1Sriastradh SMU_MAX_LEVELS_VDDC, 671571a7a1Sriastradh SMU_MAX_LEVELS_VDDGFX, 681571a7a1Sriastradh SMU_MAX_LEVELS_VDDCI, 691571a7a1Sriastradh SMU_MAX_LEVELS_MVDD, 701571a7a1Sriastradh SMU_UVD_MCLK_HANDSHAKE_DISABLE, 711571a7a1Sriastradh }; 721571a7a1Sriastradh 731571a7a1Sriastradh enum SMU9_TABLE_ID { 741571a7a1Sriastradh PPTABLE = 0, 751571a7a1Sriastradh WMTABLE, 761571a7a1Sriastradh AVFSTABLE, 771571a7a1Sriastradh TOOLSTABLE, 781571a7a1Sriastradh AVFSFUSETABLE 791571a7a1Sriastradh }; 801571a7a1Sriastradh 811571a7a1Sriastradh enum SMU10_TABLE_ID { 821571a7a1Sriastradh SMU10_WMTABLE = 0, 831571a7a1Sriastradh SMU10_CLOCKTABLE, 841571a7a1Sriastradh }; 851571a7a1Sriastradh 861571a7a1Sriastradh extern uint32_t smum_get_argument(struct pp_hwmgr *hwmgr); 871571a7a1Sriastradh 881571a7a1Sriastradh extern int smum_download_powerplay_table(struct pp_hwmgr *hwmgr, void **table); 891571a7a1Sriastradh 901571a7a1Sriastradh extern int smum_upload_powerplay_table(struct pp_hwmgr *hwmgr); 911571a7a1Sriastradh 921571a7a1Sriastradh extern int smum_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg); 931571a7a1Sriastradh 941571a7a1Sriastradh extern int smum_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr, 951571a7a1Sriastradh uint16_t msg, uint32_t parameter); 961571a7a1Sriastradh 971571a7a1Sriastradh extern int smum_update_sclk_threshold(struct pp_hwmgr *hwmgr); 981571a7a1Sriastradh 991571a7a1Sriastradh extern int smum_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type); 1001571a7a1Sriastradh extern int smum_process_firmware_header(struct pp_hwmgr *hwmgr); 1011571a7a1Sriastradh extern int smum_thermal_avfs_enable(struct pp_hwmgr *hwmgr); 1021571a7a1Sriastradh extern int smum_thermal_setup_fan_table(struct pp_hwmgr *hwmgr); 1031571a7a1Sriastradh extern int smum_init_smc_table(struct pp_hwmgr *hwmgr); 1041571a7a1Sriastradh extern int smum_populate_all_graphic_levels(struct pp_hwmgr *hwmgr); 1051571a7a1Sriastradh extern int smum_populate_all_memory_levels(struct pp_hwmgr *hwmgr); 1061571a7a1Sriastradh extern int smum_initialize_mc_reg_table(struct pp_hwmgr *hwmgr); 1071571a7a1Sriastradh extern uint32_t smum_get_offsetof(struct pp_hwmgr *hwmgr, 1081571a7a1Sriastradh uint32_t type, uint32_t member); 1091571a7a1Sriastradh extern uint32_t smum_get_mac_definition(struct pp_hwmgr *hwmgr, uint32_t value); 1101571a7a1Sriastradh 1111571a7a1Sriastradh extern bool smum_is_dpm_running(struct pp_hwmgr *hwmgr); 1121571a7a1Sriastradh 1131571a7a1Sriastradh extern bool smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr); 1141571a7a1Sriastradh 1151571a7a1Sriastradh extern int smum_update_dpm_settings(struct pp_hwmgr *hwmgr, void *profile_setting); 1161571a7a1Sriastradh 1171571a7a1Sriastradh extern int smum_smc_table_manager(struct pp_hwmgr *hwmgr, uint8_t *table, uint16_t table_id, bool rw); 1181571a7a1Sriastradh 1191571a7a1Sriastradh #endif 120