1 /* 2 * Copyright (c) 2006 Luc Verhaegen (quirks list) 3 * Copyright (c) 2007-2008 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * Copyright 2010 Red Hat, Inc. 6 * 7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from 8 * FB layer. 9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com> 10 * 11 * Permission is hereby granted, free of charge, to any person obtaining a 12 * copy of this software and associated documentation files (the "Software"), 13 * to deal in the Software without restriction, including without limitation 14 * the rights to use, copy, modify, merge, publish, distribute, sub license, 15 * and/or sell copies of the Software, and to permit persons to whom the 16 * Software is furnished to do so, subject to the following conditions: 17 * 18 * The above copyright notice and this permission notice (including the 19 * next paragraph) shall be included in all copies or substantial portions 20 * of the Software. 21 * 22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 28 * DEALINGS IN THE SOFTWARE. 29 */ 30 #include <linux/kernel.h> 31 #include <linux/slab.h> 32 #include <linux/hdmi.h> 33 #include <linux/i2c.h> 34 #include <linux/module.h> 35 #include <linux/moduleparam.h> 36 #include <linux/export.h> 37 #include <linux/printk.h> 38 #include <linux/device.h> 39 #include <linux/string.h> 40 #include <asm/byteorder.h> 41 #include <drm/drmP.h> 42 #include <drm/drm_edid.h> 43 44 #define version_greater(edid, maj, min) \ 45 (((edid)->version > (maj)) || \ 46 ((edid)->version == (maj) && (edid)->revision > (min))) 47 48 #define EDID_EST_TIMINGS 16 49 #define EDID_STD_TIMINGS 8 50 #define EDID_DETAILED_TIMINGS 4 51 52 /* 53 * EDID blocks out in the wild have a variety of bugs, try to collect 54 * them here (note that userspace may work around broken monitors first, 55 * but fixes should make their way here so that the kernel "just works" 56 * on as many displays as possible). 57 */ 58 59 /* First detailed mode wrong, use largest 60Hz mode */ 60 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0) 61 /* Reported 135MHz pixel clock is too high, needs adjustment */ 62 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1) 63 /* Prefer the largest mode at 75 Hz */ 64 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2) 65 /* Detail timing is in cm not mm */ 66 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3) 67 /* Detailed timing descriptors have bogus size values, so just take the 68 * maximum size and use that. 69 */ 70 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4) 71 /* Monitor forgot to set the first detailed is preferred bit. */ 72 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5) 73 /* use +hsync +vsync for detailed mode */ 74 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6) 75 /* Force reduced-blanking timings for detailed modes */ 76 #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7) 77 /* Force 8bpc */ 78 #define EDID_QUIRK_FORCE_8BPC (1 << 8) 79 80 struct detailed_mode_closure { 81 struct drm_connector *connector; 82 struct edid *edid; 83 bool preferred; 84 u32 quirks; 85 int modes; 86 }; 87 88 #define LEVEL_DMT 0 89 #define LEVEL_GTF 1 90 #define LEVEL_GTF2 2 91 #define LEVEL_CVT 3 92 93 static struct edid_quirk { 94 char vendor[4]; 95 int product_id; 96 u32 quirks; 97 } edid_quirk_list[] = { 98 /* Acer AL1706 */ 99 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 }, 100 /* Acer F51 */ 101 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 }, 102 /* Unknown Acer */ 103 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 104 105 /* Belinea 10 15 55 */ 106 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 }, 107 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 }, 108 109 /* Envision Peripherals, Inc. EN-7100e */ 110 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, 111 /* Envision EN2028 */ 112 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 }, 113 114 /* Funai Electronics PM36B */ 115 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | 116 EDID_QUIRK_DETAILED_IN_CM }, 117 118 /* LG Philips LCD LP154W01-A5 */ 119 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 120 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 121 122 /* Philips 107p5 CRT */ 123 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 124 125 /* Proview AY765C */ 126 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 127 128 /* Samsung SyncMaster 205BW. Note: irony */ 129 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP }, 130 /* Samsung SyncMaster 22[5-6]BW */ 131 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 }, 132 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 }, 133 134 /* ViewSonic VA2026w */ 135 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING }, 136 137 /* Medion MD 30217 PG */ 138 { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 }, 139 140 /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */ 141 { "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC }, 142 }; 143 144 /* 145 * Autogenerated from the DMT spec. 146 * This table is copied from xfree86/modes/xf86EdidModes.c. 147 */ 148 static const struct drm_display_mode drm_dmt_modes[] = { 149 /* 640x350@85Hz */ 150 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, 151 736, 832, 0, 350, 382, 385, 445, 0, 152 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 153 /* 640x400@85Hz */ 154 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, 155 736, 832, 0, 400, 401, 404, 445, 0, 156 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 157 /* 720x400@85Hz */ 158 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756, 159 828, 936, 0, 400, 401, 404, 446, 0, 160 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 161 /* 640x480@60Hz */ 162 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, 163 752, 800, 0, 480, 489, 492, 525, 0, 164 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 165 /* 640x480@72Hz */ 166 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, 167 704, 832, 0, 480, 489, 492, 520, 0, 168 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 169 /* 640x480@75Hz */ 170 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, 171 720, 840, 0, 480, 481, 484, 500, 0, 172 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 173 /* 640x480@85Hz */ 174 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696, 175 752, 832, 0, 480, 481, 484, 509, 0, 176 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 177 /* 800x600@56Hz */ 178 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, 179 896, 1024, 0, 600, 601, 603, 625, 0, 180 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 181 /* 800x600@60Hz */ 182 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, 183 968, 1056, 0, 600, 601, 605, 628, 0, 184 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 185 /* 800x600@72Hz */ 186 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, 187 976, 1040, 0, 600, 637, 643, 666, 0, 188 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 189 /* 800x600@75Hz */ 190 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, 191 896, 1056, 0, 600, 601, 604, 625, 0, 192 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 193 /* 800x600@85Hz */ 194 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832, 195 896, 1048, 0, 600, 601, 604, 631, 0, 196 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 197 /* 800x600@120Hz RB */ 198 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848, 199 880, 960, 0, 600, 603, 607, 636, 0, 200 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 201 /* 848x480@60Hz */ 202 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864, 203 976, 1088, 0, 480, 486, 494, 517, 0, 204 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 205 /* 1024x768@43Hz, interlace */ 206 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032, 207 1208, 1264, 0, 768, 768, 772, 817, 0, 208 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 209 DRM_MODE_FLAG_INTERLACE) }, 210 /* 1024x768@60Hz */ 211 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, 212 1184, 1344, 0, 768, 771, 777, 806, 0, 213 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 214 /* 1024x768@70Hz */ 215 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, 216 1184, 1328, 0, 768, 771, 777, 806, 0, 217 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 218 /* 1024x768@75Hz */ 219 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040, 220 1136, 1312, 0, 768, 769, 772, 800, 0, 221 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 222 /* 1024x768@85Hz */ 223 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072, 224 1168, 1376, 0, 768, 769, 772, 808, 0, 225 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 226 /* 1024x768@120Hz RB */ 227 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072, 228 1104, 1184, 0, 768, 771, 775, 813, 0, 229 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 230 /* 1152x864@75Hz */ 231 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, 232 1344, 1600, 0, 864, 865, 868, 900, 0, 233 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 234 /* 1280x768@60Hz RB */ 235 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328, 236 1360, 1440, 0, 768, 771, 778, 790, 0, 237 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 238 /* 1280x768@60Hz */ 239 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344, 240 1472, 1664, 0, 768, 771, 778, 798, 0, 241 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 242 /* 1280x768@75Hz */ 243 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360, 244 1488, 1696, 0, 768, 771, 778, 805, 0, 245 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 246 /* 1280x768@85Hz */ 247 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360, 248 1496, 1712, 0, 768, 771, 778, 809, 0, 249 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 250 /* 1280x768@120Hz RB */ 251 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328, 252 1360, 1440, 0, 768, 771, 778, 813, 0, 253 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 254 /* 1280x800@60Hz RB */ 255 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328, 256 1360, 1440, 0, 800, 803, 809, 823, 0, 257 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 258 /* 1280x800@60Hz */ 259 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352, 260 1480, 1680, 0, 800, 803, 809, 831, 0, 261 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 262 /* 1280x800@75Hz */ 263 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360, 264 1488, 1696, 0, 800, 803, 809, 838, 0, 265 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 266 /* 1280x800@85Hz */ 267 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360, 268 1496, 1712, 0, 800, 803, 809, 843, 0, 269 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 270 /* 1280x800@120Hz RB */ 271 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328, 272 1360, 1440, 0, 800, 803, 809, 847, 0, 273 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 274 /* 1280x960@60Hz */ 275 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376, 276 1488, 1800, 0, 960, 961, 964, 1000, 0, 277 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 278 /* 1280x960@85Hz */ 279 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344, 280 1504, 1728, 0, 960, 961, 964, 1011, 0, 281 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 282 /* 1280x960@120Hz RB */ 283 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328, 284 1360, 1440, 0, 960, 963, 967, 1017, 0, 285 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 286 /* 1280x1024@60Hz */ 287 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328, 288 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 289 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 290 /* 1280x1024@75Hz */ 291 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, 292 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 293 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 294 /* 1280x1024@85Hz */ 295 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344, 296 1504, 1728, 0, 1024, 1025, 1028, 1072, 0, 297 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 298 /* 1280x1024@120Hz RB */ 299 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328, 300 1360, 1440, 0, 1024, 1027, 1034, 1084, 0, 301 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 302 /* 1360x768@60Hz */ 303 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424, 304 1536, 1792, 0, 768, 771, 777, 795, 0, 305 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 306 /* 1360x768@120Hz RB */ 307 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408, 308 1440, 1520, 0, 768, 771, 776, 813, 0, 309 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 310 /* 1400x1050@60Hz RB */ 311 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448, 312 1480, 1560, 0, 1050, 1053, 1057, 1080, 0, 313 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 314 /* 1400x1050@60Hz */ 315 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488, 316 1632, 1864, 0, 1050, 1053, 1057, 1089, 0, 317 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 318 /* 1400x1050@75Hz */ 319 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504, 320 1648, 1896, 0, 1050, 1053, 1057, 1099, 0, 321 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 322 /* 1400x1050@85Hz */ 323 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504, 324 1656, 1912, 0, 1050, 1053, 1057, 1105, 0, 325 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 326 /* 1400x1050@120Hz RB */ 327 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448, 328 1480, 1560, 0, 1050, 1053, 1057, 1112, 0, 329 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 330 /* 1440x900@60Hz RB */ 331 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488, 332 1520, 1600, 0, 900, 903, 909, 926, 0, 333 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 334 /* 1440x900@60Hz */ 335 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520, 336 1672, 1904, 0, 900, 903, 909, 934, 0, 337 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 338 /* 1440x900@75Hz */ 339 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536, 340 1688, 1936, 0, 900, 903, 909, 942, 0, 341 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 342 /* 1440x900@85Hz */ 343 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544, 344 1696, 1952, 0, 900, 903, 909, 948, 0, 345 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 346 /* 1440x900@120Hz RB */ 347 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488, 348 1520, 1600, 0, 900, 903, 909, 953, 0, 349 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 350 /* 1600x1200@60Hz */ 351 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664, 352 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 353 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 354 /* 1600x1200@65Hz */ 355 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664, 356 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 357 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 358 /* 1600x1200@70Hz */ 359 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664, 360 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 361 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 362 /* 1600x1200@75Hz */ 363 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664, 364 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 365 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 366 /* 1600x1200@85Hz */ 367 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664, 368 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 369 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 370 /* 1600x1200@120Hz RB */ 371 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648, 372 1680, 1760, 0, 1200, 1203, 1207, 1271, 0, 373 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 374 /* 1680x1050@60Hz RB */ 375 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728, 376 1760, 1840, 0, 1050, 1053, 1059, 1080, 0, 377 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 378 /* 1680x1050@60Hz */ 379 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784, 380 1960, 2240, 0, 1050, 1053, 1059, 1089, 0, 381 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 382 /* 1680x1050@75Hz */ 383 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800, 384 1976, 2272, 0, 1050, 1053, 1059, 1099, 0, 385 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 386 /* 1680x1050@85Hz */ 387 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808, 388 1984, 2288, 0, 1050, 1053, 1059, 1105, 0, 389 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 390 /* 1680x1050@120Hz RB */ 391 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728, 392 1760, 1840, 0, 1050, 1053, 1059, 1112, 0, 393 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 394 /* 1792x1344@60Hz */ 395 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920, 396 2120, 2448, 0, 1344, 1345, 1348, 1394, 0, 397 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 398 /* 1792x1344@75Hz */ 399 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888, 400 2104, 2456, 0, 1344, 1345, 1348, 1417, 0, 401 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 402 /* 1792x1344@120Hz RB */ 403 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840, 404 1872, 1952, 0, 1344, 1347, 1351, 1423, 0, 405 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 406 /* 1856x1392@60Hz */ 407 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952, 408 2176, 2528, 0, 1392, 1393, 1396, 1439, 0, 409 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 410 /* 1856x1392@75Hz */ 411 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984, 412 2208, 2560, 0, 1392, 1395, 1399, 1500, 0, 413 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 414 /* 1856x1392@120Hz RB */ 415 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904, 416 1936, 2016, 0, 1392, 1395, 1399, 1474, 0, 417 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 418 /* 1920x1200@60Hz RB */ 419 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968, 420 2000, 2080, 0, 1200, 1203, 1209, 1235, 0, 421 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 422 /* 1920x1200@60Hz */ 423 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056, 424 2256, 2592, 0, 1200, 1203, 1209, 1245, 0, 425 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 426 /* 1920x1200@75Hz */ 427 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056, 428 2264, 2608, 0, 1200, 1203, 1209, 1255, 0, 429 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 430 /* 1920x1200@85Hz */ 431 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064, 432 2272, 2624, 0, 1200, 1203, 1209, 1262, 0, 433 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 434 /* 1920x1200@120Hz RB */ 435 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968, 436 2000, 2080, 0, 1200, 1203, 1209, 1271, 0, 437 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 438 /* 1920x1440@60Hz */ 439 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048, 440 2256, 2600, 0, 1440, 1441, 1444, 1500, 0, 441 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 442 /* 1920x1440@75Hz */ 443 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064, 444 2288, 2640, 0, 1440, 1441, 1444, 1500, 0, 445 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 446 /* 1920x1440@120Hz RB */ 447 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968, 448 2000, 2080, 0, 1440, 1443, 1447, 1525, 0, 449 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 450 /* 2560x1600@60Hz RB */ 451 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608, 452 2640, 2720, 0, 1600, 1603, 1609, 1646, 0, 453 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 454 /* 2560x1600@60Hz */ 455 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752, 456 3032, 3504, 0, 1600, 1603, 1609, 1658, 0, 457 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 458 /* 2560x1600@75HZ */ 459 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768, 460 3048, 3536, 0, 1600, 1603, 1609, 1672, 0, 461 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 462 /* 2560x1600@85HZ */ 463 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768, 464 3048, 3536, 0, 1600, 1603, 1609, 1682, 0, 465 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 466 /* 2560x1600@120Hz RB */ 467 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608, 468 2640, 2720, 0, 1600, 1603, 1609, 1694, 0, 469 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 470 }; 471 472 /* 473 * These more or less come from the DMT spec. The 720x400 modes are 474 * inferred from historical 80x25 practice. The 640x480@67 and 832x624@75 475 * modes are old-school Mac modes. The EDID spec says the 1152x864@75 mode 476 * should be 1152x870, again for the Mac, but instead we use the x864 DMT 477 * mode. 478 * 479 * The DMT modes have been fact-checked; the rest are mild guesses. 480 */ 481 static const struct drm_display_mode edid_est_modes[] = { 482 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, 483 968, 1056, 0, 600, 601, 605, 628, 0, 484 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */ 485 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, 486 896, 1024, 0, 600, 601, 603, 625, 0, 487 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */ 488 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, 489 720, 840, 0, 480, 481, 484, 500, 0, 490 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */ 491 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, 492 704, 832, 0, 480, 489, 491, 520, 0, 493 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */ 494 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704, 495 768, 864, 0, 480, 483, 486, 525, 0, 496 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */ 497 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656, 498 752, 800, 0, 480, 490, 492, 525, 0, 499 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */ 500 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738, 501 846, 900, 0, 400, 421, 423, 449, 0, 502 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */ 503 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738, 504 846, 900, 0, 400, 412, 414, 449, 0, 505 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */ 506 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, 507 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 508 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */ 509 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040, 510 1136, 1312, 0, 768, 769, 772, 800, 0, 511 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */ 512 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, 513 1184, 1328, 0, 768, 771, 777, 806, 0, 514 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */ 515 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, 516 1184, 1344, 0, 768, 771, 777, 806, 0, 517 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */ 518 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032, 519 1208, 1264, 0, 768, 768, 776, 817, 0, 520 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */ 521 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864, 522 928, 1152, 0, 624, 625, 628, 667, 0, 523 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */ 524 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, 525 896, 1056, 0, 600, 601, 604, 625, 0, 526 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */ 527 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, 528 976, 1040, 0, 600, 637, 643, 666, 0, 529 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */ 530 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, 531 1344, 1600, 0, 864, 865, 868, 900, 0, 532 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */ 533 }; 534 535 struct minimode { 536 short w; 537 short h; 538 short r; 539 short rb; 540 }; 541 542 static const struct minimode est3_modes[] = { 543 /* byte 6 */ 544 { 640, 350, 85, 0 }, 545 { 640, 400, 85, 0 }, 546 { 720, 400, 85, 0 }, 547 { 640, 480, 85, 0 }, 548 { 848, 480, 60, 0 }, 549 { 800, 600, 85, 0 }, 550 { 1024, 768, 85, 0 }, 551 { 1152, 864, 75, 0 }, 552 /* byte 7 */ 553 { 1280, 768, 60, 1 }, 554 { 1280, 768, 60, 0 }, 555 { 1280, 768, 75, 0 }, 556 { 1280, 768, 85, 0 }, 557 { 1280, 960, 60, 0 }, 558 { 1280, 960, 85, 0 }, 559 { 1280, 1024, 60, 0 }, 560 { 1280, 1024, 85, 0 }, 561 /* byte 8 */ 562 { 1360, 768, 60, 0 }, 563 { 1440, 900, 60, 1 }, 564 { 1440, 900, 60, 0 }, 565 { 1440, 900, 75, 0 }, 566 { 1440, 900, 85, 0 }, 567 { 1400, 1050, 60, 1 }, 568 { 1400, 1050, 60, 0 }, 569 { 1400, 1050, 75, 0 }, 570 /* byte 9 */ 571 { 1400, 1050, 85, 0 }, 572 { 1680, 1050, 60, 1 }, 573 { 1680, 1050, 60, 0 }, 574 { 1680, 1050, 75, 0 }, 575 { 1680, 1050, 85, 0 }, 576 { 1600, 1200, 60, 0 }, 577 { 1600, 1200, 65, 0 }, 578 { 1600, 1200, 70, 0 }, 579 /* byte 10 */ 580 { 1600, 1200, 75, 0 }, 581 { 1600, 1200, 85, 0 }, 582 { 1792, 1344, 60, 0 }, 583 { 1792, 1344, 75, 0 }, 584 { 1856, 1392, 60, 0 }, 585 { 1856, 1392, 75, 0 }, 586 { 1920, 1200, 60, 1 }, 587 { 1920, 1200, 60, 0 }, 588 /* byte 11 */ 589 { 1920, 1200, 75, 0 }, 590 { 1920, 1200, 85, 0 }, 591 { 1920, 1440, 60, 0 }, 592 { 1920, 1440, 75, 0 }, 593 }; 594 595 static const struct minimode extra_modes[] = { 596 { 1024, 576, 60, 0 }, 597 { 1366, 768, 60, 0 }, 598 { 1600, 900, 60, 0 }, 599 { 1680, 945, 60, 0 }, 600 { 1920, 1080, 60, 0 }, 601 { 2048, 1152, 60, 0 }, 602 { 2048, 1536, 60, 0 }, 603 }; 604 605 /* 606 * Probably taken from CEA-861 spec. 607 * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c. 608 */ 609 static const struct drm_display_mode edid_cea_modes[] = { 610 /* 1 - 640x480@60Hz */ 611 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, 612 752, 800, 0, 480, 490, 492, 525, 0, 613 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 614 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, 615 /* 2 - 720x480@60Hz */ 616 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736, 617 798, 858, 0, 480, 489, 495, 525, 0, 618 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 619 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, 620 /* 3 - 720x480@60Hz */ 621 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736, 622 798, 858, 0, 480, 489, 495, 525, 0, 623 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 624 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 625 /* 4 - 1280x720@60Hz */ 626 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390, 627 1430, 1650, 0, 720, 725, 730, 750, 0, 628 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 629 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 630 /* 5 - 1920x1080i@60Hz */ 631 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, 632 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, 633 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 634 DRM_MODE_FLAG_INTERLACE), 635 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 636 /* 6 - 1440x480i@60Hz */ 637 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, 638 1602, 1716, 0, 480, 488, 494, 525, 0, 639 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 640 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 641 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, 642 /* 7 - 1440x480i@60Hz */ 643 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, 644 1602, 1716, 0, 480, 488, 494, 525, 0, 645 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 646 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 647 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 648 /* 8 - 1440x240@60Hz */ 649 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, 650 1602, 1716, 0, 240, 244, 247, 262, 0, 651 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 652 DRM_MODE_FLAG_DBLCLK), 653 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, 654 /* 9 - 1440x240@60Hz */ 655 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, 656 1602, 1716, 0, 240, 244, 247, 262, 0, 657 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 658 DRM_MODE_FLAG_DBLCLK), 659 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 660 /* 10 - 2880x480i@60Hz */ 661 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 662 3204, 3432, 0, 480, 488, 494, 525, 0, 663 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 664 DRM_MODE_FLAG_INTERLACE), 665 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, 666 /* 11 - 2880x480i@60Hz */ 667 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 668 3204, 3432, 0, 480, 488, 494, 525, 0, 669 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 670 DRM_MODE_FLAG_INTERLACE), 671 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 672 /* 12 - 2880x240@60Hz */ 673 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 674 3204, 3432, 0, 240, 244, 247, 262, 0, 675 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 676 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, 677 /* 13 - 2880x240@60Hz */ 678 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 679 3204, 3432, 0, 240, 244, 247, 262, 0, 680 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 681 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 682 /* 14 - 1440x480@60Hz */ 683 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472, 684 1596, 1716, 0, 480, 489, 495, 525, 0, 685 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 686 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, 687 /* 15 - 1440x480@60Hz */ 688 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472, 689 1596, 1716, 0, 480, 489, 495, 525, 0, 690 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 691 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 692 /* 16 - 1920x1080@60Hz */ 693 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, 694 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, 695 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 696 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 697 /* 17 - 720x576@50Hz */ 698 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, 699 796, 864, 0, 576, 581, 586, 625, 0, 700 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 701 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, 702 /* 18 - 720x576@50Hz */ 703 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, 704 796, 864, 0, 576, 581, 586, 625, 0, 705 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 706 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 707 /* 19 - 1280x720@50Hz */ 708 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720, 709 1760, 1980, 0, 720, 725, 730, 750, 0, 710 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 711 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 712 /* 20 - 1920x1080i@50Hz */ 713 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, 714 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, 715 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 716 DRM_MODE_FLAG_INTERLACE), 717 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 718 /* 21 - 1440x576i@50Hz */ 719 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, 720 1590, 1728, 0, 576, 580, 586, 625, 0, 721 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 722 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 723 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, 724 /* 22 - 1440x576i@50Hz */ 725 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, 726 1590, 1728, 0, 576, 580, 586, 625, 0, 727 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 728 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 729 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 730 /* 23 - 1440x288@50Hz */ 731 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, 732 1590, 1728, 0, 288, 290, 293, 312, 0, 733 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 734 DRM_MODE_FLAG_DBLCLK), 735 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, 736 /* 24 - 1440x288@50Hz */ 737 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, 738 1590, 1728, 0, 288, 290, 293, 312, 0, 739 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 740 DRM_MODE_FLAG_DBLCLK), 741 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 742 /* 25 - 2880x576i@50Hz */ 743 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 744 3180, 3456, 0, 576, 580, 586, 625, 0, 745 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 746 DRM_MODE_FLAG_INTERLACE), 747 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, 748 /* 26 - 2880x576i@50Hz */ 749 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 750 3180, 3456, 0, 576, 580, 586, 625, 0, 751 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 752 DRM_MODE_FLAG_INTERLACE), 753 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 754 /* 27 - 2880x288@50Hz */ 755 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 756 3180, 3456, 0, 288, 290, 293, 312, 0, 757 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 758 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, 759 /* 28 - 2880x288@50Hz */ 760 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 761 3180, 3456, 0, 288, 290, 293, 312, 0, 762 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 763 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 764 /* 29 - 1440x576@50Hz */ 765 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 766 1592, 1728, 0, 576, 581, 586, 625, 0, 767 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 768 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, 769 /* 30 - 1440x576@50Hz */ 770 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 771 1592, 1728, 0, 576, 581, 586, 625, 0, 772 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 773 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 774 /* 31 - 1920x1080@50Hz */ 775 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, 776 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, 777 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 778 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 779 /* 32 - 1920x1080@24Hz */ 780 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558, 781 2602, 2750, 0, 1080, 1084, 1089, 1125, 0, 782 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 783 .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 784 /* 33 - 1920x1080@25Hz */ 785 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, 786 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, 787 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 788 .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 789 /* 34 - 1920x1080@30Hz */ 790 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, 791 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, 792 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 793 .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 794 /* 35 - 2880x480@60Hz */ 795 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944, 796 3192, 3432, 0, 480, 489, 495, 525, 0, 797 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 798 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, 799 /* 36 - 2880x480@60Hz */ 800 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944, 801 3192, 3432, 0, 480, 489, 495, 525, 0, 802 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 803 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 804 /* 37 - 2880x576@50Hz */ 805 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928, 806 3184, 3456, 0, 576, 581, 586, 625, 0, 807 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 808 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, 809 /* 38 - 2880x576@50Hz */ 810 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928, 811 3184, 3456, 0, 576, 581, 586, 625, 0, 812 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 813 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 814 /* 39 - 1920x1080i@50Hz */ 815 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952, 816 2120, 2304, 0, 1080, 1126, 1136, 1250, 0, 817 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC | 818 DRM_MODE_FLAG_INTERLACE), 819 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 820 /* 40 - 1920x1080i@100Hz */ 821 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, 822 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, 823 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 824 DRM_MODE_FLAG_INTERLACE), 825 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 826 /* 41 - 1280x720@100Hz */ 827 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720, 828 1760, 1980, 0, 720, 725, 730, 750, 0, 829 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 830 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 831 /* 42 - 720x576@100Hz */ 832 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, 833 796, 864, 0, 576, 581, 586, 625, 0, 834 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 835 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, 836 /* 43 - 720x576@100Hz */ 837 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, 838 796, 864, 0, 576, 581, 586, 625, 0, 839 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 840 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 841 /* 44 - 1440x576i@100Hz */ 842 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 843 1590, 1728, 0, 576, 580, 586, 625, 0, 844 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 845 DRM_MODE_FLAG_DBLCLK), 846 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, 847 /* 45 - 1440x576i@100Hz */ 848 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 849 1590, 1728, 0, 576, 580, 586, 625, 0, 850 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 851 DRM_MODE_FLAG_DBLCLK), 852 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 853 /* 46 - 1920x1080i@120Hz */ 854 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, 855 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, 856 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 857 DRM_MODE_FLAG_INTERLACE), 858 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 859 /* 47 - 1280x720@120Hz */ 860 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390, 861 1430, 1650, 0, 720, 725, 730, 750, 0, 862 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 863 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 864 /* 48 - 720x480@120Hz */ 865 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736, 866 798, 858, 0, 480, 489, 495, 525, 0, 867 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 868 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, 869 /* 49 - 720x480@120Hz */ 870 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736, 871 798, 858, 0, 480, 489, 495, 525, 0, 872 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 873 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 874 /* 50 - 1440x480i@120Hz */ 875 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478, 876 1602, 1716, 0, 480, 488, 494, 525, 0, 877 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 878 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 879 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, 880 /* 51 - 1440x480i@120Hz */ 881 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478, 882 1602, 1716, 0, 480, 488, 494, 525, 0, 883 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 884 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 885 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 886 /* 52 - 720x576@200Hz */ 887 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732, 888 796, 864, 0, 576, 581, 586, 625, 0, 889 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 890 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, 891 /* 53 - 720x576@200Hz */ 892 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732, 893 796, 864, 0, 576, 581, 586, 625, 0, 894 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 895 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 896 /* 54 - 1440x576i@200Hz */ 897 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464, 898 1590, 1728, 0, 576, 580, 586, 625, 0, 899 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 900 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 901 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, 902 /* 55 - 1440x576i@200Hz */ 903 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464, 904 1590, 1728, 0, 576, 580, 586, 625, 0, 905 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 906 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 907 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 908 /* 56 - 720x480@240Hz */ 909 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736, 910 798, 858, 0, 480, 489, 495, 525, 0, 911 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 912 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, 913 /* 57 - 720x480@240Hz */ 914 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736, 915 798, 858, 0, 480, 489, 495, 525, 0, 916 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), 917 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 918 /* 58 - 1440x480i@240 */ 919 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478, 920 1602, 1716, 0, 480, 488, 494, 525, 0, 921 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 922 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 923 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, 924 /* 59 - 1440x480i@240 */ 925 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478, 926 1602, 1716, 0, 480, 488, 494, 525, 0, 927 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 928 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), 929 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 930 /* 60 - 1280x720@24Hz */ 931 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040, 932 3080, 3300, 0, 720, 725, 730, 750, 0, 933 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 934 .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 935 /* 61 - 1280x720@25Hz */ 936 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700, 937 3740, 3960, 0, 720, 725, 730, 750, 0, 938 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 939 .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 940 /* 62 - 1280x720@30Hz */ 941 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040, 942 3080, 3300, 0, 720, 725, 730, 750, 0, 943 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 944 .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 945 /* 63 - 1920x1080@120Hz */ 946 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008, 947 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, 948 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 949 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 950 /* 64 - 1920x1080@100Hz */ 951 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448, 952 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, 953 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 954 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, 955 }; 956 957 /* 958 * HDMI 1.4 4k modes. 959 */ 960 static const struct drm_display_mode edid_4k_modes[] = { 961 /* 1 - 3840x2160@30Hz */ 962 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 963 3840, 4016, 4104, 4400, 0, 964 2160, 2168, 2178, 2250, 0, 965 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 966 .vrefresh = 30, }, 967 /* 2 - 3840x2160@25Hz */ 968 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 969 3840, 4896, 4984, 5280, 0, 970 2160, 2168, 2178, 2250, 0, 971 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 972 .vrefresh = 25, }, 973 /* 3 - 3840x2160@24Hz */ 974 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 975 3840, 5116, 5204, 5500, 0, 976 2160, 2168, 2178, 2250, 0, 977 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 978 .vrefresh = 24, }, 979 /* 4 - 4096x2160@24Hz (SMPTE) */ 980 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 981 4096, 5116, 5204, 5500, 0, 982 2160, 2168, 2178, 2250, 0, 983 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), 984 .vrefresh = 24, }, 985 }; 986 987 /*** DDC fetch and block validation ***/ 988 989 static const u8 edid_header[] = { 990 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 991 }; 992 993 /* 994 * Sanity check the header of the base EDID block. Return 8 if the header 995 * is perfect, down to 0 if it's totally wrong. 996 */ 997 int drm_edid_header_is_valid(const u8 *raw_edid) 998 { 999 int i, score = 0; 1000 1001 for (i = 0; i < sizeof(edid_header); i++) 1002 if (raw_edid[i] == edid_header[i]) 1003 score++; 1004 1005 return score; 1006 } 1007 EXPORT_SYMBOL(drm_edid_header_is_valid); 1008 1009 static int edid_fixup __read_mostly = 6; 1010 module_param_named(edid_fixup, edid_fixup, int, 0400); 1011 MODULE_PARM_DESC(edid_fixup, 1012 "Minimum number of valid EDID header bytes (0-8, default 6)"); 1013 1014 /* 1015 * Sanity check the EDID block (base or extension). Return 0 if the block 1016 * doesn't check out, or 1 if it's valid. 1017 */ 1018 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid) 1019 { 1020 int i; 1021 u8 csum = 0; 1022 struct edid *edid = (struct edid *)raw_edid; 1023 1024 if (WARN_ON(!raw_edid)) 1025 return false; 1026 1027 if (edid_fixup > 8 || edid_fixup < 0) 1028 edid_fixup = 6; 1029 1030 if (block == 0) { 1031 int score = drm_edid_header_is_valid(raw_edid); 1032 if (score == 8) ; 1033 else if (score >= edid_fixup) { 1034 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n"); 1035 memcpy(raw_edid, edid_header, sizeof(edid_header)); 1036 } else { 1037 goto bad; 1038 } 1039 } 1040 1041 for (i = 0; i < EDID_LENGTH; i++) 1042 csum += raw_edid[i]; 1043 if (csum) { 1044 if (print_bad_edid) { 1045 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum); 1046 } 1047 1048 /* allow CEA to slide through, switches mangle this */ 1049 if (raw_edid[0] != 0x02) 1050 goto bad; 1051 } 1052 1053 /* per-block-type checks */ 1054 switch (raw_edid[0]) { 1055 case 0: /* base */ 1056 if (edid->version != 1) { 1057 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version); 1058 goto bad; 1059 } 1060 1061 if (edid->revision > 4) 1062 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n"); 1063 break; 1064 1065 default: 1066 break; 1067 } 1068 1069 return true; 1070 1071 bad: 1072 if (print_bad_edid) { 1073 printk(KERN_ERR "Raw EDID:\n"); 1074 print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1, 1075 raw_edid, EDID_LENGTH, false); 1076 } 1077 return false; 1078 } 1079 EXPORT_SYMBOL(drm_edid_block_valid); 1080 1081 /** 1082 * drm_edid_is_valid - sanity check EDID data 1083 * @edid: EDID data 1084 * 1085 * Sanity-check an entire EDID record (including extensions) 1086 */ 1087 bool drm_edid_is_valid(struct edid *edid) 1088 { 1089 int i; 1090 u8 *raw = (u8 *)edid; 1091 1092 if (!edid) 1093 return false; 1094 1095 for (i = 0; i <= edid->extensions; i++) 1096 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true)) 1097 return false; 1098 1099 return true; 1100 } 1101 EXPORT_SYMBOL(drm_edid_is_valid); 1102 1103 #define DDC_SEGMENT_ADDR 0x30 1104 /** 1105 * Get EDID information via I2C. 1106 * 1107 * @adapter : i2c device adaptor 1108 * @buf: EDID data buffer to be filled 1109 * @block: 128 byte EDID block to start fetching from 1110 * @len: EDID data buffer length to fetch 1111 * 1112 * Returns: 1113 * 1114 * 0 on success or -1 on failure. 1115 * 1116 * Try to fetch EDID information by calling i2c driver function. 1117 */ 1118 static int 1119 drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf, 1120 int block, int len) 1121 { 1122 unsigned char start = block * EDID_LENGTH; 1123 unsigned char segment = block >> 1; 1124 unsigned char xfers = segment ? 3 : 2; 1125 int ret, retries = 5; 1126 1127 /* The core i2c driver will automatically retry the transfer if the 1128 * adapter reports EAGAIN. However, we find that bit-banging transfers 1129 * are susceptible to errors under a heavily loaded machine and 1130 * generate spurious NAKs and timeouts. Retrying the transfer 1131 * of the individual block a few times seems to overcome this. 1132 */ 1133 do { 1134 struct i2c_msg msgs[] = { 1135 { 1136 .addr = DDC_SEGMENT_ADDR, 1137 .flags = 0, 1138 .len = 1, 1139 .buf = &segment, 1140 }, { 1141 .addr = DDC_ADDR, 1142 .flags = 0, 1143 .len = 1, 1144 .buf = &start, 1145 }, { 1146 .addr = DDC_ADDR, 1147 .flags = I2C_M_RD, 1148 .len = len, 1149 .buf = buf, 1150 } 1151 }; 1152 1153 /* 1154 * Avoid sending the segment addr to not upset non-compliant ddc 1155 * monitors. 1156 */ 1157 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers); 1158 1159 if (ret == -ENXIO) { 1160 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n", 1161 adapter->name); 1162 break; 1163 } 1164 } while (ret != xfers && --retries); 1165 1166 return ret == xfers ? 0 : -1; 1167 } 1168 1169 static bool drm_edid_is_zero(u8 *in_edid, int length) 1170 { 1171 if (memchr_inv(in_edid, 0, length)) 1172 return false; 1173 1174 return true; 1175 } 1176 1177 static u8 * 1178 drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter) 1179 { 1180 int i, j = 0, valid_extensions = 0; 1181 u8 *block, *new; 1182 bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS); 1183 1184 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL) 1185 return NULL; 1186 1187 /* base block fetch */ 1188 for (i = 0; i < 4; i++) { 1189 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH)) 1190 goto out; 1191 if (drm_edid_block_valid(block, 0, print_bad_edid)) 1192 break; 1193 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) { 1194 connector->null_edid_counter++; 1195 goto carp; 1196 } 1197 } 1198 if (i == 4) 1199 goto carp; 1200 1201 /* if there's no extensions, we're done */ 1202 if (block[0x7e] == 0) 1203 return block; 1204 1205 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL); 1206 if (!new) 1207 goto out; 1208 block = new; 1209 1210 for (j = 1; j <= block[0x7e]; j++) { 1211 for (i = 0; i < 4; i++) { 1212 if (drm_do_probe_ddc_edid(adapter, 1213 block + (valid_extensions + 1) * EDID_LENGTH, 1214 j, EDID_LENGTH)) 1215 goto out; 1216 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) { 1217 valid_extensions++; 1218 break; 1219 } 1220 } 1221 1222 if (i == 4 && print_bad_edid) { 1223 dev_warn(connector->dev->dev, 1224 "%s: Ignoring invalid EDID block %d.\n", 1225 drm_get_connector_name(connector), j); 1226 1227 connector->bad_edid_counter++; 1228 } 1229 } 1230 1231 if (valid_extensions != block[0x7e]) { 1232 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions; 1233 block[0x7e] = valid_extensions; 1234 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL); 1235 if (!new) 1236 goto out; 1237 block = new; 1238 } 1239 1240 return block; 1241 1242 carp: 1243 if (print_bad_edid) { 1244 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n", 1245 drm_get_connector_name(connector), j); 1246 } 1247 connector->bad_edid_counter++; 1248 1249 out: 1250 kfree(block); 1251 return NULL; 1252 } 1253 1254 /** 1255 * Probe DDC presence. 1256 * @adapter: i2c adapter to probe 1257 * 1258 * Returns: 1259 * 1260 * 1 on success 1261 */ 1262 bool 1263 drm_probe_ddc(struct i2c_adapter *adapter) 1264 { 1265 unsigned char out; 1266 1267 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0); 1268 } 1269 EXPORT_SYMBOL(drm_probe_ddc); 1270 1271 /** 1272 * drm_get_edid - get EDID data, if available 1273 * @connector: connector we're probing 1274 * @adapter: i2c adapter to use for DDC 1275 * 1276 * Poke the given i2c channel to grab EDID data if possible. If found, 1277 * attach it to the connector. 1278 * 1279 * Return edid data or NULL if we couldn't find any. 1280 */ 1281 struct edid *drm_get_edid(struct drm_connector *connector, 1282 struct i2c_adapter *adapter) 1283 { 1284 struct edid *edid = NULL; 1285 1286 if (drm_probe_ddc(adapter)) 1287 edid = (struct edid *)drm_do_get_edid(connector, adapter); 1288 1289 return edid; 1290 } 1291 EXPORT_SYMBOL(drm_get_edid); 1292 1293 /** 1294 * drm_edid_duplicate - duplicate an EDID and the extensions 1295 * @edid: EDID to duplicate 1296 * 1297 * Return duplicate edid or NULL on allocation failure. 1298 */ 1299 struct edid *drm_edid_duplicate(const struct edid *edid) 1300 { 1301 return kmemdup(edid, (edid->extensions + 1) * EDID_LENGTH, GFP_KERNEL); 1302 } 1303 EXPORT_SYMBOL(drm_edid_duplicate); 1304 1305 /*** EDID parsing ***/ 1306 1307 /** 1308 * edid_vendor - match a string against EDID's obfuscated vendor field 1309 * @edid: EDID to match 1310 * @vendor: vendor string 1311 * 1312 * Returns true if @vendor is in @edid, false otherwise 1313 */ 1314 static bool edid_vendor(struct edid *edid, char *vendor) 1315 { 1316 char edid_vendor[3]; 1317 1318 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; 1319 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) | 1320 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@'; 1321 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@'; 1322 1323 return !strncmp(edid_vendor, vendor, 3); 1324 } 1325 1326 /** 1327 * edid_get_quirks - return quirk flags for a given EDID 1328 * @edid: EDID to process 1329 * 1330 * This tells subsequent routines what fixes they need to apply. 1331 */ 1332 static u32 edid_get_quirks(struct edid *edid) 1333 { 1334 struct edid_quirk *quirk; 1335 int i; 1336 1337 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) { 1338 quirk = &edid_quirk_list[i]; 1339 1340 if (edid_vendor(edid, quirk->vendor) && 1341 (EDID_PRODUCT_ID(edid) == quirk->product_id)) 1342 return quirk->quirks; 1343 } 1344 1345 return 0; 1346 } 1347 1348 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) 1349 #define MODE_REFRESH_DIFF(c,t) (abs((c) - (t))) 1350 1351 /** 1352 * edid_fixup_preferred - set preferred modes based on quirk list 1353 * @connector: has mode list to fix up 1354 * @quirks: quirks list 1355 * 1356 * Walk the mode list for @connector, clearing the preferred status 1357 * on existing modes and setting it anew for the right mode ala @quirks. 1358 */ 1359 static void edid_fixup_preferred(struct drm_connector *connector, 1360 u32 quirks) 1361 { 1362 struct drm_display_mode *t, *cur_mode, *preferred_mode; 1363 int target_refresh = 0; 1364 int cur_vrefresh, preferred_vrefresh; 1365 1366 if (list_empty(&connector->probed_modes)) 1367 return; 1368 1369 if (quirks & EDID_QUIRK_PREFER_LARGE_60) 1370 target_refresh = 60; 1371 if (quirks & EDID_QUIRK_PREFER_LARGE_75) 1372 target_refresh = 75; 1373 1374 preferred_mode = list_first_entry(&connector->probed_modes, 1375 struct drm_display_mode, head); 1376 1377 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { 1378 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; 1379 1380 if (cur_mode == preferred_mode) 1381 continue; 1382 1383 /* Largest mode is preferred */ 1384 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode)) 1385 preferred_mode = cur_mode; 1386 1387 cur_vrefresh = cur_mode->vrefresh ? 1388 cur_mode->vrefresh : drm_mode_vrefresh(cur_mode); 1389 preferred_vrefresh = preferred_mode->vrefresh ? 1390 preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode); 1391 /* At a given size, try to get closest to target refresh */ 1392 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) && 1393 MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) < 1394 MODE_REFRESH_DIFF(preferred_vrefresh, target_refresh)) { 1395 preferred_mode = cur_mode; 1396 } 1397 } 1398 1399 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; 1400 } 1401 1402 static bool 1403 mode_is_rb(const struct drm_display_mode *mode) 1404 { 1405 return (mode->htotal - mode->hdisplay == 160) && 1406 (mode->hsync_end - mode->hdisplay == 80) && 1407 (mode->hsync_end - mode->hsync_start == 32) && 1408 (mode->vsync_start - mode->vdisplay == 3); 1409 } 1410 1411 /* 1412 * drm_mode_find_dmt - Create a copy of a mode if present in DMT 1413 * @dev: Device to duplicate against 1414 * @hsize: Mode width 1415 * @vsize: Mode height 1416 * @fresh: Mode refresh rate 1417 * @rb: Mode reduced-blanking-ness 1418 * 1419 * Walk the DMT mode list looking for a match for the given parameters. 1420 * Return a newly allocated copy of the mode, or NULL if not found. 1421 */ 1422 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev, 1423 int hsize, int vsize, int fresh, 1424 bool rb) 1425 { 1426 int i; 1427 1428 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) { 1429 const struct drm_display_mode *ptr = &drm_dmt_modes[i]; 1430 if (hsize != ptr->hdisplay) 1431 continue; 1432 if (vsize != ptr->vdisplay) 1433 continue; 1434 if (fresh != drm_mode_vrefresh(ptr)) 1435 continue; 1436 if (rb != mode_is_rb(ptr)) 1437 continue; 1438 1439 return drm_mode_duplicate(dev, ptr); 1440 } 1441 1442 return NULL; 1443 } 1444 EXPORT_SYMBOL(drm_mode_find_dmt); 1445 1446 typedef void detailed_cb(struct detailed_timing *timing, void *closure); 1447 1448 static void 1449 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) 1450 { 1451 int i, n = 0; 1452 u8 d = ext[0x02]; 1453 u8 *det_base = ext + d; 1454 1455 n = (127 - d) / 18; 1456 for (i = 0; i < n; i++) 1457 cb((struct detailed_timing *)(det_base + 18 * i), closure); 1458 } 1459 1460 static void 1461 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) 1462 { 1463 unsigned int i, n = min((int)ext[0x02], 6); 1464 u8 *det_base = ext + 5; 1465 1466 if (ext[0x01] != 1) 1467 return; /* unknown version */ 1468 1469 for (i = 0; i < n; i++) 1470 cb((struct detailed_timing *)(det_base + 18 * i), closure); 1471 } 1472 1473 static void 1474 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure) 1475 { 1476 int i; 1477 struct edid *edid = (struct edid *)raw_edid; 1478 1479 if (edid == NULL) 1480 return; 1481 1482 for (i = 0; i < EDID_DETAILED_TIMINGS; i++) 1483 cb(&(edid->detailed_timings[i]), closure); 1484 1485 for (i = 1; i <= raw_edid[0x7e]; i++) { 1486 u8 *ext = raw_edid + (i * EDID_LENGTH); 1487 switch (*ext) { 1488 case CEA_EXT: 1489 cea_for_each_detailed_block(ext, cb, closure); 1490 break; 1491 case VTB_EXT: 1492 vtb_for_each_detailed_block(ext, cb, closure); 1493 break; 1494 default: 1495 break; 1496 } 1497 } 1498 } 1499 1500 static void 1501 is_rb(struct detailed_timing *t, void *data) 1502 { 1503 u8 *r = (u8 *)t; 1504 if (r[3] == EDID_DETAIL_MONITOR_RANGE) 1505 if (r[15] & 0x10) 1506 *(bool *)data = true; 1507 } 1508 1509 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */ 1510 static bool 1511 drm_monitor_supports_rb(struct edid *edid) 1512 { 1513 if (edid->revision >= 4) { 1514 bool ret = false; 1515 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret); 1516 return ret; 1517 } 1518 1519 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0); 1520 } 1521 1522 static void 1523 find_gtf2(struct detailed_timing *t, void *data) 1524 { 1525 u8 *r = (u8 *)t; 1526 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02) 1527 *(u8 **)data = r; 1528 } 1529 1530 /* Secondary GTF curve kicks in above some break frequency */ 1531 static int 1532 drm_gtf2_hbreak(struct edid *edid) 1533 { 1534 u8 *r = NULL; 1535 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1536 return r ? (r[12] * 2) : 0; 1537 } 1538 1539 static int 1540 drm_gtf2_2c(struct edid *edid) 1541 { 1542 u8 *r = NULL; 1543 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1544 return r ? r[13] : 0; 1545 } 1546 1547 static int 1548 drm_gtf2_m(struct edid *edid) 1549 { 1550 u8 *r = NULL; 1551 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1552 return r ? (r[15] << 8) + r[14] : 0; 1553 } 1554 1555 static int 1556 drm_gtf2_k(struct edid *edid) 1557 { 1558 u8 *r = NULL; 1559 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1560 return r ? r[16] : 0; 1561 } 1562 1563 static int 1564 drm_gtf2_2j(struct edid *edid) 1565 { 1566 u8 *r = NULL; 1567 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1568 return r ? r[17] : 0; 1569 } 1570 1571 /** 1572 * standard_timing_level - get std. timing level(CVT/GTF/DMT) 1573 * @edid: EDID block to scan 1574 */ 1575 static int standard_timing_level(struct edid *edid) 1576 { 1577 if (edid->revision >= 2) { 1578 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)) 1579 return LEVEL_CVT; 1580 if (drm_gtf2_hbreak(edid)) 1581 return LEVEL_GTF2; 1582 return LEVEL_GTF; 1583 } 1584 return LEVEL_DMT; 1585 } 1586 1587 /* 1588 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old 1589 * monitors fill with ascii space (0x20) instead. 1590 */ 1591 static int 1592 bad_std_timing(u8 a, u8 b) 1593 { 1594 return (a == 0x00 && b == 0x00) || 1595 (a == 0x01 && b == 0x01) || 1596 (a == 0x20 && b == 0x20); 1597 } 1598 1599 /** 1600 * drm_mode_std - convert standard mode info (width, height, refresh) into mode 1601 * @connector: connector of for the EDID block 1602 * @edid: EDID block to scan 1603 * @t: standard timing params 1604 * @revision: standard timing level 1605 * 1606 * Take the standard timing params (in this case width, aspect, and refresh) 1607 * and convert them into a real mode using CVT/GTF/DMT. 1608 */ 1609 static struct drm_display_mode * 1610 drm_mode_std(struct drm_connector *connector, struct edid *edid, 1611 struct std_timing *t, int revision) 1612 { 1613 struct drm_device *dev = connector->dev; 1614 struct drm_display_mode *m, *mode = NULL; 1615 int hsize, vsize; 1616 int vrefresh_rate; 1617 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK) 1618 >> EDID_TIMING_ASPECT_SHIFT; 1619 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK) 1620 >> EDID_TIMING_VFREQ_SHIFT; 1621 int timing_level = standard_timing_level(edid); 1622 1623 if (bad_std_timing(t->hsize, t->vfreq_aspect)) 1624 return NULL; 1625 1626 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */ 1627 hsize = t->hsize * 8 + 248; 1628 /* vrefresh_rate = vfreq + 60 */ 1629 vrefresh_rate = vfreq + 60; 1630 /* the vdisplay is calculated based on the aspect ratio */ 1631 if (aspect_ratio == 0) { 1632 if (revision < 3) 1633 vsize = hsize; 1634 else 1635 vsize = (hsize * 10) / 16; 1636 } else if (aspect_ratio == 1) 1637 vsize = (hsize * 3) / 4; 1638 else if (aspect_ratio == 2) 1639 vsize = (hsize * 4) / 5; 1640 else 1641 vsize = (hsize * 9) / 16; 1642 1643 /* HDTV hack, part 1 */ 1644 if (vrefresh_rate == 60 && 1645 ((hsize == 1360 && vsize == 765) || 1646 (hsize == 1368 && vsize == 769))) { 1647 hsize = 1366; 1648 vsize = 768; 1649 } 1650 1651 /* 1652 * If this connector already has a mode for this size and refresh 1653 * rate (because it came from detailed or CVT info), use that 1654 * instead. This way we don't have to guess at interlace or 1655 * reduced blanking. 1656 */ 1657 list_for_each_entry(m, &connector->probed_modes, head) 1658 if (m->hdisplay == hsize && m->vdisplay == vsize && 1659 drm_mode_vrefresh(m) == vrefresh_rate) 1660 return NULL; 1661 1662 /* HDTV hack, part 2 */ 1663 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) { 1664 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0, 1665 false); 1666 mode->hdisplay = 1366; 1667 mode->hsync_start = mode->hsync_start - 1; 1668 mode->hsync_end = mode->hsync_end - 1; 1669 return mode; 1670 } 1671 1672 /* check whether it can be found in default mode table */ 1673 if (drm_monitor_supports_rb(edid)) { 1674 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, 1675 true); 1676 if (mode) 1677 return mode; 1678 } 1679 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false); 1680 if (mode) 1681 return mode; 1682 1683 /* okay, generate it */ 1684 switch (timing_level) { 1685 case LEVEL_DMT: 1686 break; 1687 case LEVEL_GTF: 1688 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); 1689 break; 1690 case LEVEL_GTF2: 1691 /* 1692 * This is potentially wrong if there's ever a monitor with 1693 * more than one ranges section, each claiming a different 1694 * secondary GTF curve. Please don't do that. 1695 */ 1696 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); 1697 if (!mode) 1698 return NULL; 1699 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) { 1700 drm_mode_destroy(dev, mode); 1701 mode = drm_gtf_mode_complex(dev, hsize, vsize, 1702 vrefresh_rate, 0, 0, 1703 drm_gtf2_m(edid), 1704 drm_gtf2_2c(edid), 1705 drm_gtf2_k(edid), 1706 drm_gtf2_2j(edid)); 1707 } 1708 break; 1709 case LEVEL_CVT: 1710 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, 1711 false); 1712 break; 1713 } 1714 return mode; 1715 } 1716 1717 /* 1718 * EDID is delightfully ambiguous about how interlaced modes are to be 1719 * encoded. Our internal representation is of frame height, but some 1720 * HDTV detailed timings are encoded as field height. 1721 * 1722 * The format list here is from CEA, in frame size. Technically we 1723 * should be checking refresh rate too. Whatever. 1724 */ 1725 static void 1726 drm_mode_do_interlace_quirk(struct drm_display_mode *mode, 1727 struct detailed_pixel_timing *pt) 1728 { 1729 int i; 1730 static const struct { 1731 int w, h; 1732 } cea_interlaced[] = { 1733 { 1920, 1080 }, 1734 { 720, 480 }, 1735 { 1440, 480 }, 1736 { 2880, 480 }, 1737 { 720, 576 }, 1738 { 1440, 576 }, 1739 { 2880, 576 }, 1740 }; 1741 1742 if (!(pt->misc & DRM_EDID_PT_INTERLACED)) 1743 return; 1744 1745 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) { 1746 if ((mode->hdisplay == cea_interlaced[i].w) && 1747 (mode->vdisplay == cea_interlaced[i].h / 2)) { 1748 mode->vdisplay *= 2; 1749 mode->vsync_start *= 2; 1750 mode->vsync_end *= 2; 1751 mode->vtotal *= 2; 1752 mode->vtotal |= 1; 1753 } 1754 } 1755 1756 mode->flags |= DRM_MODE_FLAG_INTERLACE; 1757 } 1758 1759 /** 1760 * drm_mode_detailed - create a new mode from an EDID detailed timing section 1761 * @dev: DRM device (needed to create new mode) 1762 * @edid: EDID block 1763 * @timing: EDID detailed timing info 1764 * @quirks: quirks to apply 1765 * 1766 * An EDID detailed timing block contains enough info for us to create and 1767 * return a new struct drm_display_mode. 1768 */ 1769 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, 1770 struct edid *edid, 1771 struct detailed_timing *timing, 1772 u32 quirks) 1773 { 1774 struct drm_display_mode *mode; 1775 struct detailed_pixel_timing *pt = &timing->data.pixel_data; 1776 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; 1777 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; 1778 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; 1779 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; 1780 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; 1781 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo; 1782 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4; 1783 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf); 1784 1785 /* ignore tiny modes */ 1786 if (hactive < 64 || vactive < 64) 1787 return NULL; 1788 1789 if (pt->misc & DRM_EDID_PT_STEREO) { 1790 DRM_DEBUG_KMS("stereo mode not supported\n"); 1791 return NULL; 1792 } 1793 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { 1794 DRM_DEBUG_KMS("composite sync not supported\n"); 1795 } 1796 1797 /* it is incorrect if hsync/vsync width is zero */ 1798 if (!hsync_pulse_width || !vsync_pulse_width) { 1799 DRM_DEBUG_KMS("Incorrect Detailed timing. " 1800 "Wrong Hsync/Vsync pulse width\n"); 1801 return NULL; 1802 } 1803 1804 if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) { 1805 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false); 1806 if (!mode) 1807 return NULL; 1808 1809 goto set_size; 1810 } 1811 1812 mode = drm_mode_create(dev); 1813 if (!mode) 1814 return NULL; 1815 1816 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) 1817 timing->pixel_clock = cpu_to_le16(1088); 1818 1819 mode->clock = le16_to_cpu(timing->pixel_clock) * 10; 1820 1821 mode->hdisplay = hactive; 1822 mode->hsync_start = mode->hdisplay + hsync_offset; 1823 mode->hsync_end = mode->hsync_start + hsync_pulse_width; 1824 mode->htotal = mode->hdisplay + hblank; 1825 1826 mode->vdisplay = vactive; 1827 mode->vsync_start = mode->vdisplay + vsync_offset; 1828 mode->vsync_end = mode->vsync_start + vsync_pulse_width; 1829 mode->vtotal = mode->vdisplay + vblank; 1830 1831 /* Some EDIDs have bogus h/vtotal values */ 1832 if (mode->hsync_end > mode->htotal) 1833 mode->htotal = mode->hsync_end + 1; 1834 if (mode->vsync_end > mode->vtotal) 1835 mode->vtotal = mode->vsync_end + 1; 1836 1837 drm_mode_do_interlace_quirk(mode, pt); 1838 1839 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) { 1840 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE; 1841 } 1842 1843 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? 1844 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 1845 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? 1846 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 1847 1848 set_size: 1849 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; 1850 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; 1851 1852 if (quirks & EDID_QUIRK_DETAILED_IN_CM) { 1853 mode->width_mm *= 10; 1854 mode->height_mm *= 10; 1855 } 1856 1857 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { 1858 mode->width_mm = edid->width_cm * 10; 1859 mode->height_mm = edid->height_cm * 10; 1860 } 1861 1862 mode->type = DRM_MODE_TYPE_DRIVER; 1863 mode->vrefresh = drm_mode_vrefresh(mode); 1864 drm_mode_set_name(mode); 1865 1866 return mode; 1867 } 1868 1869 static bool 1870 mode_in_hsync_range(const struct drm_display_mode *mode, 1871 struct edid *edid, u8 *t) 1872 { 1873 int hsync, hmin, hmax; 1874 1875 hmin = t[7]; 1876 if (edid->revision >= 4) 1877 hmin += ((t[4] & 0x04) ? 255 : 0); 1878 hmax = t[8]; 1879 if (edid->revision >= 4) 1880 hmax += ((t[4] & 0x08) ? 255 : 0); 1881 hsync = drm_mode_hsync(mode); 1882 1883 return (hsync <= hmax && hsync >= hmin); 1884 } 1885 1886 static bool 1887 mode_in_vsync_range(const struct drm_display_mode *mode, 1888 struct edid *edid, u8 *t) 1889 { 1890 int vsync, vmin, vmax; 1891 1892 vmin = t[5]; 1893 if (edid->revision >= 4) 1894 vmin += ((t[4] & 0x01) ? 255 : 0); 1895 vmax = t[6]; 1896 if (edid->revision >= 4) 1897 vmax += ((t[4] & 0x02) ? 255 : 0); 1898 vsync = drm_mode_vrefresh(mode); 1899 1900 return (vsync <= vmax && vsync >= vmin); 1901 } 1902 1903 static u32 1904 range_pixel_clock(struct edid *edid, u8 *t) 1905 { 1906 /* unspecified */ 1907 if (t[9] == 0 || t[9] == 255) 1908 return 0; 1909 1910 /* 1.4 with CVT support gives us real precision, yay */ 1911 if (edid->revision >= 4 && t[10] == 0x04) 1912 return (t[9] * 10000) - ((t[12] >> 2) * 250); 1913 1914 /* 1.3 is pathetic, so fuzz up a bit */ 1915 return t[9] * 10000 + 5001; 1916 } 1917 1918 static bool 1919 mode_in_range(const struct drm_display_mode *mode, struct edid *edid, 1920 struct detailed_timing *timing) 1921 { 1922 u32 max_clock; 1923 u8 *t = (u8 *)timing; 1924 1925 if (!mode_in_hsync_range(mode, edid, t)) 1926 return false; 1927 1928 if (!mode_in_vsync_range(mode, edid, t)) 1929 return false; 1930 1931 if ((max_clock = range_pixel_clock(edid, t))) 1932 if (mode->clock > max_clock) 1933 return false; 1934 1935 /* 1.4 max horizontal check */ 1936 if (edid->revision >= 4 && t[10] == 0x04) 1937 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3)))) 1938 return false; 1939 1940 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid)) 1941 return false; 1942 1943 return true; 1944 } 1945 1946 static bool valid_inferred_mode(const struct drm_connector *connector, 1947 const struct drm_display_mode *mode) 1948 { 1949 struct drm_display_mode *m; 1950 bool ok = false; 1951 1952 list_for_each_entry(m, &connector->probed_modes, head) { 1953 if (mode->hdisplay == m->hdisplay && 1954 mode->vdisplay == m->vdisplay && 1955 drm_mode_vrefresh(mode) == drm_mode_vrefresh(m)) 1956 return false; /* duplicated */ 1957 if (mode->hdisplay <= m->hdisplay && 1958 mode->vdisplay <= m->vdisplay) 1959 ok = true; 1960 } 1961 return ok; 1962 } 1963 1964 static int 1965 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid, 1966 struct detailed_timing *timing) 1967 { 1968 int i, modes = 0; 1969 struct drm_display_mode *newmode; 1970 struct drm_device *dev = connector->dev; 1971 1972 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) { 1973 if (mode_in_range(drm_dmt_modes + i, edid, timing) && 1974 valid_inferred_mode(connector, drm_dmt_modes + i)) { 1975 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]); 1976 if (newmode) { 1977 drm_mode_probed_add(connector, newmode); 1978 modes++; 1979 } 1980 } 1981 } 1982 1983 return modes; 1984 } 1985 1986 /* fix up 1366x768 mode from 1368x768; 1987 * GFT/CVT can't express 1366 width which isn't dividable by 8 1988 */ 1989 static void fixup_mode_1366x768(struct drm_display_mode *mode) 1990 { 1991 if (mode->hdisplay == 1368 && mode->vdisplay == 768) { 1992 mode->hdisplay = 1366; 1993 mode->hsync_start--; 1994 mode->hsync_end--; 1995 drm_mode_set_name(mode); 1996 } 1997 } 1998 1999 static int 2000 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid, 2001 struct detailed_timing *timing) 2002 { 2003 int i, modes = 0; 2004 struct drm_display_mode *newmode; 2005 struct drm_device *dev = connector->dev; 2006 2007 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) { 2008 const struct minimode *m = &extra_modes[i]; 2009 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0); 2010 if (!newmode) 2011 return modes; 2012 2013 fixup_mode_1366x768(newmode); 2014 if (!mode_in_range(newmode, edid, timing) || 2015 !valid_inferred_mode(connector, newmode)) { 2016 drm_mode_destroy(dev, newmode); 2017 continue; 2018 } 2019 2020 drm_mode_probed_add(connector, newmode); 2021 modes++; 2022 } 2023 2024 return modes; 2025 } 2026 2027 static int 2028 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid, 2029 struct detailed_timing *timing) 2030 { 2031 int i, modes = 0; 2032 struct drm_display_mode *newmode; 2033 struct drm_device *dev = connector->dev; 2034 bool rb = drm_monitor_supports_rb(edid); 2035 2036 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) { 2037 const struct minimode *m = &extra_modes[i]; 2038 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0); 2039 if (!newmode) 2040 return modes; 2041 2042 fixup_mode_1366x768(newmode); 2043 if (!mode_in_range(newmode, edid, timing) || 2044 !valid_inferred_mode(connector, newmode)) { 2045 drm_mode_destroy(dev, newmode); 2046 continue; 2047 } 2048 2049 drm_mode_probed_add(connector, newmode); 2050 modes++; 2051 } 2052 2053 return modes; 2054 } 2055 2056 static void 2057 do_inferred_modes(struct detailed_timing *timing, void *c) 2058 { 2059 struct detailed_mode_closure *closure = c; 2060 struct detailed_non_pixel *data = &timing->data.other_data; 2061 struct detailed_data_monitor_range *range = &data->data.range; 2062 2063 if (data->type != EDID_DETAIL_MONITOR_RANGE) 2064 return; 2065 2066 closure->modes += drm_dmt_modes_for_range(closure->connector, 2067 closure->edid, 2068 timing); 2069 2070 if (!version_greater(closure->edid, 1, 1)) 2071 return; /* GTF not defined yet */ 2072 2073 switch (range->flags) { 2074 case 0x02: /* secondary gtf, XXX could do more */ 2075 case 0x00: /* default gtf */ 2076 closure->modes += drm_gtf_modes_for_range(closure->connector, 2077 closure->edid, 2078 timing); 2079 break; 2080 case 0x04: /* cvt, only in 1.4+ */ 2081 if (!version_greater(closure->edid, 1, 3)) 2082 break; 2083 2084 closure->modes += drm_cvt_modes_for_range(closure->connector, 2085 closure->edid, 2086 timing); 2087 break; 2088 case 0x01: /* just the ranges, no formula */ 2089 default: 2090 break; 2091 } 2092 } 2093 2094 static int 2095 add_inferred_modes(struct drm_connector *connector, struct edid *edid) 2096 { 2097 struct detailed_mode_closure closure = { 2098 connector, edid, 0, 0, 0 2099 }; 2100 2101 if (version_greater(edid, 1, 0)) 2102 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes, 2103 &closure); 2104 2105 return closure.modes; 2106 } 2107 2108 static int 2109 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing) 2110 { 2111 int i, j, m, modes = 0; 2112 struct drm_display_mode *mode; 2113 u8 *est = ((u8 *)timing) + 5; 2114 2115 for (i = 0; i < 6; i++) { 2116 for (j = 7; j >= 0; j--) { 2117 m = (i * 8) + (7 - j); 2118 if (m >= ARRAY_SIZE(est3_modes)) 2119 break; 2120 if (est[i] & (1 << j)) { 2121 mode = drm_mode_find_dmt(connector->dev, 2122 est3_modes[m].w, 2123 est3_modes[m].h, 2124 est3_modes[m].r, 2125 est3_modes[m].rb); 2126 if (mode) { 2127 drm_mode_probed_add(connector, mode); 2128 modes++; 2129 } 2130 } 2131 } 2132 } 2133 2134 return modes; 2135 } 2136 2137 static void 2138 do_established_modes(struct detailed_timing *timing, void *c) 2139 { 2140 struct detailed_mode_closure *closure = c; 2141 struct detailed_non_pixel *data = &timing->data.other_data; 2142 2143 if (data->type == EDID_DETAIL_EST_TIMINGS) 2144 closure->modes += drm_est3_modes(closure->connector, timing); 2145 } 2146 2147 /** 2148 * add_established_modes - get est. modes from EDID and add them 2149 * @connector: connector of for the EDID block 2150 * @edid: EDID block to scan 2151 * 2152 * Each EDID block contains a bitmap of the supported "established modes" list 2153 * (defined above). Tease them out and add them to the global modes list. 2154 */ 2155 static int 2156 add_established_modes(struct drm_connector *connector, struct edid *edid) 2157 { 2158 struct drm_device *dev = connector->dev; 2159 unsigned long est_bits = edid->established_timings.t1 | 2160 (edid->established_timings.t2 << 8) | 2161 ((edid->established_timings.mfg_rsvd & 0x80) << 9); 2162 int i, modes = 0; 2163 struct detailed_mode_closure closure = { 2164 connector, edid, 0, 0, 0 2165 }; 2166 2167 for (i = 0; i <= EDID_EST_TIMINGS; i++) { 2168 if (est_bits & (1<<i)) { 2169 struct drm_display_mode *newmode; 2170 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]); 2171 if (newmode) { 2172 drm_mode_probed_add(connector, newmode); 2173 modes++; 2174 } 2175 } 2176 } 2177 2178 if (version_greater(edid, 1, 0)) 2179 drm_for_each_detailed_block((u8 *)edid, 2180 do_established_modes, &closure); 2181 2182 return modes + closure.modes; 2183 } 2184 2185 static void 2186 do_standard_modes(struct detailed_timing *timing, void *c) 2187 { 2188 struct detailed_mode_closure *closure = c; 2189 struct detailed_non_pixel *data = &timing->data.other_data; 2190 struct drm_connector *connector = closure->connector; 2191 struct edid *edid = closure->edid; 2192 2193 if (data->type == EDID_DETAIL_STD_MODES) { 2194 int i; 2195 for (i = 0; i < 6; i++) { 2196 struct std_timing *std; 2197 struct drm_display_mode *newmode; 2198 2199 std = &data->data.timings[i]; 2200 newmode = drm_mode_std(connector, edid, std, 2201 edid->revision); 2202 if (newmode) { 2203 drm_mode_probed_add(connector, newmode); 2204 closure->modes++; 2205 } 2206 } 2207 } 2208 } 2209 2210 /** 2211 * add_standard_modes - get std. modes from EDID and add them 2212 * @connector: connector of for the EDID block 2213 * @edid: EDID block to scan 2214 * 2215 * Standard modes can be calculated using the appropriate standard (DMT, 2216 * GTF or CVT. Grab them from @edid and add them to the list. 2217 */ 2218 static int 2219 add_standard_modes(struct drm_connector *connector, struct edid *edid) 2220 { 2221 int i, modes = 0; 2222 struct detailed_mode_closure closure = { 2223 connector, edid, 0, 0, 0 2224 }; 2225 2226 for (i = 0; i < EDID_STD_TIMINGS; i++) { 2227 struct drm_display_mode *newmode; 2228 2229 newmode = drm_mode_std(connector, edid, 2230 &edid->standard_timings[i], 2231 edid->revision); 2232 if (newmode) { 2233 drm_mode_probed_add(connector, newmode); 2234 modes++; 2235 } 2236 } 2237 2238 if (version_greater(edid, 1, 0)) 2239 drm_for_each_detailed_block((u8 *)edid, do_standard_modes, 2240 &closure); 2241 2242 /* XXX should also look for standard codes in VTB blocks */ 2243 2244 return modes + closure.modes; 2245 } 2246 2247 static int drm_cvt_modes(struct drm_connector *connector, 2248 struct detailed_timing *timing) 2249 { 2250 int i, j, modes = 0; 2251 struct drm_display_mode *newmode; 2252 struct drm_device *dev = connector->dev; 2253 struct cvt_timing *cvt; 2254 const int rates[] = { 60, 85, 75, 60, 50 }; 2255 const u8 empty[3] = { 0, 0, 0 }; 2256 2257 for (i = 0; i < 4; i++) { 2258 int uninitialized_var(width), height; 2259 cvt = &(timing->data.other_data.data.cvt[i]); 2260 2261 if (!memcmp(cvt->code, empty, 3)) 2262 continue; 2263 2264 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2; 2265 switch (cvt->code[1] & 0x0c) { 2266 case 0x00: 2267 width = height * 4 / 3; 2268 break; 2269 case 0x04: 2270 width = height * 16 / 9; 2271 break; 2272 case 0x08: 2273 width = height * 16 / 10; 2274 break; 2275 case 0x0c: 2276 width = height * 15 / 9; 2277 break; 2278 } 2279 2280 for (j = 1; j < 5; j++) { 2281 if (cvt->code[2] & (1 << j)) { 2282 newmode = drm_cvt_mode(dev, width, height, 2283 rates[j], j == 0, 2284 false, false); 2285 if (newmode) { 2286 drm_mode_probed_add(connector, newmode); 2287 modes++; 2288 } 2289 } 2290 } 2291 } 2292 2293 return modes; 2294 } 2295 2296 static void 2297 do_cvt_mode(struct detailed_timing *timing, void *c) 2298 { 2299 struct detailed_mode_closure *closure = c; 2300 struct detailed_non_pixel *data = &timing->data.other_data; 2301 2302 if (data->type == EDID_DETAIL_CVT_3BYTE) 2303 closure->modes += drm_cvt_modes(closure->connector, timing); 2304 } 2305 2306 static int 2307 add_cvt_modes(struct drm_connector *connector, struct edid *edid) 2308 { 2309 struct detailed_mode_closure closure = { 2310 connector, edid, 0, 0, 0 2311 }; 2312 2313 if (version_greater(edid, 1, 2)) 2314 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure); 2315 2316 /* XXX should also look for CVT codes in VTB blocks */ 2317 2318 return closure.modes; 2319 } 2320 2321 static void 2322 do_detailed_mode(struct detailed_timing *timing, void *c) 2323 { 2324 struct detailed_mode_closure *closure = c; 2325 struct drm_display_mode *newmode; 2326 2327 if (timing->pixel_clock) { 2328 newmode = drm_mode_detailed(closure->connector->dev, 2329 closure->edid, timing, 2330 closure->quirks); 2331 if (!newmode) 2332 return; 2333 2334 if (closure->preferred) 2335 newmode->type |= DRM_MODE_TYPE_PREFERRED; 2336 2337 drm_mode_probed_add(closure->connector, newmode); 2338 closure->modes++; 2339 closure->preferred = 0; 2340 } 2341 } 2342 2343 /* 2344 * add_detailed_modes - Add modes from detailed timings 2345 * @connector: attached connector 2346 * @edid: EDID block to scan 2347 * @quirks: quirks to apply 2348 */ 2349 static int 2350 add_detailed_modes(struct drm_connector *connector, struct edid *edid, 2351 u32 quirks) 2352 { 2353 struct detailed_mode_closure closure = { 2354 connector, 2355 edid, 2356 1, 2357 quirks, 2358 0 2359 }; 2360 2361 if (closure.preferred && !version_greater(edid, 1, 3)) 2362 closure.preferred = 2363 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING); 2364 2365 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure); 2366 2367 return closure.modes; 2368 } 2369 2370 #define AUDIO_BLOCK 0x01 2371 #define VIDEO_BLOCK 0x02 2372 #define VENDOR_BLOCK 0x03 2373 #define SPEAKER_BLOCK 0x04 2374 #define VIDEO_CAPABILITY_BLOCK 0x07 2375 #define EDID_BASIC_AUDIO (1 << 6) 2376 #define EDID_CEA_YCRCB444 (1 << 5) 2377 #define EDID_CEA_YCRCB422 (1 << 4) 2378 #define EDID_CEA_VCDB_QS (1 << 6) 2379 2380 /* 2381 * Search EDID for CEA extension block. 2382 */ 2383 static u8 *drm_find_cea_extension(struct edid *edid) 2384 { 2385 u8 *edid_ext = NULL; 2386 int i; 2387 2388 /* No EDID or EDID extensions */ 2389 if (edid == NULL || edid->extensions == 0) 2390 return NULL; 2391 2392 /* Find CEA extension */ 2393 for (i = 0; i < edid->extensions; i++) { 2394 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1); 2395 if (edid_ext[0] == CEA_EXT) 2396 break; 2397 } 2398 2399 if (i == edid->extensions) 2400 return NULL; 2401 2402 return edid_ext; 2403 } 2404 2405 /* 2406 * Calculate the alternate clock for the CEA mode 2407 * (60Hz vs. 59.94Hz etc.) 2408 */ 2409 static unsigned int 2410 cea_mode_alternate_clock(const struct drm_display_mode *cea_mode) 2411 { 2412 unsigned int clock = cea_mode->clock; 2413 2414 if (cea_mode->vrefresh % 6 != 0) 2415 return clock; 2416 2417 /* 2418 * edid_cea_modes contains the 59.94Hz 2419 * variant for 240 and 480 line modes, 2420 * and the 60Hz variant otherwise. 2421 */ 2422 if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480) 2423 clock = clock * 1001 / 1000; 2424 else 2425 clock = DIV_ROUND_UP(clock * 1000, 1001); 2426 2427 return clock; 2428 } 2429 2430 /** 2431 * drm_match_cea_mode - look for a CEA mode matching given mode 2432 * @to_match: display mode 2433 * 2434 * Returns the CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861 2435 * mode. 2436 */ 2437 u8 drm_match_cea_mode(const struct drm_display_mode *to_match) 2438 { 2439 u8 mode; 2440 2441 if (!to_match->clock) 2442 return 0; 2443 2444 for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) { 2445 const struct drm_display_mode *cea_mode = &edid_cea_modes[mode]; 2446 unsigned int clock1, clock2; 2447 2448 /* Check both 60Hz and 59.94Hz */ 2449 clock1 = cea_mode->clock; 2450 clock2 = cea_mode_alternate_clock(cea_mode); 2451 2452 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) || 2453 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) && 2454 drm_mode_equal_no_clocks_no_stereo(to_match, cea_mode)) 2455 return mode + 1; 2456 } 2457 return 0; 2458 } 2459 EXPORT_SYMBOL(drm_match_cea_mode); 2460 2461 /* 2462 * Calculate the alternate clock for HDMI modes (those from the HDMI vendor 2463 * specific block). 2464 * 2465 * It's almost like cea_mode_alternate_clock(), we just need to add an 2466 * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this 2467 * one. 2468 */ 2469 static unsigned int 2470 hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode) 2471 { 2472 if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160) 2473 return hdmi_mode->clock; 2474 2475 return cea_mode_alternate_clock(hdmi_mode); 2476 } 2477 2478 /* 2479 * drm_match_hdmi_mode - look for a HDMI mode matching given mode 2480 * @to_match: display mode 2481 * 2482 * An HDMI mode is one defined in the HDMI vendor specific block. 2483 * 2484 * Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one. 2485 */ 2486 static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match) 2487 { 2488 u8 mode; 2489 2490 if (!to_match->clock) 2491 return 0; 2492 2493 for (mode = 0; mode < ARRAY_SIZE(edid_4k_modes); mode++) { 2494 const struct drm_display_mode *hdmi_mode = &edid_4k_modes[mode]; 2495 unsigned int clock1, clock2; 2496 2497 /* Make sure to also match alternate clocks */ 2498 clock1 = hdmi_mode->clock; 2499 clock2 = hdmi_mode_alternate_clock(hdmi_mode); 2500 2501 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) || 2502 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) && 2503 drm_mode_equal_no_clocks_no_stereo(to_match, hdmi_mode)) 2504 return mode + 1; 2505 } 2506 return 0; 2507 } 2508 2509 static int 2510 add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid) 2511 { 2512 struct drm_device *dev = connector->dev; 2513 struct drm_display_mode *mode, *tmp; 2514 LIST_HEAD(list); 2515 int modes = 0; 2516 2517 /* Don't add CEA modes if the CEA extension block is missing */ 2518 if (!drm_find_cea_extension(edid)) 2519 return 0; 2520 2521 /* 2522 * Go through all probed modes and create a new mode 2523 * with the alternate clock for certain CEA modes. 2524 */ 2525 list_for_each_entry(mode, &connector->probed_modes, head) { 2526 const struct drm_display_mode *cea_mode = NULL; 2527 struct drm_display_mode *newmode; 2528 u8 mode_idx = drm_match_cea_mode(mode) - 1; 2529 unsigned int clock1, clock2; 2530 2531 if (mode_idx < ARRAY_SIZE(edid_cea_modes)) { 2532 cea_mode = &edid_cea_modes[mode_idx]; 2533 clock2 = cea_mode_alternate_clock(cea_mode); 2534 } else { 2535 mode_idx = drm_match_hdmi_mode(mode) - 1; 2536 if (mode_idx < ARRAY_SIZE(edid_4k_modes)) { 2537 cea_mode = &edid_4k_modes[mode_idx]; 2538 clock2 = hdmi_mode_alternate_clock(cea_mode); 2539 } 2540 } 2541 2542 if (!cea_mode) 2543 continue; 2544 2545 clock1 = cea_mode->clock; 2546 2547 if (clock1 == clock2) 2548 continue; 2549 2550 if (mode->clock != clock1 && mode->clock != clock2) 2551 continue; 2552 2553 newmode = drm_mode_duplicate(dev, cea_mode); 2554 if (!newmode) 2555 continue; 2556 2557 /* Carry over the stereo flags */ 2558 newmode->flags |= mode->flags & DRM_MODE_FLAG_3D_MASK; 2559 2560 /* 2561 * The current mode could be either variant. Make 2562 * sure to pick the "other" clock for the new mode. 2563 */ 2564 if (mode->clock != clock1) 2565 newmode->clock = clock1; 2566 else 2567 newmode->clock = clock2; 2568 2569 list_add_tail(&newmode->head, &list); 2570 } 2571 2572 list_for_each_entry_safe(mode, tmp, &list, head) { 2573 list_del(&mode->head); 2574 drm_mode_probed_add(connector, mode); 2575 modes++; 2576 } 2577 2578 return modes; 2579 } 2580 2581 static struct drm_display_mode * 2582 drm_display_mode_from_vic_index(struct drm_connector *connector, 2583 const u8 *video_db, u8 video_len, 2584 u8 video_index) 2585 { 2586 struct drm_device *dev = connector->dev; 2587 struct drm_display_mode *newmode; 2588 u8 cea_mode; 2589 2590 if (video_db == NULL || video_index >= video_len) 2591 return NULL; 2592 2593 /* CEA modes are numbered 1..127 */ 2594 cea_mode = (video_db[video_index] & 127) - 1; 2595 if (cea_mode >= ARRAY_SIZE(edid_cea_modes)) 2596 return NULL; 2597 2598 newmode = drm_mode_duplicate(dev, &edid_cea_modes[cea_mode]); 2599 if (!newmode) 2600 return NULL; 2601 2602 newmode->vrefresh = 0; 2603 2604 return newmode; 2605 } 2606 2607 static int 2608 do_cea_modes(struct drm_connector *connector, const u8 *db, u8 len) 2609 { 2610 int i, modes = 0; 2611 2612 for (i = 0; i < len; i++) { 2613 struct drm_display_mode *mode; 2614 mode = drm_display_mode_from_vic_index(connector, db, len, i); 2615 if (mode) { 2616 drm_mode_probed_add(connector, mode); 2617 modes++; 2618 } 2619 } 2620 2621 return modes; 2622 } 2623 2624 struct stereo_mandatory_mode { 2625 int width, height, vrefresh; 2626 unsigned int flags; 2627 }; 2628 2629 static const struct stereo_mandatory_mode stereo_mandatory_modes[] = { 2630 { 1920, 1080, 24, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM }, 2631 { 1920, 1080, 24, DRM_MODE_FLAG_3D_FRAME_PACKING }, 2632 { 1920, 1080, 50, 2633 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF }, 2634 { 1920, 1080, 60, 2635 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF }, 2636 { 1280, 720, 50, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM }, 2637 { 1280, 720, 50, DRM_MODE_FLAG_3D_FRAME_PACKING }, 2638 { 1280, 720, 60, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM }, 2639 { 1280, 720, 60, DRM_MODE_FLAG_3D_FRAME_PACKING } 2640 }; 2641 2642 static bool 2643 stereo_match_mandatory(const struct drm_display_mode *mode, 2644 const struct stereo_mandatory_mode *stereo_mode) 2645 { 2646 unsigned int interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE; 2647 2648 return mode->hdisplay == stereo_mode->width && 2649 mode->vdisplay == stereo_mode->height && 2650 interlaced == (stereo_mode->flags & DRM_MODE_FLAG_INTERLACE) && 2651 drm_mode_vrefresh(mode) == stereo_mode->vrefresh; 2652 } 2653 2654 static int add_hdmi_mandatory_stereo_modes(struct drm_connector *connector) 2655 { 2656 struct drm_device *dev = connector->dev; 2657 const struct drm_display_mode *mode; 2658 struct list_head stereo_modes; 2659 int modes = 0, i; 2660 2661 INIT_LIST_HEAD(&stereo_modes); 2662 2663 list_for_each_entry(mode, &connector->probed_modes, head) { 2664 for (i = 0; i < ARRAY_SIZE(stereo_mandatory_modes); i++) { 2665 const struct stereo_mandatory_mode *mandatory; 2666 struct drm_display_mode *new_mode; 2667 2668 if (!stereo_match_mandatory(mode, 2669 &stereo_mandatory_modes[i])) 2670 continue; 2671 2672 mandatory = &stereo_mandatory_modes[i]; 2673 new_mode = drm_mode_duplicate(dev, mode); 2674 if (!new_mode) 2675 continue; 2676 2677 new_mode->flags |= mandatory->flags; 2678 list_add_tail(&new_mode->head, &stereo_modes); 2679 modes++; 2680 } 2681 } 2682 2683 list_splice_tail(&stereo_modes, &connector->probed_modes); 2684 2685 return modes; 2686 } 2687 2688 static int add_hdmi_mode(struct drm_connector *connector, u8 vic) 2689 { 2690 struct drm_device *dev = connector->dev; 2691 struct drm_display_mode *newmode; 2692 2693 vic--; /* VICs start at 1 */ 2694 if (vic >= ARRAY_SIZE(edid_4k_modes)) { 2695 DRM_ERROR("Unknown HDMI VIC: %d\n", vic); 2696 return 0; 2697 } 2698 2699 newmode = drm_mode_duplicate(dev, &edid_4k_modes[vic]); 2700 if (!newmode) 2701 return 0; 2702 2703 drm_mode_probed_add(connector, newmode); 2704 2705 return 1; 2706 } 2707 2708 static int add_3d_struct_modes(struct drm_connector *connector, u16 structure, 2709 const u8 *video_db, u8 video_len, u8 video_index) 2710 { 2711 struct drm_display_mode *newmode; 2712 int modes = 0; 2713 2714 if (structure & (1 << 0)) { 2715 newmode = drm_display_mode_from_vic_index(connector, video_db, 2716 video_len, 2717 video_index); 2718 if (newmode) { 2719 newmode->flags |= DRM_MODE_FLAG_3D_FRAME_PACKING; 2720 drm_mode_probed_add(connector, newmode); 2721 modes++; 2722 } 2723 } 2724 if (structure & (1 << 6)) { 2725 newmode = drm_display_mode_from_vic_index(connector, video_db, 2726 video_len, 2727 video_index); 2728 if (newmode) { 2729 newmode->flags |= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM; 2730 drm_mode_probed_add(connector, newmode); 2731 modes++; 2732 } 2733 } 2734 if (structure & (1 << 8)) { 2735 newmode = drm_display_mode_from_vic_index(connector, video_db, 2736 video_len, 2737 video_index); 2738 if (newmode) { 2739 newmode->flags |= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF; 2740 drm_mode_probed_add(connector, newmode); 2741 modes++; 2742 } 2743 } 2744 2745 return modes; 2746 } 2747 2748 /* 2749 * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block 2750 * @connector: connector corresponding to the HDMI sink 2751 * @db: start of the CEA vendor specific block 2752 * @len: length of the CEA block payload, ie. one can access up to db[len] 2753 * 2754 * Parses the HDMI VSDB looking for modes to add to @connector. This function 2755 * also adds the stereo 3d modes when applicable. 2756 */ 2757 static int 2758 do_hdmi_vsdb_modes(struct drm_connector *connector, const u8 *db, u8 len, 2759 const u8 *video_db, u8 video_len) 2760 { 2761 int modes = 0, offset = 0, i, multi_present = 0, multi_len; 2762 u8 vic_len, hdmi_3d_len = 0; 2763 u16 mask; 2764 u16 structure_all; 2765 2766 if (len < 8) 2767 goto out; 2768 2769 /* no HDMI_Video_Present */ 2770 if (!(db[8] & (1 << 5))) 2771 goto out; 2772 2773 /* Latency_Fields_Present */ 2774 if (db[8] & (1 << 7)) 2775 offset += 2; 2776 2777 /* I_Latency_Fields_Present */ 2778 if (db[8] & (1 << 6)) 2779 offset += 2; 2780 2781 /* the declared length is not long enough for the 2 first bytes 2782 * of additional video format capabilities */ 2783 if (len < (8 + offset + 2)) 2784 goto out; 2785 2786 /* 3D_Present */ 2787 offset++; 2788 if (db[8 + offset] & (1 << 7)) { 2789 modes += add_hdmi_mandatory_stereo_modes(connector); 2790 2791 /* 3D_Multi_present */ 2792 multi_present = (db[8 + offset] & 0x60) >> 5; 2793 } 2794 2795 offset++; 2796 vic_len = db[8 + offset] >> 5; 2797 hdmi_3d_len = db[8 + offset] & 0x1f; 2798 2799 for (i = 0; i < vic_len && len >= (9 + offset + i); i++) { 2800 u8 vic; 2801 2802 vic = db[9 + offset + i]; 2803 modes += add_hdmi_mode(connector, vic); 2804 } 2805 offset += 1 + vic_len; 2806 2807 if (multi_present == 1) 2808 multi_len = 2; 2809 else if (multi_present == 2) 2810 multi_len = 4; 2811 else 2812 multi_len = 0; 2813 2814 if (len < (8 + offset + hdmi_3d_len - 1)) 2815 goto out; 2816 2817 if (hdmi_3d_len < multi_len) 2818 goto out; 2819 2820 if (multi_present == 1 || multi_present == 2) { 2821 /* 3D_Structure_ALL */ 2822 structure_all = (db[8 + offset] << 8) | db[9 + offset]; 2823 2824 /* check if 3D_MASK is present */ 2825 if (multi_present == 2) 2826 mask = (db[10 + offset] << 8) | db[11 + offset]; 2827 else 2828 mask = 0xffff; 2829 2830 for (i = 0; i < 16; i++) { 2831 if (mask & (1 << i)) 2832 modes += add_3d_struct_modes(connector, 2833 structure_all, 2834 video_db, 2835 video_len, i); 2836 } 2837 } 2838 2839 offset += multi_len; 2840 2841 for (i = 0; i < (hdmi_3d_len - multi_len); i++) { 2842 int vic_index; 2843 struct drm_display_mode *newmode = NULL; 2844 unsigned int newflag = 0; 2845 bool detail_present; 2846 2847 detail_present = ((db[8 + offset + i] & 0x0f) > 7); 2848 2849 if (detail_present && (i + 1 == hdmi_3d_len - multi_len)) 2850 break; 2851 2852 /* 2D_VIC_order_X */ 2853 vic_index = db[8 + offset + i] >> 4; 2854 2855 /* 3D_Structure_X */ 2856 switch (db[8 + offset + i] & 0x0f) { 2857 case 0: 2858 newflag = DRM_MODE_FLAG_3D_FRAME_PACKING; 2859 break; 2860 case 6: 2861 newflag = DRM_MODE_FLAG_3D_TOP_AND_BOTTOM; 2862 break; 2863 case 8: 2864 /* 3D_Detail_X */ 2865 if ((db[9 + offset + i] >> 4) == 1) 2866 newflag = DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF; 2867 break; 2868 } 2869 2870 if (newflag != 0) { 2871 newmode = drm_display_mode_from_vic_index(connector, 2872 video_db, 2873 video_len, 2874 vic_index); 2875 2876 if (newmode) { 2877 newmode->flags |= newflag; 2878 drm_mode_probed_add(connector, newmode); 2879 modes++; 2880 } 2881 } 2882 2883 if (detail_present) 2884 i++; 2885 } 2886 2887 out: 2888 return modes; 2889 } 2890 2891 static int 2892 cea_db_payload_len(const u8 *db) 2893 { 2894 return db[0] & 0x1f; 2895 } 2896 2897 static int 2898 cea_db_tag(const u8 *db) 2899 { 2900 return db[0] >> 5; 2901 } 2902 2903 static int 2904 cea_revision(const u8 *cea) 2905 { 2906 return cea[1]; 2907 } 2908 2909 static int 2910 cea_db_offsets(const u8 *cea, int *start, int *end) 2911 { 2912 /* Data block offset in CEA extension block */ 2913 *start = 4; 2914 *end = cea[2]; 2915 if (*end == 0) 2916 *end = 127; 2917 if (*end < 4 || *end > 127) 2918 return -ERANGE; 2919 return 0; 2920 } 2921 2922 static bool cea_db_is_hdmi_vsdb(const u8 *db) 2923 { 2924 int hdmi_id; 2925 2926 if (cea_db_tag(db) != VENDOR_BLOCK) 2927 return false; 2928 2929 if (cea_db_payload_len(db) < 5) 2930 return false; 2931 2932 hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16); 2933 2934 return hdmi_id == HDMI_IEEE_OUI; 2935 } 2936 2937 #define for_each_cea_db(cea, i, start, end) \ 2938 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1) 2939 2940 static int 2941 add_cea_modes(struct drm_connector *connector, struct edid *edid) 2942 { 2943 const u8 *cea = drm_find_cea_extension(edid); 2944 const u8 *db, *hdmi = NULL, *video = NULL; 2945 u8 dbl, hdmi_len, video_len = 0; 2946 int modes = 0; 2947 2948 if (cea && cea_revision(cea) >= 3) { 2949 int i, start, end; 2950 2951 if (cea_db_offsets(cea, &start, &end)) 2952 return 0; 2953 2954 for_each_cea_db(cea, i, start, end) { 2955 db = &cea[i]; 2956 dbl = cea_db_payload_len(db); 2957 2958 if (cea_db_tag(db) == VIDEO_BLOCK) { 2959 video = db + 1; 2960 video_len = dbl; 2961 modes += do_cea_modes(connector, video, dbl); 2962 } 2963 else if (cea_db_is_hdmi_vsdb(db)) { 2964 hdmi = db; 2965 hdmi_len = dbl; 2966 } 2967 } 2968 } 2969 2970 /* 2971 * We parse the HDMI VSDB after having added the cea modes as we will 2972 * be patching their flags when the sink supports stereo 3D. 2973 */ 2974 if (hdmi) 2975 modes += do_hdmi_vsdb_modes(connector, hdmi, hdmi_len, video, 2976 video_len); 2977 2978 return modes; 2979 } 2980 2981 static void 2982 parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db) 2983 { 2984 u8 len = cea_db_payload_len(db); 2985 2986 if (len >= 6) { 2987 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */ 2988 connector->dvi_dual = db[6] & 1; 2989 } 2990 if (len >= 7) 2991 connector->max_tmds_clock = db[7] * 5; 2992 if (len >= 8) { 2993 connector->latency_present[0] = db[8] >> 7; 2994 connector->latency_present[1] = (db[8] >> 6) & 1; 2995 } 2996 if (len >= 9) 2997 connector->video_latency[0] = db[9]; 2998 if (len >= 10) 2999 connector->audio_latency[0] = db[10]; 3000 if (len >= 11) 3001 connector->video_latency[1] = db[11]; 3002 if (len >= 12) 3003 connector->audio_latency[1] = db[12]; 3004 3005 DRM_DEBUG_KMS("HDMI: DVI dual %d, " 3006 "max TMDS clock %d, " 3007 "latency present %d %d, " 3008 "video latency %d %d, " 3009 "audio latency %d %d\n", 3010 connector->dvi_dual, 3011 connector->max_tmds_clock, 3012 (int) connector->latency_present[0], 3013 (int) connector->latency_present[1], 3014 connector->video_latency[0], 3015 connector->video_latency[1], 3016 connector->audio_latency[0], 3017 connector->audio_latency[1]); 3018 } 3019 3020 static void 3021 monitor_name(struct detailed_timing *t, void *data) 3022 { 3023 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME) 3024 *(u8 **)data = t->data.other_data.data.str.str; 3025 } 3026 3027 /** 3028 * drm_edid_to_eld - build ELD from EDID 3029 * @connector: connector corresponding to the HDMI/DP sink 3030 * @edid: EDID to parse 3031 * 3032 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. 3033 * Some ELD fields are left to the graphics driver caller: 3034 * - Conn_Type 3035 * - HDCP 3036 * - Port_ID 3037 */ 3038 void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid) 3039 { 3040 uint8_t *eld = connector->eld; 3041 u8 *cea; 3042 u8 *name; 3043 u8 *db; 3044 int sad_count = 0; 3045 int mnl; 3046 int dbl; 3047 3048 memset(eld, 0, sizeof(connector->eld)); 3049 3050 cea = drm_find_cea_extension(edid); 3051 if (!cea) { 3052 DRM_DEBUG_KMS("ELD: no CEA Extension found\n"); 3053 return; 3054 } 3055 3056 name = NULL; 3057 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name); 3058 for (mnl = 0; name && mnl < 13; mnl++) { 3059 if (name[mnl] == 0x0a) 3060 break; 3061 eld[20 + mnl] = name[mnl]; 3062 } 3063 eld[4] = (cea[1] << 5) | mnl; 3064 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20); 3065 3066 eld[0] = 2 << 3; /* ELD version: 2 */ 3067 3068 eld[16] = edid->mfg_id[0]; 3069 eld[17] = edid->mfg_id[1]; 3070 eld[18] = edid->prod_code[0]; 3071 eld[19] = edid->prod_code[1]; 3072 3073 if (cea_revision(cea) >= 3) { 3074 int i, start, end; 3075 3076 if (cea_db_offsets(cea, &start, &end)) { 3077 start = 0; 3078 end = 0; 3079 } 3080 3081 for_each_cea_db(cea, i, start, end) { 3082 db = &cea[i]; 3083 dbl = cea_db_payload_len(db); 3084 3085 switch (cea_db_tag(db)) { 3086 case AUDIO_BLOCK: 3087 /* Audio Data Block, contains SADs */ 3088 sad_count = dbl / 3; 3089 if (dbl >= 1) 3090 memcpy(eld + 20 + mnl, &db[1], dbl); 3091 break; 3092 case SPEAKER_BLOCK: 3093 /* Speaker Allocation Data Block */ 3094 if (dbl >= 1) 3095 eld[7] = db[1]; 3096 break; 3097 case VENDOR_BLOCK: 3098 /* HDMI Vendor-Specific Data Block */ 3099 if (cea_db_is_hdmi_vsdb(db)) 3100 parse_hdmi_vsdb(connector, db); 3101 break; 3102 default: 3103 break; 3104 } 3105 } 3106 } 3107 eld[5] |= sad_count << 4; 3108 eld[2] = (20 + mnl + sad_count * 3 + 3) / 4; 3109 3110 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count); 3111 } 3112 EXPORT_SYMBOL(drm_edid_to_eld); 3113 3114 /** 3115 * drm_edid_to_sad - extracts SADs from EDID 3116 * @edid: EDID to parse 3117 * @sads: pointer that will be set to the extracted SADs 3118 * 3119 * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it. 3120 * Note: returned pointer needs to be kfreed 3121 * 3122 * Return number of found SADs or negative number on error. 3123 */ 3124 int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads) 3125 { 3126 int count = 0; 3127 int i, start, end, dbl; 3128 u8 *cea; 3129 3130 cea = drm_find_cea_extension(edid); 3131 if (!cea) { 3132 DRM_DEBUG_KMS("SAD: no CEA Extension found\n"); 3133 return -ENOENT; 3134 } 3135 3136 if (cea_revision(cea) < 3) { 3137 DRM_DEBUG_KMS("SAD: wrong CEA revision\n"); 3138 return -ENOTSUPP; 3139 } 3140 3141 if (cea_db_offsets(cea, &start, &end)) { 3142 DRM_DEBUG_KMS("SAD: invalid data block offsets\n"); 3143 return -EPROTO; 3144 } 3145 3146 for_each_cea_db(cea, i, start, end) { 3147 u8 *db = &cea[i]; 3148 3149 if (cea_db_tag(db) == AUDIO_BLOCK) { 3150 int j; 3151 dbl = cea_db_payload_len(db); 3152 3153 count = dbl / 3; /* SAD is 3B */ 3154 *sads = kcalloc(count, sizeof(**sads), GFP_KERNEL); 3155 if (!*sads) 3156 return -ENOMEM; 3157 for (j = 0; j < count; j++) { 3158 u8 *sad = &db[1 + j * 3]; 3159 3160 (*sads)[j].format = (sad[0] & 0x78) >> 3; 3161 (*sads)[j].channels = sad[0] & 0x7; 3162 (*sads)[j].freq = sad[1] & 0x7F; 3163 (*sads)[j].byte2 = sad[2]; 3164 } 3165 break; 3166 } 3167 } 3168 3169 return count; 3170 } 3171 EXPORT_SYMBOL(drm_edid_to_sad); 3172 3173 /** 3174 * drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks from EDID 3175 * @edid: EDID to parse 3176 * @sadb: pointer to the speaker block 3177 * 3178 * Looks for CEA EDID block and extracts the Speaker Allocation Data Block from it. 3179 * Note: returned pointer needs to be kfreed 3180 * 3181 * Return number of found Speaker Allocation Blocks or negative number on error. 3182 */ 3183 int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb) 3184 { 3185 int count = 0; 3186 int i, start, end, dbl; 3187 const u8 *cea; 3188 3189 cea = drm_find_cea_extension(edid); 3190 if (!cea) { 3191 DRM_DEBUG_KMS("SAD: no CEA Extension found\n"); 3192 return -ENOENT; 3193 } 3194 3195 if (cea_revision(cea) < 3) { 3196 DRM_DEBUG_KMS("SAD: wrong CEA revision\n"); 3197 return -ENOTSUPP; 3198 } 3199 3200 if (cea_db_offsets(cea, &start, &end)) { 3201 DRM_DEBUG_KMS("SAD: invalid data block offsets\n"); 3202 return -EPROTO; 3203 } 3204 3205 for_each_cea_db(cea, i, start, end) { 3206 const u8 *db = &cea[i]; 3207 3208 if (cea_db_tag(db) == SPEAKER_BLOCK) { 3209 dbl = cea_db_payload_len(db); 3210 3211 /* Speaker Allocation Data Block */ 3212 if (dbl == 3) { 3213 *sadb = kmalloc(dbl, GFP_KERNEL); 3214 if (!*sadb) 3215 return -ENOMEM; 3216 memcpy(*sadb, &db[1], dbl); 3217 count = dbl; 3218 break; 3219 } 3220 } 3221 } 3222 3223 return count; 3224 } 3225 EXPORT_SYMBOL(drm_edid_to_speaker_allocation); 3226 3227 /** 3228 * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond 3229 * @connector: connector associated with the HDMI/DP sink 3230 * @mode: the display mode 3231 */ 3232 int drm_av_sync_delay(struct drm_connector *connector, 3233 struct drm_display_mode *mode) 3234 { 3235 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); 3236 int a, v; 3237 3238 if (!connector->latency_present[0]) 3239 return 0; 3240 if (!connector->latency_present[1]) 3241 i = 0; 3242 3243 a = connector->audio_latency[i]; 3244 v = connector->video_latency[i]; 3245 3246 /* 3247 * HDMI/DP sink doesn't support audio or video? 3248 */ 3249 if (a == 255 || v == 255) 3250 return 0; 3251 3252 /* 3253 * Convert raw EDID values to millisecond. 3254 * Treat unknown latency as 0ms. 3255 */ 3256 if (a) 3257 a = min(2 * (a - 1), 500); 3258 if (v) 3259 v = min(2 * (v - 1), 500); 3260 3261 return max(v - a, 0); 3262 } 3263 EXPORT_SYMBOL(drm_av_sync_delay); 3264 3265 /** 3266 * drm_select_eld - select one ELD from multiple HDMI/DP sinks 3267 * @encoder: the encoder just changed display mode 3268 * @mode: the adjusted display mode 3269 * 3270 * It's possible for one encoder to be associated with multiple HDMI/DP sinks. 3271 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD. 3272 */ 3273 struct drm_connector *drm_select_eld(struct drm_encoder *encoder, 3274 struct drm_display_mode *mode) 3275 { 3276 struct drm_connector *connector; 3277 struct drm_device *dev = encoder->dev; 3278 3279 list_for_each_entry(connector, &dev->mode_config.connector_list, head) 3280 if (connector->encoder == encoder && connector->eld[0]) 3281 return connector; 3282 3283 return NULL; 3284 } 3285 EXPORT_SYMBOL(drm_select_eld); 3286 3287 /** 3288 * drm_detect_hdmi_monitor - detect whether monitor is hdmi. 3289 * @edid: monitor EDID information 3290 * 3291 * Parse the CEA extension according to CEA-861-B. 3292 * Return true if HDMI, false if not or unknown. 3293 */ 3294 bool drm_detect_hdmi_monitor(struct edid *edid) 3295 { 3296 u8 *edid_ext; 3297 int i; 3298 int start_offset, end_offset; 3299 3300 edid_ext = drm_find_cea_extension(edid); 3301 if (!edid_ext) 3302 return false; 3303 3304 if (cea_db_offsets(edid_ext, &start_offset, &end_offset)) 3305 return false; 3306 3307 /* 3308 * Because HDMI identifier is in Vendor Specific Block, 3309 * search it from all data blocks of CEA extension. 3310 */ 3311 for_each_cea_db(edid_ext, i, start_offset, end_offset) { 3312 if (cea_db_is_hdmi_vsdb(&edid_ext[i])) 3313 return true; 3314 } 3315 3316 return false; 3317 } 3318 EXPORT_SYMBOL(drm_detect_hdmi_monitor); 3319 3320 /** 3321 * drm_detect_monitor_audio - check monitor audio capability 3322 * @edid: EDID block to scan 3323 * 3324 * Monitor should have CEA extension block. 3325 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic 3326 * audio' only. If there is any audio extension block and supported 3327 * audio format, assume at least 'basic audio' support, even if 'basic 3328 * audio' is not defined in EDID. 3329 * 3330 */ 3331 bool drm_detect_monitor_audio(struct edid *edid) 3332 { 3333 u8 *edid_ext; 3334 int i, j; 3335 bool has_audio = false; 3336 int start_offset, end_offset; 3337 3338 edid_ext = drm_find_cea_extension(edid); 3339 if (!edid_ext) 3340 goto end; 3341 3342 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0); 3343 3344 if (has_audio) { 3345 DRM_DEBUG_KMS("Monitor has basic audio support\n"); 3346 goto end; 3347 } 3348 3349 if (cea_db_offsets(edid_ext, &start_offset, &end_offset)) 3350 goto end; 3351 3352 for_each_cea_db(edid_ext, i, start_offset, end_offset) { 3353 if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) { 3354 has_audio = true; 3355 for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3) 3356 DRM_DEBUG_KMS("CEA audio format %d\n", 3357 (edid_ext[i + j] >> 3) & 0xf); 3358 goto end; 3359 } 3360 } 3361 end: 3362 return has_audio; 3363 } 3364 EXPORT_SYMBOL(drm_detect_monitor_audio); 3365 3366 /** 3367 * drm_rgb_quant_range_selectable - is RGB quantization range selectable? 3368 * @edid: EDID block to scan 3369 * 3370 * Check whether the monitor reports the RGB quantization range selection 3371 * as supported. The AVI infoframe can then be used to inform the monitor 3372 * which quantization range (full or limited) is used. 3373 */ 3374 bool drm_rgb_quant_range_selectable(struct edid *edid) 3375 { 3376 u8 *edid_ext; 3377 int i, start, end; 3378 3379 edid_ext = drm_find_cea_extension(edid); 3380 if (!edid_ext) 3381 return false; 3382 3383 if (cea_db_offsets(edid_ext, &start, &end)) 3384 return false; 3385 3386 for_each_cea_db(edid_ext, i, start, end) { 3387 if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK && 3388 cea_db_payload_len(&edid_ext[i]) == 2) { 3389 DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]); 3390 return edid_ext[i + 2] & EDID_CEA_VCDB_QS; 3391 } 3392 } 3393 3394 return false; 3395 } 3396 EXPORT_SYMBOL(drm_rgb_quant_range_selectable); 3397 3398 /** 3399 * drm_add_display_info - pull display info out if present 3400 * @edid: EDID data 3401 * @info: display info (attached to connector) 3402 * 3403 * Grab any available display info and stuff it into the drm_display_info 3404 * structure that's part of the connector. Useful for tracking bpp and 3405 * color spaces. 3406 */ 3407 static void drm_add_display_info(struct edid *edid, 3408 struct drm_display_info *info) 3409 { 3410 u8 *edid_ext; 3411 3412 info->width_mm = edid->width_cm * 10; 3413 info->height_mm = edid->height_cm * 10; 3414 3415 /* driver figures it out in this case */ 3416 info->bpc = 0; 3417 info->color_formats = 0; 3418 3419 if (edid->revision < 3) 3420 return; 3421 3422 if (!(edid->input & DRM_EDID_INPUT_DIGITAL)) 3423 return; 3424 3425 /* Get data from CEA blocks if present */ 3426 edid_ext = drm_find_cea_extension(edid); 3427 if (edid_ext) { 3428 info->cea_rev = edid_ext[1]; 3429 3430 /* The existence of a CEA block should imply RGB support */ 3431 info->color_formats = DRM_COLOR_FORMAT_RGB444; 3432 if (edid_ext[3] & EDID_CEA_YCRCB444) 3433 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; 3434 if (edid_ext[3] & EDID_CEA_YCRCB422) 3435 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; 3436 } 3437 3438 /* Only defined for 1.4 with digital displays */ 3439 if (edid->revision < 4) 3440 return; 3441 3442 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) { 3443 case DRM_EDID_DIGITAL_DEPTH_6: 3444 info->bpc = 6; 3445 break; 3446 case DRM_EDID_DIGITAL_DEPTH_8: 3447 info->bpc = 8; 3448 break; 3449 case DRM_EDID_DIGITAL_DEPTH_10: 3450 info->bpc = 10; 3451 break; 3452 case DRM_EDID_DIGITAL_DEPTH_12: 3453 info->bpc = 12; 3454 break; 3455 case DRM_EDID_DIGITAL_DEPTH_14: 3456 info->bpc = 14; 3457 break; 3458 case DRM_EDID_DIGITAL_DEPTH_16: 3459 info->bpc = 16; 3460 break; 3461 case DRM_EDID_DIGITAL_DEPTH_UNDEF: 3462 default: 3463 info->bpc = 0; 3464 break; 3465 } 3466 3467 info->color_formats |= DRM_COLOR_FORMAT_RGB444; 3468 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444) 3469 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; 3470 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422) 3471 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; 3472 } 3473 3474 /** 3475 * drm_add_edid_modes - add modes from EDID data, if available 3476 * @connector: connector we're probing 3477 * @edid: edid data 3478 * 3479 * Add the specified modes to the connector's mode list. 3480 * 3481 * Return number of modes added or 0 if we couldn't find any. 3482 */ 3483 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) 3484 { 3485 int num_modes = 0; 3486 u32 quirks; 3487 3488 if (edid == NULL) { 3489 return 0; 3490 } 3491 if (!drm_edid_is_valid(edid)) { 3492 dev_warn(connector->dev->dev, "%s: EDID invalid.\n", 3493 drm_get_connector_name(connector)); 3494 return 0; 3495 } 3496 3497 quirks = edid_get_quirks(edid); 3498 3499 /* 3500 * EDID spec says modes should be preferred in this order: 3501 * - preferred detailed mode 3502 * - other detailed modes from base block 3503 * - detailed modes from extension blocks 3504 * - CVT 3-byte code modes 3505 * - standard timing codes 3506 * - established timing codes 3507 * - modes inferred from GTF or CVT range information 3508 * 3509 * We get this pretty much right. 3510 * 3511 * XXX order for additional mode types in extension blocks? 3512 */ 3513 num_modes += add_detailed_modes(connector, edid, quirks); 3514 num_modes += add_cvt_modes(connector, edid); 3515 num_modes += add_standard_modes(connector, edid); 3516 num_modes += add_established_modes(connector, edid); 3517 if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) 3518 num_modes += add_inferred_modes(connector, edid); 3519 num_modes += add_cea_modes(connector, edid); 3520 num_modes += add_alternate_cea_modes(connector, edid); 3521 3522 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75)) 3523 edid_fixup_preferred(connector, quirks); 3524 3525 drm_add_display_info(edid, &connector->display_info); 3526 3527 if (quirks & EDID_QUIRK_FORCE_8BPC) 3528 connector->display_info.bpc = 8; 3529 3530 return num_modes; 3531 } 3532 EXPORT_SYMBOL(drm_add_edid_modes); 3533 3534 /** 3535 * drm_add_modes_noedid - add modes for the connectors without EDID 3536 * @connector: connector we're probing 3537 * @hdisplay: the horizontal display limit 3538 * @vdisplay: the vertical display limit 3539 * 3540 * Add the specified modes to the connector's mode list. Only when the 3541 * hdisplay/vdisplay is not beyond the given limit, it will be added. 3542 * 3543 * Return number of modes added or 0 if we couldn't find any. 3544 */ 3545 int drm_add_modes_noedid(struct drm_connector *connector, 3546 int hdisplay, int vdisplay) 3547 { 3548 int i, count, num_modes = 0; 3549 struct drm_display_mode *mode; 3550 struct drm_device *dev = connector->dev; 3551 3552 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); 3553 if (hdisplay < 0) 3554 hdisplay = 0; 3555 if (vdisplay < 0) 3556 vdisplay = 0; 3557 3558 for (i = 0; i < count; i++) { 3559 const struct drm_display_mode *ptr = &drm_dmt_modes[i]; 3560 if (hdisplay && vdisplay) { 3561 /* 3562 * Only when two are valid, they will be used to check 3563 * whether the mode should be added to the mode list of 3564 * the connector. 3565 */ 3566 if (ptr->hdisplay > hdisplay || 3567 ptr->vdisplay > vdisplay) 3568 continue; 3569 } 3570 if (drm_mode_vrefresh(ptr) > 61) 3571 continue; 3572 mode = drm_mode_duplicate(dev, ptr); 3573 if (mode) { 3574 drm_mode_probed_add(connector, mode); 3575 num_modes++; 3576 } 3577 } 3578 return num_modes; 3579 } 3580 EXPORT_SYMBOL(drm_add_modes_noedid); 3581 3582 void drm_set_preferred_mode(struct drm_connector *connector, 3583 int hpref, int vpref) 3584 { 3585 struct drm_display_mode *mode; 3586 3587 list_for_each_entry(mode, &connector->probed_modes, head) { 3588 if (mode->hdisplay == hpref && 3589 mode->vdisplay == vpref) 3590 mode->type |= DRM_MODE_TYPE_PREFERRED; 3591 } 3592 } 3593 EXPORT_SYMBOL(drm_set_preferred_mode); 3594 3595 /** 3596 * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with 3597 * data from a DRM display mode 3598 * @frame: HDMI AVI infoframe 3599 * @mode: DRM display mode 3600 * 3601 * Returns 0 on success or a negative error code on failure. 3602 */ 3603 int 3604 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame, 3605 const struct drm_display_mode *mode) 3606 { 3607 int err; 3608 3609 if (!frame || !mode) 3610 return -EINVAL; 3611 3612 err = hdmi_avi_infoframe_init(frame); 3613 if (err < 0) 3614 return err; 3615 3616 if (mode->flags & DRM_MODE_FLAG_DBLCLK) 3617 frame->pixel_repeat = 1; 3618 3619 frame->video_code = drm_match_cea_mode(mode); 3620 3621 frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE; 3622 frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE; 3623 frame->scan_mode = HDMI_SCAN_MODE_UNDERSCAN; 3624 3625 return 0; 3626 } 3627 EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode); 3628 3629 static enum hdmi_3d_structure 3630 s3d_structure_from_display_mode(const struct drm_display_mode *mode) 3631 { 3632 u32 layout = mode->flags & DRM_MODE_FLAG_3D_MASK; 3633 3634 switch (layout) { 3635 case DRM_MODE_FLAG_3D_FRAME_PACKING: 3636 return HDMI_3D_STRUCTURE_FRAME_PACKING; 3637 case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE: 3638 return HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE; 3639 case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE: 3640 return HDMI_3D_STRUCTURE_LINE_ALTERNATIVE; 3641 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL: 3642 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL; 3643 case DRM_MODE_FLAG_3D_L_DEPTH: 3644 return HDMI_3D_STRUCTURE_L_DEPTH; 3645 case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH: 3646 return HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH; 3647 case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM: 3648 return HDMI_3D_STRUCTURE_TOP_AND_BOTTOM; 3649 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF: 3650 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF; 3651 default: 3652 return HDMI_3D_STRUCTURE_INVALID; 3653 } 3654 } 3655 3656 /** 3657 * drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with 3658 * data from a DRM display mode 3659 * @frame: HDMI vendor infoframe 3660 * @mode: DRM display mode 3661 * 3662 * Note that there's is a need to send HDMI vendor infoframes only when using a 3663 * 4k or stereoscopic 3D mode. So when giving any other mode as input this 3664 * function will return -EINVAL, error that can be safely ignored. 3665 * 3666 * Returns 0 on success or a negative error code on failure. 3667 */ 3668 int 3669 drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame, 3670 const struct drm_display_mode *mode) 3671 { 3672 int err; 3673 u32 s3d_flags; 3674 u8 vic; 3675 3676 if (!frame || !mode) 3677 return -EINVAL; 3678 3679 vic = drm_match_hdmi_mode(mode); 3680 s3d_flags = mode->flags & DRM_MODE_FLAG_3D_MASK; 3681 3682 if (!vic && !s3d_flags) 3683 return -EINVAL; 3684 3685 if (vic && s3d_flags) 3686 return -EINVAL; 3687 3688 err = hdmi_vendor_infoframe_init(frame); 3689 if (err < 0) 3690 return err; 3691 3692 if (vic) 3693 frame->vic = vic; 3694 else 3695 frame->s3d_struct = s3d_structure_from_display_mode(mode); 3696 3697 return 0; 3698 } 3699 EXPORT_SYMBOL(drm_hdmi_vendor_infoframe_from_display_mode); 3700