1*677dec6eSriastradh /* $NetBSD: radeon_asic.h,v 1.3 2021/12/18 23:45:43 riastradh Exp $ */ 2d350ecf5Sriastradh 3cb459498Sriastradh /* 4cb459498Sriastradh * Copyright 2008 Advanced Micro Devices, Inc. 5cb459498Sriastradh * Copyright 2008 Red Hat Inc. 6cb459498Sriastradh * Copyright 2009 Jerome Glisse. 7cb459498Sriastradh * 8cb459498Sriastradh * Permission is hereby granted, free of charge, to any person obtaining a 9cb459498Sriastradh * copy of this software and associated documentation files (the "Software"), 10cb459498Sriastradh * to deal in the Software without restriction, including without limitation 11cb459498Sriastradh * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12cb459498Sriastradh * and/or sell copies of the Software, and to permit persons to whom the 13cb459498Sriastradh * Software is furnished to do so, subject to the following conditions: 14cb459498Sriastradh * 15cb459498Sriastradh * The above copyright notice and this permission notice shall be included in 16cb459498Sriastradh * all copies or substantial portions of the Software. 17cb459498Sriastradh * 18cb459498Sriastradh * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19cb459498Sriastradh * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20cb459498Sriastradh * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21cb459498Sriastradh * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 22cb459498Sriastradh * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 23cb459498Sriastradh * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 24cb459498Sriastradh * OTHER DEALINGS IN THE SOFTWARE. 25cb459498Sriastradh * 26cb459498Sriastradh * Authors: Dave Airlie 27cb459498Sriastradh * Alex Deucher 28cb459498Sriastradh * Jerome Glisse 29cb459498Sriastradh */ 30cb459498Sriastradh #ifndef __RADEON_ASIC_H__ 31cb459498Sriastradh #define __RADEON_ASIC_H__ 32cb459498Sriastradh 33cb459498Sriastradh /* 34cb459498Sriastradh * common functions 35cb459498Sriastradh */ 36cb459498Sriastradh uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev); 37cb459498Sriastradh void radeon_legacy_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); 38cb459498Sriastradh uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev); 39cb459498Sriastradh void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable); 40cb459498Sriastradh 41cb459498Sriastradh uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev); 42cb459498Sriastradh void radeon_atom_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); 43cb459498Sriastradh uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev); 44cb459498Sriastradh void radeon_atom_set_memory_clock(struct radeon_device *rdev, uint32_t mem_clock); 45cb459498Sriastradh void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable); 46cb459498Sriastradh 47cb459498Sriastradh void atombios_set_backlight_level(struct radeon_encoder *radeon_encoder, u8 level); 48cb459498Sriastradh u8 atombios_get_backlight_level(struct radeon_encoder *radeon_encoder); 49cb459498Sriastradh void radeon_legacy_set_backlight_level(struct radeon_encoder *radeon_encoder, u8 level); 50cb459498Sriastradh u8 radeon_legacy_get_backlight_level(struct radeon_encoder *radeon_encoder); 51cb459498Sriastradh 52cb459498Sriastradh /* 53cb459498Sriastradh * r100,rv100,rs100,rv200,rs200 54cb459498Sriastradh */ 55cb459498Sriastradh struct r100_mc_save { 56cb459498Sriastradh u32 GENMO_WT; 57cb459498Sriastradh u32 CRTC_EXT_CNTL; 58cb459498Sriastradh u32 CRTC_GEN_CNTL; 59cb459498Sriastradh u32 CRTC2_GEN_CNTL; 60cb459498Sriastradh u32 CUR_OFFSET; 61cb459498Sriastradh u32 CUR2_OFFSET; 62cb459498Sriastradh }; 63cb459498Sriastradh int r100_init(struct radeon_device *rdev); 64cb459498Sriastradh void r100_fini(struct radeon_device *rdev); 65cb459498Sriastradh int r100_suspend(struct radeon_device *rdev); 66cb459498Sriastradh int r100_resume(struct radeon_device *rdev); 67cb459498Sriastradh void r100_vga_set_state(struct radeon_device *rdev, bool state); 68cb459498Sriastradh bool r100_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); 69*677dec6eSriastradh int r100_asic_reset(struct radeon_device *rdev, bool hard); 70cb459498Sriastradh u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc); 71cb459498Sriastradh void r100_pci_gart_tlb_flush(struct radeon_device *rdev); 72d350ecf5Sriastradh uint64_t r100_pci_gart_get_page_entry(uint64_t addr, uint32_t flags); 73d350ecf5Sriastradh void r100_pci_gart_set_page(struct radeon_device *rdev, unsigned i, 74d350ecf5Sriastradh uint64_t entry); 75cb459498Sriastradh void r100_ring_start(struct radeon_device *rdev, struct radeon_ring *ring); 76cb459498Sriastradh int r100_irq_set(struct radeon_device *rdev); 77cb459498Sriastradh int r100_irq_process(struct radeon_device *rdev); 78cb459498Sriastradh void r100_fence_ring_emit(struct radeon_device *rdev, 79cb459498Sriastradh struct radeon_fence *fence); 80cb459498Sriastradh bool r100_semaphore_ring_emit(struct radeon_device *rdev, 81cb459498Sriastradh struct radeon_ring *cp, 82cb459498Sriastradh struct radeon_semaphore *semaphore, 83cb459498Sriastradh bool emit_wait); 84cb459498Sriastradh int r100_cs_parse(struct radeon_cs_parser *p); 85cb459498Sriastradh void r100_pll_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); 86cb459498Sriastradh uint32_t r100_pll_rreg(struct radeon_device *rdev, uint32_t reg); 87d350ecf5Sriastradh struct radeon_fence *r100_copy_blit(struct radeon_device *rdev, 88cb459498Sriastradh uint64_t src_offset, 89cb459498Sriastradh uint64_t dst_offset, 90cb459498Sriastradh unsigned num_gpu_pages, 91*677dec6eSriastradh struct dma_resv *resv); 92cb459498Sriastradh int r100_set_surface_reg(struct radeon_device *rdev, int reg, 93cb459498Sriastradh uint32_t tiling_flags, uint32_t pitch, 94cb459498Sriastradh uint32_t offset, uint32_t obj_size); 95cb459498Sriastradh void r100_clear_surface_reg(struct radeon_device *rdev, int reg); 96cb459498Sriastradh void r100_bandwidth_update(struct radeon_device *rdev); 97cb459498Sriastradh void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); 98cb459498Sriastradh int r100_ring_test(struct radeon_device *rdev, struct radeon_ring *cp); 99cb459498Sriastradh void r100_hpd_init(struct radeon_device *rdev); 100cb459498Sriastradh void r100_hpd_fini(struct radeon_device *rdev); 101cb459498Sriastradh bool r100_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); 102cb459498Sriastradh void r100_hpd_set_polarity(struct radeon_device *rdev, 103cb459498Sriastradh enum radeon_hpd_id hpd); 104cb459498Sriastradh int r100_debugfs_rbbm_init(struct radeon_device *rdev); 105cb459498Sriastradh int r100_debugfs_cp_init(struct radeon_device *rdev); 106cb459498Sriastradh void r100_cp_disable(struct radeon_device *rdev); 107cb459498Sriastradh int r100_cp_init(struct radeon_device *rdev, unsigned ring_size); 108cb459498Sriastradh void r100_cp_fini(struct radeon_device *rdev); 109cb459498Sriastradh int r100_pci_gart_init(struct radeon_device *rdev); 110cb459498Sriastradh void r100_pci_gart_fini(struct radeon_device *rdev); 111cb459498Sriastradh int r100_pci_gart_enable(struct radeon_device *rdev); 112cb459498Sriastradh void r100_pci_gart_disable(struct radeon_device *rdev); 113cb459498Sriastradh int r100_debugfs_mc_info_init(struct radeon_device *rdev); 114cb459498Sriastradh int r100_gui_wait_for_idle(struct radeon_device *rdev); 115cb459498Sriastradh int r100_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); 116cb459498Sriastradh void r100_irq_disable(struct radeon_device *rdev); 117cb459498Sriastradh void r100_mc_stop(struct radeon_device *rdev, struct r100_mc_save *save); 118cb459498Sriastradh void r100_mc_resume(struct radeon_device *rdev, struct r100_mc_save *save); 119cb459498Sriastradh void r100_vram_init_sizes(struct radeon_device *rdev); 120cb459498Sriastradh int r100_cp_reset(struct radeon_device *rdev); 121cb459498Sriastradh void r100_vga_render_disable(struct radeon_device *rdev); 122cb459498Sriastradh void r100_restore_sanity(struct radeon_device *rdev); 123cb459498Sriastradh int r100_cs_track_check_pkt3_indx_buffer(struct radeon_cs_parser *p, 124cb459498Sriastradh struct radeon_cs_packet *pkt, 125cb459498Sriastradh struct radeon_bo *robj); 126cb459498Sriastradh int r100_cs_parse_packet0(struct radeon_cs_parser *p, 127cb459498Sriastradh struct radeon_cs_packet *pkt, 128cb459498Sriastradh const unsigned *auth, unsigned n, 129cb459498Sriastradh radeon_packet0_check_t check); 130cb459498Sriastradh int r100_cs_packet_parse(struct radeon_cs_parser *p, 131cb459498Sriastradh struct radeon_cs_packet *pkt, 132cb459498Sriastradh unsigned idx); 133cb459498Sriastradh void r100_enable_bm(struct radeon_device *rdev); 134cb459498Sriastradh void r100_set_common_regs(struct radeon_device *rdev); 135cb459498Sriastradh void r100_bm_disable(struct radeon_device *rdev); 136cb459498Sriastradh extern bool r100_gui_idle(struct radeon_device *rdev); 137cb459498Sriastradh extern void r100_pm_misc(struct radeon_device *rdev); 138cb459498Sriastradh extern void r100_pm_prepare(struct radeon_device *rdev); 139cb459498Sriastradh extern void r100_pm_finish(struct radeon_device *rdev); 140cb459498Sriastradh extern void r100_pm_init_profile(struct radeon_device *rdev); 141cb459498Sriastradh extern void r100_pm_get_dynpm_state(struct radeon_device *rdev); 142d350ecf5Sriastradh extern void r100_page_flip(struct radeon_device *rdev, int crtc, 143*677dec6eSriastradh u64 crtc_base, bool async); 144d350ecf5Sriastradh extern bool r100_page_flip_pending(struct radeon_device *rdev, int crtc); 145cb459498Sriastradh extern void r100_wait_for_vblank(struct radeon_device *rdev, int crtc); 146cb459498Sriastradh extern int r100_mc_wait_for_idle(struct radeon_device *rdev); 147cb459498Sriastradh 148cb459498Sriastradh u32 r100_gfx_get_rptr(struct radeon_device *rdev, 149cb459498Sriastradh struct radeon_ring *ring); 150cb459498Sriastradh u32 r100_gfx_get_wptr(struct radeon_device *rdev, 151cb459498Sriastradh struct radeon_ring *ring); 152cb459498Sriastradh void r100_gfx_set_wptr(struct radeon_device *rdev, 153cb459498Sriastradh struct radeon_ring *ring); 154cb459498Sriastradh 155cb459498Sriastradh /* 156cb459498Sriastradh * r200,rv250,rs300,rv280 157cb459498Sriastradh */ 158d350ecf5Sriastradh struct radeon_fence *r200_copy_dma(struct radeon_device *rdev, 159cb459498Sriastradh uint64_t src_offset, 160cb459498Sriastradh uint64_t dst_offset, 161cb459498Sriastradh unsigned num_gpu_pages, 162*677dec6eSriastradh struct dma_resv *resv); 163cb459498Sriastradh void r200_set_safe_registers(struct radeon_device *rdev); 164cb459498Sriastradh 165cb459498Sriastradh /* 166cb459498Sriastradh * r300,r350,rv350,rv380 167cb459498Sriastradh */ 168cb459498Sriastradh extern int r300_init(struct radeon_device *rdev); 169cb459498Sriastradh extern void r300_fini(struct radeon_device *rdev); 170cb459498Sriastradh extern int r300_suspend(struct radeon_device *rdev); 171cb459498Sriastradh extern int r300_resume(struct radeon_device *rdev); 172*677dec6eSriastradh extern int r300_asic_reset(struct radeon_device *rdev, bool hard); 173cb459498Sriastradh extern void r300_ring_start(struct radeon_device *rdev, struct radeon_ring *ring); 174cb459498Sriastradh extern void r300_fence_ring_emit(struct radeon_device *rdev, 175cb459498Sriastradh struct radeon_fence *fence); 176cb459498Sriastradh extern int r300_cs_parse(struct radeon_cs_parser *p); 177cb459498Sriastradh extern void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev); 178d350ecf5Sriastradh extern uint64_t rv370_pcie_gart_get_page_entry(uint64_t addr, uint32_t flags); 179d350ecf5Sriastradh extern void rv370_pcie_gart_set_page(struct radeon_device *rdev, unsigned i, 180d350ecf5Sriastradh uint64_t entry); 181cb459498Sriastradh extern void rv370_set_pcie_lanes(struct radeon_device *rdev, int lanes); 182cb459498Sriastradh extern int rv370_get_pcie_lanes(struct radeon_device *rdev); 183cb459498Sriastradh extern void r300_set_reg_safe(struct radeon_device *rdev); 184cb459498Sriastradh extern void r300_mc_program(struct radeon_device *rdev); 185cb459498Sriastradh extern void r300_mc_init(struct radeon_device *rdev); 186cb459498Sriastradh extern void r300_clock_startup(struct radeon_device *rdev); 187cb459498Sriastradh extern int r300_mc_wait_for_idle(struct radeon_device *rdev); 188cb459498Sriastradh extern int rv370_pcie_gart_init(struct radeon_device *rdev); 189cb459498Sriastradh extern void rv370_pcie_gart_fini(struct radeon_device *rdev); 190cb459498Sriastradh extern int rv370_pcie_gart_enable(struct radeon_device *rdev); 191cb459498Sriastradh extern void rv370_pcie_gart_disable(struct radeon_device *rdev); 192cb459498Sriastradh extern int r300_mc_wait_for_idle(struct radeon_device *rdev); 193cb459498Sriastradh 194cb459498Sriastradh /* 195cb459498Sriastradh * r420,r423,rv410 196cb459498Sriastradh */ 197cb459498Sriastradh extern int r420_init(struct radeon_device *rdev); 198cb459498Sriastradh extern void r420_fini(struct radeon_device *rdev); 199cb459498Sriastradh extern int r420_suspend(struct radeon_device *rdev); 200cb459498Sriastradh extern int r420_resume(struct radeon_device *rdev); 201cb459498Sriastradh extern void r420_pm_init_profile(struct radeon_device *rdev); 202cb459498Sriastradh extern u32 r420_mc_rreg(struct radeon_device *rdev, u32 reg); 203cb459498Sriastradh extern void r420_mc_wreg(struct radeon_device *rdev, u32 reg, u32 v); 204cb459498Sriastradh extern int r420_debugfs_pipes_info_init(struct radeon_device *rdev); 205cb459498Sriastradh extern void r420_pipes_init(struct radeon_device *rdev); 206cb459498Sriastradh 207cb459498Sriastradh /* 208cb459498Sriastradh * rs400,rs480 209cb459498Sriastradh */ 210cb459498Sriastradh extern int rs400_init(struct radeon_device *rdev); 211cb459498Sriastradh extern void rs400_fini(struct radeon_device *rdev); 212cb459498Sriastradh extern int rs400_suspend(struct radeon_device *rdev); 213cb459498Sriastradh extern int rs400_resume(struct radeon_device *rdev); 214cb459498Sriastradh void rs400_gart_tlb_flush(struct radeon_device *rdev); 215d350ecf5Sriastradh uint64_t rs400_gart_get_page_entry(uint64_t addr, uint32_t flags); 216d350ecf5Sriastradh void rs400_gart_set_page(struct radeon_device *rdev, unsigned i, 217d350ecf5Sriastradh uint64_t entry); 218cb459498Sriastradh uint32_t rs400_mc_rreg(struct radeon_device *rdev, uint32_t reg); 219cb459498Sriastradh void rs400_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); 220cb459498Sriastradh int rs400_gart_init(struct radeon_device *rdev); 221cb459498Sriastradh int rs400_gart_enable(struct radeon_device *rdev); 222cb459498Sriastradh void rs400_gart_adjust_size(struct radeon_device *rdev); 223cb459498Sriastradh void rs400_gart_disable(struct radeon_device *rdev); 224cb459498Sriastradh void rs400_gart_fini(struct radeon_device *rdev); 225cb459498Sriastradh extern int rs400_mc_wait_for_idle(struct radeon_device *rdev); 226cb459498Sriastradh 227cb459498Sriastradh /* 228cb459498Sriastradh * rs600. 229cb459498Sriastradh */ 230*677dec6eSriastradh extern int rs600_asic_reset(struct radeon_device *rdev, bool hard); 231cb459498Sriastradh extern int rs600_init(struct radeon_device *rdev); 232cb459498Sriastradh extern void rs600_fini(struct radeon_device *rdev); 233cb459498Sriastradh extern int rs600_suspend(struct radeon_device *rdev); 234cb459498Sriastradh extern int rs600_resume(struct radeon_device *rdev); 235cb459498Sriastradh int rs600_irq_set(struct radeon_device *rdev); 236cb459498Sriastradh int rs600_irq_process(struct radeon_device *rdev); 237cb459498Sriastradh void rs600_irq_disable(struct radeon_device *rdev); 238cb459498Sriastradh u32 rs600_get_vblank_counter(struct radeon_device *rdev, int crtc); 239cb459498Sriastradh void rs600_gart_tlb_flush(struct radeon_device *rdev); 240d350ecf5Sriastradh uint64_t rs600_gart_get_page_entry(uint64_t addr, uint32_t flags); 241d350ecf5Sriastradh void rs600_gart_set_page(struct radeon_device *rdev, unsigned i, 242d350ecf5Sriastradh uint64_t entry); 243cb459498Sriastradh uint32_t rs600_mc_rreg(struct radeon_device *rdev, uint32_t reg); 244cb459498Sriastradh void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); 245cb459498Sriastradh void rs600_bandwidth_update(struct radeon_device *rdev); 246cb459498Sriastradh void rs600_hpd_init(struct radeon_device *rdev); 247cb459498Sriastradh void rs600_hpd_fini(struct radeon_device *rdev); 248cb459498Sriastradh bool rs600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); 249cb459498Sriastradh void rs600_hpd_set_polarity(struct radeon_device *rdev, 250cb459498Sriastradh enum radeon_hpd_id hpd); 251cb459498Sriastradh extern void rs600_pm_misc(struct radeon_device *rdev); 252cb459498Sriastradh extern void rs600_pm_prepare(struct radeon_device *rdev); 253cb459498Sriastradh extern void rs600_pm_finish(struct radeon_device *rdev); 254d350ecf5Sriastradh extern void rs600_page_flip(struct radeon_device *rdev, int crtc, 255*677dec6eSriastradh u64 crtc_base, bool async); 256d350ecf5Sriastradh extern bool rs600_page_flip_pending(struct radeon_device *rdev, int crtc); 257cb459498Sriastradh void rs600_set_safe_registers(struct radeon_device *rdev); 258cb459498Sriastradh extern void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc); 259cb459498Sriastradh extern int rs600_mc_wait_for_idle(struct radeon_device *rdev); 260cb459498Sriastradh 261cb459498Sriastradh /* 262cb459498Sriastradh * rs690,rs740 263cb459498Sriastradh */ 264cb459498Sriastradh int rs690_init(struct radeon_device *rdev); 265cb459498Sriastradh void rs690_fini(struct radeon_device *rdev); 266cb459498Sriastradh int rs690_resume(struct radeon_device *rdev); 267cb459498Sriastradh int rs690_suspend(struct radeon_device *rdev); 268cb459498Sriastradh uint32_t rs690_mc_rreg(struct radeon_device *rdev, uint32_t reg); 269cb459498Sriastradh void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); 270cb459498Sriastradh void rs690_bandwidth_update(struct radeon_device *rdev); 271cb459498Sriastradh void rs690_line_buffer_adjust(struct radeon_device *rdev, 272cb459498Sriastradh struct drm_display_mode *mode1, 273cb459498Sriastradh struct drm_display_mode *mode2); 274cb459498Sriastradh extern int rs690_mc_wait_for_idle(struct radeon_device *rdev); 275cb459498Sriastradh 276cb459498Sriastradh /* 277cb459498Sriastradh * rv515 278cb459498Sriastradh */ 279cb459498Sriastradh struct rv515_mc_save { 280cb459498Sriastradh u32 vga_render_control; 281cb459498Sriastradh u32 vga_hdp_control; 282cb459498Sriastradh bool crtc_enabled[2]; 283cb459498Sriastradh }; 284cb459498Sriastradh 285cb459498Sriastradh int rv515_init(struct radeon_device *rdev); 286cb459498Sriastradh void rv515_fini(struct radeon_device *rdev); 287cb459498Sriastradh uint32_t rv515_mc_rreg(struct radeon_device *rdev, uint32_t reg); 288cb459498Sriastradh void rv515_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); 289cb459498Sriastradh void rv515_ring_start(struct radeon_device *rdev, struct radeon_ring *ring); 290cb459498Sriastradh void rv515_bandwidth_update(struct radeon_device *rdev); 291cb459498Sriastradh int rv515_resume(struct radeon_device *rdev); 292cb459498Sriastradh int rv515_suspend(struct radeon_device *rdev); 293cb459498Sriastradh void rv515_bandwidth_avivo_update(struct radeon_device *rdev); 294cb459498Sriastradh void rv515_vga_render_disable(struct radeon_device *rdev); 295cb459498Sriastradh void rv515_set_safe_registers(struct radeon_device *rdev); 296cb459498Sriastradh void rv515_mc_stop(struct radeon_device *rdev, struct rv515_mc_save *save); 297cb459498Sriastradh void rv515_mc_resume(struct radeon_device *rdev, struct rv515_mc_save *save); 298cb459498Sriastradh void rv515_clock_startup(struct radeon_device *rdev); 299cb459498Sriastradh void rv515_debugfs(struct radeon_device *rdev); 300cb459498Sriastradh int rv515_mc_wait_for_idle(struct radeon_device *rdev); 301cb459498Sriastradh 302cb459498Sriastradh /* 303cb459498Sriastradh * r520,rv530,rv560,rv570,r580 304cb459498Sriastradh */ 305cb459498Sriastradh int r520_init(struct radeon_device *rdev); 306cb459498Sriastradh int r520_resume(struct radeon_device *rdev); 307cb459498Sriastradh int r520_mc_wait_for_idle(struct radeon_device *rdev); 308cb459498Sriastradh 309cb459498Sriastradh /* 310cb459498Sriastradh * r600,rv610,rv630,rv620,rv635,rv670,rs780,rs880 311cb459498Sriastradh */ 312cb459498Sriastradh int r600_init(struct radeon_device *rdev); 313cb459498Sriastradh void r600_fini(struct radeon_device *rdev); 314cb459498Sriastradh int r600_suspend(struct radeon_device *rdev); 315cb459498Sriastradh int r600_resume(struct radeon_device *rdev); 316cb459498Sriastradh void r600_vga_set_state(struct radeon_device *rdev, bool state); 317cb459498Sriastradh int r600_wb_init(struct radeon_device *rdev); 318cb459498Sriastradh void r600_wb_fini(struct radeon_device *rdev); 319cb459498Sriastradh void r600_pcie_gart_tlb_flush(struct radeon_device *rdev); 320cb459498Sriastradh uint32_t r600_pciep_rreg(struct radeon_device *rdev, uint32_t reg); 321cb459498Sriastradh void r600_pciep_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); 322cb459498Sriastradh int r600_cs_parse(struct radeon_cs_parser *p); 323cb459498Sriastradh int r600_dma_cs_parse(struct radeon_cs_parser *p); 324cb459498Sriastradh void r600_fence_ring_emit(struct radeon_device *rdev, 325cb459498Sriastradh struct radeon_fence *fence); 326cb459498Sriastradh bool r600_semaphore_ring_emit(struct radeon_device *rdev, 327cb459498Sriastradh struct radeon_ring *cp, 328cb459498Sriastradh struct radeon_semaphore *semaphore, 329cb459498Sriastradh bool emit_wait); 330cb459498Sriastradh void r600_dma_fence_ring_emit(struct radeon_device *rdev, 331cb459498Sriastradh struct radeon_fence *fence); 332cb459498Sriastradh bool r600_dma_semaphore_ring_emit(struct radeon_device *rdev, 333cb459498Sriastradh struct radeon_ring *ring, 334cb459498Sriastradh struct radeon_semaphore *semaphore, 335cb459498Sriastradh bool emit_wait); 336cb459498Sriastradh void r600_dma_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); 337cb459498Sriastradh bool r600_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring); 338cb459498Sriastradh bool r600_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); 339*677dec6eSriastradh int r600_asic_reset(struct radeon_device *rdev, bool hard); 340cb459498Sriastradh int r600_set_surface_reg(struct radeon_device *rdev, int reg, 341cb459498Sriastradh uint32_t tiling_flags, uint32_t pitch, 342cb459498Sriastradh uint32_t offset, uint32_t obj_size); 343cb459498Sriastradh void r600_clear_surface_reg(struct radeon_device *rdev, int reg); 344cb459498Sriastradh int r600_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); 345cb459498Sriastradh int r600_dma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); 346cb459498Sriastradh void r600_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); 347cb459498Sriastradh int r600_ring_test(struct radeon_device *rdev, struct radeon_ring *cp); 348cb459498Sriastradh int r600_dma_ring_test(struct radeon_device *rdev, struct radeon_ring *cp); 349d350ecf5Sriastradh struct radeon_fence *r600_copy_cpdma(struct radeon_device *rdev, 350cb459498Sriastradh uint64_t src_offset, uint64_t dst_offset, 351d350ecf5Sriastradh unsigned num_gpu_pages, 352*677dec6eSriastradh struct dma_resv *resv); 353d350ecf5Sriastradh struct radeon_fence *r600_copy_dma(struct radeon_device *rdev, 354cb459498Sriastradh uint64_t src_offset, uint64_t dst_offset, 355d350ecf5Sriastradh unsigned num_gpu_pages, 356*677dec6eSriastradh struct dma_resv *resv); 357cb459498Sriastradh void r600_hpd_init(struct radeon_device *rdev); 358cb459498Sriastradh void r600_hpd_fini(struct radeon_device *rdev); 359cb459498Sriastradh bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); 360cb459498Sriastradh void r600_hpd_set_polarity(struct radeon_device *rdev, 361cb459498Sriastradh enum radeon_hpd_id hpd); 362d350ecf5Sriastradh extern void r600_mmio_hdp_flush(struct radeon_device *rdev); 363cb459498Sriastradh extern bool r600_gui_idle(struct radeon_device *rdev); 364cb459498Sriastradh extern void r600_pm_misc(struct radeon_device *rdev); 365cb459498Sriastradh extern void r600_pm_init_profile(struct radeon_device *rdev); 366cb459498Sriastradh extern void rs780_pm_init_profile(struct radeon_device *rdev); 367cb459498Sriastradh extern uint32_t rs780_mc_rreg(struct radeon_device *rdev, uint32_t reg); 368cb459498Sriastradh extern void rs780_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); 369cb459498Sriastradh extern void r600_pm_get_dynpm_state(struct radeon_device *rdev); 370cb459498Sriastradh extern void r600_set_pcie_lanes(struct radeon_device *rdev, int lanes); 371cb459498Sriastradh extern int r600_get_pcie_lanes(struct radeon_device *rdev); 372cb459498Sriastradh bool r600_card_posted(struct radeon_device *rdev); 373cb459498Sriastradh void r600_cp_stop(struct radeon_device *rdev); 374cb459498Sriastradh int r600_cp_start(struct radeon_device *rdev); 375cb459498Sriastradh void r600_ring_init(struct radeon_device *rdev, struct radeon_ring *cp, unsigned ring_size); 376cb459498Sriastradh int r600_cp_resume(struct radeon_device *rdev); 377cb459498Sriastradh void r600_cp_fini(struct radeon_device *rdev); 378cb459498Sriastradh int r600_count_pipe_bits(uint32_t val); 379cb459498Sriastradh int r600_mc_wait_for_idle(struct radeon_device *rdev); 380cb459498Sriastradh int r600_pcie_gart_init(struct radeon_device *rdev); 381cb459498Sriastradh void r600_scratch_init(struct radeon_device *rdev); 382cb459498Sriastradh int r600_init_microcode(struct radeon_device *rdev); 383cb459498Sriastradh u32 r600_gfx_get_rptr(struct radeon_device *rdev, 384cb459498Sriastradh struct radeon_ring *ring); 385cb459498Sriastradh u32 r600_gfx_get_wptr(struct radeon_device *rdev, 386cb459498Sriastradh struct radeon_ring *ring); 387cb459498Sriastradh void r600_gfx_set_wptr(struct radeon_device *rdev, 388cb459498Sriastradh struct radeon_ring *ring); 389d350ecf5Sriastradh int r600_get_allowed_info_register(struct radeon_device *rdev, 390d350ecf5Sriastradh u32 reg, u32 *val); 391cb459498Sriastradh /* r600 irq */ 392cb459498Sriastradh int r600_irq_process(struct radeon_device *rdev); 393cb459498Sriastradh int r600_irq_init(struct radeon_device *rdev); 394cb459498Sriastradh void r600_irq_fini(struct radeon_device *rdev); 395cb459498Sriastradh void r600_ih_ring_init(struct radeon_device *rdev, unsigned ring_size); 396cb459498Sriastradh int r600_irq_set(struct radeon_device *rdev); 397cb459498Sriastradh void r600_irq_suspend(struct radeon_device *rdev); 398cb459498Sriastradh void r600_disable_interrupts(struct radeon_device *rdev); 399cb459498Sriastradh void r600_rlc_stop(struct radeon_device *rdev); 400cb459498Sriastradh /* r600 audio */ 401cb459498Sriastradh void r600_audio_fini(struct radeon_device *rdev); 402d350ecf5Sriastradh void r600_audio_set_dto(struct drm_encoder *encoder, u32 clock); 403d350ecf5Sriastradh void r600_hdmi_update_avi_infoframe(struct drm_encoder *encoder, void *buffer, 404d350ecf5Sriastradh size_t size); 405d350ecf5Sriastradh void r600_hdmi_update_ACR(struct drm_encoder *encoder, uint32_t clock); 406d350ecf5Sriastradh void r600_hdmi_audio_workaround(struct drm_encoder *encoder); 407cb459498Sriastradh int r600_hdmi_buffer_status_changed(struct drm_encoder *encoder); 408cb459498Sriastradh void r600_hdmi_update_audio_settings(struct drm_encoder *encoder); 409cb459498Sriastradh int r600_mc_wait_for_idle(struct radeon_device *rdev); 410cb459498Sriastradh u32 r600_get_xclk(struct radeon_device *rdev); 411cb459498Sriastradh uint64_t r600_get_gpu_clock_counter(struct radeon_device *rdev); 412cb459498Sriastradh int rv6xx_get_temp(struct radeon_device *rdev); 413cb459498Sriastradh int r600_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); 414cb459498Sriastradh int r600_dpm_pre_set_power_state(struct radeon_device *rdev); 415cb459498Sriastradh void r600_dpm_post_set_power_state(struct radeon_device *rdev); 416cb459498Sriastradh int r600_dpm_late_enable(struct radeon_device *rdev); 417cb459498Sriastradh /* r600 dma */ 418cb459498Sriastradh uint32_t r600_dma_get_rptr(struct radeon_device *rdev, 419cb459498Sriastradh struct radeon_ring *ring); 420cb459498Sriastradh uint32_t r600_dma_get_wptr(struct radeon_device *rdev, 421cb459498Sriastradh struct radeon_ring *ring); 422cb459498Sriastradh void r600_dma_set_wptr(struct radeon_device *rdev, 423cb459498Sriastradh struct radeon_ring *ring); 424cb459498Sriastradh /* rv6xx dpm */ 425cb459498Sriastradh int rv6xx_dpm_init(struct radeon_device *rdev); 426cb459498Sriastradh int rv6xx_dpm_enable(struct radeon_device *rdev); 427cb459498Sriastradh void rv6xx_dpm_disable(struct radeon_device *rdev); 428cb459498Sriastradh int rv6xx_dpm_set_power_state(struct radeon_device *rdev); 429cb459498Sriastradh void rv6xx_setup_asic(struct radeon_device *rdev); 430cb459498Sriastradh void rv6xx_dpm_display_configuration_changed(struct radeon_device *rdev); 431cb459498Sriastradh void rv6xx_dpm_fini(struct radeon_device *rdev); 432cb459498Sriastradh u32 rv6xx_dpm_get_sclk(struct radeon_device *rdev, bool low); 433cb459498Sriastradh u32 rv6xx_dpm_get_mclk(struct radeon_device *rdev, bool low); 434cb459498Sriastradh void rv6xx_dpm_print_power_state(struct radeon_device *rdev, 435cb459498Sriastradh struct radeon_ps *ps); 436cb459498Sriastradh void rv6xx_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, 437cb459498Sriastradh struct seq_file *m); 438cb459498Sriastradh int rv6xx_dpm_force_performance_level(struct radeon_device *rdev, 439cb459498Sriastradh enum radeon_dpm_forced_level level); 440d350ecf5Sriastradh u32 rv6xx_dpm_get_current_sclk(struct radeon_device *rdev); 441d350ecf5Sriastradh u32 rv6xx_dpm_get_current_mclk(struct radeon_device *rdev); 442cb459498Sriastradh /* rs780 dpm */ 443cb459498Sriastradh int rs780_dpm_init(struct radeon_device *rdev); 444cb459498Sriastradh int rs780_dpm_enable(struct radeon_device *rdev); 445cb459498Sriastradh void rs780_dpm_disable(struct radeon_device *rdev); 446cb459498Sriastradh int rs780_dpm_set_power_state(struct radeon_device *rdev); 447cb459498Sriastradh void rs780_dpm_setup_asic(struct radeon_device *rdev); 448cb459498Sriastradh void rs780_dpm_display_configuration_changed(struct radeon_device *rdev); 449cb459498Sriastradh void rs780_dpm_fini(struct radeon_device *rdev); 450cb459498Sriastradh u32 rs780_dpm_get_sclk(struct radeon_device *rdev, bool low); 451cb459498Sriastradh u32 rs780_dpm_get_mclk(struct radeon_device *rdev, bool low); 452cb459498Sriastradh void rs780_dpm_print_power_state(struct radeon_device *rdev, 453cb459498Sriastradh struct radeon_ps *ps); 454cb459498Sriastradh void rs780_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, 455cb459498Sriastradh struct seq_file *m); 456cb459498Sriastradh int rs780_dpm_force_performance_level(struct radeon_device *rdev, 457cb459498Sriastradh enum radeon_dpm_forced_level level); 458d350ecf5Sriastradh u32 rs780_dpm_get_current_sclk(struct radeon_device *rdev); 459d350ecf5Sriastradh u32 rs780_dpm_get_current_mclk(struct radeon_device *rdev); 460cb459498Sriastradh 461cb459498Sriastradh /* 462cb459498Sriastradh * rv770,rv730,rv710,rv740 463cb459498Sriastradh */ 464cb459498Sriastradh int rv770_init(struct radeon_device *rdev); 465cb459498Sriastradh void rv770_fini(struct radeon_device *rdev); 466cb459498Sriastradh int rv770_suspend(struct radeon_device *rdev); 467cb459498Sriastradh int rv770_resume(struct radeon_device *rdev); 468cb459498Sriastradh void rv770_pm_misc(struct radeon_device *rdev); 469*677dec6eSriastradh void rv770_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base, 470*677dec6eSriastradh bool async); 471d350ecf5Sriastradh bool rv770_page_flip_pending(struct radeon_device *rdev, int crtc); 472cb459498Sriastradh void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc); 473cb459498Sriastradh void r700_cp_stop(struct radeon_device *rdev); 474cb459498Sriastradh void r700_cp_fini(struct radeon_device *rdev); 475d350ecf5Sriastradh struct radeon_fence *rv770_copy_dma(struct radeon_device *rdev, 476cb459498Sriastradh uint64_t src_offset, uint64_t dst_offset, 477cb459498Sriastradh unsigned num_gpu_pages, 478*677dec6eSriastradh struct dma_resv *resv); 479cb459498Sriastradh u32 rv770_get_xclk(struct radeon_device *rdev); 480cb459498Sriastradh int rv770_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); 481cb459498Sriastradh int rv770_get_temp(struct radeon_device *rdev); 482cb459498Sriastradh /* rv7xx pm */ 483cb459498Sriastradh int rv770_dpm_init(struct radeon_device *rdev); 484cb459498Sriastradh int rv770_dpm_enable(struct radeon_device *rdev); 485cb459498Sriastradh int rv770_dpm_late_enable(struct radeon_device *rdev); 486cb459498Sriastradh void rv770_dpm_disable(struct radeon_device *rdev); 487cb459498Sriastradh int rv770_dpm_set_power_state(struct radeon_device *rdev); 488cb459498Sriastradh void rv770_dpm_setup_asic(struct radeon_device *rdev); 489cb459498Sriastradh void rv770_dpm_display_configuration_changed(struct radeon_device *rdev); 490cb459498Sriastradh void rv770_dpm_fini(struct radeon_device *rdev); 491cb459498Sriastradh u32 rv770_dpm_get_sclk(struct radeon_device *rdev, bool low); 492cb459498Sriastradh u32 rv770_dpm_get_mclk(struct radeon_device *rdev, bool low); 493cb459498Sriastradh void rv770_dpm_print_power_state(struct radeon_device *rdev, 494cb459498Sriastradh struct radeon_ps *ps); 495cb459498Sriastradh void rv770_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, 496cb459498Sriastradh struct seq_file *m); 497cb459498Sriastradh int rv770_dpm_force_performance_level(struct radeon_device *rdev, 498cb459498Sriastradh enum radeon_dpm_forced_level level); 499cb459498Sriastradh bool rv770_dpm_vblank_too_short(struct radeon_device *rdev); 500d350ecf5Sriastradh u32 rv770_dpm_get_current_sclk(struct radeon_device *rdev); 501d350ecf5Sriastradh u32 rv770_dpm_get_current_mclk(struct radeon_device *rdev); 502cb459498Sriastradh 503cb459498Sriastradh /* 504cb459498Sriastradh * evergreen 505cb459498Sriastradh */ 506cb459498Sriastradh struct evergreen_mc_save { 507cb459498Sriastradh u32 vga_render_control; 508cb459498Sriastradh u32 vga_hdp_control; 509cb459498Sriastradh bool crtc_enabled[RADEON_MAX_CRTCS]; 510cb459498Sriastradh }; 511cb459498Sriastradh 512cb459498Sriastradh void evergreen_pcie_gart_tlb_flush(struct radeon_device *rdev); 513cb459498Sriastradh int evergreen_init(struct radeon_device *rdev); 514cb459498Sriastradh void evergreen_fini(struct radeon_device *rdev); 515cb459498Sriastradh int evergreen_suspend(struct radeon_device *rdev); 516cb459498Sriastradh int evergreen_resume(struct radeon_device *rdev); 517cb459498Sriastradh bool evergreen_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); 518cb459498Sriastradh bool evergreen_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); 519*677dec6eSriastradh int evergreen_asic_reset(struct radeon_device *rdev, bool hard); 520cb459498Sriastradh void evergreen_bandwidth_update(struct radeon_device *rdev); 521cb459498Sriastradh void evergreen_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); 522cb459498Sriastradh void evergreen_hpd_init(struct radeon_device *rdev); 523cb459498Sriastradh void evergreen_hpd_fini(struct radeon_device *rdev); 524cb459498Sriastradh bool evergreen_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); 525cb459498Sriastradh void evergreen_hpd_set_polarity(struct radeon_device *rdev, 526cb459498Sriastradh enum radeon_hpd_id hpd); 527cb459498Sriastradh u32 evergreen_get_vblank_counter(struct radeon_device *rdev, int crtc); 528cb459498Sriastradh int evergreen_irq_set(struct radeon_device *rdev); 529cb459498Sriastradh int evergreen_irq_process(struct radeon_device *rdev); 530cb459498Sriastradh extern int evergreen_cs_parse(struct radeon_cs_parser *p); 531cb459498Sriastradh extern int evergreen_dma_cs_parse(struct radeon_cs_parser *p); 532cb459498Sriastradh extern void evergreen_pm_misc(struct radeon_device *rdev); 533cb459498Sriastradh extern void evergreen_pm_prepare(struct radeon_device *rdev); 534cb459498Sriastradh extern void evergreen_pm_finish(struct radeon_device *rdev); 535cb459498Sriastradh extern void sumo_pm_init_profile(struct radeon_device *rdev); 536cb459498Sriastradh extern void btc_pm_init_profile(struct radeon_device *rdev); 537cb459498Sriastradh int sumo_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); 538cb459498Sriastradh int evergreen_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); 539d350ecf5Sriastradh extern void evergreen_page_flip(struct radeon_device *rdev, int crtc, 540*677dec6eSriastradh u64 crtc_base, bool async); 541d350ecf5Sriastradh extern bool evergreen_page_flip_pending(struct radeon_device *rdev, int crtc); 542cb459498Sriastradh extern void dce4_wait_for_vblank(struct radeon_device *rdev, int crtc); 543cb459498Sriastradh void evergreen_disable_interrupt_state(struct radeon_device *rdev); 544cb459498Sriastradh int evergreen_mc_wait_for_idle(struct radeon_device *rdev); 545cb459498Sriastradh void evergreen_dma_fence_ring_emit(struct radeon_device *rdev, 546cb459498Sriastradh struct radeon_fence *fence); 547cb459498Sriastradh void evergreen_dma_ring_ib_execute(struct radeon_device *rdev, 548cb459498Sriastradh struct radeon_ib *ib); 549d350ecf5Sriastradh struct radeon_fence *evergreen_copy_dma(struct radeon_device *rdev, 550cb459498Sriastradh uint64_t src_offset, uint64_t dst_offset, 551cb459498Sriastradh unsigned num_gpu_pages, 552*677dec6eSriastradh struct dma_resv *resv); 553cb459498Sriastradh int evergreen_get_temp(struct radeon_device *rdev); 554d350ecf5Sriastradh int evergreen_get_allowed_info_register(struct radeon_device *rdev, 555d350ecf5Sriastradh u32 reg, u32 *val); 556cb459498Sriastradh int sumo_get_temp(struct radeon_device *rdev); 557cb459498Sriastradh int tn_get_temp(struct radeon_device *rdev); 558cb459498Sriastradh int cypress_dpm_init(struct radeon_device *rdev); 559cb459498Sriastradh void cypress_dpm_setup_asic(struct radeon_device *rdev); 560cb459498Sriastradh int cypress_dpm_enable(struct radeon_device *rdev); 561cb459498Sriastradh void cypress_dpm_disable(struct radeon_device *rdev); 562cb459498Sriastradh int cypress_dpm_set_power_state(struct radeon_device *rdev); 563cb459498Sriastradh void cypress_dpm_display_configuration_changed(struct radeon_device *rdev); 564cb459498Sriastradh void cypress_dpm_fini(struct radeon_device *rdev); 565cb459498Sriastradh bool cypress_dpm_vblank_too_short(struct radeon_device *rdev); 566cb459498Sriastradh int btc_dpm_init(struct radeon_device *rdev); 567cb459498Sriastradh void btc_dpm_setup_asic(struct radeon_device *rdev); 568cb459498Sriastradh int btc_dpm_enable(struct radeon_device *rdev); 569cb459498Sriastradh void btc_dpm_disable(struct radeon_device *rdev); 570cb459498Sriastradh int btc_dpm_pre_set_power_state(struct radeon_device *rdev); 571cb459498Sriastradh int btc_dpm_set_power_state(struct radeon_device *rdev); 572cb459498Sriastradh void btc_dpm_post_set_power_state(struct radeon_device *rdev); 573cb459498Sriastradh void btc_dpm_fini(struct radeon_device *rdev); 574cb459498Sriastradh u32 btc_dpm_get_sclk(struct radeon_device *rdev, bool low); 575cb459498Sriastradh u32 btc_dpm_get_mclk(struct radeon_device *rdev, bool low); 576cb459498Sriastradh bool btc_dpm_vblank_too_short(struct radeon_device *rdev); 577cb459498Sriastradh void btc_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, 578cb459498Sriastradh struct seq_file *m); 579d350ecf5Sriastradh u32 btc_dpm_get_current_sclk(struct radeon_device *rdev); 580d350ecf5Sriastradh u32 btc_dpm_get_current_mclk(struct radeon_device *rdev); 581cb459498Sriastradh int sumo_dpm_init(struct radeon_device *rdev); 582cb459498Sriastradh int sumo_dpm_enable(struct radeon_device *rdev); 583cb459498Sriastradh int sumo_dpm_late_enable(struct radeon_device *rdev); 584cb459498Sriastradh void sumo_dpm_disable(struct radeon_device *rdev); 585cb459498Sriastradh int sumo_dpm_pre_set_power_state(struct radeon_device *rdev); 586cb459498Sriastradh int sumo_dpm_set_power_state(struct radeon_device *rdev); 587cb459498Sriastradh void sumo_dpm_post_set_power_state(struct radeon_device *rdev); 588cb459498Sriastradh void sumo_dpm_setup_asic(struct radeon_device *rdev); 589cb459498Sriastradh void sumo_dpm_display_configuration_changed(struct radeon_device *rdev); 590cb459498Sriastradh void sumo_dpm_fini(struct radeon_device *rdev); 591cb459498Sriastradh u32 sumo_dpm_get_sclk(struct radeon_device *rdev, bool low); 592cb459498Sriastradh u32 sumo_dpm_get_mclk(struct radeon_device *rdev, bool low); 593cb459498Sriastradh void sumo_dpm_print_power_state(struct radeon_device *rdev, 594cb459498Sriastradh struct radeon_ps *ps); 595cb459498Sriastradh void sumo_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, 596cb459498Sriastradh struct seq_file *m); 597cb459498Sriastradh int sumo_dpm_force_performance_level(struct radeon_device *rdev, 598cb459498Sriastradh enum radeon_dpm_forced_level level); 599d350ecf5Sriastradh u32 sumo_dpm_get_current_sclk(struct radeon_device *rdev); 600d350ecf5Sriastradh u32 sumo_dpm_get_current_mclk(struct radeon_device *rdev); 601cb459498Sriastradh 602cb459498Sriastradh /* 603cb459498Sriastradh * cayman 604cb459498Sriastradh */ 605cb459498Sriastradh void cayman_fence_ring_emit(struct radeon_device *rdev, 606cb459498Sriastradh struct radeon_fence *fence); 607cb459498Sriastradh void cayman_pcie_gart_tlb_flush(struct radeon_device *rdev); 608cb459498Sriastradh int cayman_init(struct radeon_device *rdev); 609cb459498Sriastradh void cayman_fini(struct radeon_device *rdev); 610cb459498Sriastradh int cayman_suspend(struct radeon_device *rdev); 611cb459498Sriastradh int cayman_resume(struct radeon_device *rdev); 612*677dec6eSriastradh int cayman_asic_reset(struct radeon_device *rdev, bool hard); 613cb459498Sriastradh void cayman_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); 614cb459498Sriastradh int cayman_vm_init(struct radeon_device *rdev); 615cb459498Sriastradh void cayman_vm_fini(struct radeon_device *rdev); 616d350ecf5Sriastradh void cayman_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, 617d350ecf5Sriastradh unsigned vm_id, uint64_t pd_addr); 618cb459498Sriastradh uint32_t cayman_vm_page_flags(struct radeon_device *rdev, uint32_t flags); 619cb459498Sriastradh int evergreen_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); 620cb459498Sriastradh int evergreen_dma_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); 621cb459498Sriastradh void cayman_dma_ring_ib_execute(struct radeon_device *rdev, 622cb459498Sriastradh struct radeon_ib *ib); 623cb459498Sriastradh bool cayman_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring); 624cb459498Sriastradh bool cayman_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring); 625d350ecf5Sriastradh 626d350ecf5Sriastradh void cayman_dma_vm_copy_pages(struct radeon_device *rdev, 627d350ecf5Sriastradh struct radeon_ib *ib, 628d350ecf5Sriastradh uint64_t pe, uint64_t src, 629d350ecf5Sriastradh unsigned count); 630d350ecf5Sriastradh void cayman_dma_vm_write_pages(struct radeon_device *rdev, 631cb459498Sriastradh struct radeon_ib *ib, 632cb459498Sriastradh uint64_t pe, 633cb459498Sriastradh uint64_t addr, unsigned count, 634cb459498Sriastradh uint32_t incr, uint32_t flags); 635d350ecf5Sriastradh void cayman_dma_vm_set_pages(struct radeon_device *rdev, 636d350ecf5Sriastradh struct radeon_ib *ib, 637d350ecf5Sriastradh uint64_t pe, 638d350ecf5Sriastradh uint64_t addr, unsigned count, 639d350ecf5Sriastradh uint32_t incr, uint32_t flags); 640d350ecf5Sriastradh void cayman_dma_vm_pad_ib(struct radeon_ib *ib); 641cb459498Sriastradh 642d350ecf5Sriastradh void cayman_dma_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, 643d350ecf5Sriastradh unsigned vm_id, uint64_t pd_addr); 644cb459498Sriastradh 645cb459498Sriastradh u32 cayman_gfx_get_rptr(struct radeon_device *rdev, 646cb459498Sriastradh struct radeon_ring *ring); 647cb459498Sriastradh u32 cayman_gfx_get_wptr(struct radeon_device *rdev, 648cb459498Sriastradh struct radeon_ring *ring); 649cb459498Sriastradh void cayman_gfx_set_wptr(struct radeon_device *rdev, 650cb459498Sriastradh struct radeon_ring *ring); 651cb459498Sriastradh uint32_t cayman_dma_get_rptr(struct radeon_device *rdev, 652cb459498Sriastradh struct radeon_ring *ring); 653cb459498Sriastradh uint32_t cayman_dma_get_wptr(struct radeon_device *rdev, 654cb459498Sriastradh struct radeon_ring *ring); 655cb459498Sriastradh void cayman_dma_set_wptr(struct radeon_device *rdev, 656cb459498Sriastradh struct radeon_ring *ring); 657d350ecf5Sriastradh int cayman_get_allowed_info_register(struct radeon_device *rdev, 658d350ecf5Sriastradh u32 reg, u32 *val); 659cb459498Sriastradh 660cb459498Sriastradh int ni_dpm_init(struct radeon_device *rdev); 661cb459498Sriastradh void ni_dpm_setup_asic(struct radeon_device *rdev); 662cb459498Sriastradh int ni_dpm_enable(struct radeon_device *rdev); 663cb459498Sriastradh void ni_dpm_disable(struct radeon_device *rdev); 664cb459498Sriastradh int ni_dpm_pre_set_power_state(struct radeon_device *rdev); 665cb459498Sriastradh int ni_dpm_set_power_state(struct radeon_device *rdev); 666cb459498Sriastradh void ni_dpm_post_set_power_state(struct radeon_device *rdev); 667cb459498Sriastradh void ni_dpm_fini(struct radeon_device *rdev); 668cb459498Sriastradh u32 ni_dpm_get_sclk(struct radeon_device *rdev, bool low); 669cb459498Sriastradh u32 ni_dpm_get_mclk(struct radeon_device *rdev, bool low); 670cb459498Sriastradh void ni_dpm_print_power_state(struct radeon_device *rdev, 671cb459498Sriastradh struct radeon_ps *ps); 672cb459498Sriastradh void ni_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, 673cb459498Sriastradh struct seq_file *m); 674cb459498Sriastradh int ni_dpm_force_performance_level(struct radeon_device *rdev, 675cb459498Sriastradh enum radeon_dpm_forced_level level); 676cb459498Sriastradh bool ni_dpm_vblank_too_short(struct radeon_device *rdev); 677d350ecf5Sriastradh u32 ni_dpm_get_current_sclk(struct radeon_device *rdev); 678d350ecf5Sriastradh u32 ni_dpm_get_current_mclk(struct radeon_device *rdev); 679cb459498Sriastradh int trinity_dpm_init(struct radeon_device *rdev); 680cb459498Sriastradh int trinity_dpm_enable(struct radeon_device *rdev); 681cb459498Sriastradh int trinity_dpm_late_enable(struct radeon_device *rdev); 682cb459498Sriastradh void trinity_dpm_disable(struct radeon_device *rdev); 683cb459498Sriastradh int trinity_dpm_pre_set_power_state(struct radeon_device *rdev); 684cb459498Sriastradh int trinity_dpm_set_power_state(struct radeon_device *rdev); 685cb459498Sriastradh void trinity_dpm_post_set_power_state(struct radeon_device *rdev); 686cb459498Sriastradh void trinity_dpm_setup_asic(struct radeon_device *rdev); 687cb459498Sriastradh void trinity_dpm_display_configuration_changed(struct radeon_device *rdev); 688cb459498Sriastradh void trinity_dpm_fini(struct radeon_device *rdev); 689cb459498Sriastradh u32 trinity_dpm_get_sclk(struct radeon_device *rdev, bool low); 690cb459498Sriastradh u32 trinity_dpm_get_mclk(struct radeon_device *rdev, bool low); 691cb459498Sriastradh void trinity_dpm_print_power_state(struct radeon_device *rdev, 692cb459498Sriastradh struct radeon_ps *ps); 693cb459498Sriastradh void trinity_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, 694cb459498Sriastradh struct seq_file *m); 695cb459498Sriastradh int trinity_dpm_force_performance_level(struct radeon_device *rdev, 696cb459498Sriastradh enum radeon_dpm_forced_level level); 697cb459498Sriastradh void trinity_dpm_enable_bapm(struct radeon_device *rdev, bool enable); 698d350ecf5Sriastradh u32 trinity_dpm_get_current_sclk(struct radeon_device *rdev); 699d350ecf5Sriastradh u32 trinity_dpm_get_current_mclk(struct radeon_device *rdev); 700d350ecf5Sriastradh int tn_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk); 701cb459498Sriastradh 702cb459498Sriastradh /* DCE6 - SI */ 703cb459498Sriastradh void dce6_bandwidth_update(struct radeon_device *rdev); 704cb459498Sriastradh void dce6_audio_fini(struct radeon_device *rdev); 705cb459498Sriastradh 706cb459498Sriastradh /* 707cb459498Sriastradh * si 708cb459498Sriastradh */ 709cb459498Sriastradh void si_fence_ring_emit(struct radeon_device *rdev, 710cb459498Sriastradh struct radeon_fence *fence); 711cb459498Sriastradh void si_pcie_gart_tlb_flush(struct radeon_device *rdev); 712cb459498Sriastradh int si_init(struct radeon_device *rdev); 713cb459498Sriastradh void si_fini(struct radeon_device *rdev); 714cb459498Sriastradh int si_suspend(struct radeon_device *rdev); 715cb459498Sriastradh int si_resume(struct radeon_device *rdev); 716cb459498Sriastradh bool si_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); 717cb459498Sriastradh bool si_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); 718*677dec6eSriastradh int si_asic_reset(struct radeon_device *rdev, bool hard); 719cb459498Sriastradh void si_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); 720cb459498Sriastradh int si_irq_set(struct radeon_device *rdev); 721cb459498Sriastradh int si_irq_process(struct radeon_device *rdev); 722cb459498Sriastradh int si_vm_init(struct radeon_device *rdev); 723cb459498Sriastradh void si_vm_fini(struct radeon_device *rdev); 724d350ecf5Sriastradh void si_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, 725d350ecf5Sriastradh unsigned vm_id, uint64_t pd_addr); 726cb459498Sriastradh int si_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); 727d350ecf5Sriastradh struct radeon_fence *si_copy_dma(struct radeon_device *rdev, 728cb459498Sriastradh uint64_t src_offset, uint64_t dst_offset, 729cb459498Sriastradh unsigned num_gpu_pages, 730*677dec6eSriastradh struct dma_resv *resv); 731d350ecf5Sriastradh 732d350ecf5Sriastradh void si_dma_vm_copy_pages(struct radeon_device *rdev, 733d350ecf5Sriastradh struct radeon_ib *ib, 734d350ecf5Sriastradh uint64_t pe, uint64_t src, 735d350ecf5Sriastradh unsigned count); 736d350ecf5Sriastradh void si_dma_vm_write_pages(struct radeon_device *rdev, 737cb459498Sriastradh struct radeon_ib *ib, 738cb459498Sriastradh uint64_t pe, 739cb459498Sriastradh uint64_t addr, unsigned count, 740cb459498Sriastradh uint32_t incr, uint32_t flags); 741d350ecf5Sriastradh void si_dma_vm_set_pages(struct radeon_device *rdev, 742d350ecf5Sriastradh struct radeon_ib *ib, 743d350ecf5Sriastradh uint64_t pe, 744d350ecf5Sriastradh uint64_t addr, unsigned count, 745d350ecf5Sriastradh uint32_t incr, uint32_t flags); 746d350ecf5Sriastradh 747d350ecf5Sriastradh void si_dma_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, 748d350ecf5Sriastradh unsigned vm_id, uint64_t pd_addr); 749cb459498Sriastradh u32 si_get_xclk(struct radeon_device *rdev); 750cb459498Sriastradh uint64_t si_get_gpu_clock_counter(struct radeon_device *rdev); 751cb459498Sriastradh int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); 752d350ecf5Sriastradh int si_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk); 753cb459498Sriastradh int si_get_temp(struct radeon_device *rdev); 754d350ecf5Sriastradh int si_get_allowed_info_register(struct radeon_device *rdev, 755d350ecf5Sriastradh u32 reg, u32 *val); 756cb459498Sriastradh int si_dpm_init(struct radeon_device *rdev); 757cb459498Sriastradh void si_dpm_setup_asic(struct radeon_device *rdev); 758cb459498Sriastradh int si_dpm_enable(struct radeon_device *rdev); 759cb459498Sriastradh int si_dpm_late_enable(struct radeon_device *rdev); 760cb459498Sriastradh void si_dpm_disable(struct radeon_device *rdev); 761cb459498Sriastradh int si_dpm_pre_set_power_state(struct radeon_device *rdev); 762cb459498Sriastradh int si_dpm_set_power_state(struct radeon_device *rdev); 763cb459498Sriastradh void si_dpm_post_set_power_state(struct radeon_device *rdev); 764cb459498Sriastradh void si_dpm_fini(struct radeon_device *rdev); 765cb459498Sriastradh void si_dpm_display_configuration_changed(struct radeon_device *rdev); 766cb459498Sriastradh void si_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, 767cb459498Sriastradh struct seq_file *m); 768cb459498Sriastradh int si_dpm_force_performance_level(struct radeon_device *rdev, 769cb459498Sriastradh enum radeon_dpm_forced_level level); 770d350ecf5Sriastradh int si_fan_ctrl_get_fan_speed_percent(struct radeon_device *rdev, 771d350ecf5Sriastradh u32 *speed); 772d350ecf5Sriastradh int si_fan_ctrl_set_fan_speed_percent(struct radeon_device *rdev, 773d350ecf5Sriastradh u32 speed); 774d350ecf5Sriastradh u32 si_fan_ctrl_get_mode(struct radeon_device *rdev); 775d350ecf5Sriastradh void si_fan_ctrl_set_mode(struct radeon_device *rdev, u32 mode); 776d350ecf5Sriastradh u32 si_dpm_get_current_sclk(struct radeon_device *rdev); 777d350ecf5Sriastradh u32 si_dpm_get_current_mclk(struct radeon_device *rdev); 778cb459498Sriastradh 779cb459498Sriastradh /* DCE8 - CIK */ 780cb459498Sriastradh void dce8_bandwidth_update(struct radeon_device *rdev); 781cb459498Sriastradh 782cb459498Sriastradh /* 783cb459498Sriastradh * cik 784cb459498Sriastradh */ 785cb459498Sriastradh uint64_t cik_get_gpu_clock_counter(struct radeon_device *rdev); 786cb459498Sriastradh u32 cik_get_xclk(struct radeon_device *rdev); 787cb459498Sriastradh uint32_t cik_pciep_rreg(struct radeon_device *rdev, uint32_t reg); 788cb459498Sriastradh void cik_pciep_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); 789cb459498Sriastradh int cik_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); 790cb459498Sriastradh int cik_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk); 791cb459498Sriastradh void cik_sdma_fence_ring_emit(struct radeon_device *rdev, 792cb459498Sriastradh struct radeon_fence *fence); 793cb459498Sriastradh bool cik_sdma_semaphore_ring_emit(struct radeon_device *rdev, 794cb459498Sriastradh struct radeon_ring *ring, 795cb459498Sriastradh struct radeon_semaphore *semaphore, 796cb459498Sriastradh bool emit_wait); 797cb459498Sriastradh void cik_sdma_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); 798d350ecf5Sriastradh struct radeon_fence *cik_copy_dma(struct radeon_device *rdev, 799cb459498Sriastradh uint64_t src_offset, uint64_t dst_offset, 800cb459498Sriastradh unsigned num_gpu_pages, 801*677dec6eSriastradh struct dma_resv *resv); 802d350ecf5Sriastradh struct radeon_fence *cik_copy_cpdma(struct radeon_device *rdev, 803cb459498Sriastradh uint64_t src_offset, uint64_t dst_offset, 804cb459498Sriastradh unsigned num_gpu_pages, 805*677dec6eSriastradh struct dma_resv *resv); 806cb459498Sriastradh int cik_sdma_ring_test(struct radeon_device *rdev, struct radeon_ring *ring); 807cb459498Sriastradh int cik_sdma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); 808cb459498Sriastradh bool cik_sdma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring); 809cb459498Sriastradh void cik_fence_gfx_ring_emit(struct radeon_device *rdev, 810cb459498Sriastradh struct radeon_fence *fence); 811cb459498Sriastradh void cik_fence_compute_ring_emit(struct radeon_device *rdev, 812cb459498Sriastradh struct radeon_fence *fence); 813cb459498Sriastradh bool cik_semaphore_ring_emit(struct radeon_device *rdev, 814cb459498Sriastradh struct radeon_ring *cp, 815cb459498Sriastradh struct radeon_semaphore *semaphore, 816cb459498Sriastradh bool emit_wait); 817cb459498Sriastradh void cik_pcie_gart_tlb_flush(struct radeon_device *rdev); 818cb459498Sriastradh int cik_init(struct radeon_device *rdev); 819cb459498Sriastradh void cik_fini(struct radeon_device *rdev); 820cb459498Sriastradh int cik_suspend(struct radeon_device *rdev); 821cb459498Sriastradh int cik_resume(struct radeon_device *rdev); 822cb459498Sriastradh bool cik_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); 823*677dec6eSriastradh int cik_asic_reset(struct radeon_device *rdev, bool hard); 824cb459498Sriastradh void cik_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); 825cb459498Sriastradh int cik_ring_test(struct radeon_device *rdev, struct radeon_ring *ring); 826cb459498Sriastradh int cik_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); 827cb459498Sriastradh int cik_irq_set(struct radeon_device *rdev); 828cb459498Sriastradh int cik_irq_process(struct radeon_device *rdev); 829cb459498Sriastradh int cik_vm_init(struct radeon_device *rdev); 830cb459498Sriastradh void cik_vm_fini(struct radeon_device *rdev); 831d350ecf5Sriastradh void cik_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, 832d350ecf5Sriastradh unsigned vm_id, uint64_t pd_addr); 833d350ecf5Sriastradh 834d350ecf5Sriastradh void cik_sdma_vm_copy_pages(struct radeon_device *rdev, 835d350ecf5Sriastradh struct radeon_ib *ib, 836d350ecf5Sriastradh uint64_t pe, uint64_t src, 837d350ecf5Sriastradh unsigned count); 838d350ecf5Sriastradh void cik_sdma_vm_write_pages(struct radeon_device *rdev, 839cb459498Sriastradh struct radeon_ib *ib, 840cb459498Sriastradh uint64_t pe, 841cb459498Sriastradh uint64_t addr, unsigned count, 842cb459498Sriastradh uint32_t incr, uint32_t flags); 843d350ecf5Sriastradh void cik_sdma_vm_set_pages(struct radeon_device *rdev, 844d350ecf5Sriastradh struct radeon_ib *ib, 845d350ecf5Sriastradh uint64_t pe, 846d350ecf5Sriastradh uint64_t addr, unsigned count, 847d350ecf5Sriastradh uint32_t incr, uint32_t flags); 848d350ecf5Sriastradh void cik_sdma_vm_pad_ib(struct radeon_ib *ib); 849d350ecf5Sriastradh 850d350ecf5Sriastradh void cik_dma_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, 851d350ecf5Sriastradh unsigned vm_id, uint64_t pd_addr); 852cb459498Sriastradh int cik_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); 853cb459498Sriastradh u32 cik_gfx_get_rptr(struct radeon_device *rdev, 854cb459498Sriastradh struct radeon_ring *ring); 855cb459498Sriastradh u32 cik_gfx_get_wptr(struct radeon_device *rdev, 856cb459498Sriastradh struct radeon_ring *ring); 857cb459498Sriastradh void cik_gfx_set_wptr(struct radeon_device *rdev, 858cb459498Sriastradh struct radeon_ring *ring); 859cb459498Sriastradh u32 cik_compute_get_rptr(struct radeon_device *rdev, 860cb459498Sriastradh struct radeon_ring *ring); 861cb459498Sriastradh u32 cik_compute_get_wptr(struct radeon_device *rdev, 862cb459498Sriastradh struct radeon_ring *ring); 863cb459498Sriastradh void cik_compute_set_wptr(struct radeon_device *rdev, 864cb459498Sriastradh struct radeon_ring *ring); 865cb459498Sriastradh u32 cik_sdma_get_rptr(struct radeon_device *rdev, 866cb459498Sriastradh struct radeon_ring *ring); 867cb459498Sriastradh u32 cik_sdma_get_wptr(struct radeon_device *rdev, 868cb459498Sriastradh struct radeon_ring *ring); 869cb459498Sriastradh void cik_sdma_set_wptr(struct radeon_device *rdev, 870cb459498Sriastradh struct radeon_ring *ring); 871cb459498Sriastradh int ci_get_temp(struct radeon_device *rdev); 872cb459498Sriastradh int kv_get_temp(struct radeon_device *rdev); 873d350ecf5Sriastradh int cik_get_allowed_info_register(struct radeon_device *rdev, 874d350ecf5Sriastradh u32 reg, u32 *val); 875cb459498Sriastradh 876cb459498Sriastradh int ci_dpm_init(struct radeon_device *rdev); 877cb459498Sriastradh int ci_dpm_enable(struct radeon_device *rdev); 878cb459498Sriastradh int ci_dpm_late_enable(struct radeon_device *rdev); 879cb459498Sriastradh void ci_dpm_disable(struct radeon_device *rdev); 880cb459498Sriastradh int ci_dpm_pre_set_power_state(struct radeon_device *rdev); 881cb459498Sriastradh int ci_dpm_set_power_state(struct radeon_device *rdev); 882cb459498Sriastradh void ci_dpm_post_set_power_state(struct radeon_device *rdev); 883cb459498Sriastradh void ci_dpm_setup_asic(struct radeon_device *rdev); 884cb459498Sriastradh void ci_dpm_display_configuration_changed(struct radeon_device *rdev); 885cb459498Sriastradh void ci_dpm_fini(struct radeon_device *rdev); 886cb459498Sriastradh u32 ci_dpm_get_sclk(struct radeon_device *rdev, bool low); 887cb459498Sriastradh u32 ci_dpm_get_mclk(struct radeon_device *rdev, bool low); 888cb459498Sriastradh void ci_dpm_print_power_state(struct radeon_device *rdev, 889cb459498Sriastradh struct radeon_ps *ps); 890cb459498Sriastradh void ci_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, 891cb459498Sriastradh struct seq_file *m); 892cb459498Sriastradh int ci_dpm_force_performance_level(struct radeon_device *rdev, 893cb459498Sriastradh enum radeon_dpm_forced_level level); 894cb459498Sriastradh bool ci_dpm_vblank_too_short(struct radeon_device *rdev); 895cb459498Sriastradh void ci_dpm_powergate_uvd(struct radeon_device *rdev, bool gate); 896d350ecf5Sriastradh u32 ci_dpm_get_current_sclk(struct radeon_device *rdev); 897d350ecf5Sriastradh u32 ci_dpm_get_current_mclk(struct radeon_device *rdev); 898d350ecf5Sriastradh 899d350ecf5Sriastradh int ci_fan_ctrl_get_fan_speed_percent(struct radeon_device *rdev, 900d350ecf5Sriastradh u32 *speed); 901d350ecf5Sriastradh int ci_fan_ctrl_set_fan_speed_percent(struct radeon_device *rdev, 902d350ecf5Sriastradh u32 speed); 903d350ecf5Sriastradh u32 ci_fan_ctrl_get_mode(struct radeon_device *rdev); 904d350ecf5Sriastradh void ci_fan_ctrl_set_mode(struct radeon_device *rdev, u32 mode); 905cb459498Sriastradh 906cb459498Sriastradh int kv_dpm_init(struct radeon_device *rdev); 907cb459498Sriastradh int kv_dpm_enable(struct radeon_device *rdev); 908cb459498Sriastradh int kv_dpm_late_enable(struct radeon_device *rdev); 909cb459498Sriastradh void kv_dpm_disable(struct radeon_device *rdev); 910cb459498Sriastradh int kv_dpm_pre_set_power_state(struct radeon_device *rdev); 911cb459498Sriastradh int kv_dpm_set_power_state(struct radeon_device *rdev); 912cb459498Sriastradh void kv_dpm_post_set_power_state(struct radeon_device *rdev); 913cb459498Sriastradh void kv_dpm_setup_asic(struct radeon_device *rdev); 914cb459498Sriastradh void kv_dpm_display_configuration_changed(struct radeon_device *rdev); 915cb459498Sriastradh void kv_dpm_fini(struct radeon_device *rdev); 916cb459498Sriastradh u32 kv_dpm_get_sclk(struct radeon_device *rdev, bool low); 917cb459498Sriastradh u32 kv_dpm_get_mclk(struct radeon_device *rdev, bool low); 918cb459498Sriastradh void kv_dpm_print_power_state(struct radeon_device *rdev, 919cb459498Sriastradh struct radeon_ps *ps); 920cb459498Sriastradh void kv_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, 921cb459498Sriastradh struct seq_file *m); 922cb459498Sriastradh int kv_dpm_force_performance_level(struct radeon_device *rdev, 923cb459498Sriastradh enum radeon_dpm_forced_level level); 924cb459498Sriastradh void kv_dpm_powergate_uvd(struct radeon_device *rdev, bool gate); 925cb459498Sriastradh void kv_dpm_enable_bapm(struct radeon_device *rdev, bool enable); 926d350ecf5Sriastradh u32 kv_dpm_get_current_sclk(struct radeon_device *rdev); 927d350ecf5Sriastradh u32 kv_dpm_get_current_mclk(struct radeon_device *rdev); 928cb459498Sriastradh 929cb459498Sriastradh /* uvd v1.0 */ 930cb459498Sriastradh uint32_t uvd_v1_0_get_rptr(struct radeon_device *rdev, 931cb459498Sriastradh struct radeon_ring *ring); 932cb459498Sriastradh uint32_t uvd_v1_0_get_wptr(struct radeon_device *rdev, 933cb459498Sriastradh struct radeon_ring *ring); 934cb459498Sriastradh void uvd_v1_0_set_wptr(struct radeon_device *rdev, 935cb459498Sriastradh struct radeon_ring *ring); 936d350ecf5Sriastradh int uvd_v1_0_resume(struct radeon_device *rdev); 937cb459498Sriastradh 938cb459498Sriastradh int uvd_v1_0_init(struct radeon_device *rdev); 939cb459498Sriastradh void uvd_v1_0_fini(struct radeon_device *rdev); 940cb459498Sriastradh int uvd_v1_0_start(struct radeon_device *rdev); 941cb459498Sriastradh void uvd_v1_0_stop(struct radeon_device *rdev); 942cb459498Sriastradh 943cb459498Sriastradh int uvd_v1_0_ring_test(struct radeon_device *rdev, struct radeon_ring *ring); 944d350ecf5Sriastradh void uvd_v1_0_fence_emit(struct radeon_device *rdev, 945d350ecf5Sriastradh struct radeon_fence *fence); 946cb459498Sriastradh int uvd_v1_0_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); 947cb459498Sriastradh bool uvd_v1_0_semaphore_emit(struct radeon_device *rdev, 948cb459498Sriastradh struct radeon_ring *ring, 949cb459498Sriastradh struct radeon_semaphore *semaphore, 950cb459498Sriastradh bool emit_wait); 951cb459498Sriastradh void uvd_v1_0_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); 952cb459498Sriastradh 953cb459498Sriastradh /* uvd v2.2 */ 954cb459498Sriastradh int uvd_v2_2_resume(struct radeon_device *rdev); 955cb459498Sriastradh void uvd_v2_2_fence_emit(struct radeon_device *rdev, 956cb459498Sriastradh struct radeon_fence *fence); 957d350ecf5Sriastradh bool uvd_v2_2_semaphore_emit(struct radeon_device *rdev, 958d350ecf5Sriastradh struct radeon_ring *ring, 959d350ecf5Sriastradh struct radeon_semaphore *semaphore, 960d350ecf5Sriastradh bool emit_wait); 961cb459498Sriastradh 962cb459498Sriastradh /* uvd v3.1 */ 963cb459498Sriastradh bool uvd_v3_1_semaphore_emit(struct radeon_device *rdev, 964cb459498Sriastradh struct radeon_ring *ring, 965cb459498Sriastradh struct radeon_semaphore *semaphore, 966cb459498Sriastradh bool emit_wait); 967cb459498Sriastradh 968cb459498Sriastradh /* uvd v4.2 */ 969cb459498Sriastradh int uvd_v4_2_resume(struct radeon_device *rdev); 970cb459498Sriastradh 971cb459498Sriastradh /* vce v1.0 */ 972cb459498Sriastradh uint32_t vce_v1_0_get_rptr(struct radeon_device *rdev, 973cb459498Sriastradh struct radeon_ring *ring); 974cb459498Sriastradh uint32_t vce_v1_0_get_wptr(struct radeon_device *rdev, 975cb459498Sriastradh struct radeon_ring *ring); 976cb459498Sriastradh void vce_v1_0_set_wptr(struct radeon_device *rdev, 977cb459498Sriastradh struct radeon_ring *ring); 978d350ecf5Sriastradh int vce_v1_0_load_fw(struct radeon_device *rdev, uint32_t *data); 979d350ecf5Sriastradh unsigned vce_v1_0_bo_size(struct radeon_device *rdev); 980d350ecf5Sriastradh int vce_v1_0_resume(struct radeon_device *rdev); 981cb459498Sriastradh int vce_v1_0_init(struct radeon_device *rdev); 982cb459498Sriastradh int vce_v1_0_start(struct radeon_device *rdev); 983cb459498Sriastradh 984cb459498Sriastradh /* vce v2.0 */ 985d350ecf5Sriastradh unsigned vce_v2_0_bo_size(struct radeon_device *rdev); 986cb459498Sriastradh int vce_v2_0_resume(struct radeon_device *rdev); 987cb459498Sriastradh 988cb459498Sriastradh #endif 989