1*f01da319Sriastradh /* $NetBSD: pci.h,v 1.9 2014/10/16 12:31:23 riastradh Exp $ */ 22adb3a73Sriastradh 32adb3a73Sriastradh /*- 42adb3a73Sriastradh * Copyright (c) 2013 The NetBSD Foundation, Inc. 52adb3a73Sriastradh * All rights reserved. 62adb3a73Sriastradh * 72adb3a73Sriastradh * This code is derived from software contributed to The NetBSD Foundation 82adb3a73Sriastradh * by Taylor R. Campbell. 92adb3a73Sriastradh * 102adb3a73Sriastradh * Redistribution and use in source and binary forms, with or without 112adb3a73Sriastradh * modification, are permitted provided that the following conditions 122adb3a73Sriastradh * are met: 132adb3a73Sriastradh * 1. Redistributions of source code must retain the above copyright 142adb3a73Sriastradh * notice, this list of conditions and the following disclaimer. 152adb3a73Sriastradh * 2. Redistributions in binary form must reproduce the above copyright 162adb3a73Sriastradh * notice, this list of conditions and the following disclaimer in the 172adb3a73Sriastradh * documentation and/or other materials provided with the distribution. 182adb3a73Sriastradh * 192adb3a73Sriastradh * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 202adb3a73Sriastradh * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 212adb3a73Sriastradh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 222adb3a73Sriastradh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 232adb3a73Sriastradh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 242adb3a73Sriastradh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 252adb3a73Sriastradh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 262adb3a73Sriastradh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 272adb3a73Sriastradh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 282adb3a73Sriastradh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 292adb3a73Sriastradh * POSSIBILITY OF SUCH DAMAGE. 302adb3a73Sriastradh */ 312adb3a73Sriastradh 322adb3a73Sriastradh #ifndef _LINUX_PCI_H_ 332adb3a73Sriastradh #define _LINUX_PCI_H_ 342adb3a73Sriastradh 352adb3a73Sriastradh #include <sys/types.h> 36fceff80cSriastradh #include <sys/param.h> 372adb3a73Sriastradh #include <sys/bus.h> 380fa81a94Sriastradh #include <sys/cdefs.h> 392adb3a73Sriastradh #include <sys/kmem.h> 402adb3a73Sriastradh #include <sys/systm.h> 412adb3a73Sriastradh 42fceff80cSriastradh #include <machine/limits.h> 43fceff80cSriastradh 442adb3a73Sriastradh #include <dev/pci/pcidevs.h> 452adb3a73Sriastradh #include <dev/pci/pcireg.h> 462adb3a73Sriastradh #include <dev/pci/pcivar.h> 47fceff80cSriastradh #include <dev/pci/agpvar.h> 482adb3a73Sriastradh 49375d5351Sriastradh #include <linux/dma-mapping.h> 502adb3a73Sriastradh #include <linux/ioport.h> 512adb3a73Sriastradh 522adb3a73Sriastradh struct pci_bus; 532adb3a73Sriastradh 542adb3a73Sriastradh struct pci_device_id { 552adb3a73Sriastradh uint32_t vendor; 562adb3a73Sriastradh uint32_t device; 572adb3a73Sriastradh uint32_t subvendor; 582adb3a73Sriastradh uint32_t subdevice; 592adb3a73Sriastradh uint32_t class; 602adb3a73Sriastradh uint32_t class_mask; 612adb3a73Sriastradh unsigned long driver_data; 622adb3a73Sriastradh }; 632adb3a73Sriastradh 642adb3a73Sriastradh #define PCI_ANY_ID ((pcireg_t)-1) 652adb3a73Sriastradh 662adb3a73Sriastradh #define PCI_BASE_CLASS_DISPLAY PCI_CLASS_DISPLAY 672adb3a73Sriastradh 682adb3a73Sriastradh #define PCI_CLASS_BRIDGE_ISA \ 692adb3a73Sriastradh ((PCI_CLASS_BRIDGE << 8) | PCI_SUBCLASS_BRIDGE_ISA) 702adb3a73Sriastradh CTASSERT(PCI_CLASS_BRIDGE_ISA == 0x0601); 712adb3a73Sriastradh 727b7df45fSriastradh /* XXX This is getting silly... */ 737b7df45fSriastradh #define PCI_VENDOR_ID_ASUSTEK PCI_VENDOR_ASUSTEK 747b7df45fSriastradh #define PCI_VENDOR_ID_ATI PCI_VENDOR_ATI 757b7df45fSriastradh #define PCI_VENDOR_ID_DELL PCI_VENDOR_DELL 767b7df45fSriastradh #define PCI_VENDOR_ID_IBM PCI_VENDOR_IBM 777b7df45fSriastradh #define PCI_VENDOR_ID_HP PCI_VENDOR_HP 782adb3a73Sriastradh #define PCI_VENDOR_ID_INTEL PCI_VENDOR_INTEL 79375d5351Sriastradh #define PCI_VENDOR_ID_NVIDIA PCI_VENDOR_NVIDIA 807b7df45fSriastradh #define PCI_VENDOR_ID_SONY PCI_VENDOR_SONY 817b7df45fSriastradh #define PCI_VENDOR_ID_VIA PCI_VENDOR_VIATECH 827b7df45fSriastradh 837b7df45fSriastradh #define PCI_DEVICE_ID_ATI_RADEON_QY PCI_PRODUCT_ATI_RADEON_RV100_QY 842adb3a73Sriastradh 852adb3a73Sriastradh #define PCI_DEVFN(DEV, FN) \ 862adb3a73Sriastradh (__SHIFTIN((DEV), __BITS(3, 7)) | __SHIFTIN((FN), __BITS(0, 2))) 872adb3a73Sriastradh #define PCI_SLOT(DEVFN) __SHIFTOUT((DEVFN), __BITS(3, 7)) 882adb3a73Sriastradh #define PCI_FUNC(DEVFN) __SHIFTOUT((DEVFN), __BITS(0, 2)) 892adb3a73Sriastradh 90fceff80cSriastradh #define PCI_NUM_RESOURCES ((PCI_MAPREG_END - PCI_MAPREG_START) / 4) 917b7df45fSriastradh #define DEVICE_COUNT_RESOURCE PCI_NUM_RESOURCES 92fceff80cSriastradh 932adb3a73Sriastradh #define PCI_CAP_ID_AGP PCI_CAP_AGP 942adb3a73Sriastradh 95fceff80cSriastradh typedef int pci_power_t; 96fceff80cSriastradh 97fceff80cSriastradh #define PCI_D0 0 98fceff80cSriastradh #define PCI_D1 1 99fceff80cSriastradh #define PCI_D2 2 100fceff80cSriastradh #define PCI_D3hot 3 101fceff80cSriastradh #define PCI_D3cold 4 102fceff80cSriastradh 103fceff80cSriastradh #define __pci_iomem 104fceff80cSriastradh 1052adb3a73Sriastradh struct pci_dev { 1062adb3a73Sriastradh struct pci_attach_args pd_pa; 1072adb3a73Sriastradh int pd_kludges; /* Gotta lose 'em... */ 1082adb3a73Sriastradh #define NBPCI_KLUDGE_GET_MUMBLE 0x01 1092adb3a73Sriastradh #define NBPCI_KLUDGE_MAP_ROM 0x02 1102adb3a73Sriastradh bus_space_tag_t pd_rom_bst; 1112adb3a73Sriastradh bus_space_handle_t pd_rom_bsh; 1122adb3a73Sriastradh bus_size_t pd_rom_size; 1132adb3a73Sriastradh void *pd_rom_vaddr; 1142adb3a73Sriastradh device_t pd_dev; 115fceff80cSriastradh struct { 116fceff80cSriastradh pcireg_t type; 117fceff80cSriastradh bus_addr_t addr; 118fceff80cSriastradh bus_size_t size; 119fceff80cSriastradh int flags; 120fceff80cSriastradh bus_space_tag_t bst; 121fceff80cSriastradh bus_space_handle_t bsh; 122fceff80cSriastradh void __pci_iomem *kva; 123fceff80cSriastradh } pd_resources[PCI_NUM_RESOURCES]; 1247b7df45fSriastradh struct pci_conf_state *pd_saved_state; 1252adb3a73Sriastradh struct device dev; /* XXX Don't believe me! */ 1262adb3a73Sriastradh struct pci_bus *bus; 1272adb3a73Sriastradh uint32_t devfn; 1282adb3a73Sriastradh uint16_t vendor; 1292adb3a73Sriastradh uint16_t device; 1302adb3a73Sriastradh uint16_t subsystem_vendor; 1312adb3a73Sriastradh uint16_t subsystem_device; 1322adb3a73Sriastradh uint8_t revision; 1332adb3a73Sriastradh uint32_t class; 1342adb3a73Sriastradh bool msi_enabled; 1352adb3a73Sriastradh }; 1362adb3a73Sriastradh 1372adb3a73Sriastradh static inline device_t 1382adb3a73Sriastradh pci_dev_dev(struct pci_dev *pdev) 1392adb3a73Sriastradh { 1402adb3a73Sriastradh return pdev->pd_dev; 1412adb3a73Sriastradh } 1422adb3a73Sriastradh 1432adb3a73Sriastradh static inline void 1442adb3a73Sriastradh linux_pci_dev_init(struct pci_dev *pdev, device_t dev, 1452adb3a73Sriastradh const struct pci_attach_args *pa, int kludges) 1462adb3a73Sriastradh { 1472adb3a73Sriastradh const uint32_t subsystem_id = pci_conf_read(pa->pa_pc, pa->pa_tag, 1482adb3a73Sriastradh PCI_SUBSYS_ID_REG); 149fceff80cSriastradh unsigned i; 1502adb3a73Sriastradh 1512adb3a73Sriastradh pdev->pd_pa = *pa; 1522adb3a73Sriastradh pdev->pd_kludges = kludges; 1532adb3a73Sriastradh pdev->pd_rom_vaddr = NULL; 1542adb3a73Sriastradh pdev->pd_dev = dev; 1552adb3a73Sriastradh pdev->bus = NULL; /* XXX struct pci_dev::bus */ 1562adb3a73Sriastradh pdev->devfn = PCI_DEVFN(pa->pa_device, pa->pa_function); 1572adb3a73Sriastradh pdev->vendor = PCI_VENDOR(pa->pa_id); 1582adb3a73Sriastradh pdev->device = PCI_PRODUCT(pa->pa_id); 1592adb3a73Sriastradh pdev->subsystem_vendor = PCI_SUBSYS_VENDOR(subsystem_id); 1602adb3a73Sriastradh pdev->subsystem_device = PCI_SUBSYS_ID(subsystem_id); 1612adb3a73Sriastradh pdev->revision = PCI_REVISION(pa->pa_class); 1622adb3a73Sriastradh pdev->class = __SHIFTOUT(pa->pa_class, 0xffffff00UL); /* ? */ 163fceff80cSriastradh 164fceff80cSriastradh CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES); 165fceff80cSriastradh for (i = 0; i < PCI_NUM_RESOURCES; i++) { 166fceff80cSriastradh const int reg = PCI_BAR(i); 167fceff80cSriastradh 168fceff80cSriastradh pdev->pd_resources[i].type = pci_mapreg_type(pa->pa_pc, 169fceff80cSriastradh pa->pa_tag, reg); 170fceff80cSriastradh if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg, 171fceff80cSriastradh pdev->pd_resources[i].type, 172fceff80cSriastradh &pdev->pd_resources[i].addr, 173fceff80cSriastradh &pdev->pd_resources[i].size, 174fceff80cSriastradh &pdev->pd_resources[i].flags)) { 175fceff80cSriastradh pdev->pd_resources[i].addr = 0; 176fceff80cSriastradh pdev->pd_resources[i].size = 0; 177fceff80cSriastradh pdev->pd_resources[i].flags = 0; 178fceff80cSriastradh } 179fceff80cSriastradh pdev->pd_resources[i].kva = NULL; 180fceff80cSriastradh } 1812adb3a73Sriastradh } 1822adb3a73Sriastradh 1832adb3a73Sriastradh static inline int 1842adb3a73Sriastradh pci_find_capability(struct pci_dev *pdev, int cap) 1852adb3a73Sriastradh { 1862adb3a73Sriastradh return pci_get_capability(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, cap, 1872adb3a73Sriastradh NULL, NULL); 1882adb3a73Sriastradh } 1892adb3a73Sriastradh 190fceff80cSriastradh static inline int 1912adb3a73Sriastradh pci_read_config_dword(struct pci_dev *pdev, int reg, uint32_t *valuep) 1922adb3a73Sriastradh { 1932adb3a73Sriastradh KASSERT(!ISSET(reg, 3)); 1942adb3a73Sriastradh *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg); 195fceff80cSriastradh return 0; 1962adb3a73Sriastradh } 1972adb3a73Sriastradh 198fceff80cSriastradh static inline int 1992adb3a73Sriastradh pci_read_config_word(struct pci_dev *pdev, int reg, uint16_t *valuep) 2002adb3a73Sriastradh { 2012adb3a73Sriastradh KASSERT(!ISSET(reg, 1)); 2022adb3a73Sriastradh *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, 203f36c8bf8Sriastradh (reg &~ 2)) >> (8 * (reg & 2)); 204fceff80cSriastradh return 0; 2052adb3a73Sriastradh } 2062adb3a73Sriastradh 207fceff80cSriastradh static inline int 2082adb3a73Sriastradh pci_read_config_byte(struct pci_dev *pdev, int reg, uint8_t *valuep) 2092adb3a73Sriastradh { 2102adb3a73Sriastradh *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, 211f36c8bf8Sriastradh (reg &~ 3)) >> (8 * (reg & 3)); 212fceff80cSriastradh return 0; 2132adb3a73Sriastradh } 2142adb3a73Sriastradh 215fceff80cSriastradh static inline int 2162adb3a73Sriastradh pci_write_config_dword(struct pci_dev *pdev, int reg, uint32_t value) 2172adb3a73Sriastradh { 2182adb3a73Sriastradh KASSERT(!ISSET(reg, 3)); 2192adb3a73Sriastradh pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, value); 220fceff80cSriastradh return 0; 2212adb3a73Sriastradh } 2222adb3a73Sriastradh 2232adb3a73Sriastradh static inline void 2242adb3a73Sriastradh pci_rmw_config(struct pci_dev *pdev, int reg, unsigned int bytes, 2252adb3a73Sriastradh uint32_t value) 2262adb3a73Sriastradh { 2272adb3a73Sriastradh const uint32_t mask = ~((~0UL) << (8 * bytes)); 2282adb3a73Sriastradh const int reg32 = (reg &~ 3); 2292adb3a73Sriastradh const unsigned int shift = (8 * (reg & 3)); 2302adb3a73Sriastradh uint32_t value32; 2312adb3a73Sriastradh 2322adb3a73Sriastradh KASSERT(bytes <= 4); 2332adb3a73Sriastradh KASSERT(!ISSET(value, ~mask)); 2342adb3a73Sriastradh pci_read_config_dword(pdev, reg32, &value32); 2352adb3a73Sriastradh value32 &=~ (mask << shift); 2362adb3a73Sriastradh value32 |= (value << shift); 2372adb3a73Sriastradh pci_write_config_dword(pdev, reg32, value32); 2382adb3a73Sriastradh } 2392adb3a73Sriastradh 240fceff80cSriastradh static inline int 2412adb3a73Sriastradh pci_write_config_word(struct pci_dev *pdev, int reg, uint16_t value) 2422adb3a73Sriastradh { 2432adb3a73Sriastradh KASSERT(!ISSET(reg, 1)); 2442adb3a73Sriastradh pci_rmw_config(pdev, reg, 2, value); 245fceff80cSriastradh return 0; 2462adb3a73Sriastradh } 2472adb3a73Sriastradh 248fceff80cSriastradh static inline int 2492adb3a73Sriastradh pci_write_config_byte(struct pci_dev *pdev, int reg, uint8_t value) 2502adb3a73Sriastradh { 2512adb3a73Sriastradh pci_rmw_config(pdev, reg, 1, value); 252fceff80cSriastradh return 0; 2532adb3a73Sriastradh } 2542adb3a73Sriastradh 2552adb3a73Sriastradh /* 2562adb3a73Sriastradh * XXX pci msi 2572adb3a73Sriastradh */ 2587b7df45fSriastradh static inline int 2592adb3a73Sriastradh pci_enable_msi(struct pci_dev *pdev) 2602adb3a73Sriastradh { 2617b7df45fSriastradh return -ENOSYS; 2622adb3a73Sriastradh } 2632adb3a73Sriastradh 2642adb3a73Sriastradh static inline void 2657b7df45fSriastradh pci_disable_msi(struct pci_dev *pdev __unused) 2662adb3a73Sriastradh { 2672adb3a73Sriastradh KASSERT(pdev->msi_enabled); 2682adb3a73Sriastradh } 2692adb3a73Sriastradh 2702adb3a73Sriastradh static inline void 2712adb3a73Sriastradh pci_set_master(struct pci_dev *pdev) 2722adb3a73Sriastradh { 2732adb3a73Sriastradh pcireg_t csr; 2742adb3a73Sriastradh 2752adb3a73Sriastradh csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, 2762adb3a73Sriastradh PCI_COMMAND_STATUS_REG); 2772adb3a73Sriastradh csr |= PCI_COMMAND_MASTER_ENABLE; 2782adb3a73Sriastradh pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, 2792adb3a73Sriastradh PCI_COMMAND_STATUS_REG, csr); 2802adb3a73Sriastradh } 2812adb3a73Sriastradh 2827b7df45fSriastradh static inline void 2837b7df45fSriastradh pci_clear_master(struct pci_dev *pdev) 2847b7df45fSriastradh { 2857b7df45fSriastradh pcireg_t csr; 2867b7df45fSriastradh 2877b7df45fSriastradh csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, 2887b7df45fSriastradh PCI_COMMAND_STATUS_REG); 2897b7df45fSriastradh csr &= ~(pcireg_t)PCI_COMMAND_MASTER_ENABLE; 2907b7df45fSriastradh pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, 2917b7df45fSriastradh PCI_COMMAND_STATUS_REG, csr); 2927b7df45fSriastradh } 2937b7df45fSriastradh 2942adb3a73Sriastradh #define PCIBIOS_MIN_MEM 0 /* XXX bogus x86 kludge bollocks */ 2952adb3a73Sriastradh 2962adb3a73Sriastradh static inline bus_addr_t 2972adb3a73Sriastradh pcibios_align_resource(void *p, const struct resource *resource, 2982adb3a73Sriastradh bus_addr_t addr, bus_size_t size) 2992adb3a73Sriastradh { 3002adb3a73Sriastradh panic("pcibios_align_resource has accessed unaligned neurons!"); 3012adb3a73Sriastradh } 3022adb3a73Sriastradh 3032adb3a73Sriastradh static inline int 3042adb3a73Sriastradh pci_bus_alloc_resource(struct pci_bus *bus, struct resource *resource, 3052adb3a73Sriastradh bus_size_t size, bus_size_t align, bus_addr_t start, int type __unused, 3062adb3a73Sriastradh bus_addr_t (*align_fn)(void *, const struct resource *, bus_addr_t, 3072adb3a73Sriastradh bus_size_t) __unused, 3082adb3a73Sriastradh struct pci_dev *pdev) 3092adb3a73Sriastradh { 3102adb3a73Sriastradh const struct pci_attach_args *const pa = &pdev->pd_pa; 3112adb3a73Sriastradh bus_space_tag_t bst; 3122adb3a73Sriastradh int error; 3132adb3a73Sriastradh 3142adb3a73Sriastradh switch (resource->flags) { 3152adb3a73Sriastradh case IORESOURCE_MEM: 3162adb3a73Sriastradh bst = pa->pa_memt; 3172adb3a73Sriastradh break; 3182adb3a73Sriastradh 3192adb3a73Sriastradh case IORESOURCE_IO: 3202adb3a73Sriastradh bst = pa->pa_iot; 3212adb3a73Sriastradh break; 3222adb3a73Sriastradh 3232adb3a73Sriastradh default: 3242adb3a73Sriastradh panic("I don't know what kind of resource you want!"); 3252adb3a73Sriastradh } 3262adb3a73Sriastradh 3272adb3a73Sriastradh resource->r_bst = bst; 3280fa81a94Sriastradh error = bus_space_alloc(bst, start, __type_max(bus_addr_t), 3292adb3a73Sriastradh size, align, 0, 0, &resource->start, &resource->r_bsh); 3302adb3a73Sriastradh if (error) 3312adb3a73Sriastradh return error; 3322adb3a73Sriastradh 3332adb3a73Sriastradh resource->size = size; 3342adb3a73Sriastradh return 0; 3352adb3a73Sriastradh } 3362adb3a73Sriastradh 3372adb3a73Sriastradh /* 3382adb3a73Sriastradh * XXX Mega-kludgerific! pci_get_bus_and_slot and pci_get_class are 3392adb3a73Sriastradh * defined only for their single purposes in i915drm, in 3402adb3a73Sriastradh * i915_get_bridge_dev and intel_detect_pch. We can't define them more 3412adb3a73Sriastradh * generally without adapting pci_find_device (and pci_enumerate_bus 3422adb3a73Sriastradh * internally) to pass a cookie through. 3432adb3a73Sriastradh */ 3442adb3a73Sriastradh 3452adb3a73Sriastradh static inline int /* XXX inline? */ 3462adb3a73Sriastradh pci_kludgey_match_bus0_dev0_func0(const struct pci_attach_args *pa) 3472adb3a73Sriastradh { 3482adb3a73Sriastradh 3492adb3a73Sriastradh if (pa->pa_bus != 0) 3502adb3a73Sriastradh return 0; 3512adb3a73Sriastradh if (pa->pa_device != 0) 3522adb3a73Sriastradh return 0; 3532adb3a73Sriastradh if (pa->pa_function != 0) 3542adb3a73Sriastradh return 0; 3552adb3a73Sriastradh 3562adb3a73Sriastradh return 1; 3572adb3a73Sriastradh } 3582adb3a73Sriastradh 3592adb3a73Sriastradh static inline struct pci_dev * 3602adb3a73Sriastradh pci_get_bus_and_slot(int bus, int slot) 3612adb3a73Sriastradh { 3622adb3a73Sriastradh struct pci_attach_args pa; 3632adb3a73Sriastradh 3642adb3a73Sriastradh KASSERT(bus == 0); 3652adb3a73Sriastradh KASSERT(slot == PCI_DEVFN(0, 0)); 3662adb3a73Sriastradh 3672adb3a73Sriastradh if (!pci_find_device(&pa, &pci_kludgey_match_bus0_dev0_func0)) 3682adb3a73Sriastradh return NULL; 3692adb3a73Sriastradh 3702adb3a73Sriastradh struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP); 3712adb3a73Sriastradh linux_pci_dev_init(pdev, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE); 3722adb3a73Sriastradh 3732adb3a73Sriastradh return pdev; 3742adb3a73Sriastradh } 3752adb3a73Sriastradh 3762adb3a73Sriastradh static inline int /* XXX inline? */ 3772adb3a73Sriastradh pci_kludgey_match_isa_bridge(const struct pci_attach_args *pa) 3782adb3a73Sriastradh { 3792adb3a73Sriastradh 3802adb3a73Sriastradh if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE) 3812adb3a73Sriastradh return 0; 3822adb3a73Sriastradh if (PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_ISA) 3832adb3a73Sriastradh return 0; 3842adb3a73Sriastradh 3852adb3a73Sriastradh return 1; 3862adb3a73Sriastradh } 3872adb3a73Sriastradh 388fceff80cSriastradh static inline void 389fceff80cSriastradh pci_dev_put(struct pci_dev *pdev) 390fceff80cSriastradh { 391fceff80cSriastradh 392fceff80cSriastradh if (pdev == NULL) 393fceff80cSriastradh return; 394fceff80cSriastradh 395fceff80cSriastradh KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_GET_MUMBLE)); 396fceff80cSriastradh kmem_free(pdev, sizeof(*pdev)); 397fceff80cSriastradh } 398fceff80cSriastradh 3992adb3a73Sriastradh static inline struct pci_dev * 400fceff80cSriastradh pci_get_class(uint32_t class_subclass_shifted __unused, struct pci_dev *from) 4012adb3a73Sriastradh { 4022adb3a73Sriastradh struct pci_attach_args pa; 4032adb3a73Sriastradh 4042adb3a73Sriastradh KASSERT(class_subclass_shifted == (PCI_CLASS_BRIDGE_ISA << 8)); 405fceff80cSriastradh 406fceff80cSriastradh if (from != NULL) { 407fceff80cSriastradh pci_dev_put(from); 408fceff80cSriastradh return NULL; 409fceff80cSriastradh } 4102adb3a73Sriastradh 4112adb3a73Sriastradh if (!pci_find_device(&pa, &pci_kludgey_match_isa_bridge)) 4122adb3a73Sriastradh return NULL; 4132adb3a73Sriastradh 4142adb3a73Sriastradh struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP); 4152adb3a73Sriastradh linux_pci_dev_init(pdev, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE); 4162adb3a73Sriastradh 4172adb3a73Sriastradh return pdev; 4182adb3a73Sriastradh } 4192adb3a73Sriastradh 4202adb3a73Sriastradh #define __pci_rom_iomem 4212adb3a73Sriastradh 4222adb3a73Sriastradh static inline void 4232adb3a73Sriastradh pci_unmap_rom(struct pci_dev *pdev, void __pci_rom_iomem *vaddr __unused) 4242adb3a73Sriastradh { 4252adb3a73Sriastradh 4262adb3a73Sriastradh KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM)); 4272adb3a73Sriastradh KASSERT(vaddr == pdev->pd_rom_vaddr); 4282adb3a73Sriastradh bus_space_unmap(pdev->pd_rom_bst, pdev->pd_rom_bsh, pdev->pd_rom_size); 4292adb3a73Sriastradh pdev->pd_kludges &= ~NBPCI_KLUDGE_MAP_ROM; 4302adb3a73Sriastradh pdev->pd_rom_vaddr = NULL; 4312adb3a73Sriastradh } 4322adb3a73Sriastradh 433*f01da319Sriastradh /* XXX Whattakludge! Should move this in sys/arch/. */ 434*f01da319Sriastradh static int 435*f01da319Sriastradh pci_map_rom_md(struct pci_dev *pdev) 436*f01da319Sriastradh { 437*f01da319Sriastradh #if defined(__i386__) || defined(__x86_64__) || defined(__ia64__) 438*f01da319Sriastradh const bus_addr_t rom_base = 0xc0000; 439*f01da319Sriastradh const bus_size_t rom_size = 0x20000; 440*f01da319Sriastradh bus_space_handle_t rom_bsh; 441*f01da319Sriastradh int error; 442*f01da319Sriastradh 443*f01da319Sriastradh if (PCI_CLASS(pdev->pd_pa.pa_class) != PCI_CLASS_DISPLAY) 444*f01da319Sriastradh return ENXIO; 445*f01da319Sriastradh if (PCI_SUBCLASS(pdev->pd_pa.pa_class) != PCI_SUBCLASS_DISPLAY_VGA) 446*f01da319Sriastradh return ENXIO; 447*f01da319Sriastradh /* XXX Check whether this is the primary VGA card? */ 448*f01da319Sriastradh error = bus_space_map(pdev->pd_pa.pa_memt, rom_base, rom_size, 449*f01da319Sriastradh (BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE), &rom_bsh); 450*f01da319Sriastradh if (error) 451*f01da319Sriastradh return ENXIO; 452*f01da319Sriastradh 453*f01da319Sriastradh pdev->pd_rom_bst = pdev->pd_pa.pa_memt; 454*f01da319Sriastradh pdev->pd_rom_bsh = rom_bsh; 455*f01da319Sriastradh pdev->pd_rom_size = rom_size; 456*f01da319Sriastradh 457*f01da319Sriastradh return 0; 458*f01da319Sriastradh #else 459*f01da319Sriastradh return ENXIO; 460*f01da319Sriastradh #endif 461*f01da319Sriastradh } 462*f01da319Sriastradh 4632adb3a73Sriastradh static inline void __pci_rom_iomem * 4642adb3a73Sriastradh pci_map_rom(struct pci_dev *pdev, size_t *sizep) 4652adb3a73Sriastradh { 4662adb3a73Sriastradh bus_space_handle_t bsh; 4672adb3a73Sriastradh bus_size_t size; 4682adb3a73Sriastradh 4692adb3a73Sriastradh KASSERT(!ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM)); 4702adb3a73Sriastradh 4712adb3a73Sriastradh if (pci_mapreg_map(&pdev->pd_pa, PCI_MAPREG_ROM, PCI_MAPREG_TYPE_ROM, 4722adb3a73Sriastradh (BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR), 4732adb3a73Sriastradh &pdev->pd_rom_bst, &pdev->pd_rom_bsh, NULL, &pdev->pd_rom_size) 474*f01da319Sriastradh != 0 && 475*f01da319Sriastradh pci_map_rom_md(pdev) != 0) 4762adb3a73Sriastradh return NULL; 4772adb3a73Sriastradh pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM; 4782adb3a73Sriastradh 4792adb3a73Sriastradh /* XXX This type is obviously wrong in general... */ 4802adb3a73Sriastradh if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh, 481*f01da319Sriastradh pdev->pd_rom_size, PCI_ROM_CODE_TYPE_X86, &bsh, &size)) { 4822adb3a73Sriastradh pci_unmap_rom(pdev, NULL); 4832adb3a73Sriastradh return NULL; 4842adb3a73Sriastradh } 4852adb3a73Sriastradh 4862adb3a73Sriastradh KASSERT(size <= SIZE_T_MAX); 4872adb3a73Sriastradh *sizep = size; 4882adb3a73Sriastradh pdev->pd_rom_vaddr = bus_space_vaddr(pdev->pd_rom_bst, bsh); 4892adb3a73Sriastradh return pdev->pd_rom_vaddr; 4902adb3a73Sriastradh } 4912adb3a73Sriastradh 492fceff80cSriastradh static inline bus_addr_t 493fceff80cSriastradh pci_resource_start(struct pci_dev *pdev, unsigned i) 494fceff80cSriastradh { 495fceff80cSriastradh 496fceff80cSriastradh KASSERT(i < PCI_NUM_RESOURCES); 497fceff80cSriastradh return pdev->pd_resources[i].addr; 498fceff80cSriastradh } 499fceff80cSriastradh 500fceff80cSriastradh static inline bus_size_t 501fceff80cSriastradh pci_resource_len(struct pci_dev *pdev, unsigned i) 502fceff80cSriastradh { 503fceff80cSriastradh 504fceff80cSriastradh KASSERT(i < PCI_NUM_RESOURCES); 505fceff80cSriastradh return pdev->pd_resources[i].size; 506fceff80cSriastradh } 507fceff80cSriastradh 508fceff80cSriastradh static inline bus_addr_t 509fceff80cSriastradh pci_resource_end(struct pci_dev *pdev, unsigned i) 510fceff80cSriastradh { 511fceff80cSriastradh 512fceff80cSriastradh return pci_resource_start(pdev, i) + (pci_resource_len(pdev, i) - 1); 513fceff80cSriastradh } 514fceff80cSriastradh 515fceff80cSriastradh static inline int 516fceff80cSriastradh pci_resource_flags(struct pci_dev *pdev, unsigned i) 517fceff80cSriastradh { 518fceff80cSriastradh 519fceff80cSriastradh KASSERT(i < PCI_NUM_RESOURCES); 520fceff80cSriastradh return pdev->pd_resources[i].flags; 521fceff80cSriastradh } 522fceff80cSriastradh 523fceff80cSriastradh static inline void __pci_iomem * 524fceff80cSriastradh pci_iomap(struct pci_dev *pdev, unsigned i, bus_size_t size) 525fceff80cSriastradh { 526fceff80cSriastradh int error; 527fceff80cSriastradh 528fceff80cSriastradh KASSERT(i < PCI_NUM_RESOURCES); 529fceff80cSriastradh KASSERT(pdev->pd_resources[i].kva == NULL); 530fceff80cSriastradh 531fceff80cSriastradh if (PCI_MAPREG_TYPE(pdev->pd_resources[i].type) != PCI_MAPREG_TYPE_MEM) 532fceff80cSriastradh return NULL; 533fceff80cSriastradh if (pdev->pd_resources[i].size < size) 534fceff80cSriastradh return NULL; 535fceff80cSriastradh error = bus_space_map(pdev->pd_pa.pa_memt, pdev->pd_resources[i].addr, 536fceff80cSriastradh size, BUS_SPACE_MAP_LINEAR | pdev->pd_resources[i].flags, 537fceff80cSriastradh &pdev->pd_resources[i].bsh); 538fceff80cSriastradh if (error) { 539fceff80cSriastradh /* Horrible hack: try asking the fake AGP device. */ 540fceff80cSriastradh if (!agp_i810_borrow(pdev->pd_resources[i].addr, size, 541fceff80cSriastradh &pdev->pd_resources[i].bsh)) 542fceff80cSriastradh return NULL; 543fceff80cSriastradh } 544fceff80cSriastradh pdev->pd_resources[i].bst = pdev->pd_pa.pa_memt; 545fceff80cSriastradh pdev->pd_resources[i].kva = bus_space_vaddr(pdev->pd_resources[i].bst, 546fceff80cSriastradh pdev->pd_resources[i].bsh); 547fceff80cSriastradh 548fceff80cSriastradh return pdev->pd_resources[i].kva; 549fceff80cSriastradh } 550fceff80cSriastradh 551fceff80cSriastradh static inline void 552fceff80cSriastradh pci_iounmap(struct pci_dev *pdev, void __pci_iomem *kva) 553fceff80cSriastradh { 554fceff80cSriastradh unsigned i; 555fceff80cSriastradh 556fceff80cSriastradh CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES); 557fceff80cSriastradh for (i = 0; i < PCI_NUM_RESOURCES; i++) { 558fceff80cSriastradh if (pdev->pd_resources[i].kva == kva) 559fceff80cSriastradh break; 560fceff80cSriastradh } 561fceff80cSriastradh KASSERT(i < PCI_NUM_RESOURCES); 562fceff80cSriastradh 563fceff80cSriastradh pdev->pd_resources[i].kva = NULL; 564fceff80cSriastradh bus_space_unmap(pdev->pd_resources[i].bst, pdev->pd_resources[i].bsh, 565fceff80cSriastradh pdev->pd_resources[i].size); 566fceff80cSriastradh } 567fceff80cSriastradh 5687b7df45fSriastradh static inline void 5697b7df45fSriastradh pci_save_state(struct pci_dev *pdev) 5707b7df45fSriastradh { 5717b7df45fSriastradh 5727b7df45fSriastradh KASSERT(pdev->pd_saved_state == NULL); 5737b7df45fSriastradh pdev->pd_saved_state = kmem_alloc(sizeof(*pdev->pd_saved_state), 5747b7df45fSriastradh KM_SLEEP); 5757b7df45fSriastradh pci_conf_capture(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, 5767b7df45fSriastradh pdev->pd_saved_state); 5777b7df45fSriastradh } 5787b7df45fSriastradh 5797b7df45fSriastradh static inline void 5807b7df45fSriastradh pci_restore_state(struct pci_dev *pdev) 5817b7df45fSriastradh { 5827b7df45fSriastradh 5837b7df45fSriastradh KASSERT(pdev->pd_saved_state != NULL); 5847b7df45fSriastradh pci_conf_restore(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, 5857b7df45fSriastradh pdev->pd_saved_state); 5867b7df45fSriastradh kmem_free(pdev->pd_saved_state, sizeof(*pdev->pd_saved_state)); 5877b7df45fSriastradh pdev->pd_saved_state = NULL; 5887b7df45fSriastradh } 5897b7df45fSriastradh 5907b7df45fSriastradh static inline bool 5917b7df45fSriastradh pci_is_pcie(struct pci_dev *pdev) 5927b7df45fSriastradh { 5937b7df45fSriastradh 5947b7df45fSriastradh return (pci_find_capability(pdev, PCI_CAP_PCIEXPRESS) != 0); 5957b7df45fSriastradh } 5967b7df45fSriastradh 597375d5351Sriastradh static inline bool 598375d5351Sriastradh pci_dma_supported(struct pci_dev *pdev, uintmax_t mask) 599375d5351Sriastradh { 600375d5351Sriastradh 601375d5351Sriastradh /* XXX Cop-out. */ 602375d5351Sriastradh if (mask > DMA_BIT_MASK(32)) 603375d5351Sriastradh return pci_dma64_available(&pdev->pd_pa); 604375d5351Sriastradh else 605375d5351Sriastradh return true; 606375d5351Sriastradh } 607375d5351Sriastradh 6082adb3a73Sriastradh #endif /* _LINUX_PCI_H_ */ 609