1cf2d964bSjmcneill// SPDX-License-Identifier: GPL-2.0+ 2cf2d964bSjmcneill#include <dt-bindings/clock/aspeed-clock.h> 3f46c7ed4Sjmcneill 4f46c7ed4Sjmcneill/ { 5f46c7ed4Sjmcneill model = "Aspeed BMC"; 6f46c7ed4Sjmcneill compatible = "aspeed,ast2400"; 7f46c7ed4Sjmcneill #address-cells = <1>; 8f46c7ed4Sjmcneill #size-cells = <1>; 9f46c7ed4Sjmcneill interrupt-parent = <&vic>; 10f46c7ed4Sjmcneill 110cc12ebdSjmcneill aliases { 120cc12ebdSjmcneill i2c0 = &i2c0; 130cc12ebdSjmcneill i2c1 = &i2c1; 140cc12ebdSjmcneill i2c2 = &i2c2; 150cc12ebdSjmcneill i2c3 = &i2c3; 160cc12ebdSjmcneill i2c4 = &i2c4; 170cc12ebdSjmcneill i2c5 = &i2c5; 180cc12ebdSjmcneill i2c6 = &i2c6; 190cc12ebdSjmcneill i2c7 = &i2c7; 200cc12ebdSjmcneill i2c8 = &i2c8; 210cc12ebdSjmcneill i2c9 = &i2c9; 220cc12ebdSjmcneill i2c10 = &i2c10; 230cc12ebdSjmcneill i2c11 = &i2c11; 240cc12ebdSjmcneill i2c12 = &i2c12; 250cc12ebdSjmcneill i2c13 = &i2c13; 260cc12ebdSjmcneill serial0 = &uart1; 270cc12ebdSjmcneill serial1 = &uart2; 280cc12ebdSjmcneill serial2 = &uart3; 290cc12ebdSjmcneill serial3 = &uart4; 300cc12ebdSjmcneill serial4 = &uart5; 310cc12ebdSjmcneill serial5 = &vuart; 320cc12ebdSjmcneill }; 330cc12ebdSjmcneill 34f46c7ed4Sjmcneill cpus { 35f46c7ed4Sjmcneill #address-cells = <1>; 36f46c7ed4Sjmcneill #size-cells = <0>; 37f46c7ed4Sjmcneill 38f46c7ed4Sjmcneill cpu@0 { 39f46c7ed4Sjmcneill compatible = "arm,arm926ej-s"; 40f46c7ed4Sjmcneill device_type = "cpu"; 41f46c7ed4Sjmcneill reg = <0>; 42f46c7ed4Sjmcneill }; 43f46c7ed4Sjmcneill }; 44f46c7ed4Sjmcneill 45cf2d964bSjmcneill memory@40000000 { 46cf2d964bSjmcneill device_type = "memory"; 47cf2d964bSjmcneill reg = <0x40000000 0>; 48cf2d964bSjmcneill }; 49cf2d964bSjmcneill 50f46c7ed4Sjmcneill ahb { 51f46c7ed4Sjmcneill compatible = "simple-bus"; 52f46c7ed4Sjmcneill #address-cells = <1>; 53f46c7ed4Sjmcneill #size-cells = <1>; 54f46c7ed4Sjmcneill ranges; 55f46c7ed4Sjmcneill 5609fa6529Sskrll fmc: spi@1e620000 { 578fb04b9bSjmcneill reg = < 0x1e620000 0x94 5805c11c73Sjmcneill 0x20000000 0x10000000 >; 598fb04b9bSjmcneill #address-cells = <1>; 608fb04b9bSjmcneill #size-cells = <0>; 618fb04b9bSjmcneill compatible = "aspeed,ast2400-fmc"; 62cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_AHB>; 638fb04b9bSjmcneill status = "disabled"; 648fb04b9bSjmcneill interrupts = <19>; 658fb04b9bSjmcneill flash@0 { 668fb04b9bSjmcneill reg = < 0 >; 678fb04b9bSjmcneill compatible = "jedec,spi-nor"; 6809fa6529Sskrll spi-max-frequency = <50000000>; 6909fa6529Sskrll status = "disabled"; 7009fa6529Sskrll }; 7109fa6529Sskrll flash@1 { 7209fa6529Sskrll reg = < 1 >; 7309fa6529Sskrll compatible = "jedec,spi-nor"; 7409fa6529Sskrll status = "disabled"; 7509fa6529Sskrll }; 7609fa6529Sskrll flash@2 { 7709fa6529Sskrll reg = < 2 >; 7809fa6529Sskrll compatible = "jedec,spi-nor"; 7909fa6529Sskrll status = "disabled"; 8009fa6529Sskrll }; 8109fa6529Sskrll flash@3 { 8209fa6529Sskrll reg = < 3 >; 8309fa6529Sskrll compatible = "jedec,spi-nor"; 8409fa6529Sskrll status = "disabled"; 8509fa6529Sskrll }; 8609fa6529Sskrll flash@4 { 8709fa6529Sskrll reg = < 4 >; 8809fa6529Sskrll compatible = "jedec,spi-nor"; 898fb04b9bSjmcneill status = "disabled"; 908fb04b9bSjmcneill }; 918fb04b9bSjmcneill }; 928fb04b9bSjmcneill 9309fa6529Sskrll spi: spi@1e630000 { 948fb04b9bSjmcneill reg = < 0x1e630000 0x18 9505c11c73Sjmcneill 0x30000000 0x10000000 >; 968fb04b9bSjmcneill #address-cells = <1>; 978fb04b9bSjmcneill #size-cells = <0>; 988fb04b9bSjmcneill compatible = "aspeed,ast2400-spi"; 99cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_AHB>; 1008fb04b9bSjmcneill status = "disabled"; 1018fb04b9bSjmcneill flash@0 { 1028fb04b9bSjmcneill reg = < 0 >; 1038fb04b9bSjmcneill compatible = "jedec,spi-nor"; 10409fa6529Sskrll spi-max-frequency = <50000000>; 1058fb04b9bSjmcneill status = "disabled"; 1068fb04b9bSjmcneill }; 1078fb04b9bSjmcneill }; 1088fb04b9bSjmcneill 109f46c7ed4Sjmcneill vic: interrupt-controller@1e6c0080 { 110f46c7ed4Sjmcneill compatible = "aspeed,ast2400-vic"; 111f46c7ed4Sjmcneill interrupt-controller; 112f46c7ed4Sjmcneill #interrupt-cells = <1>; 113f46c7ed4Sjmcneill valid-sources = <0xffffffff 0x0007ffff>; 114f46c7ed4Sjmcneill reg = <0x1e6c0080 0x80>; 115f46c7ed4Sjmcneill }; 116f46c7ed4Sjmcneill 117182157ecSjmcneill cvic: copro-interrupt-controller@1e6c2000 { 118182157ecSjmcneill compatible = "aspeed,ast2400-cvic", "aspeed-cvic"; 119182157ecSjmcneill valid-sources = <0x7fffffff>; 120182157ecSjmcneill reg = <0x1e6c2000 0x80>; 121182157ecSjmcneill }; 122182157ecSjmcneill 123f46c7ed4Sjmcneill mac0: ethernet@1e660000 { 1248fb04b9bSjmcneill compatible = "aspeed,ast2400-mac", "faraday,ftgmac100"; 125f46c7ed4Sjmcneill reg = <0x1e660000 0x180>; 126f46c7ed4Sjmcneill interrupts = <2>; 127cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>; 128f46c7ed4Sjmcneill status = "disabled"; 129f46c7ed4Sjmcneill }; 130f46c7ed4Sjmcneill 131f46c7ed4Sjmcneill mac1: ethernet@1e680000 { 1328fb04b9bSjmcneill compatible = "aspeed,ast2400-mac", "faraday,ftgmac100"; 133f46c7ed4Sjmcneill reg = <0x1e680000 0x180>; 134f46c7ed4Sjmcneill interrupts = <3>; 135cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>; 136f46c7ed4Sjmcneill status = "disabled"; 137f46c7ed4Sjmcneill }; 138f46c7ed4Sjmcneill 139a27cda6cSjmcneill ehci0: usb@1e6a1000 { 140a27cda6cSjmcneill compatible = "aspeed,ast2400-ehci", "generic-ehci"; 141a27cda6cSjmcneill reg = <0x1e6a1000 0x100>; 142a27cda6cSjmcneill interrupts = <5>; 143a27cda6cSjmcneill clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; 144182157ecSjmcneill pinctrl-names = "default"; 145182157ecSjmcneill pinctrl-0 = <&pinctrl_usb2h_default>; 146a27cda6cSjmcneill status = "disabled"; 147a27cda6cSjmcneill }; 148a27cda6cSjmcneill 149a27cda6cSjmcneill uhci: usb@1e6b0000 { 150a27cda6cSjmcneill compatible = "aspeed,ast2400-uhci", "generic-uhci"; 151a27cda6cSjmcneill reg = <0x1e6b0000 0x100>; 152a27cda6cSjmcneill interrupts = <14>; 153a27cda6cSjmcneill #ports = <3>; 154a27cda6cSjmcneill clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>; 155a27cda6cSjmcneill status = "disabled"; 156182157ecSjmcneill /* 157182157ecSjmcneill * No default pinmux, it will follow EHCI, use an explicit pinmux 158182157ecSjmcneill * override if you don't enable EHCI 159182157ecSjmcneill */ 160182157ecSjmcneill }; 161182157ecSjmcneill 162182157ecSjmcneill vhub: usb-vhub@1e6a0000 { 163182157ecSjmcneill compatible = "aspeed,ast2400-usb-vhub"; 164182157ecSjmcneill reg = <0x1e6a0000 0x300>; 165182157ecSjmcneill interrupts = <5>; 166182157ecSjmcneill clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; 167*9ed2a30eSjmcneill aspeed,vhub-downstream-ports = <5>; 168*9ed2a30eSjmcneill aspeed,vhub-generic-endpoints = <15>; 169182157ecSjmcneill pinctrl-names = "default"; 170182157ecSjmcneill pinctrl-0 = <&pinctrl_usb2d_default>; 171182157ecSjmcneill status = "disabled"; 172a27cda6cSjmcneill }; 173a27cda6cSjmcneill 174f46c7ed4Sjmcneill apb { 175f46c7ed4Sjmcneill compatible = "simple-bus"; 176f46c7ed4Sjmcneill #address-cells = <1>; 177f46c7ed4Sjmcneill #size-cells = <1>; 178f46c7ed4Sjmcneill ranges; 179f46c7ed4Sjmcneill 180f46c7ed4Sjmcneill syscon: syscon@1e6e2000 { 181cf2d964bSjmcneill compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd"; 182f46c7ed4Sjmcneill reg = <0x1e6e2000 0x1a8>; 1838fb04b9bSjmcneill #address-cells = <1>; 184*9ed2a30eSjmcneill #size-cells = <1>; 185*9ed2a30eSjmcneill ranges = <0 0x1e6e2000 0x1000>; 186cf2d964bSjmcneill #clock-cells = <1>; 187cf2d964bSjmcneill #reset-cells = <1>; 188f46c7ed4Sjmcneill 189*9ed2a30eSjmcneill p2a: p2a-control@2c { 190*9ed2a30eSjmcneill reg = <0x2c 0x4>; 19109fa6529Sskrll compatible = "aspeed,ast2400-p2a-ctrl"; 19209fa6529Sskrll status = "disabled"; 19309fa6529Sskrll }; 194*9ed2a30eSjmcneill 195*9ed2a30eSjmcneill silicon-id@7c { 196*9ed2a30eSjmcneill compatible = "aspeed,ast2400-silicon-id", "aspeed,silicon-id"; 197*9ed2a30eSjmcneill reg = <0x7c 0x4>; 198*9ed2a30eSjmcneill }; 199*9ed2a30eSjmcneill 200*9ed2a30eSjmcneill pinctrl: pinctrl@80 { 201*9ed2a30eSjmcneill reg = <0x80 0x18>, <0xa0 0x10>; 202*9ed2a30eSjmcneill compatible = "aspeed,ast2400-pinctrl"; 203*9ed2a30eSjmcneill }; 204a27cda6cSjmcneill }; 205a27cda6cSjmcneill 206a27cda6cSjmcneill rng: hwrng@1e6e2078 { 207a27cda6cSjmcneill compatible = "timeriomem_rng"; 208a27cda6cSjmcneill reg = <0x1e6e2078 0x4>; 209a27cda6cSjmcneill period = <1>; 210a27cda6cSjmcneill quality = <100>; 2110cc12ebdSjmcneill }; 212f46c7ed4Sjmcneill 2130cc12ebdSjmcneill adc: adc@1e6e9000 { 2140cc12ebdSjmcneill compatible = "aspeed,ast2400-adc"; 2150cc12ebdSjmcneill reg = <0x1e6e9000 0xb0>; 216cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 217cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_ADC>; 2180cc12ebdSjmcneill #io-channel-cells = <1>; 2190cc12ebdSjmcneill status = "disabled"; 2200cc12ebdSjmcneill }; 2210cc12ebdSjmcneill 222182157ecSjmcneill sram: sram@1e720000 { 2230cc12ebdSjmcneill compatible = "mmio-sram"; 2240cc12ebdSjmcneill reg = <0x1e720000 0x8000>; // 32K 2250cc12ebdSjmcneill }; 2260cc12ebdSjmcneill 227*9ed2a30eSjmcneill video: video@1e700000 { 228*9ed2a30eSjmcneill compatible = "aspeed,ast2400-video-engine"; 229*9ed2a30eSjmcneill reg = <0x1e700000 0x1000>; 230*9ed2a30eSjmcneill clocks = <&syscon ASPEED_CLK_GATE_VCLK>, 231*9ed2a30eSjmcneill <&syscon ASPEED_CLK_GATE_ECLK>; 232*9ed2a30eSjmcneill clock-names = "vclk", "eclk"; 233*9ed2a30eSjmcneill interrupts = <7>; 234*9ed2a30eSjmcneill status = "disabled"; 235*9ed2a30eSjmcneill }; 236*9ed2a30eSjmcneill 23709fa6529Sskrll sdmmc: sd-controller@1e740000 { 23809fa6529Sskrll compatible = "aspeed,ast2400-sd-controller"; 23909fa6529Sskrll reg = <0x1e740000 0x100>; 24009fa6529Sskrll #address-cells = <1>; 24109fa6529Sskrll #size-cells = <1>; 24209fa6529Sskrll ranges = <0 0x1e740000 0x10000>; 24309fa6529Sskrll clocks = <&syscon ASPEED_CLK_GATE_SDCLK>; 24409fa6529Sskrll status = "disabled"; 24509fa6529Sskrll 24609fa6529Sskrll sdhci0: sdhci@100 { 24709fa6529Sskrll compatible = "aspeed,ast2400-sdhci"; 24809fa6529Sskrll reg = <0x100 0x100>; 24909fa6529Sskrll interrupts = <26>; 25009fa6529Sskrll sdhci,auto-cmd12; 25109fa6529Sskrll clocks = <&syscon ASPEED_CLK_SDIO>; 25209fa6529Sskrll status = "disabled"; 25309fa6529Sskrll }; 25409fa6529Sskrll 25509fa6529Sskrll sdhci1: sdhci@200 { 25609fa6529Sskrll compatible = "aspeed,ast2400-sdhci"; 25709fa6529Sskrll reg = <0x200 0x100>; 25809fa6529Sskrll interrupts = <26>; 25909fa6529Sskrll sdhci,auto-cmd12; 26009fa6529Sskrll clocks = <&syscon ASPEED_CLK_SDIO>; 26109fa6529Sskrll status = "disabled"; 26209fa6529Sskrll }; 26309fa6529Sskrll }; 26409fa6529Sskrll 2650cc12ebdSjmcneill gpio: gpio@1e780000 { 2660cc12ebdSjmcneill #gpio-cells = <2>; 2670cc12ebdSjmcneill gpio-controller; 2680cc12ebdSjmcneill compatible = "aspeed,ast2400-gpio"; 2690cc12ebdSjmcneill reg = <0x1e780000 0x1000>; 2700cc12ebdSjmcneill interrupts = <20>; 2710cc12ebdSjmcneill gpio-ranges = <&pinctrl 0 0 220>; 272cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 2730cc12ebdSjmcneill interrupt-controller; 27484c8294dSjmcneill #interrupt-cells = <2>; 2750cc12ebdSjmcneill }; 2760cc12ebdSjmcneill 2770cc12ebdSjmcneill timer: timer@1e782000 { 2780cc12ebdSjmcneill /* This timer is a Faraday FTTMR010 derivative */ 2790cc12ebdSjmcneill compatible = "aspeed,ast2400-timer"; 2800cc12ebdSjmcneill reg = <0x1e782000 0x90>; 2810cc12ebdSjmcneill interrupts = <16 17 18 35 36 37 38 39>; 282cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 2830cc12ebdSjmcneill clock-names = "PCLK"; 2840cc12ebdSjmcneill }; 2850cc12ebdSjmcneill 28609fa6529Sskrll rtc: rtc@1e781000 { 28709fa6529Sskrll compatible = "aspeed,ast2400-rtc"; 28809fa6529Sskrll reg = <0x1e781000 0x18>; 28909fa6529Sskrll status = "disabled"; 29009fa6529Sskrll }; 29109fa6529Sskrll 2920cc12ebdSjmcneill uart1: serial@1e783000 { 2930cc12ebdSjmcneill compatible = "ns16550a"; 2940cc12ebdSjmcneill reg = <0x1e783000 0x20>; 2950cc12ebdSjmcneill reg-shift = <2>; 2960cc12ebdSjmcneill interrupts = <9>; 297cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>; 298cf2d964bSjmcneill resets = <&lpc_reset 4>; 2990cc12ebdSjmcneill no-loopback-test; 3000cc12ebdSjmcneill status = "disabled"; 3010cc12ebdSjmcneill }; 3020cc12ebdSjmcneill 3030cc12ebdSjmcneill uart5: serial@1e784000 { 3040cc12ebdSjmcneill compatible = "ns16550a"; 3050cc12ebdSjmcneill reg = <0x1e784000 0x20>; 3060cc12ebdSjmcneill reg-shift = <2>; 3070cc12ebdSjmcneill interrupts = <10>; 308cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>; 3090cc12ebdSjmcneill no-loopback-test; 3100cc12ebdSjmcneill status = "disabled"; 3110cc12ebdSjmcneill }; 3120cc12ebdSjmcneill 3130cc12ebdSjmcneill wdt1: watchdog@1e785000 { 3140cc12ebdSjmcneill compatible = "aspeed,ast2400-wdt"; 3150cc12ebdSjmcneill reg = <0x1e785000 0x1c>; 316cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 3170cc12ebdSjmcneill }; 3180cc12ebdSjmcneill 3190cc12ebdSjmcneill wdt2: watchdog@1e785020 { 3200cc12ebdSjmcneill compatible = "aspeed,ast2400-wdt"; 3210cc12ebdSjmcneill reg = <0x1e785020 0x1c>; 322cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 323cf2d964bSjmcneill }; 324cf2d964bSjmcneill 325cf2d964bSjmcneill pwm_tacho: pwm-tacho-controller@1e786000 { 326cf2d964bSjmcneill compatible = "aspeed,ast2400-pwm-tacho"; 327cf2d964bSjmcneill #address-cells = <1>; 328cf2d964bSjmcneill #size-cells = <0>; 329cf2d964bSjmcneill reg = <0x1e786000 0x1000>; 330182157ecSjmcneill clocks = <&syscon ASPEED_CLK_24M>; 331cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_PWM>; 332cf2d964bSjmcneill status = "disabled"; 3330cc12ebdSjmcneill }; 3340cc12ebdSjmcneill 3350cc12ebdSjmcneill vuart: serial@1e787000 { 3360cc12ebdSjmcneill compatible = "aspeed,ast2400-vuart"; 3370cc12ebdSjmcneill reg = <0x1e787000 0x40>; 3380cc12ebdSjmcneill reg-shift = <2>; 339cf2d964bSjmcneill interrupts = <8>; 340cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 3410cc12ebdSjmcneill no-loopback-test; 3420cc12ebdSjmcneill status = "disabled"; 3430cc12ebdSjmcneill }; 3440cc12ebdSjmcneill 345cf2d964bSjmcneill lpc: lpc@1e789000 { 346*9ed2a30eSjmcneill compatible = "aspeed,ast2400-lpc-v2", "simple-mfd", "syscon"; 347cf2d964bSjmcneill reg = <0x1e789000 0x1000>; 348*9ed2a30eSjmcneill reg-io-width = <4>; 349cf2d964bSjmcneill 350cf2d964bSjmcneill #address-cells = <1>; 351cf2d964bSjmcneill #size-cells = <1>; 352cf2d964bSjmcneill ranges = <0x0 0x1e789000 0x1000>; 353cf2d964bSjmcneill 354*9ed2a30eSjmcneill lpc_ctrl: lpc-ctrl@80 { 355cf2d964bSjmcneill compatible = "aspeed,ast2400-lpc-ctrl"; 356*9ed2a30eSjmcneill reg = <0x80 0x10>; 357cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 358cf2d964bSjmcneill status = "disabled"; 359cf2d964bSjmcneill }; 360cf2d964bSjmcneill 361*9ed2a30eSjmcneill lpc_snoop: lpc-snoop@90 { 362cf2d964bSjmcneill compatible = "aspeed,ast2400-lpc-snoop"; 363*9ed2a30eSjmcneill reg = <0x90 0x8>; 364cf2d964bSjmcneill interrupts = <8>; 365*9ed2a30eSjmcneill clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 366cf2d964bSjmcneill status = "disabled"; 367cf2d964bSjmcneill }; 368cf2d964bSjmcneill 369*9ed2a30eSjmcneill lhc: lhc@a0 { 370cf2d964bSjmcneill compatible = "aspeed,ast2400-lhc"; 371*9ed2a30eSjmcneill reg = <0xa0 0x24 0xc8 0x8>; 372cf2d964bSjmcneill }; 373cf2d964bSjmcneill 374*9ed2a30eSjmcneill lpc_reset: reset-controller@98 { 375cf2d964bSjmcneill compatible = "aspeed,ast2400-lpc-reset"; 376*9ed2a30eSjmcneill reg = <0x98 0x4>; 377cf2d964bSjmcneill #reset-cells = <1>; 378cf2d964bSjmcneill }; 379cf2d964bSjmcneill 380*9ed2a30eSjmcneill ibt: ibt@140 { 381cf2d964bSjmcneill compatible = "aspeed,ast2400-ibt-bmc"; 382*9ed2a30eSjmcneill reg = <0x140 0x18>; 383cf2d964bSjmcneill interrupts = <8>; 384cf2d964bSjmcneill status = "disabled"; 385cf2d964bSjmcneill }; 386cf2d964bSjmcneill }; 387cf2d964bSjmcneill 3880cc12ebdSjmcneill uart2: serial@1e78d000 { 3890cc12ebdSjmcneill compatible = "ns16550a"; 3900cc12ebdSjmcneill reg = <0x1e78d000 0x20>; 3910cc12ebdSjmcneill reg-shift = <2>; 3920cc12ebdSjmcneill interrupts = <32>; 393cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>; 394cf2d964bSjmcneill resets = <&lpc_reset 5>; 3950cc12ebdSjmcneill no-loopback-test; 3960cc12ebdSjmcneill status = "disabled"; 3970cc12ebdSjmcneill }; 3980cc12ebdSjmcneill 3990cc12ebdSjmcneill uart3: serial@1e78e000 { 4000cc12ebdSjmcneill compatible = "ns16550a"; 4010cc12ebdSjmcneill reg = <0x1e78e000 0x20>; 4020cc12ebdSjmcneill reg-shift = <2>; 4030cc12ebdSjmcneill interrupts = <33>; 404cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>; 405cf2d964bSjmcneill resets = <&lpc_reset 6>; 4060cc12ebdSjmcneill no-loopback-test; 4070cc12ebdSjmcneill status = "disabled"; 4080cc12ebdSjmcneill }; 4090cc12ebdSjmcneill 4100cc12ebdSjmcneill uart4: serial@1e78f000 { 4110cc12ebdSjmcneill compatible = "ns16550a"; 4120cc12ebdSjmcneill reg = <0x1e78f000 0x20>; 4130cc12ebdSjmcneill reg-shift = <2>; 4140cc12ebdSjmcneill interrupts = <34>; 415cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>; 416cf2d964bSjmcneill resets = <&lpc_reset 7>; 4170cc12ebdSjmcneill no-loopback-test; 4180cc12ebdSjmcneill status = "disabled"; 4190cc12ebdSjmcneill }; 4200cc12ebdSjmcneill 421182157ecSjmcneill i2c: bus@1e78a000 { 4220cc12ebdSjmcneill compatible = "simple-bus"; 4230cc12ebdSjmcneill #address-cells = <1>; 4240cc12ebdSjmcneill #size-cells = <1>; 4250cc12ebdSjmcneill ranges = <0 0x1e78a000 0x1000>; 4260cc12ebdSjmcneill }; 4270cc12ebdSjmcneill }; 4280cc12ebdSjmcneill }; 4290cc12ebdSjmcneill}; 4300cc12ebdSjmcneill 4310cc12ebdSjmcneill&i2c { 4320cc12ebdSjmcneill i2c_ic: interrupt-controller@0 { 4330cc12ebdSjmcneill #interrupt-cells = <1>; 4340cc12ebdSjmcneill compatible = "aspeed,ast2400-i2c-ic"; 4350cc12ebdSjmcneill reg = <0x0 0x40>; 4360cc12ebdSjmcneill interrupts = <12>; 4370cc12ebdSjmcneill interrupt-controller; 4380cc12ebdSjmcneill }; 4390cc12ebdSjmcneill 4400cc12ebdSjmcneill i2c0: i2c-bus@40 { 4410cc12ebdSjmcneill #address-cells = <1>; 4420cc12ebdSjmcneill #size-cells = <0>; 4430cc12ebdSjmcneill #interrupt-cells = <1>; 4440cc12ebdSjmcneill 4450cc12ebdSjmcneill reg = <0x40 0x40>; 4460cc12ebdSjmcneill compatible = "aspeed,ast2400-i2c-bus"; 447cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 448cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 4490cc12ebdSjmcneill bus-frequency = <100000>; 4500cc12ebdSjmcneill interrupts = <0>; 4510cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 4520cc12ebdSjmcneill status = "disabled"; 4530cc12ebdSjmcneill /* Does not need pinctrl properties */ 4540cc12ebdSjmcneill }; 4550cc12ebdSjmcneill 4560cc12ebdSjmcneill i2c1: i2c-bus@80 { 4570cc12ebdSjmcneill #address-cells = <1>; 4580cc12ebdSjmcneill #size-cells = <0>; 4590cc12ebdSjmcneill #interrupt-cells = <1>; 4600cc12ebdSjmcneill 4610cc12ebdSjmcneill reg = <0x80 0x40>; 4620cc12ebdSjmcneill compatible = "aspeed,ast2400-i2c-bus"; 463cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 464cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 4650cc12ebdSjmcneill bus-frequency = <100000>; 4660cc12ebdSjmcneill interrupts = <1>; 4670cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 4680cc12ebdSjmcneill status = "disabled"; 4690cc12ebdSjmcneill /* Does not need pinctrl properties */ 4700cc12ebdSjmcneill }; 4710cc12ebdSjmcneill 4720cc12ebdSjmcneill i2c2: i2c-bus@c0 { 4730cc12ebdSjmcneill #address-cells = <1>; 4740cc12ebdSjmcneill #size-cells = <0>; 4750cc12ebdSjmcneill #interrupt-cells = <1>; 4760cc12ebdSjmcneill 4770cc12ebdSjmcneill reg = <0xc0 0x40>; 4780cc12ebdSjmcneill compatible = "aspeed,ast2400-i2c-bus"; 479cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 480cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 4810cc12ebdSjmcneill bus-frequency = <100000>; 4820cc12ebdSjmcneill interrupts = <2>; 4830cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 4840cc12ebdSjmcneill pinctrl-names = "default"; 4850cc12ebdSjmcneill pinctrl-0 = <&pinctrl_i2c3_default>; 4860cc12ebdSjmcneill status = "disabled"; 4870cc12ebdSjmcneill }; 4880cc12ebdSjmcneill 4890cc12ebdSjmcneill i2c3: i2c-bus@100 { 4900cc12ebdSjmcneill #address-cells = <1>; 4910cc12ebdSjmcneill #size-cells = <0>; 4920cc12ebdSjmcneill #interrupt-cells = <1>; 4930cc12ebdSjmcneill 4940cc12ebdSjmcneill reg = <0x100 0x40>; 4950cc12ebdSjmcneill compatible = "aspeed,ast2400-i2c-bus"; 496cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 497cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 4980cc12ebdSjmcneill bus-frequency = <100000>; 4990cc12ebdSjmcneill interrupts = <3>; 5000cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 5010cc12ebdSjmcneill pinctrl-names = "default"; 5020cc12ebdSjmcneill pinctrl-0 = <&pinctrl_i2c4_default>; 5030cc12ebdSjmcneill status = "disabled"; 5040cc12ebdSjmcneill }; 5050cc12ebdSjmcneill 5060cc12ebdSjmcneill i2c4: i2c-bus@140 { 5070cc12ebdSjmcneill #address-cells = <1>; 5080cc12ebdSjmcneill #size-cells = <0>; 5090cc12ebdSjmcneill #interrupt-cells = <1>; 5100cc12ebdSjmcneill 5110cc12ebdSjmcneill reg = <0x140 0x40>; 5120cc12ebdSjmcneill compatible = "aspeed,ast2400-i2c-bus"; 513cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 514cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 5150cc12ebdSjmcneill bus-frequency = <100000>; 5160cc12ebdSjmcneill interrupts = <4>; 5170cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 5180cc12ebdSjmcneill pinctrl-names = "default"; 5190cc12ebdSjmcneill pinctrl-0 = <&pinctrl_i2c5_default>; 5200cc12ebdSjmcneill status = "disabled"; 5210cc12ebdSjmcneill }; 5220cc12ebdSjmcneill 5230cc12ebdSjmcneill i2c5: i2c-bus@180 { 5240cc12ebdSjmcneill #address-cells = <1>; 5250cc12ebdSjmcneill #size-cells = <0>; 5260cc12ebdSjmcneill #interrupt-cells = <1>; 5270cc12ebdSjmcneill 5280cc12ebdSjmcneill reg = <0x180 0x40>; 5290cc12ebdSjmcneill compatible = "aspeed,ast2400-i2c-bus"; 530cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 531cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 5320cc12ebdSjmcneill bus-frequency = <100000>; 5330cc12ebdSjmcneill interrupts = <5>; 5340cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 5350cc12ebdSjmcneill pinctrl-names = "default"; 5360cc12ebdSjmcneill pinctrl-0 = <&pinctrl_i2c6_default>; 5370cc12ebdSjmcneill status = "disabled"; 5380cc12ebdSjmcneill }; 5390cc12ebdSjmcneill 5400cc12ebdSjmcneill i2c6: i2c-bus@1c0 { 5410cc12ebdSjmcneill #address-cells = <1>; 5420cc12ebdSjmcneill #size-cells = <0>; 5430cc12ebdSjmcneill #interrupt-cells = <1>; 5440cc12ebdSjmcneill 5450cc12ebdSjmcneill reg = <0x1c0 0x40>; 5460cc12ebdSjmcneill compatible = "aspeed,ast2400-i2c-bus"; 547cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 548cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 5490cc12ebdSjmcneill bus-frequency = <100000>; 5500cc12ebdSjmcneill interrupts = <6>; 5510cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 5520cc12ebdSjmcneill pinctrl-names = "default"; 5530cc12ebdSjmcneill pinctrl-0 = <&pinctrl_i2c7_default>; 5540cc12ebdSjmcneill status = "disabled"; 5550cc12ebdSjmcneill }; 5560cc12ebdSjmcneill 5570cc12ebdSjmcneill i2c7: i2c-bus@300 { 5580cc12ebdSjmcneill #address-cells = <1>; 5590cc12ebdSjmcneill #size-cells = <0>; 5600cc12ebdSjmcneill #interrupt-cells = <1>; 5610cc12ebdSjmcneill 5620cc12ebdSjmcneill reg = <0x300 0x40>; 5630cc12ebdSjmcneill compatible = "aspeed,ast2400-i2c-bus"; 564cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 565cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 5660cc12ebdSjmcneill bus-frequency = <100000>; 5670cc12ebdSjmcneill interrupts = <7>; 5680cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 5690cc12ebdSjmcneill pinctrl-names = "default"; 5700cc12ebdSjmcneill pinctrl-0 = <&pinctrl_i2c8_default>; 5710cc12ebdSjmcneill status = "disabled"; 5720cc12ebdSjmcneill }; 5730cc12ebdSjmcneill 5740cc12ebdSjmcneill i2c8: i2c-bus@340 { 5750cc12ebdSjmcneill #address-cells = <1>; 5760cc12ebdSjmcneill #size-cells = <0>; 5770cc12ebdSjmcneill #interrupt-cells = <1>; 5780cc12ebdSjmcneill 5790cc12ebdSjmcneill reg = <0x340 0x40>; 5800cc12ebdSjmcneill compatible = "aspeed,ast2400-i2c-bus"; 581cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 582cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 5830cc12ebdSjmcneill bus-frequency = <100000>; 5840cc12ebdSjmcneill interrupts = <8>; 5850cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 5860cc12ebdSjmcneill pinctrl-names = "default"; 5870cc12ebdSjmcneill pinctrl-0 = <&pinctrl_i2c9_default>; 5880cc12ebdSjmcneill status = "disabled"; 5890cc12ebdSjmcneill }; 5900cc12ebdSjmcneill 5910cc12ebdSjmcneill i2c9: i2c-bus@380 { 5920cc12ebdSjmcneill #address-cells = <1>; 5930cc12ebdSjmcneill #size-cells = <0>; 5940cc12ebdSjmcneill #interrupt-cells = <1>; 5950cc12ebdSjmcneill 5960cc12ebdSjmcneill reg = <0x380 0x40>; 5970cc12ebdSjmcneill compatible = "aspeed,ast2400-i2c-bus"; 598cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 599cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 6000cc12ebdSjmcneill bus-frequency = <100000>; 6010cc12ebdSjmcneill interrupts = <9>; 6020cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 6030cc12ebdSjmcneill pinctrl-names = "default"; 6040cc12ebdSjmcneill pinctrl-0 = <&pinctrl_i2c10_default>; 6050cc12ebdSjmcneill status = "disabled"; 6060cc12ebdSjmcneill }; 6070cc12ebdSjmcneill 6080cc12ebdSjmcneill i2c10: i2c-bus@3c0 { 6090cc12ebdSjmcneill #address-cells = <1>; 6100cc12ebdSjmcneill #size-cells = <0>; 6110cc12ebdSjmcneill #interrupt-cells = <1>; 6120cc12ebdSjmcneill 6130cc12ebdSjmcneill reg = <0x3c0 0x40>; 6140cc12ebdSjmcneill compatible = "aspeed,ast2400-i2c-bus"; 615cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 616cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 6170cc12ebdSjmcneill bus-frequency = <100000>; 6180cc12ebdSjmcneill interrupts = <10>; 6190cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 6200cc12ebdSjmcneill pinctrl-names = "default"; 6210cc12ebdSjmcneill pinctrl-0 = <&pinctrl_i2c11_default>; 6220cc12ebdSjmcneill status = "disabled"; 6230cc12ebdSjmcneill }; 6240cc12ebdSjmcneill 6250cc12ebdSjmcneill i2c11: i2c-bus@400 { 6260cc12ebdSjmcneill #address-cells = <1>; 6270cc12ebdSjmcneill #size-cells = <0>; 6280cc12ebdSjmcneill #interrupt-cells = <1>; 6290cc12ebdSjmcneill 6300cc12ebdSjmcneill reg = <0x400 0x40>; 6310cc12ebdSjmcneill compatible = "aspeed,ast2400-i2c-bus"; 632cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 633cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 6340cc12ebdSjmcneill bus-frequency = <100000>; 6350cc12ebdSjmcneill interrupts = <11>; 6360cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 6370cc12ebdSjmcneill pinctrl-names = "default"; 6380cc12ebdSjmcneill pinctrl-0 = <&pinctrl_i2c12_default>; 6390cc12ebdSjmcneill status = "disabled"; 6400cc12ebdSjmcneill }; 6410cc12ebdSjmcneill 6420cc12ebdSjmcneill i2c12: i2c-bus@440 { 6430cc12ebdSjmcneill #address-cells = <1>; 6440cc12ebdSjmcneill #size-cells = <0>; 6450cc12ebdSjmcneill #interrupt-cells = <1>; 6460cc12ebdSjmcneill 6470cc12ebdSjmcneill reg = <0x440 0x40>; 6480cc12ebdSjmcneill compatible = "aspeed,ast2400-i2c-bus"; 649cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 650cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 6510cc12ebdSjmcneill bus-frequency = <100000>; 6520cc12ebdSjmcneill interrupts = <12>; 6530cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 6540cc12ebdSjmcneill pinctrl-names = "default"; 6550cc12ebdSjmcneill pinctrl-0 = <&pinctrl_i2c13_default>; 6560cc12ebdSjmcneill status = "disabled"; 6570cc12ebdSjmcneill }; 6580cc12ebdSjmcneill 6590cc12ebdSjmcneill i2c13: i2c-bus@480 { 6600cc12ebdSjmcneill #address-cells = <1>; 6610cc12ebdSjmcneill #size-cells = <0>; 6620cc12ebdSjmcneill #interrupt-cells = <1>; 6630cc12ebdSjmcneill 6640cc12ebdSjmcneill reg = <0x480 0x40>; 6650cc12ebdSjmcneill compatible = "aspeed,ast2400-i2c-bus"; 666cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 667cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 6680cc12ebdSjmcneill bus-frequency = <100000>; 6690cc12ebdSjmcneill interrupts = <13>; 6700cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 6710cc12ebdSjmcneill pinctrl-names = "default"; 6720cc12ebdSjmcneill pinctrl-0 = <&pinctrl_i2c14_default>; 6730cc12ebdSjmcneill status = "disabled"; 6740cc12ebdSjmcneill }; 6750cc12ebdSjmcneill}; 6760cc12ebdSjmcneill 6770cc12ebdSjmcneill&pinctrl { 678f46c7ed4Sjmcneill pinctrl_acpi_default: acpi_default { 679f46c7ed4Sjmcneill function = "ACPI"; 680f46c7ed4Sjmcneill groups = "ACPI"; 681f46c7ed4Sjmcneill }; 682f46c7ed4Sjmcneill 683f46c7ed4Sjmcneill pinctrl_adc0_default: adc0_default { 684f46c7ed4Sjmcneill function = "ADC0"; 685f46c7ed4Sjmcneill groups = "ADC0"; 686f46c7ed4Sjmcneill }; 687f46c7ed4Sjmcneill 688f46c7ed4Sjmcneill pinctrl_adc1_default: adc1_default { 689f46c7ed4Sjmcneill function = "ADC1"; 690f46c7ed4Sjmcneill groups = "ADC1"; 691f46c7ed4Sjmcneill }; 692f46c7ed4Sjmcneill 693f46c7ed4Sjmcneill pinctrl_adc10_default: adc10_default { 694f46c7ed4Sjmcneill function = "ADC10"; 695f46c7ed4Sjmcneill groups = "ADC10"; 696f46c7ed4Sjmcneill }; 697f46c7ed4Sjmcneill 698f46c7ed4Sjmcneill pinctrl_adc11_default: adc11_default { 699f46c7ed4Sjmcneill function = "ADC11"; 700f46c7ed4Sjmcneill groups = "ADC11"; 701f46c7ed4Sjmcneill }; 702f46c7ed4Sjmcneill 703f46c7ed4Sjmcneill pinctrl_adc12_default: adc12_default { 704f46c7ed4Sjmcneill function = "ADC12"; 705f46c7ed4Sjmcneill groups = "ADC12"; 706f46c7ed4Sjmcneill }; 707f46c7ed4Sjmcneill 708f46c7ed4Sjmcneill pinctrl_adc13_default: adc13_default { 709f46c7ed4Sjmcneill function = "ADC13"; 710f46c7ed4Sjmcneill groups = "ADC13"; 711f46c7ed4Sjmcneill }; 712f46c7ed4Sjmcneill 713f46c7ed4Sjmcneill pinctrl_adc14_default: adc14_default { 714f46c7ed4Sjmcneill function = "ADC14"; 715f46c7ed4Sjmcneill groups = "ADC14"; 716f46c7ed4Sjmcneill }; 717f46c7ed4Sjmcneill 718f46c7ed4Sjmcneill pinctrl_adc15_default: adc15_default { 719f46c7ed4Sjmcneill function = "ADC15"; 720f46c7ed4Sjmcneill groups = "ADC15"; 721f46c7ed4Sjmcneill }; 722f46c7ed4Sjmcneill 723f46c7ed4Sjmcneill pinctrl_adc2_default: adc2_default { 724f46c7ed4Sjmcneill function = "ADC2"; 725f46c7ed4Sjmcneill groups = "ADC2"; 726f46c7ed4Sjmcneill }; 727f46c7ed4Sjmcneill 728f46c7ed4Sjmcneill pinctrl_adc3_default: adc3_default { 729f46c7ed4Sjmcneill function = "ADC3"; 730f46c7ed4Sjmcneill groups = "ADC3"; 731f46c7ed4Sjmcneill }; 732f46c7ed4Sjmcneill 733f46c7ed4Sjmcneill pinctrl_adc4_default: adc4_default { 734f46c7ed4Sjmcneill function = "ADC4"; 735f46c7ed4Sjmcneill groups = "ADC4"; 736f46c7ed4Sjmcneill }; 737f46c7ed4Sjmcneill 738f46c7ed4Sjmcneill pinctrl_adc5_default: adc5_default { 739f46c7ed4Sjmcneill function = "ADC5"; 740f46c7ed4Sjmcneill groups = "ADC5"; 741f46c7ed4Sjmcneill }; 742f46c7ed4Sjmcneill 743f46c7ed4Sjmcneill pinctrl_adc6_default: adc6_default { 744f46c7ed4Sjmcneill function = "ADC6"; 745f46c7ed4Sjmcneill groups = "ADC6"; 746f46c7ed4Sjmcneill }; 747f46c7ed4Sjmcneill 748f46c7ed4Sjmcneill pinctrl_adc7_default: adc7_default { 749f46c7ed4Sjmcneill function = "ADC7"; 750f46c7ed4Sjmcneill groups = "ADC7"; 751f46c7ed4Sjmcneill }; 752f46c7ed4Sjmcneill 753f46c7ed4Sjmcneill pinctrl_adc8_default: adc8_default { 754f46c7ed4Sjmcneill function = "ADC8"; 755f46c7ed4Sjmcneill groups = "ADC8"; 756f46c7ed4Sjmcneill }; 757f46c7ed4Sjmcneill 758f46c7ed4Sjmcneill pinctrl_adc9_default: adc9_default { 759f46c7ed4Sjmcneill function = "ADC9"; 760f46c7ed4Sjmcneill groups = "ADC9"; 761f46c7ed4Sjmcneill }; 762f46c7ed4Sjmcneill 763f46c7ed4Sjmcneill pinctrl_bmcint_default: bmcint_default { 764f46c7ed4Sjmcneill function = "BMCINT"; 765f46c7ed4Sjmcneill groups = "BMCINT"; 766f46c7ed4Sjmcneill }; 767f46c7ed4Sjmcneill 768f46c7ed4Sjmcneill pinctrl_ddcclk_default: ddcclk_default { 769f46c7ed4Sjmcneill function = "DDCCLK"; 770f46c7ed4Sjmcneill groups = "DDCCLK"; 771f46c7ed4Sjmcneill }; 772f46c7ed4Sjmcneill 773f46c7ed4Sjmcneill pinctrl_ddcdat_default: ddcdat_default { 774f46c7ed4Sjmcneill function = "DDCDAT"; 775f46c7ed4Sjmcneill groups = "DDCDAT"; 776f46c7ed4Sjmcneill }; 777f46c7ed4Sjmcneill 778f46c7ed4Sjmcneill pinctrl_extrst_default: extrst_default { 779f46c7ed4Sjmcneill function = "EXTRST"; 780f46c7ed4Sjmcneill groups = "EXTRST"; 781f46c7ed4Sjmcneill }; 782f46c7ed4Sjmcneill 783f46c7ed4Sjmcneill pinctrl_flack_default: flack_default { 784f46c7ed4Sjmcneill function = "FLACK"; 785f46c7ed4Sjmcneill groups = "FLACK"; 786f46c7ed4Sjmcneill }; 787f46c7ed4Sjmcneill 788f46c7ed4Sjmcneill pinctrl_flbusy_default: flbusy_default { 789f46c7ed4Sjmcneill function = "FLBUSY"; 790f46c7ed4Sjmcneill groups = "FLBUSY"; 791f46c7ed4Sjmcneill }; 792f46c7ed4Sjmcneill 793f46c7ed4Sjmcneill pinctrl_flwp_default: flwp_default { 794f46c7ed4Sjmcneill function = "FLWP"; 795f46c7ed4Sjmcneill groups = "FLWP"; 796f46c7ed4Sjmcneill }; 797f46c7ed4Sjmcneill 798f46c7ed4Sjmcneill pinctrl_gpid_default: gpid_default { 799f46c7ed4Sjmcneill function = "GPID"; 800f46c7ed4Sjmcneill groups = "GPID"; 801f46c7ed4Sjmcneill }; 802f46c7ed4Sjmcneill 803f46c7ed4Sjmcneill pinctrl_gpid0_default: gpid0_default { 804f46c7ed4Sjmcneill function = "GPID0"; 805f46c7ed4Sjmcneill groups = "GPID0"; 806f46c7ed4Sjmcneill }; 807f46c7ed4Sjmcneill 808f46c7ed4Sjmcneill pinctrl_gpid2_default: gpid2_default { 809f46c7ed4Sjmcneill function = "GPID2"; 810f46c7ed4Sjmcneill groups = "GPID2"; 811f46c7ed4Sjmcneill }; 812f46c7ed4Sjmcneill 813f46c7ed4Sjmcneill pinctrl_gpid4_default: gpid4_default { 814f46c7ed4Sjmcneill function = "GPID4"; 815f46c7ed4Sjmcneill groups = "GPID4"; 816f46c7ed4Sjmcneill }; 817f46c7ed4Sjmcneill 818f46c7ed4Sjmcneill pinctrl_gpid6_default: gpid6_default { 819f46c7ed4Sjmcneill function = "GPID6"; 820f46c7ed4Sjmcneill groups = "GPID6"; 821f46c7ed4Sjmcneill }; 822f46c7ed4Sjmcneill 823f46c7ed4Sjmcneill pinctrl_gpie0_default: gpie0_default { 824f46c7ed4Sjmcneill function = "GPIE0"; 825f46c7ed4Sjmcneill groups = "GPIE0"; 826f46c7ed4Sjmcneill }; 827f46c7ed4Sjmcneill 828f46c7ed4Sjmcneill pinctrl_gpie2_default: gpie2_default { 829f46c7ed4Sjmcneill function = "GPIE2"; 830f46c7ed4Sjmcneill groups = "GPIE2"; 831f46c7ed4Sjmcneill }; 832f46c7ed4Sjmcneill 833f46c7ed4Sjmcneill pinctrl_gpie4_default: gpie4_default { 834f46c7ed4Sjmcneill function = "GPIE4"; 835f46c7ed4Sjmcneill groups = "GPIE4"; 836f46c7ed4Sjmcneill }; 837f46c7ed4Sjmcneill 838f46c7ed4Sjmcneill pinctrl_gpie6_default: gpie6_default { 839f46c7ed4Sjmcneill function = "GPIE6"; 840f46c7ed4Sjmcneill groups = "GPIE6"; 841f46c7ed4Sjmcneill }; 842f46c7ed4Sjmcneill 843f46c7ed4Sjmcneill pinctrl_i2c10_default: i2c10_default { 844f46c7ed4Sjmcneill function = "I2C10"; 845f46c7ed4Sjmcneill groups = "I2C10"; 846f46c7ed4Sjmcneill }; 847f46c7ed4Sjmcneill 848f46c7ed4Sjmcneill pinctrl_i2c11_default: i2c11_default { 849f46c7ed4Sjmcneill function = "I2C11"; 850f46c7ed4Sjmcneill groups = "I2C11"; 851f46c7ed4Sjmcneill }; 852f46c7ed4Sjmcneill 853f46c7ed4Sjmcneill pinctrl_i2c12_default: i2c12_default { 854f46c7ed4Sjmcneill function = "I2C12"; 855f46c7ed4Sjmcneill groups = "I2C12"; 856f46c7ed4Sjmcneill }; 857f46c7ed4Sjmcneill 858f46c7ed4Sjmcneill pinctrl_i2c13_default: i2c13_default { 859f46c7ed4Sjmcneill function = "I2C13"; 860f46c7ed4Sjmcneill groups = "I2C13"; 861f46c7ed4Sjmcneill }; 862f46c7ed4Sjmcneill 863f46c7ed4Sjmcneill pinctrl_i2c14_default: i2c14_default { 864f46c7ed4Sjmcneill function = "I2C14"; 865f46c7ed4Sjmcneill groups = "I2C14"; 866f46c7ed4Sjmcneill }; 867f46c7ed4Sjmcneill 868f46c7ed4Sjmcneill pinctrl_i2c3_default: i2c3_default { 869f46c7ed4Sjmcneill function = "I2C3"; 870f46c7ed4Sjmcneill groups = "I2C3"; 871f46c7ed4Sjmcneill }; 872f46c7ed4Sjmcneill 873f46c7ed4Sjmcneill pinctrl_i2c4_default: i2c4_default { 874f46c7ed4Sjmcneill function = "I2C4"; 875f46c7ed4Sjmcneill groups = "I2C4"; 876f46c7ed4Sjmcneill }; 877f46c7ed4Sjmcneill 878f46c7ed4Sjmcneill pinctrl_i2c5_default: i2c5_default { 879f46c7ed4Sjmcneill function = "I2C5"; 880f46c7ed4Sjmcneill groups = "I2C5"; 881f46c7ed4Sjmcneill }; 882f46c7ed4Sjmcneill 883f46c7ed4Sjmcneill pinctrl_i2c6_default: i2c6_default { 884f46c7ed4Sjmcneill function = "I2C6"; 885f46c7ed4Sjmcneill groups = "I2C6"; 886f46c7ed4Sjmcneill }; 887f46c7ed4Sjmcneill 888f46c7ed4Sjmcneill pinctrl_i2c7_default: i2c7_default { 889f46c7ed4Sjmcneill function = "I2C7"; 890f46c7ed4Sjmcneill groups = "I2C7"; 891f46c7ed4Sjmcneill }; 892f46c7ed4Sjmcneill 893f46c7ed4Sjmcneill pinctrl_i2c8_default: i2c8_default { 894f46c7ed4Sjmcneill function = "I2C8"; 895f46c7ed4Sjmcneill groups = "I2C8"; 896f46c7ed4Sjmcneill }; 897f46c7ed4Sjmcneill 898f46c7ed4Sjmcneill pinctrl_i2c9_default: i2c9_default { 899f46c7ed4Sjmcneill function = "I2C9"; 900f46c7ed4Sjmcneill groups = "I2C9"; 901f46c7ed4Sjmcneill }; 902f46c7ed4Sjmcneill 903f46c7ed4Sjmcneill pinctrl_lpcpd_default: lpcpd_default { 904f46c7ed4Sjmcneill function = "LPCPD"; 905f46c7ed4Sjmcneill groups = "LPCPD"; 906f46c7ed4Sjmcneill }; 907f46c7ed4Sjmcneill 908f46c7ed4Sjmcneill pinctrl_lpcpme_default: lpcpme_default { 909f46c7ed4Sjmcneill function = "LPCPME"; 910f46c7ed4Sjmcneill groups = "LPCPME"; 911f46c7ed4Sjmcneill }; 912f46c7ed4Sjmcneill 913f46c7ed4Sjmcneill pinctrl_lpcrst_default: lpcrst_default { 914f46c7ed4Sjmcneill function = "LPCRST"; 915f46c7ed4Sjmcneill groups = "LPCRST"; 916f46c7ed4Sjmcneill }; 917f46c7ed4Sjmcneill 918f46c7ed4Sjmcneill pinctrl_lpcsmi_default: lpcsmi_default { 919f46c7ed4Sjmcneill function = "LPCSMI"; 920f46c7ed4Sjmcneill groups = "LPCSMI"; 921f46c7ed4Sjmcneill }; 922f46c7ed4Sjmcneill 923f46c7ed4Sjmcneill pinctrl_mac1link_default: mac1link_default { 924f46c7ed4Sjmcneill function = "MAC1LINK"; 925f46c7ed4Sjmcneill groups = "MAC1LINK"; 926f46c7ed4Sjmcneill }; 927f46c7ed4Sjmcneill 928f46c7ed4Sjmcneill pinctrl_mac2link_default: mac2link_default { 929f46c7ed4Sjmcneill function = "MAC2LINK"; 930f46c7ed4Sjmcneill groups = "MAC2LINK"; 931f46c7ed4Sjmcneill }; 932f46c7ed4Sjmcneill 933f46c7ed4Sjmcneill pinctrl_mdio1_default: mdio1_default { 934f46c7ed4Sjmcneill function = "MDIO1"; 935f46c7ed4Sjmcneill groups = "MDIO1"; 936f46c7ed4Sjmcneill }; 937f46c7ed4Sjmcneill 938f46c7ed4Sjmcneill pinctrl_mdio2_default: mdio2_default { 939f46c7ed4Sjmcneill function = "MDIO2"; 940f46c7ed4Sjmcneill groups = "MDIO2"; 941f46c7ed4Sjmcneill }; 942f46c7ed4Sjmcneill 943f46c7ed4Sjmcneill pinctrl_ncts1_default: ncts1_default { 944f46c7ed4Sjmcneill function = "NCTS1"; 945f46c7ed4Sjmcneill groups = "NCTS1"; 946f46c7ed4Sjmcneill }; 947f46c7ed4Sjmcneill 948f46c7ed4Sjmcneill pinctrl_ncts2_default: ncts2_default { 949f46c7ed4Sjmcneill function = "NCTS2"; 950f46c7ed4Sjmcneill groups = "NCTS2"; 951f46c7ed4Sjmcneill }; 952f46c7ed4Sjmcneill 953f46c7ed4Sjmcneill pinctrl_ncts3_default: ncts3_default { 954f46c7ed4Sjmcneill function = "NCTS3"; 955f46c7ed4Sjmcneill groups = "NCTS3"; 956f46c7ed4Sjmcneill }; 957f46c7ed4Sjmcneill 958f46c7ed4Sjmcneill pinctrl_ncts4_default: ncts4_default { 959f46c7ed4Sjmcneill function = "NCTS4"; 960f46c7ed4Sjmcneill groups = "NCTS4"; 961f46c7ed4Sjmcneill }; 962f46c7ed4Sjmcneill 963f46c7ed4Sjmcneill pinctrl_ndcd1_default: ndcd1_default { 964f46c7ed4Sjmcneill function = "NDCD1"; 965f46c7ed4Sjmcneill groups = "NDCD1"; 966f46c7ed4Sjmcneill }; 967f46c7ed4Sjmcneill 968f46c7ed4Sjmcneill pinctrl_ndcd2_default: ndcd2_default { 969f46c7ed4Sjmcneill function = "NDCD2"; 970f46c7ed4Sjmcneill groups = "NDCD2"; 971f46c7ed4Sjmcneill }; 972f46c7ed4Sjmcneill 973f46c7ed4Sjmcneill pinctrl_ndcd3_default: ndcd3_default { 974f46c7ed4Sjmcneill function = "NDCD3"; 975f46c7ed4Sjmcneill groups = "NDCD3"; 976f46c7ed4Sjmcneill }; 977f46c7ed4Sjmcneill 978f46c7ed4Sjmcneill pinctrl_ndcd4_default: ndcd4_default { 979f46c7ed4Sjmcneill function = "NDCD4"; 980f46c7ed4Sjmcneill groups = "NDCD4"; 981f46c7ed4Sjmcneill }; 982f46c7ed4Sjmcneill 983f46c7ed4Sjmcneill pinctrl_ndsr1_default: ndsr1_default { 984f46c7ed4Sjmcneill function = "NDSR1"; 985f46c7ed4Sjmcneill groups = "NDSR1"; 986f46c7ed4Sjmcneill }; 987f46c7ed4Sjmcneill 988f46c7ed4Sjmcneill pinctrl_ndsr2_default: ndsr2_default { 989f46c7ed4Sjmcneill function = "NDSR2"; 990f46c7ed4Sjmcneill groups = "NDSR2"; 991f46c7ed4Sjmcneill }; 992f46c7ed4Sjmcneill 993f46c7ed4Sjmcneill pinctrl_ndsr3_default: ndsr3_default { 994f46c7ed4Sjmcneill function = "NDSR3"; 995f46c7ed4Sjmcneill groups = "NDSR3"; 996f46c7ed4Sjmcneill }; 997f46c7ed4Sjmcneill 998f46c7ed4Sjmcneill pinctrl_ndsr4_default: ndsr4_default { 999f46c7ed4Sjmcneill function = "NDSR4"; 1000f46c7ed4Sjmcneill groups = "NDSR4"; 1001f46c7ed4Sjmcneill }; 1002f46c7ed4Sjmcneill 1003f46c7ed4Sjmcneill pinctrl_ndtr1_default: ndtr1_default { 1004f46c7ed4Sjmcneill function = "NDTR1"; 1005f46c7ed4Sjmcneill groups = "NDTR1"; 1006f46c7ed4Sjmcneill }; 1007f46c7ed4Sjmcneill 1008f46c7ed4Sjmcneill pinctrl_ndtr2_default: ndtr2_default { 1009f46c7ed4Sjmcneill function = "NDTR2"; 1010f46c7ed4Sjmcneill groups = "NDTR2"; 1011f46c7ed4Sjmcneill }; 1012f46c7ed4Sjmcneill 1013f46c7ed4Sjmcneill pinctrl_ndtr3_default: ndtr3_default { 1014f46c7ed4Sjmcneill function = "NDTR3"; 1015f46c7ed4Sjmcneill groups = "NDTR3"; 1016f46c7ed4Sjmcneill }; 1017f46c7ed4Sjmcneill 1018f46c7ed4Sjmcneill pinctrl_ndtr4_default: ndtr4_default { 1019f46c7ed4Sjmcneill function = "NDTR4"; 1020f46c7ed4Sjmcneill groups = "NDTR4"; 1021f46c7ed4Sjmcneill }; 1022f46c7ed4Sjmcneill 1023f46c7ed4Sjmcneill pinctrl_ndts4_default: ndts4_default { 1024f46c7ed4Sjmcneill function = "NDTS4"; 1025f46c7ed4Sjmcneill groups = "NDTS4"; 1026f46c7ed4Sjmcneill }; 1027f46c7ed4Sjmcneill 1028f46c7ed4Sjmcneill pinctrl_nri1_default: nri1_default { 1029f46c7ed4Sjmcneill function = "NRI1"; 1030f46c7ed4Sjmcneill groups = "NRI1"; 1031f46c7ed4Sjmcneill }; 1032f46c7ed4Sjmcneill 1033f46c7ed4Sjmcneill pinctrl_nri2_default: nri2_default { 1034f46c7ed4Sjmcneill function = "NRI2"; 1035f46c7ed4Sjmcneill groups = "NRI2"; 1036f46c7ed4Sjmcneill }; 1037f46c7ed4Sjmcneill 1038f46c7ed4Sjmcneill pinctrl_nri3_default: nri3_default { 1039f46c7ed4Sjmcneill function = "NRI3"; 1040f46c7ed4Sjmcneill groups = "NRI3"; 1041f46c7ed4Sjmcneill }; 1042f46c7ed4Sjmcneill 1043f46c7ed4Sjmcneill pinctrl_nri4_default: nri4_default { 1044f46c7ed4Sjmcneill function = "NRI4"; 1045f46c7ed4Sjmcneill groups = "NRI4"; 1046f46c7ed4Sjmcneill }; 1047f46c7ed4Sjmcneill 1048f46c7ed4Sjmcneill pinctrl_nrts1_default: nrts1_default { 1049f46c7ed4Sjmcneill function = "NRTS1"; 1050f46c7ed4Sjmcneill groups = "NRTS1"; 1051f46c7ed4Sjmcneill }; 1052f46c7ed4Sjmcneill 1053f46c7ed4Sjmcneill pinctrl_nrts2_default: nrts2_default { 1054f46c7ed4Sjmcneill function = "NRTS2"; 1055f46c7ed4Sjmcneill groups = "NRTS2"; 1056f46c7ed4Sjmcneill }; 1057f46c7ed4Sjmcneill 1058f46c7ed4Sjmcneill pinctrl_nrts3_default: nrts3_default { 1059f46c7ed4Sjmcneill function = "NRTS3"; 1060f46c7ed4Sjmcneill groups = "NRTS3"; 1061f46c7ed4Sjmcneill }; 1062f46c7ed4Sjmcneill 1063f46c7ed4Sjmcneill pinctrl_oscclk_default: oscclk_default { 1064f46c7ed4Sjmcneill function = "OSCCLK"; 1065f46c7ed4Sjmcneill groups = "OSCCLK"; 1066f46c7ed4Sjmcneill }; 1067f46c7ed4Sjmcneill 1068f46c7ed4Sjmcneill pinctrl_pwm0_default: pwm0_default { 1069f46c7ed4Sjmcneill function = "PWM0"; 1070f46c7ed4Sjmcneill groups = "PWM0"; 1071f46c7ed4Sjmcneill }; 1072f46c7ed4Sjmcneill 1073f46c7ed4Sjmcneill pinctrl_pwm1_default: pwm1_default { 1074f46c7ed4Sjmcneill function = "PWM1"; 1075f46c7ed4Sjmcneill groups = "PWM1"; 1076f46c7ed4Sjmcneill }; 1077f46c7ed4Sjmcneill 1078f46c7ed4Sjmcneill pinctrl_pwm2_default: pwm2_default { 1079f46c7ed4Sjmcneill function = "PWM2"; 1080f46c7ed4Sjmcneill groups = "PWM2"; 1081f46c7ed4Sjmcneill }; 1082f46c7ed4Sjmcneill 1083f46c7ed4Sjmcneill pinctrl_pwm3_default: pwm3_default { 1084f46c7ed4Sjmcneill function = "PWM3"; 1085f46c7ed4Sjmcneill groups = "PWM3"; 1086f46c7ed4Sjmcneill }; 1087f46c7ed4Sjmcneill 1088f46c7ed4Sjmcneill pinctrl_pwm4_default: pwm4_default { 1089f46c7ed4Sjmcneill function = "PWM4"; 1090f46c7ed4Sjmcneill groups = "PWM4"; 1091f46c7ed4Sjmcneill }; 1092f46c7ed4Sjmcneill 1093f46c7ed4Sjmcneill pinctrl_pwm5_default: pwm5_default { 1094f46c7ed4Sjmcneill function = "PWM5"; 1095f46c7ed4Sjmcneill groups = "PWM5"; 1096f46c7ed4Sjmcneill }; 1097f46c7ed4Sjmcneill 1098f46c7ed4Sjmcneill pinctrl_pwm6_default: pwm6_default { 1099f46c7ed4Sjmcneill function = "PWM6"; 1100f46c7ed4Sjmcneill groups = "PWM6"; 1101f46c7ed4Sjmcneill }; 1102f46c7ed4Sjmcneill 1103f46c7ed4Sjmcneill pinctrl_pwm7_default: pwm7_default { 1104f46c7ed4Sjmcneill function = "PWM7"; 1105f46c7ed4Sjmcneill groups = "PWM7"; 1106f46c7ed4Sjmcneill }; 1107f46c7ed4Sjmcneill 1108f46c7ed4Sjmcneill pinctrl_rgmii1_default: rgmii1_default { 1109f46c7ed4Sjmcneill function = "RGMII1"; 1110f46c7ed4Sjmcneill groups = "RGMII1"; 1111f46c7ed4Sjmcneill }; 1112f46c7ed4Sjmcneill 1113f46c7ed4Sjmcneill pinctrl_rgmii2_default: rgmii2_default { 1114f46c7ed4Sjmcneill function = "RGMII2"; 1115f46c7ed4Sjmcneill groups = "RGMII2"; 1116f46c7ed4Sjmcneill }; 1117f46c7ed4Sjmcneill 1118f46c7ed4Sjmcneill pinctrl_rmii1_default: rmii1_default { 1119f46c7ed4Sjmcneill function = "RMII1"; 1120f46c7ed4Sjmcneill groups = "RMII1"; 1121f46c7ed4Sjmcneill }; 1122f46c7ed4Sjmcneill 1123f46c7ed4Sjmcneill pinctrl_rmii2_default: rmii2_default { 1124f46c7ed4Sjmcneill function = "RMII2"; 1125f46c7ed4Sjmcneill groups = "RMII2"; 1126f46c7ed4Sjmcneill }; 1127f46c7ed4Sjmcneill 1128f46c7ed4Sjmcneill pinctrl_rom16_default: rom16_default { 1129f46c7ed4Sjmcneill function = "ROM16"; 1130f46c7ed4Sjmcneill groups = "ROM16"; 1131f46c7ed4Sjmcneill }; 1132f46c7ed4Sjmcneill 1133f46c7ed4Sjmcneill pinctrl_rom8_default: rom8_default { 1134f46c7ed4Sjmcneill function = "ROM8"; 1135f46c7ed4Sjmcneill groups = "ROM8"; 1136f46c7ed4Sjmcneill }; 1137f46c7ed4Sjmcneill 1138f46c7ed4Sjmcneill pinctrl_romcs1_default: romcs1_default { 1139f46c7ed4Sjmcneill function = "ROMCS1"; 1140f46c7ed4Sjmcneill groups = "ROMCS1"; 1141f46c7ed4Sjmcneill }; 1142f46c7ed4Sjmcneill 1143f46c7ed4Sjmcneill pinctrl_romcs2_default: romcs2_default { 1144f46c7ed4Sjmcneill function = "ROMCS2"; 1145f46c7ed4Sjmcneill groups = "ROMCS2"; 1146f46c7ed4Sjmcneill }; 1147f46c7ed4Sjmcneill 1148f46c7ed4Sjmcneill pinctrl_romcs3_default: romcs3_default { 1149f46c7ed4Sjmcneill function = "ROMCS3"; 1150f46c7ed4Sjmcneill groups = "ROMCS3"; 1151f46c7ed4Sjmcneill }; 1152f46c7ed4Sjmcneill 1153f46c7ed4Sjmcneill pinctrl_romcs4_default: romcs4_default { 1154f46c7ed4Sjmcneill function = "ROMCS4"; 1155f46c7ed4Sjmcneill groups = "ROMCS4"; 1156f46c7ed4Sjmcneill }; 1157f46c7ed4Sjmcneill 1158f46c7ed4Sjmcneill pinctrl_rxd1_default: rxd1_default { 1159f46c7ed4Sjmcneill function = "RXD1"; 1160f46c7ed4Sjmcneill groups = "RXD1"; 1161f46c7ed4Sjmcneill }; 1162f46c7ed4Sjmcneill 1163f46c7ed4Sjmcneill pinctrl_rxd2_default: rxd2_default { 1164f46c7ed4Sjmcneill function = "RXD2"; 1165f46c7ed4Sjmcneill groups = "RXD2"; 1166f46c7ed4Sjmcneill }; 1167f46c7ed4Sjmcneill 1168f46c7ed4Sjmcneill pinctrl_rxd3_default: rxd3_default { 1169f46c7ed4Sjmcneill function = "RXD3"; 1170f46c7ed4Sjmcneill groups = "RXD3"; 1171f46c7ed4Sjmcneill }; 1172f46c7ed4Sjmcneill 1173f46c7ed4Sjmcneill pinctrl_rxd4_default: rxd4_default { 1174f46c7ed4Sjmcneill function = "RXD4"; 1175f46c7ed4Sjmcneill groups = "RXD4"; 1176f46c7ed4Sjmcneill }; 1177f46c7ed4Sjmcneill 1178f46c7ed4Sjmcneill pinctrl_salt1_default: salt1_default { 1179f46c7ed4Sjmcneill function = "SALT1"; 1180f46c7ed4Sjmcneill groups = "SALT1"; 1181f46c7ed4Sjmcneill }; 1182f46c7ed4Sjmcneill 1183f46c7ed4Sjmcneill pinctrl_salt2_default: salt2_default { 1184f46c7ed4Sjmcneill function = "SALT2"; 1185f46c7ed4Sjmcneill groups = "SALT2"; 1186f46c7ed4Sjmcneill }; 1187f46c7ed4Sjmcneill 1188f46c7ed4Sjmcneill pinctrl_salt3_default: salt3_default { 1189f46c7ed4Sjmcneill function = "SALT3"; 1190f46c7ed4Sjmcneill groups = "SALT3"; 1191f46c7ed4Sjmcneill }; 1192f46c7ed4Sjmcneill 1193f46c7ed4Sjmcneill pinctrl_salt4_default: salt4_default { 1194f46c7ed4Sjmcneill function = "SALT4"; 1195f46c7ed4Sjmcneill groups = "SALT4"; 1196f46c7ed4Sjmcneill }; 1197f46c7ed4Sjmcneill 1198f46c7ed4Sjmcneill pinctrl_sd1_default: sd1_default { 1199f46c7ed4Sjmcneill function = "SD1"; 1200f46c7ed4Sjmcneill groups = "SD1"; 1201f46c7ed4Sjmcneill }; 1202f46c7ed4Sjmcneill 1203f46c7ed4Sjmcneill pinctrl_sd2_default: sd2_default { 1204f46c7ed4Sjmcneill function = "SD2"; 1205f46c7ed4Sjmcneill groups = "SD2"; 1206f46c7ed4Sjmcneill }; 1207f46c7ed4Sjmcneill 1208f46c7ed4Sjmcneill pinctrl_sgpmck_default: sgpmck_default { 1209f46c7ed4Sjmcneill function = "SGPMCK"; 1210f46c7ed4Sjmcneill groups = "SGPMCK"; 1211f46c7ed4Sjmcneill }; 1212f46c7ed4Sjmcneill 1213f46c7ed4Sjmcneill pinctrl_sgpmi_default: sgpmi_default { 1214f46c7ed4Sjmcneill function = "SGPMI"; 1215f46c7ed4Sjmcneill groups = "SGPMI"; 1216f46c7ed4Sjmcneill }; 1217f46c7ed4Sjmcneill 1218f46c7ed4Sjmcneill pinctrl_sgpmld_default: sgpmld_default { 1219f46c7ed4Sjmcneill function = "SGPMLD"; 1220f46c7ed4Sjmcneill groups = "SGPMLD"; 1221f46c7ed4Sjmcneill }; 1222f46c7ed4Sjmcneill 1223f46c7ed4Sjmcneill pinctrl_sgpmo_default: sgpmo_default { 1224f46c7ed4Sjmcneill function = "SGPMO"; 1225f46c7ed4Sjmcneill groups = "SGPMO"; 1226f46c7ed4Sjmcneill }; 1227f46c7ed4Sjmcneill 1228f46c7ed4Sjmcneill pinctrl_sgpsck_default: sgpsck_default { 1229f46c7ed4Sjmcneill function = "SGPSCK"; 1230f46c7ed4Sjmcneill groups = "SGPSCK"; 1231f46c7ed4Sjmcneill }; 1232f46c7ed4Sjmcneill 1233f46c7ed4Sjmcneill pinctrl_sgpsi0_default: sgpsi0_default { 1234f46c7ed4Sjmcneill function = "SGPSI0"; 1235f46c7ed4Sjmcneill groups = "SGPSI0"; 1236f46c7ed4Sjmcneill }; 1237f46c7ed4Sjmcneill 1238f46c7ed4Sjmcneill pinctrl_sgpsi1_default: sgpsi1_default { 1239f46c7ed4Sjmcneill function = "SGPSI1"; 1240f46c7ed4Sjmcneill groups = "SGPSI1"; 1241f46c7ed4Sjmcneill }; 1242f46c7ed4Sjmcneill 1243f46c7ed4Sjmcneill pinctrl_sgpsld_default: sgpsld_default { 1244f46c7ed4Sjmcneill function = "SGPSLD"; 1245f46c7ed4Sjmcneill groups = "SGPSLD"; 1246f46c7ed4Sjmcneill }; 1247f46c7ed4Sjmcneill 1248f46c7ed4Sjmcneill pinctrl_sioonctrl_default: sioonctrl_default { 1249f46c7ed4Sjmcneill function = "SIOONCTRL"; 1250f46c7ed4Sjmcneill groups = "SIOONCTRL"; 1251f46c7ed4Sjmcneill }; 1252f46c7ed4Sjmcneill 1253f46c7ed4Sjmcneill pinctrl_siopbi_default: siopbi_default { 1254f46c7ed4Sjmcneill function = "SIOPBI"; 1255f46c7ed4Sjmcneill groups = "SIOPBI"; 1256f46c7ed4Sjmcneill }; 1257f46c7ed4Sjmcneill 1258f46c7ed4Sjmcneill pinctrl_siopbo_default: siopbo_default { 1259f46c7ed4Sjmcneill function = "SIOPBO"; 1260f46c7ed4Sjmcneill groups = "SIOPBO"; 1261f46c7ed4Sjmcneill }; 1262f46c7ed4Sjmcneill 1263f46c7ed4Sjmcneill pinctrl_siopwreq_default: siopwreq_default { 1264f46c7ed4Sjmcneill function = "SIOPWREQ"; 1265f46c7ed4Sjmcneill groups = "SIOPWREQ"; 1266f46c7ed4Sjmcneill }; 1267f46c7ed4Sjmcneill 1268f46c7ed4Sjmcneill pinctrl_siopwrgd_default: siopwrgd_default { 1269f46c7ed4Sjmcneill function = "SIOPWRGD"; 1270f46c7ed4Sjmcneill groups = "SIOPWRGD"; 1271f46c7ed4Sjmcneill }; 1272f46c7ed4Sjmcneill 1273f46c7ed4Sjmcneill pinctrl_sios3_default: sios3_default { 1274f46c7ed4Sjmcneill function = "SIOS3"; 1275f46c7ed4Sjmcneill groups = "SIOS3"; 1276f46c7ed4Sjmcneill }; 1277f46c7ed4Sjmcneill 1278f46c7ed4Sjmcneill pinctrl_sios5_default: sios5_default { 1279f46c7ed4Sjmcneill function = "SIOS5"; 1280f46c7ed4Sjmcneill groups = "SIOS5"; 1281f46c7ed4Sjmcneill }; 1282f46c7ed4Sjmcneill 1283f46c7ed4Sjmcneill pinctrl_siosci_default: siosci_default { 1284f46c7ed4Sjmcneill function = "SIOSCI"; 1285f46c7ed4Sjmcneill groups = "SIOSCI"; 1286f46c7ed4Sjmcneill }; 1287f46c7ed4Sjmcneill 1288f46c7ed4Sjmcneill pinctrl_spi1_default: spi1_default { 1289f46c7ed4Sjmcneill function = "SPI1"; 1290f46c7ed4Sjmcneill groups = "SPI1"; 1291f46c7ed4Sjmcneill }; 1292f46c7ed4Sjmcneill 1293f46c7ed4Sjmcneill pinctrl_spi1debug_default: spi1debug_default { 1294f46c7ed4Sjmcneill function = "SPI1DEBUG"; 1295f46c7ed4Sjmcneill groups = "SPI1DEBUG"; 1296f46c7ed4Sjmcneill }; 1297f46c7ed4Sjmcneill 1298f46c7ed4Sjmcneill pinctrl_spi1passthru_default: spi1passthru_default { 1299f46c7ed4Sjmcneill function = "SPI1PASSTHRU"; 1300f46c7ed4Sjmcneill groups = "SPI1PASSTHRU"; 1301f46c7ed4Sjmcneill }; 1302f46c7ed4Sjmcneill 1303f46c7ed4Sjmcneill pinctrl_spics1_default: spics1_default { 1304f46c7ed4Sjmcneill function = "SPICS1"; 1305f46c7ed4Sjmcneill groups = "SPICS1"; 1306f46c7ed4Sjmcneill }; 1307f46c7ed4Sjmcneill 1308f46c7ed4Sjmcneill pinctrl_timer3_default: timer3_default { 1309f46c7ed4Sjmcneill function = "TIMER3"; 1310f46c7ed4Sjmcneill groups = "TIMER3"; 1311f46c7ed4Sjmcneill }; 1312f46c7ed4Sjmcneill 1313f46c7ed4Sjmcneill pinctrl_timer4_default: timer4_default { 1314f46c7ed4Sjmcneill function = "TIMER4"; 1315f46c7ed4Sjmcneill groups = "TIMER4"; 1316f46c7ed4Sjmcneill }; 1317f46c7ed4Sjmcneill 1318f46c7ed4Sjmcneill pinctrl_timer5_default: timer5_default { 1319f46c7ed4Sjmcneill function = "TIMER5"; 1320f46c7ed4Sjmcneill groups = "TIMER5"; 1321f46c7ed4Sjmcneill }; 1322f46c7ed4Sjmcneill 1323f46c7ed4Sjmcneill pinctrl_timer6_default: timer6_default { 1324f46c7ed4Sjmcneill function = "TIMER6"; 1325f46c7ed4Sjmcneill groups = "TIMER6"; 1326f46c7ed4Sjmcneill }; 1327f46c7ed4Sjmcneill 1328f46c7ed4Sjmcneill pinctrl_timer7_default: timer7_default { 1329f46c7ed4Sjmcneill function = "TIMER7"; 1330f46c7ed4Sjmcneill groups = "TIMER7"; 1331f46c7ed4Sjmcneill }; 1332f46c7ed4Sjmcneill 1333f46c7ed4Sjmcneill pinctrl_timer8_default: timer8_default { 1334f46c7ed4Sjmcneill function = "TIMER8"; 1335f46c7ed4Sjmcneill groups = "TIMER8"; 1336f46c7ed4Sjmcneill }; 1337f46c7ed4Sjmcneill 1338f46c7ed4Sjmcneill pinctrl_txd1_default: txd1_default { 1339f46c7ed4Sjmcneill function = "TXD1"; 1340f46c7ed4Sjmcneill groups = "TXD1"; 1341f46c7ed4Sjmcneill }; 1342f46c7ed4Sjmcneill 1343f46c7ed4Sjmcneill pinctrl_txd2_default: txd2_default { 1344f46c7ed4Sjmcneill function = "TXD2"; 1345f46c7ed4Sjmcneill groups = "TXD2"; 1346f46c7ed4Sjmcneill }; 1347f46c7ed4Sjmcneill 1348f46c7ed4Sjmcneill pinctrl_txd3_default: txd3_default { 1349f46c7ed4Sjmcneill function = "TXD3"; 1350f46c7ed4Sjmcneill groups = "TXD3"; 1351f46c7ed4Sjmcneill }; 1352f46c7ed4Sjmcneill 1353f46c7ed4Sjmcneill pinctrl_txd4_default: txd4_default { 1354f46c7ed4Sjmcneill function = "TXD4"; 1355f46c7ed4Sjmcneill groups = "TXD4"; 1356f46c7ed4Sjmcneill }; 1357f46c7ed4Sjmcneill 1358f46c7ed4Sjmcneill pinctrl_uart6_default: uart6_default { 1359f46c7ed4Sjmcneill function = "UART6"; 1360f46c7ed4Sjmcneill groups = "UART6"; 1361f46c7ed4Sjmcneill }; 1362f46c7ed4Sjmcneill 1363f46c7ed4Sjmcneill pinctrl_usbcki_default: usbcki_default { 1364f46c7ed4Sjmcneill function = "USBCKI"; 1365f46c7ed4Sjmcneill groups = "USBCKI"; 1366f46c7ed4Sjmcneill }; 1367f46c7ed4Sjmcneill 1368a27cda6cSjmcneill pinctrl_usb2h_default: usb2h_default { 1369a27cda6cSjmcneill function = "USB2H1"; 1370a27cda6cSjmcneill groups = "USB2H1"; 1371a27cda6cSjmcneill }; 1372a27cda6cSjmcneill 1373a27cda6cSjmcneill pinctrl_usb2d_default: usb2d_default { 1374a27cda6cSjmcneill function = "USB2D1"; 1375a27cda6cSjmcneill groups = "USB2D1"; 1376a27cda6cSjmcneill }; 1377a27cda6cSjmcneill 1378f46c7ed4Sjmcneill pinctrl_vgabios_rom_default: vgabios_rom_default { 1379f46c7ed4Sjmcneill function = "VGABIOS_ROM"; 1380f46c7ed4Sjmcneill groups = "VGABIOS_ROM"; 1381f46c7ed4Sjmcneill }; 1382f46c7ed4Sjmcneill 1383f46c7ed4Sjmcneill pinctrl_vgahs_default: vgahs_default { 1384f46c7ed4Sjmcneill function = "VGAHS"; 1385f46c7ed4Sjmcneill groups = "VGAHS"; 1386f46c7ed4Sjmcneill }; 1387f46c7ed4Sjmcneill 1388f46c7ed4Sjmcneill pinctrl_vgavs_default: vgavs_default { 1389f46c7ed4Sjmcneill function = "VGAVS"; 1390f46c7ed4Sjmcneill groups = "VGAVS"; 1391f46c7ed4Sjmcneill }; 1392f46c7ed4Sjmcneill 1393f46c7ed4Sjmcneill pinctrl_vpi18_default: vpi18_default { 1394f46c7ed4Sjmcneill function = "VPI18"; 1395f46c7ed4Sjmcneill groups = "VPI18"; 1396f46c7ed4Sjmcneill }; 1397f46c7ed4Sjmcneill 1398f46c7ed4Sjmcneill pinctrl_vpi24_default: vpi24_default { 1399f46c7ed4Sjmcneill function = "VPI24"; 1400f46c7ed4Sjmcneill groups = "VPI24"; 1401f46c7ed4Sjmcneill }; 1402f46c7ed4Sjmcneill 1403f46c7ed4Sjmcneill pinctrl_vpi30_default: vpi30_default { 1404f46c7ed4Sjmcneill function = "VPI30"; 1405f46c7ed4Sjmcneill groups = "VPI30"; 1406f46c7ed4Sjmcneill }; 1407f46c7ed4Sjmcneill 1408f46c7ed4Sjmcneill pinctrl_vpo12_default: vpo12_default { 1409f46c7ed4Sjmcneill function = "VPO12"; 1410f46c7ed4Sjmcneill groups = "VPO12"; 1411f46c7ed4Sjmcneill }; 1412f46c7ed4Sjmcneill 1413f46c7ed4Sjmcneill pinctrl_vpo24_default: vpo24_default { 1414f46c7ed4Sjmcneill function = "VPO24"; 1415f46c7ed4Sjmcneill groups = "VPO24"; 1416f46c7ed4Sjmcneill }; 1417f46c7ed4Sjmcneill 1418f46c7ed4Sjmcneill pinctrl_wdtrst1_default: wdtrst1_default { 1419f46c7ed4Sjmcneill function = "WDTRST1"; 1420f46c7ed4Sjmcneill groups = "WDTRST1"; 1421f46c7ed4Sjmcneill }; 1422f46c7ed4Sjmcneill 1423f46c7ed4Sjmcneill pinctrl_wdtrst2_default: wdtrst2_default { 1424f46c7ed4Sjmcneill function = "WDTRST2"; 1425f46c7ed4Sjmcneill groups = "WDTRST2"; 1426f46c7ed4Sjmcneill }; 1427f46c7ed4Sjmcneill}; 1428