1cf2d964bSjmcneill// SPDX-License-Identifier: GPL-2.0+ 2cf2d964bSjmcneill#include <dt-bindings/clock/aspeed-clock.h> 3*9ed2a30eSjmcneill#include <dt-bindings/interrupt-controller/aspeed-scu-ic.h> 4f46c7ed4Sjmcneill 5f46c7ed4Sjmcneill/ { 6f46c7ed4Sjmcneill model = "Aspeed BMC"; 7f46c7ed4Sjmcneill compatible = "aspeed,ast2500"; 8f46c7ed4Sjmcneill #address-cells = <1>; 9f46c7ed4Sjmcneill #size-cells = <1>; 10f46c7ed4Sjmcneill interrupt-parent = <&vic>; 11f46c7ed4Sjmcneill 120cc12ebdSjmcneill aliases { 130cc12ebdSjmcneill i2c0 = &i2c0; 140cc12ebdSjmcneill i2c1 = &i2c1; 150cc12ebdSjmcneill i2c2 = &i2c2; 160cc12ebdSjmcneill i2c3 = &i2c3; 170cc12ebdSjmcneill i2c4 = &i2c4; 180cc12ebdSjmcneill i2c5 = &i2c5; 190cc12ebdSjmcneill i2c6 = &i2c6; 200cc12ebdSjmcneill i2c7 = &i2c7; 210cc12ebdSjmcneill i2c8 = &i2c8; 220cc12ebdSjmcneill i2c9 = &i2c9; 230cc12ebdSjmcneill i2c10 = &i2c10; 240cc12ebdSjmcneill i2c11 = &i2c11; 250cc12ebdSjmcneill i2c12 = &i2c12; 260cc12ebdSjmcneill i2c13 = &i2c13; 270cc12ebdSjmcneill serial0 = &uart1; 280cc12ebdSjmcneill serial1 = &uart2; 290cc12ebdSjmcneill serial2 = &uart3; 300cc12ebdSjmcneill serial3 = &uart4; 310cc12ebdSjmcneill serial4 = &uart5; 320cc12ebdSjmcneill serial5 = &vuart; 330cc12ebdSjmcneill }; 340cc12ebdSjmcneill 35f46c7ed4Sjmcneill cpus { 36f46c7ed4Sjmcneill #address-cells = <1>; 37f46c7ed4Sjmcneill #size-cells = <0>; 38f46c7ed4Sjmcneill 39f46c7ed4Sjmcneill cpu@0 { 40f46c7ed4Sjmcneill compatible = "arm,arm1176jzf-s"; 41f46c7ed4Sjmcneill device_type = "cpu"; 42f46c7ed4Sjmcneill reg = <0>; 43f46c7ed4Sjmcneill }; 44f46c7ed4Sjmcneill }; 45f46c7ed4Sjmcneill 46cf2d964bSjmcneill memory@80000000 { 47cf2d964bSjmcneill device_type = "memory"; 48cf2d964bSjmcneill reg = <0x80000000 0>; 49cf2d964bSjmcneill }; 50cf2d964bSjmcneill 51f46c7ed4Sjmcneill ahb { 52f46c7ed4Sjmcneill compatible = "simple-bus"; 53f46c7ed4Sjmcneill #address-cells = <1>; 54f46c7ed4Sjmcneill #size-cells = <1>; 55f46c7ed4Sjmcneill ranges; 56f46c7ed4Sjmcneill 5709fa6529Sskrll fmc: spi@1e620000 { 588fb04b9bSjmcneill reg = < 0x1e620000 0xc4 598fb04b9bSjmcneill 0x20000000 0x10000000 >; 608fb04b9bSjmcneill #address-cells = <1>; 618fb04b9bSjmcneill #size-cells = <0>; 628fb04b9bSjmcneill compatible = "aspeed,ast2500-fmc"; 63cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_AHB>; 648fb04b9bSjmcneill status = "disabled"; 658fb04b9bSjmcneill interrupts = <19>; 668fb04b9bSjmcneill flash@0 { 678fb04b9bSjmcneill reg = < 0 >; 688fb04b9bSjmcneill compatible = "jedec,spi-nor"; 6909fa6529Sskrll spi-max-frequency = <50000000>; 708fb04b9bSjmcneill status = "disabled"; 718fb04b9bSjmcneill }; 728fb04b9bSjmcneill flash@1 { 738fb04b9bSjmcneill reg = < 1 >; 748fb04b9bSjmcneill compatible = "jedec,spi-nor"; 7509fa6529Sskrll spi-max-frequency = <50000000>; 768fb04b9bSjmcneill status = "disabled"; 778fb04b9bSjmcneill }; 788fb04b9bSjmcneill flash@2 { 798fb04b9bSjmcneill reg = < 2 >; 808fb04b9bSjmcneill compatible = "jedec,spi-nor"; 8109fa6529Sskrll spi-max-frequency = <50000000>; 828fb04b9bSjmcneill status = "disabled"; 838fb04b9bSjmcneill }; 848fb04b9bSjmcneill }; 858fb04b9bSjmcneill 8609fa6529Sskrll spi1: spi@1e630000 { 878fb04b9bSjmcneill reg = < 0x1e630000 0xc4 888fb04b9bSjmcneill 0x30000000 0x08000000 >; 898fb04b9bSjmcneill #address-cells = <1>; 908fb04b9bSjmcneill #size-cells = <0>; 918fb04b9bSjmcneill compatible = "aspeed,ast2500-spi"; 92cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_AHB>; 938fb04b9bSjmcneill status = "disabled"; 948fb04b9bSjmcneill flash@0 { 958fb04b9bSjmcneill reg = < 0 >; 968fb04b9bSjmcneill compatible = "jedec,spi-nor"; 9709fa6529Sskrll spi-max-frequency = <50000000>; 988fb04b9bSjmcneill status = "disabled"; 998fb04b9bSjmcneill }; 1008fb04b9bSjmcneill flash@1 { 1018fb04b9bSjmcneill reg = < 1 >; 1028fb04b9bSjmcneill compatible = "jedec,spi-nor"; 10309fa6529Sskrll spi-max-frequency = <50000000>; 1048fb04b9bSjmcneill status = "disabled"; 1058fb04b9bSjmcneill }; 1068fb04b9bSjmcneill }; 1078fb04b9bSjmcneill 10809fa6529Sskrll spi2: spi@1e631000 { 1098fb04b9bSjmcneill reg = < 0x1e631000 0xc4 1108fb04b9bSjmcneill 0x38000000 0x08000000 >; 1118fb04b9bSjmcneill #address-cells = <1>; 1128fb04b9bSjmcneill #size-cells = <0>; 1138fb04b9bSjmcneill compatible = "aspeed,ast2500-spi"; 114cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_AHB>; 1158fb04b9bSjmcneill status = "disabled"; 1168fb04b9bSjmcneill flash@0 { 1178fb04b9bSjmcneill reg = < 0 >; 1188fb04b9bSjmcneill compatible = "jedec,spi-nor"; 11909fa6529Sskrll spi-max-frequency = <50000000>; 1208fb04b9bSjmcneill status = "disabled"; 1218fb04b9bSjmcneill }; 1228fb04b9bSjmcneill flash@1 { 1238fb04b9bSjmcneill reg = < 1 >; 1248fb04b9bSjmcneill compatible = "jedec,spi-nor"; 12509fa6529Sskrll spi-max-frequency = <50000000>; 1268fb04b9bSjmcneill status = "disabled"; 1278fb04b9bSjmcneill }; 1288fb04b9bSjmcneill }; 1298fb04b9bSjmcneill 130f46c7ed4Sjmcneill vic: interrupt-controller@1e6c0080 { 131f46c7ed4Sjmcneill compatible = "aspeed,ast2400-vic"; 132f46c7ed4Sjmcneill interrupt-controller; 133f46c7ed4Sjmcneill #interrupt-cells = <1>; 134f46c7ed4Sjmcneill valid-sources = <0xfefff7ff 0x0807ffff>; 135f46c7ed4Sjmcneill reg = <0x1e6c0080 0x80>; 136f46c7ed4Sjmcneill }; 137f46c7ed4Sjmcneill 138182157ecSjmcneill cvic: copro-interrupt-controller@1e6c2000 { 139182157ecSjmcneill compatible = "aspeed,ast2500-cvic", "aspeed-cvic"; 140182157ecSjmcneill valid-sources = <0xffffffff>; 141182157ecSjmcneill copro-sw-interrupts = <1>; 142182157ecSjmcneill reg = <0x1e6c2000 0x80>; 143182157ecSjmcneill }; 144182157ecSjmcneill 145f46c7ed4Sjmcneill mac0: ethernet@1e660000 { 1468fb04b9bSjmcneill compatible = "aspeed,ast2500-mac", "faraday,ftgmac100"; 147f46c7ed4Sjmcneill reg = <0x1e660000 0x180>; 148f46c7ed4Sjmcneill interrupts = <2>; 149cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>; 150f46c7ed4Sjmcneill status = "disabled"; 151f46c7ed4Sjmcneill }; 152f46c7ed4Sjmcneill 153f46c7ed4Sjmcneill mac1: ethernet@1e680000 { 1548fb04b9bSjmcneill compatible = "aspeed,ast2500-mac", "faraday,ftgmac100"; 155f46c7ed4Sjmcneill reg = <0x1e680000 0x180>; 156f46c7ed4Sjmcneill interrupts = <3>; 157cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>; 158f46c7ed4Sjmcneill status = "disabled"; 159f46c7ed4Sjmcneill }; 160f46c7ed4Sjmcneill 161a27cda6cSjmcneill ehci0: usb@1e6a1000 { 162a27cda6cSjmcneill compatible = "aspeed,ast2500-ehci", "generic-ehci"; 163a27cda6cSjmcneill reg = <0x1e6a1000 0x100>; 164a27cda6cSjmcneill interrupts = <5>; 165a27cda6cSjmcneill clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; 166182157ecSjmcneill pinctrl-names = "default"; 167182157ecSjmcneill pinctrl-0 = <&pinctrl_usb2ah_default>; 168a27cda6cSjmcneill status = "disabled"; 169a27cda6cSjmcneill }; 170a27cda6cSjmcneill 171a27cda6cSjmcneill ehci1: usb@1e6a3000 { 172a27cda6cSjmcneill compatible = "aspeed,ast2500-ehci", "generic-ehci"; 173a27cda6cSjmcneill reg = <0x1e6a3000 0x100>; 174a27cda6cSjmcneill interrupts = <13>; 175a27cda6cSjmcneill clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>; 176182157ecSjmcneill pinctrl-names = "default"; 177182157ecSjmcneill pinctrl-0 = <&pinctrl_usb2bh_default>; 178a27cda6cSjmcneill status = "disabled"; 179a27cda6cSjmcneill }; 180a27cda6cSjmcneill 181a27cda6cSjmcneill uhci: usb@1e6b0000 { 182a27cda6cSjmcneill compatible = "aspeed,ast2500-uhci", "generic-uhci"; 183a27cda6cSjmcneill reg = <0x1e6b0000 0x100>; 184a27cda6cSjmcneill interrupts = <14>; 185a27cda6cSjmcneill #ports = <2>; 186a27cda6cSjmcneill clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>; 187a27cda6cSjmcneill status = "disabled"; 188182157ecSjmcneill /* 189182157ecSjmcneill * No default pinmux, it will follow EHCI, use an explicit pinmux 190182157ecSjmcneill * override if you don't enable EHCI 191182157ecSjmcneill */ 192182157ecSjmcneill }; 193182157ecSjmcneill 194182157ecSjmcneill vhub: usb-vhub@1e6a0000 { 195182157ecSjmcneill compatible = "aspeed,ast2500-usb-vhub"; 196182157ecSjmcneill reg = <0x1e6a0000 0x300>; 197182157ecSjmcneill interrupts = <5>; 198182157ecSjmcneill clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; 199*9ed2a30eSjmcneill aspeed,vhub-downstream-ports = <5>; 200*9ed2a30eSjmcneill aspeed,vhub-generic-endpoints = <15>; 201182157ecSjmcneill pinctrl-names = "default"; 202182157ecSjmcneill pinctrl-0 = <&pinctrl_usb2ad_default>; 203182157ecSjmcneill status = "disabled"; 204a27cda6cSjmcneill }; 205a27cda6cSjmcneill 206f46c7ed4Sjmcneill apb { 207f46c7ed4Sjmcneill compatible = "simple-bus"; 208f46c7ed4Sjmcneill #address-cells = <1>; 209f46c7ed4Sjmcneill #size-cells = <1>; 210f46c7ed4Sjmcneill ranges; 211f46c7ed4Sjmcneill 212*9ed2a30eSjmcneill edac: memory-controller@1e6e0000 { 213*9ed2a30eSjmcneill compatible = "aspeed,ast2500-sdram-edac"; 214*9ed2a30eSjmcneill reg = <0x1e6e0000 0x174>; 215*9ed2a30eSjmcneill interrupts = <0>; 216*9ed2a30eSjmcneill status = "disabled"; 217*9ed2a30eSjmcneill }; 218*9ed2a30eSjmcneill 219f46c7ed4Sjmcneill syscon: syscon@1e6e2000 { 220cf2d964bSjmcneill compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd"; 221f46c7ed4Sjmcneill reg = <0x1e6e2000 0x1a8>; 2228fb04b9bSjmcneill #address-cells = <1>; 223*9ed2a30eSjmcneill #size-cells = <1>; 224*9ed2a30eSjmcneill ranges = <0 0x1e6e2000 0x1000>; 225cf2d964bSjmcneill #clock-cells = <1>; 226cf2d964bSjmcneill #reset-cells = <1>; 227f46c7ed4Sjmcneill 228*9ed2a30eSjmcneill scu_ic: interrupt-controller@18 { 229*9ed2a30eSjmcneill #interrupt-cells = <1>; 230*9ed2a30eSjmcneill compatible = "aspeed,ast2500-scu-ic"; 231*9ed2a30eSjmcneill reg = <0x18 0x4>; 232*9ed2a30eSjmcneill interrupts = <21>; 233*9ed2a30eSjmcneill interrupt-controller; 2340cc12ebdSjmcneill }; 23509fa6529Sskrll 236*9ed2a30eSjmcneill p2a: p2a-control@2c { 23709fa6529Sskrll compatible = "aspeed,ast2500-p2a-ctrl"; 238*9ed2a30eSjmcneill reg = <0x2c 0x4>; 23909fa6529Sskrll status = "disabled"; 24009fa6529Sskrll }; 241*9ed2a30eSjmcneill 242*9ed2a30eSjmcneill silicon-id@7c { 243*9ed2a30eSjmcneill compatible = "aspeed,ast2500-silicon-id", "aspeed,silicon-id"; 244*9ed2a30eSjmcneill reg = <0x7c 0x4 0x150 0x8>; 245*9ed2a30eSjmcneill }; 246*9ed2a30eSjmcneill 247*9ed2a30eSjmcneill pinctrl: pinctrl@80 { 248*9ed2a30eSjmcneill compatible = "aspeed,ast2500-pinctrl"; 249*9ed2a30eSjmcneill reg = <0x80 0x18>, <0xa0 0x10>; 250*9ed2a30eSjmcneill aspeed,external-nodes = <&gfx>, <&lhc>; 251*9ed2a30eSjmcneill }; 2520cc12ebdSjmcneill }; 2530cc12ebdSjmcneill 254a27cda6cSjmcneill rng: hwrng@1e6e2078 { 255a27cda6cSjmcneill compatible = "timeriomem_rng"; 256a27cda6cSjmcneill reg = <0x1e6e2078 0x4>; 257a27cda6cSjmcneill period = <1>; 258a27cda6cSjmcneill quality = <100>; 259a27cda6cSjmcneill }; 260a27cda6cSjmcneill 2610cc12ebdSjmcneill gfx: display@1e6e6000 { 2620cc12ebdSjmcneill compatible = "aspeed,ast2500-gfx", "syscon"; 2630cc12ebdSjmcneill reg = <0x1e6e6000 0x1000>; 2640cc12ebdSjmcneill reg-io-width = <4>; 26509fa6529Sskrll clocks = <&syscon ASPEED_CLK_GATE_D1CLK>; 26609fa6529Sskrll resets = <&syscon ASPEED_RESET_CRT1>; 267*9ed2a30eSjmcneill syscon = <&syscon>; 26809fa6529Sskrll status = "disabled"; 26909fa6529Sskrll interrupts = <0x19>; 2700cc12ebdSjmcneill }; 2710cc12ebdSjmcneill 272*9ed2a30eSjmcneill xdma: xdma@1e6e7000 { 273*9ed2a30eSjmcneill compatible = "aspeed,ast2500-xdma"; 274*9ed2a30eSjmcneill reg = <0x1e6e7000 0x100>; 275*9ed2a30eSjmcneill clocks = <&syscon ASPEED_CLK_GATE_BCLK>; 276*9ed2a30eSjmcneill resets = <&syscon ASPEED_RESET_XDMA>; 277*9ed2a30eSjmcneill interrupts-extended = <&vic 6>, <&scu_ic ASPEED_AST2500_SCU_IC_PCIE_RESET_LO_TO_HI>; 278*9ed2a30eSjmcneill aspeed,pcie-device = "bmc"; 279*9ed2a30eSjmcneill aspeed,scu = <&syscon>; 280*9ed2a30eSjmcneill status = "disabled"; 281*9ed2a30eSjmcneill }; 282*9ed2a30eSjmcneill 2830cc12ebdSjmcneill adc: adc@1e6e9000 { 2840cc12ebdSjmcneill compatible = "aspeed,ast2500-adc"; 2850cc12ebdSjmcneill reg = <0x1e6e9000 0xb0>; 286cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 287cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_ADC>; 2880cc12ebdSjmcneill #io-channel-cells = <1>; 2890cc12ebdSjmcneill status = "disabled"; 2900cc12ebdSjmcneill }; 2910cc12ebdSjmcneill 29209fa6529Sskrll video: video@1e700000 { 29309fa6529Sskrll compatible = "aspeed,ast2500-video-engine"; 29409fa6529Sskrll reg = <0x1e700000 0x1000>; 29509fa6529Sskrll clocks = <&syscon ASPEED_CLK_GATE_VCLK>, 29609fa6529Sskrll <&syscon ASPEED_CLK_GATE_ECLK>; 29709fa6529Sskrll clock-names = "vclk", "eclk"; 29809fa6529Sskrll interrupts = <7>; 29909fa6529Sskrll status = "disabled"; 30009fa6529Sskrll }; 30109fa6529Sskrll 302182157ecSjmcneill sram: sram@1e720000 { 3030cc12ebdSjmcneill compatible = "mmio-sram"; 3040cc12ebdSjmcneill reg = <0x1e720000 0x9000>; // 36K 3050cc12ebdSjmcneill }; 3060cc12ebdSjmcneill 30709fa6529Sskrll sdmmc: sd-controller@1e740000 { 30809fa6529Sskrll compatible = "aspeed,ast2500-sd-controller"; 30909fa6529Sskrll reg = <0x1e740000 0x100>; 31009fa6529Sskrll #address-cells = <1>; 31109fa6529Sskrll #size-cells = <1>; 31209fa6529Sskrll ranges = <0 0x1e740000 0x10000>; 31309fa6529Sskrll clocks = <&syscon ASPEED_CLK_GATE_SDCLK>; 31409fa6529Sskrll status = "disabled"; 31509fa6529Sskrll 31609fa6529Sskrll sdhci0: sdhci@100 { 31709fa6529Sskrll compatible = "aspeed,ast2500-sdhci"; 31809fa6529Sskrll reg = <0x100 0x100>; 31909fa6529Sskrll interrupts = <26>; 32009fa6529Sskrll sdhci,auto-cmd12; 32109fa6529Sskrll clocks = <&syscon ASPEED_CLK_SDIO>; 32209fa6529Sskrll status = "disabled"; 32309fa6529Sskrll }; 32409fa6529Sskrll 32509fa6529Sskrll sdhci1: sdhci@200 { 32609fa6529Sskrll compatible = "aspeed,ast2500-sdhci"; 32709fa6529Sskrll reg = <0x200 0x100>; 32809fa6529Sskrll interrupts = <26>; 32909fa6529Sskrll sdhci,auto-cmd12; 33009fa6529Sskrll clocks = <&syscon ASPEED_CLK_SDIO>; 33109fa6529Sskrll status = "disabled"; 33209fa6529Sskrll }; 33309fa6529Sskrll }; 33409fa6529Sskrll 3350cc12ebdSjmcneill gpio: gpio@1e780000 { 3360cc12ebdSjmcneill #gpio-cells = <2>; 3370cc12ebdSjmcneill gpio-controller; 3380cc12ebdSjmcneill compatible = "aspeed,ast2500-gpio"; 33909fa6529Sskrll reg = <0x1e780000 0x200>; 3400cc12ebdSjmcneill interrupts = <20>; 34109fa6529Sskrll gpio-ranges = <&pinctrl 0 0 232>; 342cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 3430cc12ebdSjmcneill interrupt-controller; 34484c8294dSjmcneill #interrupt-cells = <2>; 3450cc12ebdSjmcneill }; 3460cc12ebdSjmcneill 34709fa6529Sskrll sgpio: sgpio@1e780200 { 34809fa6529Sskrll #gpio-cells = <2>; 34909fa6529Sskrll compatible = "aspeed,ast2500-sgpio"; 35009fa6529Sskrll gpio-controller; 35109fa6529Sskrll interrupts = <40>; 35209fa6529Sskrll reg = <0x1e780200 0x0100>; 35309fa6529Sskrll clocks = <&syscon ASPEED_CLK_APB>; 35409fa6529Sskrll interrupt-controller; 35509fa6529Sskrll bus-frequency = <12000000>; 35609fa6529Sskrll pinctrl-names = "default"; 35709fa6529Sskrll pinctrl-0 = <&pinctrl_sgpm_default>; 35809fa6529Sskrll status = "disabled"; 35909fa6529Sskrll }; 36009fa6529Sskrll 36109fa6529Sskrll rtc: rtc@1e781000 { 36209fa6529Sskrll compatible = "aspeed,ast2500-rtc"; 36309fa6529Sskrll reg = <0x1e781000 0x18>; 36409fa6529Sskrll status = "disabled"; 36509fa6529Sskrll }; 36609fa6529Sskrll 3670cc12ebdSjmcneill timer: timer@1e782000 { 3680cc12ebdSjmcneill /* This timer is a Faraday FTTMR010 derivative */ 3690cc12ebdSjmcneill compatible = "aspeed,ast2400-timer"; 3700cc12ebdSjmcneill reg = <0x1e782000 0x90>; 3710cc12ebdSjmcneill interrupts = <16 17 18 35 36 37 38 39>; 372cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 3730cc12ebdSjmcneill clock-names = "PCLK"; 3740cc12ebdSjmcneill }; 3750cc12ebdSjmcneill 3760cc12ebdSjmcneill uart1: serial@1e783000 { 3770cc12ebdSjmcneill compatible = "ns16550a"; 3780cc12ebdSjmcneill reg = <0x1e783000 0x20>; 3790cc12ebdSjmcneill reg-shift = <2>; 3800cc12ebdSjmcneill interrupts = <9>; 381cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>; 382cf2d964bSjmcneill resets = <&lpc_reset 4>; 3830cc12ebdSjmcneill no-loopback-test; 3840cc12ebdSjmcneill status = "disabled"; 3850cc12ebdSjmcneill }; 3860cc12ebdSjmcneill 3870cc12ebdSjmcneill uart5: serial@1e784000 { 3880cc12ebdSjmcneill compatible = "ns16550a"; 3890cc12ebdSjmcneill reg = <0x1e784000 0x20>; 3900cc12ebdSjmcneill reg-shift = <2>; 3910cc12ebdSjmcneill interrupts = <10>; 392cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>; 3930cc12ebdSjmcneill no-loopback-test; 3940cc12ebdSjmcneill status = "disabled"; 3950cc12ebdSjmcneill }; 3960cc12ebdSjmcneill 3970cc12ebdSjmcneill wdt1: watchdog@1e785000 { 3980cc12ebdSjmcneill compatible = "aspeed,ast2500-wdt"; 3990cc12ebdSjmcneill reg = <0x1e785000 0x20>; 400cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 4010cc12ebdSjmcneill }; 4020cc12ebdSjmcneill 4030cc12ebdSjmcneill wdt2: watchdog@1e785020 { 4040cc12ebdSjmcneill compatible = "aspeed,ast2500-wdt"; 4050cc12ebdSjmcneill reg = <0x1e785020 0x20>; 406cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 4070cc12ebdSjmcneill }; 4080cc12ebdSjmcneill 4090cc12ebdSjmcneill wdt3: watchdog@1e785040 { 4100cc12ebdSjmcneill compatible = "aspeed,ast2500-wdt"; 4110cc12ebdSjmcneill reg = <0x1e785040 0x20>; 412cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 413cf2d964bSjmcneill status = "disabled"; 414cf2d964bSjmcneill }; 415cf2d964bSjmcneill 416cf2d964bSjmcneill pwm_tacho: pwm-tacho-controller@1e786000 { 417cf2d964bSjmcneill compatible = "aspeed,ast2500-pwm-tacho"; 418cf2d964bSjmcneill #address-cells = <1>; 419cf2d964bSjmcneill #size-cells = <0>; 420cf2d964bSjmcneill reg = <0x1e786000 0x1000>; 421182157ecSjmcneill clocks = <&syscon ASPEED_CLK_24M>; 422cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_PWM>; 423cf2d964bSjmcneill status = "disabled"; 424cf2d964bSjmcneill }; 425cf2d964bSjmcneill 426cf2d964bSjmcneill vuart: serial@1e787000 { 427cf2d964bSjmcneill compatible = "aspeed,ast2500-vuart"; 428cf2d964bSjmcneill reg = <0x1e787000 0x40>; 429cf2d964bSjmcneill reg-shift = <2>; 430cf2d964bSjmcneill interrupts = <8>; 431cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 432cf2d964bSjmcneill no-loopback-test; 4330cc12ebdSjmcneill status = "disabled"; 4340cc12ebdSjmcneill }; 4350cc12ebdSjmcneill 4360cc12ebdSjmcneill lpc: lpc@1e789000 { 437*9ed2a30eSjmcneill compatible = "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon"; 4380cc12ebdSjmcneill reg = <0x1e789000 0x1000>; 439*9ed2a30eSjmcneill reg-io-width = <4>; 4400cc12ebdSjmcneill 4410cc12ebdSjmcneill #address-cells = <1>; 4420cc12ebdSjmcneill #size-cells = <1>; 443cf2d964bSjmcneill ranges = <0x0 0x1e789000 0x1000>; 4440cc12ebdSjmcneill 445*9ed2a30eSjmcneill kcs1: kcs@24 { 446*9ed2a30eSjmcneill compatible = "aspeed,ast2500-kcs-bmc-v2"; 447*9ed2a30eSjmcneill reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>; 44884c8294dSjmcneill interrupts = <8>; 44984c8294dSjmcneill status = "disabled"; 45084c8294dSjmcneill }; 45184c8294dSjmcneill 452*9ed2a30eSjmcneill kcs2: kcs@28 { 453*9ed2a30eSjmcneill compatible = "aspeed,ast2500-kcs-bmc-v2"; 454*9ed2a30eSjmcneill reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>; 455*9ed2a30eSjmcneill interrupts = <8>; 456*9ed2a30eSjmcneill status = "disabled"; 457*9ed2a30eSjmcneill }; 458*9ed2a30eSjmcneill 459*9ed2a30eSjmcneill kcs3: kcs@2c { 460*9ed2a30eSjmcneill compatible = "aspeed,ast2500-kcs-bmc-v2"; 461*9ed2a30eSjmcneill reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>; 462*9ed2a30eSjmcneill interrupts = <8>; 463*9ed2a30eSjmcneill status = "disabled"; 464*9ed2a30eSjmcneill }; 465*9ed2a30eSjmcneill 466*9ed2a30eSjmcneill kcs4: kcs@114 { 467*9ed2a30eSjmcneill compatible = "aspeed,ast2500-kcs-bmc-v2"; 468*9ed2a30eSjmcneill reg = <0x114 0x1>, <0x118 0x1>, <0x11c 0x1>; 469*9ed2a30eSjmcneill interrupts = <8>; 470*9ed2a30eSjmcneill status = "disabled"; 471*9ed2a30eSjmcneill }; 472*9ed2a30eSjmcneill 473*9ed2a30eSjmcneill lpc_ctrl: lpc-ctrl@80 { 474cf2d964bSjmcneill compatible = "aspeed,ast2500-lpc-ctrl"; 475*9ed2a30eSjmcneill reg = <0x80 0x10>; 476cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 477cf2d964bSjmcneill status = "disabled"; 478cf2d964bSjmcneill }; 479cf2d964bSjmcneill 480*9ed2a30eSjmcneill lpc_snoop: lpc-snoop@90 { 481cf2d964bSjmcneill compatible = "aspeed,ast2500-lpc-snoop"; 482*9ed2a30eSjmcneill reg = <0x90 0x8>; 483cf2d964bSjmcneill interrupts = <8>; 484*9ed2a30eSjmcneill clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 485cf2d964bSjmcneill status = "disabled"; 486cf2d964bSjmcneill }; 4870cc12ebdSjmcneill 488*9ed2a30eSjmcneill lpc_reset: reset-controller@98 { 489cf2d964bSjmcneill compatible = "aspeed,ast2500-lpc-reset"; 490*9ed2a30eSjmcneill reg = <0x98 0x4>; 491cf2d964bSjmcneill #reset-cells = <1>; 4920cc12ebdSjmcneill }; 4930cc12ebdSjmcneill 494*9ed2a30eSjmcneill lhc: lhc@a0 { 495*9ed2a30eSjmcneill compatible = "aspeed,ast2500-lhc"; 496*9ed2a30eSjmcneill reg = <0xa0 0x24 0xc8 0x8>; 497*9ed2a30eSjmcneill }; 498*9ed2a30eSjmcneill 499*9ed2a30eSjmcneill 500*9ed2a30eSjmcneill ibt: ibt@140 { 501cf2d964bSjmcneill compatible = "aspeed,ast2500-ibt-bmc"; 502*9ed2a30eSjmcneill reg = <0x140 0x18>; 503cf2d964bSjmcneill interrupts = <8>; 5040cc12ebdSjmcneill status = "disabled"; 5050cc12ebdSjmcneill }; 506cf2d964bSjmcneill }; 5070cc12ebdSjmcneill 5080cc12ebdSjmcneill uart2: serial@1e78d000 { 5090cc12ebdSjmcneill compatible = "ns16550a"; 5100cc12ebdSjmcneill reg = <0x1e78d000 0x20>; 5110cc12ebdSjmcneill reg-shift = <2>; 5120cc12ebdSjmcneill interrupts = <32>; 513cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>; 514cf2d964bSjmcneill resets = <&lpc_reset 5>; 5150cc12ebdSjmcneill no-loopback-test; 5160cc12ebdSjmcneill status = "disabled"; 5170cc12ebdSjmcneill }; 5180cc12ebdSjmcneill 5190cc12ebdSjmcneill uart3: serial@1e78e000 { 5200cc12ebdSjmcneill compatible = "ns16550a"; 5210cc12ebdSjmcneill reg = <0x1e78e000 0x20>; 5220cc12ebdSjmcneill reg-shift = <2>; 5230cc12ebdSjmcneill interrupts = <33>; 524cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>; 525cf2d964bSjmcneill resets = <&lpc_reset 6>; 5260cc12ebdSjmcneill no-loopback-test; 5270cc12ebdSjmcneill status = "disabled"; 5280cc12ebdSjmcneill }; 5290cc12ebdSjmcneill 5300cc12ebdSjmcneill uart4: serial@1e78f000 { 5310cc12ebdSjmcneill compatible = "ns16550a"; 5320cc12ebdSjmcneill reg = <0x1e78f000 0x20>; 5330cc12ebdSjmcneill reg-shift = <2>; 5340cc12ebdSjmcneill interrupts = <34>; 535cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>; 536cf2d964bSjmcneill resets = <&lpc_reset 7>; 5370cc12ebdSjmcneill no-loopback-test; 5380cc12ebdSjmcneill status = "disabled"; 5390cc12ebdSjmcneill }; 5400cc12ebdSjmcneill 541182157ecSjmcneill i2c: bus@1e78a000 { 5420cc12ebdSjmcneill compatible = "simple-bus"; 5430cc12ebdSjmcneill #address-cells = <1>; 5440cc12ebdSjmcneill #size-cells = <1>; 5450cc12ebdSjmcneill ranges = <0 0x1e78a000 0x1000>; 5460cc12ebdSjmcneill }; 5470cc12ebdSjmcneill }; 5480cc12ebdSjmcneill }; 5490cc12ebdSjmcneill}; 5500cc12ebdSjmcneill 5510cc12ebdSjmcneill&i2c { 5520cc12ebdSjmcneill i2c_ic: interrupt-controller@0 { 5530cc12ebdSjmcneill #interrupt-cells = <1>; 5540cc12ebdSjmcneill compatible = "aspeed,ast2500-i2c-ic"; 5550cc12ebdSjmcneill reg = <0x0 0x40>; 5560cc12ebdSjmcneill interrupts = <12>; 5570cc12ebdSjmcneill interrupt-controller; 5580cc12ebdSjmcneill }; 5590cc12ebdSjmcneill 5600cc12ebdSjmcneill i2c0: i2c-bus@40 { 5610cc12ebdSjmcneill #address-cells = <1>; 5620cc12ebdSjmcneill #size-cells = <0>; 5630cc12ebdSjmcneill #interrupt-cells = <1>; 5640cc12ebdSjmcneill 5650cc12ebdSjmcneill reg = <0x40 0x40>; 5660cc12ebdSjmcneill compatible = "aspeed,ast2500-i2c-bus"; 567cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 568cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 5690cc12ebdSjmcneill bus-frequency = <100000>; 5700cc12ebdSjmcneill interrupts = <0>; 5710cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 5720cc12ebdSjmcneill status = "disabled"; 5730cc12ebdSjmcneill /* Does not need pinctrl properties */ 5740cc12ebdSjmcneill }; 5750cc12ebdSjmcneill 5760cc12ebdSjmcneill i2c1: i2c-bus@80 { 5770cc12ebdSjmcneill #address-cells = <1>; 5780cc12ebdSjmcneill #size-cells = <0>; 5790cc12ebdSjmcneill #interrupt-cells = <1>; 5800cc12ebdSjmcneill 5810cc12ebdSjmcneill reg = <0x80 0x40>; 5820cc12ebdSjmcneill compatible = "aspeed,ast2500-i2c-bus"; 583cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 584cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 5850cc12ebdSjmcneill bus-frequency = <100000>; 5860cc12ebdSjmcneill interrupts = <1>; 5870cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 5880cc12ebdSjmcneill status = "disabled"; 5890cc12ebdSjmcneill /* Does not need pinctrl properties */ 5900cc12ebdSjmcneill }; 5910cc12ebdSjmcneill 5920cc12ebdSjmcneill i2c2: i2c-bus@c0 { 5930cc12ebdSjmcneill #address-cells = <1>; 5940cc12ebdSjmcneill #size-cells = <0>; 5950cc12ebdSjmcneill #interrupt-cells = <1>; 5960cc12ebdSjmcneill 5970cc12ebdSjmcneill reg = <0xc0 0x40>; 5980cc12ebdSjmcneill compatible = "aspeed,ast2500-i2c-bus"; 599cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 600cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 6010cc12ebdSjmcneill bus-frequency = <100000>; 6020cc12ebdSjmcneill interrupts = <2>; 6030cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 6040cc12ebdSjmcneill pinctrl-names = "default"; 6050cc12ebdSjmcneill pinctrl-0 = <&pinctrl_i2c3_default>; 6060cc12ebdSjmcneill status = "disabled"; 6070cc12ebdSjmcneill }; 6080cc12ebdSjmcneill 6090cc12ebdSjmcneill i2c3: i2c-bus@100 { 6100cc12ebdSjmcneill #address-cells = <1>; 6110cc12ebdSjmcneill #size-cells = <0>; 6120cc12ebdSjmcneill #interrupt-cells = <1>; 6130cc12ebdSjmcneill 6140cc12ebdSjmcneill reg = <0x100 0x40>; 6150cc12ebdSjmcneill compatible = "aspeed,ast2500-i2c-bus"; 616cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 617cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 6180cc12ebdSjmcneill bus-frequency = <100000>; 6190cc12ebdSjmcneill interrupts = <3>; 6200cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 6210cc12ebdSjmcneill pinctrl-names = "default"; 6220cc12ebdSjmcneill pinctrl-0 = <&pinctrl_i2c4_default>; 6230cc12ebdSjmcneill status = "disabled"; 6240cc12ebdSjmcneill }; 6250cc12ebdSjmcneill 6260cc12ebdSjmcneill i2c4: i2c-bus@140 { 6270cc12ebdSjmcneill #address-cells = <1>; 6280cc12ebdSjmcneill #size-cells = <0>; 6290cc12ebdSjmcneill #interrupt-cells = <1>; 6300cc12ebdSjmcneill 6310cc12ebdSjmcneill reg = <0x140 0x40>; 6320cc12ebdSjmcneill compatible = "aspeed,ast2500-i2c-bus"; 633cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 634cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 6350cc12ebdSjmcneill bus-frequency = <100000>; 6360cc12ebdSjmcneill interrupts = <4>; 6370cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 6380cc12ebdSjmcneill pinctrl-names = "default"; 6390cc12ebdSjmcneill pinctrl-0 = <&pinctrl_i2c5_default>; 6400cc12ebdSjmcneill status = "disabled"; 6410cc12ebdSjmcneill }; 6420cc12ebdSjmcneill 6430cc12ebdSjmcneill i2c5: i2c-bus@180 { 6440cc12ebdSjmcneill #address-cells = <1>; 6450cc12ebdSjmcneill #size-cells = <0>; 6460cc12ebdSjmcneill #interrupt-cells = <1>; 6470cc12ebdSjmcneill 6480cc12ebdSjmcneill reg = <0x180 0x40>; 6490cc12ebdSjmcneill compatible = "aspeed,ast2500-i2c-bus"; 650cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 651cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 6520cc12ebdSjmcneill bus-frequency = <100000>; 6530cc12ebdSjmcneill interrupts = <5>; 6540cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 6550cc12ebdSjmcneill pinctrl-names = "default"; 6560cc12ebdSjmcneill pinctrl-0 = <&pinctrl_i2c6_default>; 6570cc12ebdSjmcneill status = "disabled"; 6580cc12ebdSjmcneill }; 6590cc12ebdSjmcneill 6600cc12ebdSjmcneill i2c6: i2c-bus@1c0 { 6610cc12ebdSjmcneill #address-cells = <1>; 6620cc12ebdSjmcneill #size-cells = <0>; 6630cc12ebdSjmcneill #interrupt-cells = <1>; 6640cc12ebdSjmcneill 6650cc12ebdSjmcneill reg = <0x1c0 0x40>; 6660cc12ebdSjmcneill compatible = "aspeed,ast2500-i2c-bus"; 667cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 668cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 6690cc12ebdSjmcneill bus-frequency = <100000>; 6700cc12ebdSjmcneill interrupts = <6>; 6710cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 6720cc12ebdSjmcneill pinctrl-names = "default"; 6730cc12ebdSjmcneill pinctrl-0 = <&pinctrl_i2c7_default>; 6740cc12ebdSjmcneill status = "disabled"; 6750cc12ebdSjmcneill }; 6760cc12ebdSjmcneill 6770cc12ebdSjmcneill i2c7: i2c-bus@300 { 6780cc12ebdSjmcneill #address-cells = <1>; 6790cc12ebdSjmcneill #size-cells = <0>; 6800cc12ebdSjmcneill #interrupt-cells = <1>; 6810cc12ebdSjmcneill 6820cc12ebdSjmcneill reg = <0x300 0x40>; 6830cc12ebdSjmcneill compatible = "aspeed,ast2500-i2c-bus"; 684cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 685cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 6860cc12ebdSjmcneill bus-frequency = <100000>; 6870cc12ebdSjmcneill interrupts = <7>; 6880cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 6890cc12ebdSjmcneill pinctrl-names = "default"; 6900cc12ebdSjmcneill pinctrl-0 = <&pinctrl_i2c8_default>; 6910cc12ebdSjmcneill status = "disabled"; 6920cc12ebdSjmcneill }; 6930cc12ebdSjmcneill 6940cc12ebdSjmcneill i2c8: i2c-bus@340 { 6950cc12ebdSjmcneill #address-cells = <1>; 6960cc12ebdSjmcneill #size-cells = <0>; 6970cc12ebdSjmcneill #interrupt-cells = <1>; 6980cc12ebdSjmcneill 6990cc12ebdSjmcneill reg = <0x340 0x40>; 7000cc12ebdSjmcneill compatible = "aspeed,ast2500-i2c-bus"; 701cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 702cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 7030cc12ebdSjmcneill bus-frequency = <100000>; 7040cc12ebdSjmcneill interrupts = <8>; 7050cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 7060cc12ebdSjmcneill pinctrl-names = "default"; 7070cc12ebdSjmcneill pinctrl-0 = <&pinctrl_i2c9_default>; 7080cc12ebdSjmcneill status = "disabled"; 7090cc12ebdSjmcneill }; 7100cc12ebdSjmcneill 7110cc12ebdSjmcneill i2c9: i2c-bus@380 { 7120cc12ebdSjmcneill #address-cells = <1>; 7130cc12ebdSjmcneill #size-cells = <0>; 7140cc12ebdSjmcneill #interrupt-cells = <1>; 7150cc12ebdSjmcneill 7160cc12ebdSjmcneill reg = <0x380 0x40>; 7170cc12ebdSjmcneill compatible = "aspeed,ast2500-i2c-bus"; 718cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 719cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 7200cc12ebdSjmcneill bus-frequency = <100000>; 7210cc12ebdSjmcneill interrupts = <9>; 7220cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 7230cc12ebdSjmcneill pinctrl-names = "default"; 7240cc12ebdSjmcneill pinctrl-0 = <&pinctrl_i2c10_default>; 7250cc12ebdSjmcneill status = "disabled"; 7260cc12ebdSjmcneill }; 7270cc12ebdSjmcneill 7280cc12ebdSjmcneill i2c10: i2c-bus@3c0 { 7290cc12ebdSjmcneill #address-cells = <1>; 7300cc12ebdSjmcneill #size-cells = <0>; 7310cc12ebdSjmcneill #interrupt-cells = <1>; 7320cc12ebdSjmcneill 7330cc12ebdSjmcneill reg = <0x3c0 0x40>; 7340cc12ebdSjmcneill compatible = "aspeed,ast2500-i2c-bus"; 735cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 736cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 7370cc12ebdSjmcneill bus-frequency = <100000>; 7380cc12ebdSjmcneill interrupts = <10>; 7390cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 7400cc12ebdSjmcneill pinctrl-names = "default"; 7410cc12ebdSjmcneill pinctrl-0 = <&pinctrl_i2c11_default>; 7420cc12ebdSjmcneill status = "disabled"; 7430cc12ebdSjmcneill }; 7440cc12ebdSjmcneill 7450cc12ebdSjmcneill i2c11: i2c-bus@400 { 7460cc12ebdSjmcneill #address-cells = <1>; 7470cc12ebdSjmcneill #size-cells = <0>; 7480cc12ebdSjmcneill #interrupt-cells = <1>; 7490cc12ebdSjmcneill 7500cc12ebdSjmcneill reg = <0x400 0x40>; 7510cc12ebdSjmcneill compatible = "aspeed,ast2500-i2c-bus"; 752cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 753cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 7540cc12ebdSjmcneill bus-frequency = <100000>; 7550cc12ebdSjmcneill interrupts = <11>; 7560cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 7570cc12ebdSjmcneill pinctrl-names = "default"; 7580cc12ebdSjmcneill pinctrl-0 = <&pinctrl_i2c12_default>; 7590cc12ebdSjmcneill status = "disabled"; 7600cc12ebdSjmcneill }; 7610cc12ebdSjmcneill 7620cc12ebdSjmcneill i2c12: i2c-bus@440 { 7630cc12ebdSjmcneill #address-cells = <1>; 7640cc12ebdSjmcneill #size-cells = <0>; 7650cc12ebdSjmcneill #interrupt-cells = <1>; 7660cc12ebdSjmcneill 7670cc12ebdSjmcneill reg = <0x440 0x40>; 7680cc12ebdSjmcneill compatible = "aspeed,ast2500-i2c-bus"; 769cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 770cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 7710cc12ebdSjmcneill bus-frequency = <100000>; 7720cc12ebdSjmcneill interrupts = <12>; 7730cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 7740cc12ebdSjmcneill pinctrl-names = "default"; 7750cc12ebdSjmcneill pinctrl-0 = <&pinctrl_i2c13_default>; 7760cc12ebdSjmcneill status = "disabled"; 7770cc12ebdSjmcneill }; 7780cc12ebdSjmcneill 7790cc12ebdSjmcneill i2c13: i2c-bus@480 { 7800cc12ebdSjmcneill #address-cells = <1>; 7810cc12ebdSjmcneill #size-cells = <0>; 7820cc12ebdSjmcneill #interrupt-cells = <1>; 7830cc12ebdSjmcneill 7840cc12ebdSjmcneill reg = <0x480 0x40>; 7850cc12ebdSjmcneill compatible = "aspeed,ast2500-i2c-bus"; 786cf2d964bSjmcneill clocks = <&syscon ASPEED_CLK_APB>; 787cf2d964bSjmcneill resets = <&syscon ASPEED_RESET_I2C>; 7880cc12ebdSjmcneill bus-frequency = <100000>; 7890cc12ebdSjmcneill interrupts = <13>; 7900cc12ebdSjmcneill interrupt-parent = <&i2c_ic>; 7910cc12ebdSjmcneill pinctrl-names = "default"; 7920cc12ebdSjmcneill pinctrl-0 = <&pinctrl_i2c14_default>; 7930cc12ebdSjmcneill status = "disabled"; 7940cc12ebdSjmcneill }; 7950cc12ebdSjmcneill}; 7960cc12ebdSjmcneill 7970cc12ebdSjmcneill&pinctrl { 798f46c7ed4Sjmcneill pinctrl_acpi_default: acpi_default { 799f46c7ed4Sjmcneill function = "ACPI"; 800f46c7ed4Sjmcneill groups = "ACPI"; 801f46c7ed4Sjmcneill }; 802f46c7ed4Sjmcneill 803f46c7ed4Sjmcneill pinctrl_adc0_default: adc0_default { 804f46c7ed4Sjmcneill function = "ADC0"; 805f46c7ed4Sjmcneill groups = "ADC0"; 806f46c7ed4Sjmcneill }; 807f46c7ed4Sjmcneill 808f46c7ed4Sjmcneill pinctrl_adc1_default: adc1_default { 809f46c7ed4Sjmcneill function = "ADC1"; 810f46c7ed4Sjmcneill groups = "ADC1"; 811f46c7ed4Sjmcneill }; 812f46c7ed4Sjmcneill 813f46c7ed4Sjmcneill pinctrl_adc10_default: adc10_default { 814f46c7ed4Sjmcneill function = "ADC10"; 815f46c7ed4Sjmcneill groups = "ADC10"; 816f46c7ed4Sjmcneill }; 817f46c7ed4Sjmcneill 818f46c7ed4Sjmcneill pinctrl_adc11_default: adc11_default { 819f46c7ed4Sjmcneill function = "ADC11"; 820f46c7ed4Sjmcneill groups = "ADC11"; 821f46c7ed4Sjmcneill }; 822f46c7ed4Sjmcneill 823f46c7ed4Sjmcneill pinctrl_adc12_default: adc12_default { 824f46c7ed4Sjmcneill function = "ADC12"; 825f46c7ed4Sjmcneill groups = "ADC12"; 826f46c7ed4Sjmcneill }; 827f46c7ed4Sjmcneill 828f46c7ed4Sjmcneill pinctrl_adc13_default: adc13_default { 829f46c7ed4Sjmcneill function = "ADC13"; 830f46c7ed4Sjmcneill groups = "ADC13"; 831f46c7ed4Sjmcneill }; 832f46c7ed4Sjmcneill 833f46c7ed4Sjmcneill pinctrl_adc14_default: adc14_default { 834f46c7ed4Sjmcneill function = "ADC14"; 835f46c7ed4Sjmcneill groups = "ADC14"; 836f46c7ed4Sjmcneill }; 837f46c7ed4Sjmcneill 838f46c7ed4Sjmcneill pinctrl_adc15_default: adc15_default { 839f46c7ed4Sjmcneill function = "ADC15"; 840f46c7ed4Sjmcneill groups = "ADC15"; 841f46c7ed4Sjmcneill }; 842f46c7ed4Sjmcneill 843f46c7ed4Sjmcneill pinctrl_adc2_default: adc2_default { 844f46c7ed4Sjmcneill function = "ADC2"; 845f46c7ed4Sjmcneill groups = "ADC2"; 846f46c7ed4Sjmcneill }; 847f46c7ed4Sjmcneill 848f46c7ed4Sjmcneill pinctrl_adc3_default: adc3_default { 849f46c7ed4Sjmcneill function = "ADC3"; 850f46c7ed4Sjmcneill groups = "ADC3"; 851f46c7ed4Sjmcneill }; 852f46c7ed4Sjmcneill 853f46c7ed4Sjmcneill pinctrl_adc4_default: adc4_default { 854f46c7ed4Sjmcneill function = "ADC4"; 855f46c7ed4Sjmcneill groups = "ADC4"; 856f46c7ed4Sjmcneill }; 857f46c7ed4Sjmcneill 858f46c7ed4Sjmcneill pinctrl_adc5_default: adc5_default { 859f46c7ed4Sjmcneill function = "ADC5"; 860f46c7ed4Sjmcneill groups = "ADC5"; 861f46c7ed4Sjmcneill }; 862f46c7ed4Sjmcneill 863f46c7ed4Sjmcneill pinctrl_adc6_default: adc6_default { 864f46c7ed4Sjmcneill function = "ADC6"; 865f46c7ed4Sjmcneill groups = "ADC6"; 866f46c7ed4Sjmcneill }; 867f46c7ed4Sjmcneill 868f46c7ed4Sjmcneill pinctrl_adc7_default: adc7_default { 869f46c7ed4Sjmcneill function = "ADC7"; 870f46c7ed4Sjmcneill groups = "ADC7"; 871f46c7ed4Sjmcneill }; 872f46c7ed4Sjmcneill 873f46c7ed4Sjmcneill pinctrl_adc8_default: adc8_default { 874f46c7ed4Sjmcneill function = "ADC8"; 875f46c7ed4Sjmcneill groups = "ADC8"; 876f46c7ed4Sjmcneill }; 877f46c7ed4Sjmcneill 878f46c7ed4Sjmcneill pinctrl_adc9_default: adc9_default { 879f46c7ed4Sjmcneill function = "ADC9"; 880f46c7ed4Sjmcneill groups = "ADC9"; 881f46c7ed4Sjmcneill }; 882f46c7ed4Sjmcneill 883f46c7ed4Sjmcneill pinctrl_bmcint_default: bmcint_default { 884f46c7ed4Sjmcneill function = "BMCINT"; 885f46c7ed4Sjmcneill groups = "BMCINT"; 886f46c7ed4Sjmcneill }; 887f46c7ed4Sjmcneill 888f46c7ed4Sjmcneill pinctrl_ddcclk_default: ddcclk_default { 889f46c7ed4Sjmcneill function = "DDCCLK"; 890f46c7ed4Sjmcneill groups = "DDCCLK"; 891f46c7ed4Sjmcneill }; 892f46c7ed4Sjmcneill 893f46c7ed4Sjmcneill pinctrl_ddcdat_default: ddcdat_default { 894f46c7ed4Sjmcneill function = "DDCDAT"; 895f46c7ed4Sjmcneill groups = "DDCDAT"; 896f46c7ed4Sjmcneill }; 897f46c7ed4Sjmcneill 898f46c7ed4Sjmcneill pinctrl_espi_default: espi_default { 899f46c7ed4Sjmcneill function = "ESPI"; 900f46c7ed4Sjmcneill groups = "ESPI"; 901f46c7ed4Sjmcneill }; 902f46c7ed4Sjmcneill 903f46c7ed4Sjmcneill pinctrl_fwspics1_default: fwspics1_default { 904f46c7ed4Sjmcneill function = "FWSPICS1"; 905f46c7ed4Sjmcneill groups = "FWSPICS1"; 906f46c7ed4Sjmcneill }; 907f46c7ed4Sjmcneill 908f46c7ed4Sjmcneill pinctrl_fwspics2_default: fwspics2_default { 909f46c7ed4Sjmcneill function = "FWSPICS2"; 910f46c7ed4Sjmcneill groups = "FWSPICS2"; 911f46c7ed4Sjmcneill }; 912f46c7ed4Sjmcneill 913f46c7ed4Sjmcneill pinctrl_gpid0_default: gpid0_default { 914f46c7ed4Sjmcneill function = "GPID0"; 915f46c7ed4Sjmcneill groups = "GPID0"; 916f46c7ed4Sjmcneill }; 917f46c7ed4Sjmcneill 918f46c7ed4Sjmcneill pinctrl_gpid2_default: gpid2_default { 919f46c7ed4Sjmcneill function = "GPID2"; 920f46c7ed4Sjmcneill groups = "GPID2"; 921f46c7ed4Sjmcneill }; 922f46c7ed4Sjmcneill 923f46c7ed4Sjmcneill pinctrl_gpid4_default: gpid4_default { 924f46c7ed4Sjmcneill function = "GPID4"; 925f46c7ed4Sjmcneill groups = "GPID4"; 926f46c7ed4Sjmcneill }; 927f46c7ed4Sjmcneill 928f46c7ed4Sjmcneill pinctrl_gpid6_default: gpid6_default { 929f46c7ed4Sjmcneill function = "GPID6"; 930f46c7ed4Sjmcneill groups = "GPID6"; 931f46c7ed4Sjmcneill }; 932f46c7ed4Sjmcneill 933f46c7ed4Sjmcneill pinctrl_gpie0_default: gpie0_default { 934f46c7ed4Sjmcneill function = "GPIE0"; 935f46c7ed4Sjmcneill groups = "GPIE0"; 936f46c7ed4Sjmcneill }; 937f46c7ed4Sjmcneill 938f46c7ed4Sjmcneill pinctrl_gpie2_default: gpie2_default { 939f46c7ed4Sjmcneill function = "GPIE2"; 940f46c7ed4Sjmcneill groups = "GPIE2"; 941f46c7ed4Sjmcneill }; 942f46c7ed4Sjmcneill 943f46c7ed4Sjmcneill pinctrl_gpie4_default: gpie4_default { 944f46c7ed4Sjmcneill function = "GPIE4"; 945f46c7ed4Sjmcneill groups = "GPIE4"; 946f46c7ed4Sjmcneill }; 947f46c7ed4Sjmcneill 948f46c7ed4Sjmcneill pinctrl_gpie6_default: gpie6_default { 949f46c7ed4Sjmcneill function = "GPIE6"; 950f46c7ed4Sjmcneill groups = "GPIE6"; 951f46c7ed4Sjmcneill }; 952f46c7ed4Sjmcneill 953f46c7ed4Sjmcneill pinctrl_i2c10_default: i2c10_default { 954f46c7ed4Sjmcneill function = "I2C10"; 955f46c7ed4Sjmcneill groups = "I2C10"; 956f46c7ed4Sjmcneill }; 957f46c7ed4Sjmcneill 958f46c7ed4Sjmcneill pinctrl_i2c11_default: i2c11_default { 959f46c7ed4Sjmcneill function = "I2C11"; 960f46c7ed4Sjmcneill groups = "I2C11"; 961f46c7ed4Sjmcneill }; 962f46c7ed4Sjmcneill 963f46c7ed4Sjmcneill pinctrl_i2c12_default: i2c12_default { 964f46c7ed4Sjmcneill function = "I2C12"; 965f46c7ed4Sjmcneill groups = "I2C12"; 966f46c7ed4Sjmcneill }; 967f46c7ed4Sjmcneill 968f46c7ed4Sjmcneill pinctrl_i2c13_default: i2c13_default { 969f46c7ed4Sjmcneill function = "I2C13"; 970f46c7ed4Sjmcneill groups = "I2C13"; 971f46c7ed4Sjmcneill }; 972f46c7ed4Sjmcneill 973f46c7ed4Sjmcneill pinctrl_i2c14_default: i2c14_default { 974f46c7ed4Sjmcneill function = "I2C14"; 975f46c7ed4Sjmcneill groups = "I2C14"; 976f46c7ed4Sjmcneill }; 977f46c7ed4Sjmcneill 978f46c7ed4Sjmcneill pinctrl_i2c3_default: i2c3_default { 979f46c7ed4Sjmcneill function = "I2C3"; 980f46c7ed4Sjmcneill groups = "I2C3"; 981f46c7ed4Sjmcneill }; 982f46c7ed4Sjmcneill 983f46c7ed4Sjmcneill pinctrl_i2c4_default: i2c4_default { 984f46c7ed4Sjmcneill function = "I2C4"; 985f46c7ed4Sjmcneill groups = "I2C4"; 986f46c7ed4Sjmcneill }; 987f46c7ed4Sjmcneill 988f46c7ed4Sjmcneill pinctrl_i2c5_default: i2c5_default { 989f46c7ed4Sjmcneill function = "I2C5"; 990f46c7ed4Sjmcneill groups = "I2C5"; 991f46c7ed4Sjmcneill }; 992f46c7ed4Sjmcneill 993f46c7ed4Sjmcneill pinctrl_i2c6_default: i2c6_default { 994f46c7ed4Sjmcneill function = "I2C6"; 995f46c7ed4Sjmcneill groups = "I2C6"; 996f46c7ed4Sjmcneill }; 997f46c7ed4Sjmcneill 998f46c7ed4Sjmcneill pinctrl_i2c7_default: i2c7_default { 999f46c7ed4Sjmcneill function = "I2C7"; 1000f46c7ed4Sjmcneill groups = "I2C7"; 1001f46c7ed4Sjmcneill }; 1002f46c7ed4Sjmcneill 1003f46c7ed4Sjmcneill pinctrl_i2c8_default: i2c8_default { 1004f46c7ed4Sjmcneill function = "I2C8"; 1005f46c7ed4Sjmcneill groups = "I2C8"; 1006f46c7ed4Sjmcneill }; 1007f46c7ed4Sjmcneill 1008f46c7ed4Sjmcneill pinctrl_i2c9_default: i2c9_default { 1009f46c7ed4Sjmcneill function = "I2C9"; 1010f46c7ed4Sjmcneill groups = "I2C9"; 1011f46c7ed4Sjmcneill }; 1012f46c7ed4Sjmcneill 1013f46c7ed4Sjmcneill pinctrl_lad0_default: lad0_default { 1014f46c7ed4Sjmcneill function = "LAD0"; 1015f46c7ed4Sjmcneill groups = "LAD0"; 1016f46c7ed4Sjmcneill }; 10170cc12ebdSjmcneill 1018f46c7ed4Sjmcneill pinctrl_lad1_default: lad1_default { 1019f46c7ed4Sjmcneill function = "LAD1"; 1020f46c7ed4Sjmcneill groups = "LAD1"; 1021f46c7ed4Sjmcneill }; 1022f46c7ed4Sjmcneill 1023f46c7ed4Sjmcneill pinctrl_lad2_default: lad2_default { 1024f46c7ed4Sjmcneill function = "LAD2"; 1025f46c7ed4Sjmcneill groups = "LAD2"; 1026f46c7ed4Sjmcneill }; 1027f46c7ed4Sjmcneill 1028f46c7ed4Sjmcneill pinctrl_lad3_default: lad3_default { 1029f46c7ed4Sjmcneill function = "LAD3"; 1030f46c7ed4Sjmcneill groups = "LAD3"; 1031f46c7ed4Sjmcneill }; 1032f46c7ed4Sjmcneill 1033f46c7ed4Sjmcneill pinctrl_lclk_default: lclk_default { 1034f46c7ed4Sjmcneill function = "LCLK"; 1035f46c7ed4Sjmcneill groups = "LCLK"; 1036f46c7ed4Sjmcneill }; 1037f46c7ed4Sjmcneill 1038f46c7ed4Sjmcneill pinctrl_lframe_default: lframe_default { 1039f46c7ed4Sjmcneill function = "LFRAME"; 1040f46c7ed4Sjmcneill groups = "LFRAME"; 1041f46c7ed4Sjmcneill }; 1042f46c7ed4Sjmcneill 1043f46c7ed4Sjmcneill pinctrl_lpchc_default: lpchc_default { 1044f46c7ed4Sjmcneill function = "LPCHC"; 1045f46c7ed4Sjmcneill groups = "LPCHC"; 1046f46c7ed4Sjmcneill }; 1047f46c7ed4Sjmcneill 1048f46c7ed4Sjmcneill pinctrl_lpcpd_default: lpcpd_default { 1049f46c7ed4Sjmcneill function = "LPCPD"; 1050f46c7ed4Sjmcneill groups = "LPCPD"; 1051f46c7ed4Sjmcneill }; 1052f46c7ed4Sjmcneill 1053f46c7ed4Sjmcneill pinctrl_lpcplus_default: lpcplus_default { 1054f46c7ed4Sjmcneill function = "LPCPLUS"; 1055f46c7ed4Sjmcneill groups = "LPCPLUS"; 1056f46c7ed4Sjmcneill }; 1057f46c7ed4Sjmcneill 1058f46c7ed4Sjmcneill pinctrl_lpcpme_default: lpcpme_default { 1059f46c7ed4Sjmcneill function = "LPCPME"; 1060f46c7ed4Sjmcneill groups = "LPCPME"; 1061f46c7ed4Sjmcneill }; 1062f46c7ed4Sjmcneill 1063f46c7ed4Sjmcneill pinctrl_lpcrst_default: lpcrst_default { 1064f46c7ed4Sjmcneill function = "LPCRST"; 1065f46c7ed4Sjmcneill groups = "LPCRST"; 1066f46c7ed4Sjmcneill }; 1067f46c7ed4Sjmcneill 1068f46c7ed4Sjmcneill pinctrl_lpcsmi_default: lpcsmi_default { 1069f46c7ed4Sjmcneill function = "LPCSMI"; 1070f46c7ed4Sjmcneill groups = "LPCSMI"; 1071f46c7ed4Sjmcneill }; 1072f46c7ed4Sjmcneill 1073f46c7ed4Sjmcneill pinctrl_lsirq_default: lsirq_default { 1074f46c7ed4Sjmcneill function = "LSIRQ"; 1075f46c7ed4Sjmcneill groups = "LSIRQ"; 1076f46c7ed4Sjmcneill }; 1077f46c7ed4Sjmcneill 1078f46c7ed4Sjmcneill pinctrl_mac1link_default: mac1link_default { 1079f46c7ed4Sjmcneill function = "MAC1LINK"; 1080f46c7ed4Sjmcneill groups = "MAC1LINK"; 1081f46c7ed4Sjmcneill }; 1082f46c7ed4Sjmcneill 1083f46c7ed4Sjmcneill pinctrl_mac2link_default: mac2link_default { 1084f46c7ed4Sjmcneill function = "MAC2LINK"; 1085f46c7ed4Sjmcneill groups = "MAC2LINK"; 1086f46c7ed4Sjmcneill }; 1087f46c7ed4Sjmcneill 1088f46c7ed4Sjmcneill pinctrl_mdio1_default: mdio1_default { 1089f46c7ed4Sjmcneill function = "MDIO1"; 1090f46c7ed4Sjmcneill groups = "MDIO1"; 1091f46c7ed4Sjmcneill }; 1092f46c7ed4Sjmcneill 1093f46c7ed4Sjmcneill pinctrl_mdio2_default: mdio2_default { 1094f46c7ed4Sjmcneill function = "MDIO2"; 1095f46c7ed4Sjmcneill groups = "MDIO2"; 1096f46c7ed4Sjmcneill }; 1097f46c7ed4Sjmcneill 1098f46c7ed4Sjmcneill pinctrl_ncts1_default: ncts1_default { 1099f46c7ed4Sjmcneill function = "NCTS1"; 1100f46c7ed4Sjmcneill groups = "NCTS1"; 1101f46c7ed4Sjmcneill }; 1102f46c7ed4Sjmcneill 1103f46c7ed4Sjmcneill pinctrl_ncts2_default: ncts2_default { 1104f46c7ed4Sjmcneill function = "NCTS2"; 1105f46c7ed4Sjmcneill groups = "NCTS2"; 1106f46c7ed4Sjmcneill }; 1107f46c7ed4Sjmcneill 1108f46c7ed4Sjmcneill pinctrl_ncts3_default: ncts3_default { 1109f46c7ed4Sjmcneill function = "NCTS3"; 1110f46c7ed4Sjmcneill groups = "NCTS3"; 1111f46c7ed4Sjmcneill }; 1112f46c7ed4Sjmcneill 1113f46c7ed4Sjmcneill pinctrl_ncts4_default: ncts4_default { 1114f46c7ed4Sjmcneill function = "NCTS4"; 1115f46c7ed4Sjmcneill groups = "NCTS4"; 1116f46c7ed4Sjmcneill }; 1117f46c7ed4Sjmcneill 1118f46c7ed4Sjmcneill pinctrl_ndcd1_default: ndcd1_default { 1119f46c7ed4Sjmcneill function = "NDCD1"; 1120f46c7ed4Sjmcneill groups = "NDCD1"; 1121f46c7ed4Sjmcneill }; 1122f46c7ed4Sjmcneill 1123f46c7ed4Sjmcneill pinctrl_ndcd2_default: ndcd2_default { 1124f46c7ed4Sjmcneill function = "NDCD2"; 1125f46c7ed4Sjmcneill groups = "NDCD2"; 1126f46c7ed4Sjmcneill }; 1127f46c7ed4Sjmcneill 1128f46c7ed4Sjmcneill pinctrl_ndcd3_default: ndcd3_default { 1129f46c7ed4Sjmcneill function = "NDCD3"; 1130f46c7ed4Sjmcneill groups = "NDCD3"; 1131f46c7ed4Sjmcneill }; 1132f46c7ed4Sjmcneill 1133f46c7ed4Sjmcneill pinctrl_ndcd4_default: ndcd4_default { 1134f46c7ed4Sjmcneill function = "NDCD4"; 1135f46c7ed4Sjmcneill groups = "NDCD4"; 1136f46c7ed4Sjmcneill }; 1137f46c7ed4Sjmcneill 1138f46c7ed4Sjmcneill pinctrl_ndsr1_default: ndsr1_default { 1139f46c7ed4Sjmcneill function = "NDSR1"; 1140f46c7ed4Sjmcneill groups = "NDSR1"; 1141f46c7ed4Sjmcneill }; 1142f46c7ed4Sjmcneill 1143f46c7ed4Sjmcneill pinctrl_ndsr2_default: ndsr2_default { 1144f46c7ed4Sjmcneill function = "NDSR2"; 1145f46c7ed4Sjmcneill groups = "NDSR2"; 1146f46c7ed4Sjmcneill }; 1147f46c7ed4Sjmcneill 1148f46c7ed4Sjmcneill pinctrl_ndsr3_default: ndsr3_default { 1149f46c7ed4Sjmcneill function = "NDSR3"; 1150f46c7ed4Sjmcneill groups = "NDSR3"; 1151f46c7ed4Sjmcneill }; 1152f46c7ed4Sjmcneill 1153f46c7ed4Sjmcneill pinctrl_ndsr4_default: ndsr4_default { 1154f46c7ed4Sjmcneill function = "NDSR4"; 1155f46c7ed4Sjmcneill groups = "NDSR4"; 1156f46c7ed4Sjmcneill }; 1157f46c7ed4Sjmcneill 1158f46c7ed4Sjmcneill pinctrl_ndtr1_default: ndtr1_default { 1159f46c7ed4Sjmcneill function = "NDTR1"; 1160f46c7ed4Sjmcneill groups = "NDTR1"; 1161f46c7ed4Sjmcneill }; 1162f46c7ed4Sjmcneill 1163f46c7ed4Sjmcneill pinctrl_ndtr2_default: ndtr2_default { 1164f46c7ed4Sjmcneill function = "NDTR2"; 1165f46c7ed4Sjmcneill groups = "NDTR2"; 1166f46c7ed4Sjmcneill }; 1167f46c7ed4Sjmcneill 1168f46c7ed4Sjmcneill pinctrl_ndtr3_default: ndtr3_default { 1169f46c7ed4Sjmcneill function = "NDTR3"; 1170f46c7ed4Sjmcneill groups = "NDTR3"; 1171f46c7ed4Sjmcneill }; 1172f46c7ed4Sjmcneill 1173f46c7ed4Sjmcneill pinctrl_ndtr4_default: ndtr4_default { 1174f46c7ed4Sjmcneill function = "NDTR4"; 1175f46c7ed4Sjmcneill groups = "NDTR4"; 1176f46c7ed4Sjmcneill }; 1177f46c7ed4Sjmcneill 1178f46c7ed4Sjmcneill pinctrl_nri1_default: nri1_default { 1179f46c7ed4Sjmcneill function = "NRI1"; 1180f46c7ed4Sjmcneill groups = "NRI1"; 1181f46c7ed4Sjmcneill }; 1182f46c7ed4Sjmcneill 1183f46c7ed4Sjmcneill pinctrl_nri2_default: nri2_default { 1184f46c7ed4Sjmcneill function = "NRI2"; 1185f46c7ed4Sjmcneill groups = "NRI2"; 1186f46c7ed4Sjmcneill }; 1187f46c7ed4Sjmcneill 1188f46c7ed4Sjmcneill pinctrl_nri3_default: nri3_default { 1189f46c7ed4Sjmcneill function = "NRI3"; 1190f46c7ed4Sjmcneill groups = "NRI3"; 1191f46c7ed4Sjmcneill }; 1192f46c7ed4Sjmcneill 1193f46c7ed4Sjmcneill pinctrl_nri4_default: nri4_default { 1194f46c7ed4Sjmcneill function = "NRI4"; 1195f46c7ed4Sjmcneill groups = "NRI4"; 1196f46c7ed4Sjmcneill }; 1197f46c7ed4Sjmcneill 1198f46c7ed4Sjmcneill pinctrl_nrts1_default: nrts1_default { 1199f46c7ed4Sjmcneill function = "NRTS1"; 1200f46c7ed4Sjmcneill groups = "NRTS1"; 1201f46c7ed4Sjmcneill }; 1202f46c7ed4Sjmcneill 1203f46c7ed4Sjmcneill pinctrl_nrts2_default: nrts2_default { 1204f46c7ed4Sjmcneill function = "NRTS2"; 1205f46c7ed4Sjmcneill groups = "NRTS2"; 1206f46c7ed4Sjmcneill }; 1207f46c7ed4Sjmcneill 1208f46c7ed4Sjmcneill pinctrl_nrts3_default: nrts3_default { 1209f46c7ed4Sjmcneill function = "NRTS3"; 1210f46c7ed4Sjmcneill groups = "NRTS3"; 1211f46c7ed4Sjmcneill }; 1212f46c7ed4Sjmcneill 1213f46c7ed4Sjmcneill pinctrl_nrts4_default: nrts4_default { 1214f46c7ed4Sjmcneill function = "NRTS4"; 1215f46c7ed4Sjmcneill groups = "NRTS4"; 1216f46c7ed4Sjmcneill }; 1217f46c7ed4Sjmcneill 1218f46c7ed4Sjmcneill pinctrl_oscclk_default: oscclk_default { 1219f46c7ed4Sjmcneill function = "OSCCLK"; 1220f46c7ed4Sjmcneill groups = "OSCCLK"; 1221f46c7ed4Sjmcneill }; 1222f46c7ed4Sjmcneill 1223f46c7ed4Sjmcneill pinctrl_pewake_default: pewake_default { 1224f46c7ed4Sjmcneill function = "PEWAKE"; 1225f46c7ed4Sjmcneill groups = "PEWAKE"; 1226f46c7ed4Sjmcneill }; 1227f46c7ed4Sjmcneill 1228f46c7ed4Sjmcneill pinctrl_pnor_default: pnor_default { 1229f46c7ed4Sjmcneill function = "PNOR"; 1230f46c7ed4Sjmcneill groups = "PNOR"; 1231f46c7ed4Sjmcneill }; 1232f46c7ed4Sjmcneill 1233f46c7ed4Sjmcneill pinctrl_pwm0_default: pwm0_default { 1234f46c7ed4Sjmcneill function = "PWM0"; 1235f46c7ed4Sjmcneill groups = "PWM0"; 1236f46c7ed4Sjmcneill }; 1237f46c7ed4Sjmcneill 1238f46c7ed4Sjmcneill pinctrl_pwm1_default: pwm1_default { 1239f46c7ed4Sjmcneill function = "PWM1"; 1240f46c7ed4Sjmcneill groups = "PWM1"; 1241f46c7ed4Sjmcneill }; 1242f46c7ed4Sjmcneill 1243f46c7ed4Sjmcneill pinctrl_pwm2_default: pwm2_default { 1244f46c7ed4Sjmcneill function = "PWM2"; 1245f46c7ed4Sjmcneill groups = "PWM2"; 1246f46c7ed4Sjmcneill }; 1247f46c7ed4Sjmcneill 1248f46c7ed4Sjmcneill pinctrl_pwm3_default: pwm3_default { 1249f46c7ed4Sjmcneill function = "PWM3"; 1250f46c7ed4Sjmcneill groups = "PWM3"; 1251f46c7ed4Sjmcneill }; 1252f46c7ed4Sjmcneill 1253f46c7ed4Sjmcneill pinctrl_pwm4_default: pwm4_default { 1254f46c7ed4Sjmcneill function = "PWM4"; 1255f46c7ed4Sjmcneill groups = "PWM4"; 1256f46c7ed4Sjmcneill }; 1257f46c7ed4Sjmcneill 1258f46c7ed4Sjmcneill pinctrl_pwm5_default: pwm5_default { 1259f46c7ed4Sjmcneill function = "PWM5"; 1260f46c7ed4Sjmcneill groups = "PWM5"; 1261f46c7ed4Sjmcneill }; 1262f46c7ed4Sjmcneill 1263f46c7ed4Sjmcneill pinctrl_pwm6_default: pwm6_default { 1264f46c7ed4Sjmcneill function = "PWM6"; 1265f46c7ed4Sjmcneill groups = "PWM6"; 1266f46c7ed4Sjmcneill }; 1267f46c7ed4Sjmcneill 1268f46c7ed4Sjmcneill pinctrl_pwm7_default: pwm7_default { 1269f46c7ed4Sjmcneill function = "PWM7"; 1270f46c7ed4Sjmcneill groups = "PWM7"; 1271f46c7ed4Sjmcneill }; 1272f46c7ed4Sjmcneill 1273f46c7ed4Sjmcneill pinctrl_rgmii1_default: rgmii1_default { 1274f46c7ed4Sjmcneill function = "RGMII1"; 1275f46c7ed4Sjmcneill groups = "RGMII1"; 1276f46c7ed4Sjmcneill }; 1277f46c7ed4Sjmcneill 1278f46c7ed4Sjmcneill pinctrl_rgmii2_default: rgmii2_default { 1279f46c7ed4Sjmcneill function = "RGMII2"; 1280f46c7ed4Sjmcneill groups = "RGMII2"; 1281f46c7ed4Sjmcneill }; 1282f46c7ed4Sjmcneill 1283f46c7ed4Sjmcneill pinctrl_rmii1_default: rmii1_default { 1284f46c7ed4Sjmcneill function = "RMII1"; 1285f46c7ed4Sjmcneill groups = "RMII1"; 1286f46c7ed4Sjmcneill }; 1287f46c7ed4Sjmcneill 1288f46c7ed4Sjmcneill pinctrl_rmii2_default: rmii2_default { 1289f46c7ed4Sjmcneill function = "RMII2"; 1290f46c7ed4Sjmcneill groups = "RMII2"; 1291f46c7ed4Sjmcneill }; 1292f46c7ed4Sjmcneill 1293f46c7ed4Sjmcneill pinctrl_rxd1_default: rxd1_default { 1294f46c7ed4Sjmcneill function = "RXD1"; 1295f46c7ed4Sjmcneill groups = "RXD1"; 1296f46c7ed4Sjmcneill }; 1297f46c7ed4Sjmcneill 1298f46c7ed4Sjmcneill pinctrl_rxd2_default: rxd2_default { 1299f46c7ed4Sjmcneill function = "RXD2"; 1300f46c7ed4Sjmcneill groups = "RXD2"; 1301f46c7ed4Sjmcneill }; 1302f46c7ed4Sjmcneill 1303f46c7ed4Sjmcneill pinctrl_rxd3_default: rxd3_default { 1304f46c7ed4Sjmcneill function = "RXD3"; 1305f46c7ed4Sjmcneill groups = "RXD3"; 1306f46c7ed4Sjmcneill }; 1307f46c7ed4Sjmcneill 1308f46c7ed4Sjmcneill pinctrl_rxd4_default: rxd4_default { 1309f46c7ed4Sjmcneill function = "RXD4"; 1310f46c7ed4Sjmcneill groups = "RXD4"; 1311f46c7ed4Sjmcneill }; 1312f46c7ed4Sjmcneill 1313f46c7ed4Sjmcneill pinctrl_salt1_default: salt1_default { 1314f46c7ed4Sjmcneill function = "SALT1"; 1315f46c7ed4Sjmcneill groups = "SALT1"; 1316f46c7ed4Sjmcneill }; 1317f46c7ed4Sjmcneill 1318f46c7ed4Sjmcneill pinctrl_salt10_default: salt10_default { 1319f46c7ed4Sjmcneill function = "SALT10"; 1320f46c7ed4Sjmcneill groups = "SALT10"; 1321f46c7ed4Sjmcneill }; 1322f46c7ed4Sjmcneill 1323f46c7ed4Sjmcneill pinctrl_salt11_default: salt11_default { 1324f46c7ed4Sjmcneill function = "SALT11"; 1325f46c7ed4Sjmcneill groups = "SALT11"; 1326f46c7ed4Sjmcneill }; 1327f46c7ed4Sjmcneill 1328f46c7ed4Sjmcneill pinctrl_salt12_default: salt12_default { 1329f46c7ed4Sjmcneill function = "SALT12"; 1330f46c7ed4Sjmcneill groups = "SALT12"; 1331f46c7ed4Sjmcneill }; 1332f46c7ed4Sjmcneill 1333f46c7ed4Sjmcneill pinctrl_salt13_default: salt13_default { 1334f46c7ed4Sjmcneill function = "SALT13"; 1335f46c7ed4Sjmcneill groups = "SALT13"; 1336f46c7ed4Sjmcneill }; 1337f46c7ed4Sjmcneill 1338f46c7ed4Sjmcneill pinctrl_salt14_default: salt14_default { 1339f46c7ed4Sjmcneill function = "SALT14"; 1340f46c7ed4Sjmcneill groups = "SALT14"; 1341f46c7ed4Sjmcneill }; 1342f46c7ed4Sjmcneill 1343f46c7ed4Sjmcneill pinctrl_salt2_default: salt2_default { 1344f46c7ed4Sjmcneill function = "SALT2"; 1345f46c7ed4Sjmcneill groups = "SALT2"; 1346f46c7ed4Sjmcneill }; 1347f46c7ed4Sjmcneill 1348f46c7ed4Sjmcneill pinctrl_salt3_default: salt3_default { 1349f46c7ed4Sjmcneill function = "SALT3"; 1350f46c7ed4Sjmcneill groups = "SALT3"; 1351f46c7ed4Sjmcneill }; 1352f46c7ed4Sjmcneill 1353f46c7ed4Sjmcneill pinctrl_salt4_default: salt4_default { 1354f46c7ed4Sjmcneill function = "SALT4"; 1355f46c7ed4Sjmcneill groups = "SALT4"; 1356f46c7ed4Sjmcneill }; 1357f46c7ed4Sjmcneill 1358f46c7ed4Sjmcneill pinctrl_salt5_default: salt5_default { 1359f46c7ed4Sjmcneill function = "SALT5"; 1360f46c7ed4Sjmcneill groups = "SALT5"; 1361f46c7ed4Sjmcneill }; 1362f46c7ed4Sjmcneill 1363f46c7ed4Sjmcneill pinctrl_salt6_default: salt6_default { 1364f46c7ed4Sjmcneill function = "SALT6"; 1365f46c7ed4Sjmcneill groups = "SALT6"; 1366f46c7ed4Sjmcneill }; 1367f46c7ed4Sjmcneill 1368f46c7ed4Sjmcneill pinctrl_salt7_default: salt7_default { 1369f46c7ed4Sjmcneill function = "SALT7"; 1370f46c7ed4Sjmcneill groups = "SALT7"; 1371f46c7ed4Sjmcneill }; 1372f46c7ed4Sjmcneill 1373f46c7ed4Sjmcneill pinctrl_salt8_default: salt8_default { 1374f46c7ed4Sjmcneill function = "SALT8"; 1375f46c7ed4Sjmcneill groups = "SALT8"; 1376f46c7ed4Sjmcneill }; 1377f46c7ed4Sjmcneill 1378f46c7ed4Sjmcneill pinctrl_salt9_default: salt9_default { 1379f46c7ed4Sjmcneill function = "SALT9"; 1380f46c7ed4Sjmcneill groups = "SALT9"; 1381f46c7ed4Sjmcneill }; 1382f46c7ed4Sjmcneill 1383f46c7ed4Sjmcneill pinctrl_scl1_default: scl1_default { 1384f46c7ed4Sjmcneill function = "SCL1"; 1385f46c7ed4Sjmcneill groups = "SCL1"; 1386f46c7ed4Sjmcneill }; 1387f46c7ed4Sjmcneill 1388f46c7ed4Sjmcneill pinctrl_scl2_default: scl2_default { 1389f46c7ed4Sjmcneill function = "SCL2"; 1390f46c7ed4Sjmcneill groups = "SCL2"; 1391f46c7ed4Sjmcneill }; 1392f46c7ed4Sjmcneill 1393f46c7ed4Sjmcneill pinctrl_sd1_default: sd1_default { 1394f46c7ed4Sjmcneill function = "SD1"; 1395f46c7ed4Sjmcneill groups = "SD1"; 1396f46c7ed4Sjmcneill }; 1397f46c7ed4Sjmcneill 1398f46c7ed4Sjmcneill pinctrl_sd2_default: sd2_default { 1399f46c7ed4Sjmcneill function = "SD2"; 1400f46c7ed4Sjmcneill groups = "SD2"; 1401f46c7ed4Sjmcneill }; 1402f46c7ed4Sjmcneill 1403f46c7ed4Sjmcneill pinctrl_sda1_default: sda1_default { 1404f46c7ed4Sjmcneill function = "SDA1"; 1405f46c7ed4Sjmcneill groups = "SDA1"; 1406f46c7ed4Sjmcneill }; 1407f46c7ed4Sjmcneill 1408f46c7ed4Sjmcneill pinctrl_sda2_default: sda2_default { 1409f46c7ed4Sjmcneill function = "SDA2"; 1410f46c7ed4Sjmcneill groups = "SDA2"; 1411f46c7ed4Sjmcneill }; 1412f46c7ed4Sjmcneill 141309fa6529Sskrll pinctrl_sgpm_default: sgpm_default { 141409fa6529Sskrll function = "SGPM"; 141509fa6529Sskrll groups = "SGPM"; 141609fa6529Sskrll }; 141709fa6529Sskrll 1418f46c7ed4Sjmcneill pinctrl_sgps1_default: sgps1_default { 1419f46c7ed4Sjmcneill function = "SGPS1"; 1420f46c7ed4Sjmcneill groups = "SGPS1"; 1421f46c7ed4Sjmcneill }; 1422f46c7ed4Sjmcneill 1423f46c7ed4Sjmcneill pinctrl_sgps2_default: sgps2_default { 1424f46c7ed4Sjmcneill function = "SGPS2"; 1425f46c7ed4Sjmcneill groups = "SGPS2"; 1426f46c7ed4Sjmcneill }; 1427f46c7ed4Sjmcneill 1428f46c7ed4Sjmcneill pinctrl_sioonctrl_default: sioonctrl_default { 1429f46c7ed4Sjmcneill function = "SIOONCTRL"; 1430f46c7ed4Sjmcneill groups = "SIOONCTRL"; 1431f46c7ed4Sjmcneill }; 1432f46c7ed4Sjmcneill 1433f46c7ed4Sjmcneill pinctrl_siopbi_default: siopbi_default { 1434f46c7ed4Sjmcneill function = "SIOPBI"; 1435f46c7ed4Sjmcneill groups = "SIOPBI"; 1436f46c7ed4Sjmcneill }; 1437f46c7ed4Sjmcneill 1438f46c7ed4Sjmcneill pinctrl_siopbo_default: siopbo_default { 1439f46c7ed4Sjmcneill function = "SIOPBO"; 1440f46c7ed4Sjmcneill groups = "SIOPBO"; 1441f46c7ed4Sjmcneill }; 1442f46c7ed4Sjmcneill 1443f46c7ed4Sjmcneill pinctrl_siopwreq_default: siopwreq_default { 1444f46c7ed4Sjmcneill function = "SIOPWREQ"; 1445f46c7ed4Sjmcneill groups = "SIOPWREQ"; 1446f46c7ed4Sjmcneill }; 1447f46c7ed4Sjmcneill 1448f46c7ed4Sjmcneill pinctrl_siopwrgd_default: siopwrgd_default { 1449f46c7ed4Sjmcneill function = "SIOPWRGD"; 1450f46c7ed4Sjmcneill groups = "SIOPWRGD"; 1451f46c7ed4Sjmcneill }; 1452f46c7ed4Sjmcneill 1453f46c7ed4Sjmcneill pinctrl_sios3_default: sios3_default { 1454f46c7ed4Sjmcneill function = "SIOS3"; 1455f46c7ed4Sjmcneill groups = "SIOS3"; 1456f46c7ed4Sjmcneill }; 1457f46c7ed4Sjmcneill 1458f46c7ed4Sjmcneill pinctrl_sios5_default: sios5_default { 1459f46c7ed4Sjmcneill function = "SIOS5"; 1460f46c7ed4Sjmcneill groups = "SIOS5"; 1461f46c7ed4Sjmcneill }; 1462f46c7ed4Sjmcneill 1463f46c7ed4Sjmcneill pinctrl_siosci_default: siosci_default { 1464f46c7ed4Sjmcneill function = "SIOSCI"; 1465f46c7ed4Sjmcneill groups = "SIOSCI"; 1466f46c7ed4Sjmcneill }; 1467f46c7ed4Sjmcneill 1468f46c7ed4Sjmcneill pinctrl_spi1_default: spi1_default { 1469f46c7ed4Sjmcneill function = "SPI1"; 1470f46c7ed4Sjmcneill groups = "SPI1"; 1471f46c7ed4Sjmcneill }; 1472f46c7ed4Sjmcneill 1473f46c7ed4Sjmcneill pinctrl_spi1cs1_default: spi1cs1_default { 1474f46c7ed4Sjmcneill function = "SPI1CS1"; 1475f46c7ed4Sjmcneill groups = "SPI1CS1"; 1476f46c7ed4Sjmcneill }; 1477f46c7ed4Sjmcneill 1478f46c7ed4Sjmcneill pinctrl_spi1debug_default: spi1debug_default { 1479f46c7ed4Sjmcneill function = "SPI1DEBUG"; 1480f46c7ed4Sjmcneill groups = "SPI1DEBUG"; 1481f46c7ed4Sjmcneill }; 1482f46c7ed4Sjmcneill 1483f46c7ed4Sjmcneill pinctrl_spi1passthru_default: spi1passthru_default { 1484f46c7ed4Sjmcneill function = "SPI1PASSTHRU"; 1485f46c7ed4Sjmcneill groups = "SPI1PASSTHRU"; 1486f46c7ed4Sjmcneill }; 1487f46c7ed4Sjmcneill 1488f46c7ed4Sjmcneill pinctrl_spi2ck_default: spi2ck_default { 1489f46c7ed4Sjmcneill function = "SPI2CK"; 1490f46c7ed4Sjmcneill groups = "SPI2CK"; 1491f46c7ed4Sjmcneill }; 1492f46c7ed4Sjmcneill 1493f46c7ed4Sjmcneill pinctrl_spi2cs0_default: spi2cs0_default { 1494f46c7ed4Sjmcneill function = "SPI2CS0"; 1495f46c7ed4Sjmcneill groups = "SPI2CS0"; 1496f46c7ed4Sjmcneill }; 1497f46c7ed4Sjmcneill 1498f46c7ed4Sjmcneill pinctrl_spi2cs1_default: spi2cs1_default { 1499f46c7ed4Sjmcneill function = "SPI2CS1"; 1500f46c7ed4Sjmcneill groups = "SPI2CS1"; 1501f46c7ed4Sjmcneill }; 1502f46c7ed4Sjmcneill 1503f46c7ed4Sjmcneill pinctrl_spi2miso_default: spi2miso_default { 1504f46c7ed4Sjmcneill function = "SPI2MISO"; 1505f46c7ed4Sjmcneill groups = "SPI2MISO"; 1506f46c7ed4Sjmcneill }; 1507f46c7ed4Sjmcneill 1508f46c7ed4Sjmcneill pinctrl_spi2mosi_default: spi2mosi_default { 1509f46c7ed4Sjmcneill function = "SPI2MOSI"; 1510f46c7ed4Sjmcneill groups = "SPI2MOSI"; 1511f46c7ed4Sjmcneill }; 1512f46c7ed4Sjmcneill 1513f46c7ed4Sjmcneill pinctrl_timer3_default: timer3_default { 1514f46c7ed4Sjmcneill function = "TIMER3"; 1515f46c7ed4Sjmcneill groups = "TIMER3"; 1516f46c7ed4Sjmcneill }; 1517f46c7ed4Sjmcneill 1518f46c7ed4Sjmcneill pinctrl_timer4_default: timer4_default { 1519f46c7ed4Sjmcneill function = "TIMER4"; 1520f46c7ed4Sjmcneill groups = "TIMER4"; 1521f46c7ed4Sjmcneill }; 1522f46c7ed4Sjmcneill 1523f46c7ed4Sjmcneill pinctrl_timer5_default: timer5_default { 1524f46c7ed4Sjmcneill function = "TIMER5"; 1525f46c7ed4Sjmcneill groups = "TIMER5"; 1526f46c7ed4Sjmcneill }; 1527f46c7ed4Sjmcneill 1528f46c7ed4Sjmcneill pinctrl_timer6_default: timer6_default { 1529f46c7ed4Sjmcneill function = "TIMER6"; 1530f46c7ed4Sjmcneill groups = "TIMER6"; 1531f46c7ed4Sjmcneill }; 1532f46c7ed4Sjmcneill 1533f46c7ed4Sjmcneill pinctrl_timer7_default: timer7_default { 1534f46c7ed4Sjmcneill function = "TIMER7"; 1535f46c7ed4Sjmcneill groups = "TIMER7"; 1536f46c7ed4Sjmcneill }; 1537f46c7ed4Sjmcneill 1538f46c7ed4Sjmcneill pinctrl_timer8_default: timer8_default { 1539f46c7ed4Sjmcneill function = "TIMER8"; 1540f46c7ed4Sjmcneill groups = "TIMER8"; 1541f46c7ed4Sjmcneill }; 1542f46c7ed4Sjmcneill 1543f46c7ed4Sjmcneill pinctrl_txd1_default: txd1_default { 1544f46c7ed4Sjmcneill function = "TXD1"; 1545f46c7ed4Sjmcneill groups = "TXD1"; 1546f46c7ed4Sjmcneill }; 1547f46c7ed4Sjmcneill 1548f46c7ed4Sjmcneill pinctrl_txd2_default: txd2_default { 1549f46c7ed4Sjmcneill function = "TXD2"; 1550f46c7ed4Sjmcneill groups = "TXD2"; 1551f46c7ed4Sjmcneill }; 1552f46c7ed4Sjmcneill 1553f46c7ed4Sjmcneill pinctrl_txd3_default: txd3_default { 1554f46c7ed4Sjmcneill function = "TXD3"; 1555f46c7ed4Sjmcneill groups = "TXD3"; 1556f46c7ed4Sjmcneill }; 1557f46c7ed4Sjmcneill 1558f46c7ed4Sjmcneill pinctrl_txd4_default: txd4_default { 1559f46c7ed4Sjmcneill function = "TXD4"; 1560f46c7ed4Sjmcneill groups = "TXD4"; 1561f46c7ed4Sjmcneill }; 1562f46c7ed4Sjmcneill 1563f46c7ed4Sjmcneill pinctrl_uart6_default: uart6_default { 1564f46c7ed4Sjmcneill function = "UART6"; 1565f46c7ed4Sjmcneill groups = "UART6"; 1566f46c7ed4Sjmcneill }; 1567f46c7ed4Sjmcneill 1568f46c7ed4Sjmcneill pinctrl_usbcki_default: usbcki_default { 1569f46c7ed4Sjmcneill function = "USBCKI"; 1570f46c7ed4Sjmcneill groups = "USBCKI"; 1571f46c7ed4Sjmcneill }; 1572f46c7ed4Sjmcneill 1573a27cda6cSjmcneill pinctrl_usb2ah_default: usb2ah_default { 1574a27cda6cSjmcneill function = "USB2AH"; 1575a27cda6cSjmcneill groups = "USB2AH"; 1576a27cda6cSjmcneill }; 1577a27cda6cSjmcneill 1578182157ecSjmcneill pinctrl_usb2ad_default: usb2ad_default { 1579182157ecSjmcneill function = "USB2AD"; 1580182157ecSjmcneill groups = "USB2AD"; 1581182157ecSjmcneill }; 1582182157ecSjmcneill 1583a27cda6cSjmcneill pinctrl_usb11bhid_default: usb11bhid_default { 1584a27cda6cSjmcneill function = "USB11BHID"; 1585a27cda6cSjmcneill groups = "USB11BHID"; 1586a27cda6cSjmcneill }; 1587a27cda6cSjmcneill 1588a27cda6cSjmcneill pinctrl_usb2bh_default: usb2bh_default { 1589a27cda6cSjmcneill function = "USB2BH"; 1590a27cda6cSjmcneill groups = "USB2BH"; 1591a27cda6cSjmcneill }; 1592a27cda6cSjmcneill 1593f46c7ed4Sjmcneill pinctrl_vgabiosrom_default: vgabiosrom_default { 1594f46c7ed4Sjmcneill function = "VGABIOSROM"; 1595f46c7ed4Sjmcneill groups = "VGABIOSROM"; 1596f46c7ed4Sjmcneill }; 1597f46c7ed4Sjmcneill 1598f46c7ed4Sjmcneill pinctrl_vgahs_default: vgahs_default { 1599f46c7ed4Sjmcneill function = "VGAHS"; 1600f46c7ed4Sjmcneill groups = "VGAHS"; 1601f46c7ed4Sjmcneill }; 1602f46c7ed4Sjmcneill 1603f46c7ed4Sjmcneill pinctrl_vgavs_default: vgavs_default { 1604f46c7ed4Sjmcneill function = "VGAVS"; 1605f46c7ed4Sjmcneill groups = "VGAVS"; 1606f46c7ed4Sjmcneill }; 1607f46c7ed4Sjmcneill 1608f46c7ed4Sjmcneill pinctrl_vpi24_default: vpi24_default { 1609f46c7ed4Sjmcneill function = "VPI24"; 1610f46c7ed4Sjmcneill groups = "VPI24"; 1611f46c7ed4Sjmcneill }; 1612f46c7ed4Sjmcneill 1613f46c7ed4Sjmcneill pinctrl_vpo_default: vpo_default { 1614f46c7ed4Sjmcneill function = "VPO"; 1615f46c7ed4Sjmcneill groups = "VPO"; 1616f46c7ed4Sjmcneill }; 1617f46c7ed4Sjmcneill 1618f46c7ed4Sjmcneill pinctrl_wdtrst1_default: wdtrst1_default { 1619f46c7ed4Sjmcneill function = "WDTRST1"; 1620f46c7ed4Sjmcneill groups = "WDTRST1"; 1621f46c7ed4Sjmcneill }; 1622f46c7ed4Sjmcneill 1623f46c7ed4Sjmcneill pinctrl_wdtrst2_default: wdtrst2_default { 1624f46c7ed4Sjmcneill function = "WDTRST2"; 1625f46c7ed4Sjmcneill groups = "WDTRST2"; 1626f46c7ed4Sjmcneill }; 1627f46c7ed4Sjmcneill}; 1628