1a27cda6cSjmcneill// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2a27cda6cSjmcneill/*
3a27cda6cSjmcneill * Copyright (c) 2017 Martin Blumenstingl <martin.blumenstingl@googlemail.com>.
4a27cda6cSjmcneill */
5a27cda6cSjmcneill
6a27cda6cSjmcneill#include "meson8.dtsi"
7a27cda6cSjmcneill
8a27cda6cSjmcneill/ {
9a27cda6cSjmcneill	model = "Amlogic Meson8m2 SoC";
10a27cda6cSjmcneill	compatible = "amlogic,meson8m2";
11a27cda6cSjmcneill}; /* end of / */
12a27cda6cSjmcneill
13a27cda6cSjmcneill&clkc {
14a27cda6cSjmcneill	compatible = "amlogic,meson8m2-clkc", "amlogic,meson8-clkc";
15a27cda6cSjmcneill};
16a27cda6cSjmcneill
1709fa6529Sskrll&dmcbus {
1809fa6529Sskrll	/* the offset of the canvas registers has changed compared to Meson8 */
1909fa6529Sskrll	/delete-node/ video-lut@20;
2009fa6529Sskrll
2109fa6529Sskrll	canvas: video-lut@48 {
2209fa6529Sskrll		compatible = "amlogic,meson8m2-canvas", "amlogic,canvas";
2309fa6529Sskrll		reg = <0x48 0x14>;
2409fa6529Sskrll	};
2509fa6529Sskrll};
2609fa6529Sskrll
27a27cda6cSjmcneill&ethmac {
28a27cda6cSjmcneill	compatible = "amlogic,meson8m2-dwmac", "snps,dwmac";
29a27cda6cSjmcneill	reg = <0xc9410000 0x10000
30a27cda6cSjmcneill		0xc1108140 0x8>;
31a27cda6cSjmcneill	clocks = <&clkc CLKID_ETH>,
32a27cda6cSjmcneill		 <&clkc CLKID_MPLL2>,
33*9ed2a30eSjmcneill		 <&clkc CLKID_MPLL2>,
34*9ed2a30eSjmcneill		 <&clkc CLKID_FCLK_DIV2>;
35*9ed2a30eSjmcneill	clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
36a27cda6cSjmcneill	resets = <&reset RESET_ETHERNET>;
37a27cda6cSjmcneill	reset-names = "stmmaceth";
38a27cda6cSjmcneill};
39a27cda6cSjmcneill
40a27cda6cSjmcneill&pinctrl_aobus {
41a27cda6cSjmcneill	compatible = "amlogic,meson8m2-aobus-pinctrl",
42a27cda6cSjmcneill		     "amlogic,meson8-aobus-pinctrl";
43a27cda6cSjmcneill};
44a27cda6cSjmcneill
45a27cda6cSjmcneill&pinctrl_cbus {
46a27cda6cSjmcneill	compatible = "amlogic,meson8m2-cbus-pinctrl",
47a27cda6cSjmcneill		     "amlogic,meson8-cbus-pinctrl";
48a27cda6cSjmcneill
49a27cda6cSjmcneill	eth_rgmii_pins: ethernet {
50a27cda6cSjmcneill		mux {
51a27cda6cSjmcneill			groups = "eth_tx_clk_50m", "eth_tx_en",
52a27cda6cSjmcneill				 "eth_txd3", "eth_txd2",
53a27cda6cSjmcneill				 "eth_txd1", "eth_txd0",
54a27cda6cSjmcneill				 "eth_rx_clk_in", "eth_rx_dv",
55a27cda6cSjmcneill				 "eth_rxd3", "eth_rxd2",
56a27cda6cSjmcneill				 "eth_rxd1", "eth_rxd0",
57a27cda6cSjmcneill				 "eth_mdio", "eth_mdc";
58a27cda6cSjmcneill			function = "ethernet";
5984c8294dSjmcneill			bias-disable;
60a27cda6cSjmcneill		};
61a27cda6cSjmcneill	};
62a27cda6cSjmcneill};
63a27cda6cSjmcneill
64*9ed2a30eSjmcneill&pwrc {
65*9ed2a30eSjmcneill	compatible = "amlogic,meson8m2-pwrc";
66*9ed2a30eSjmcneill	resets = <&reset RESET_DBLK>,
67*9ed2a30eSjmcneill		 <&reset RESET_PIC_DC>,
68*9ed2a30eSjmcneill		 <&reset RESET_HDMI_APB>,
69*9ed2a30eSjmcneill		 <&reset RESET_HDMI_SYSTEM_RESET>,
70*9ed2a30eSjmcneill		 <&reset RESET_VENCI>,
71*9ed2a30eSjmcneill		 <&reset RESET_VENCP>,
72*9ed2a30eSjmcneill		 <&reset RESET_VDAC_4>,
73*9ed2a30eSjmcneill		 <&reset RESET_VENCL>,
74*9ed2a30eSjmcneill		 <&reset RESET_VIU>,
75*9ed2a30eSjmcneill		 <&reset RESET_VENC>,
76*9ed2a30eSjmcneill		 <&reset RESET_RDMA>;
77*9ed2a30eSjmcneill	reset-names = "dblk", "pic_dc", "hdmi_apb", "hdmi_system", "venci",
78*9ed2a30eSjmcneill		      "vencp", "vdac", "vencl", "viu", "venc", "rdma";
79*9ed2a30eSjmcneill	assigned-clocks = <&clkc CLKID_VPU>;
80*9ed2a30eSjmcneill	assigned-clock-rates = <364000000>;
81*9ed2a30eSjmcneill};
82*9ed2a30eSjmcneill
8384c8294dSjmcneill&saradc {
8484c8294dSjmcneill	compatible = "amlogic,meson8m2-saradc", "amlogic,meson-saradc";
8584c8294dSjmcneill};
8684c8294dSjmcneill
87*9ed2a30eSjmcneill&sdhc {
88*9ed2a30eSjmcneill	compatible = "amlogic,meson8m2-sdhc", "amlogic,meson-mx-sdhc";
89*9ed2a30eSjmcneill};
90*9ed2a30eSjmcneill
91*9ed2a30eSjmcneill&usb0_phy {
92*9ed2a30eSjmcneill	compatible = "amlogic,meson8m2-usb2-phy", "amlogic,meson-mx-usb2-phy";
93*9ed2a30eSjmcneill};
94*9ed2a30eSjmcneill
95*9ed2a30eSjmcneill&usb1_phy {
96*9ed2a30eSjmcneill	compatible = "amlogic,meson8m2-usb2-phy", "amlogic,meson-mx-usb2-phy";
97*9ed2a30eSjmcneill};
98*9ed2a30eSjmcneill
99a27cda6cSjmcneill&wdt {
100a27cda6cSjmcneill	compatible = "amlogic,meson8m2-wdt", "amlogic,meson8b-wdt";
101a27cda6cSjmcneill};
102