xref: /netbsd/sys/lib/libkern/arch/ia64/modsi3.S (revision 6550d01e)
1.file "__modsi3.s"
2
3// $NetBSD: modsi3.S,v 1.2 2006/04/07 14:27:33 cherry Exp $
4
5//-
6// Copyright (c) 2000, Intel Corporation
7// All rights reserved.
8//
9// Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache,
10// Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab,
11// Intel Corporation.
12//
13// WARRANTY DISCLAIMER
14//
15// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
19// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
20// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
21// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
22// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
23// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
24// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
25// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26//
27// Intel Corporation is the author of this code, and requests that all
28// problem reports or change requests be submitted to it directly at
29// http://developer.intel.com/opensource.
30//
31
32.section .text
33
34// 32-bit signed integer remainder
35
36.proc __modsi3#
37.align 32
38.global __modsi3#
39.align 32
40
41__modsi3:
42
43{ .mii
44  alloc r31=ar.pfs,2,0,0,0
45  nop.i 0
46  nop.i 0;;
47} { .mii
48  nop.m 0
49
50  // 32-BIT SIGNED INTEGER REMAINDER BEGINS HERE
51
52  // general register used:
53  //    r32 - 32-bit signed integer dividend
54  //    r33 - 32-bit signed integer divisor
55  //    r8 - 32-bit signed integer result
56  //    r2 - scratch register
57  // floating-point registers used: f6, f7, f8, f9, f10, f11
58  // predicate registers used: p6
59
60  sxt4 r32=r32
61  sxt4 r33=r33;;
62} { .mmb
63  setf.sig f11=r32
64  setf.sig f7=r33
65  nop.b 0;;
66} { .mfi
67  // get 2's complement of b
68  sub r33=r0,r33
69  fcvt.xf f6=f11
70  nop.i 0
71} { .mfi
72  nop.m 0
73  fcvt.xf f7=f7
74  mov r2 = 0x0ffdd;;
75} { .mfi
76  setf.exp f9 = r2
77  // (1) y0
78  frcpa.s1 f8,p6=f6,f7
79  nop.i 0;;
80} { .mfi
81  nop.m 0
82  // (2) q0 = a * y0
83  (p6) fma.s1 f10=f6,f8,f0
84  nop.i 0
85} { .mfi
86  nop.m 0
87  // (3) e0 = 1 - b * y0
88  (p6) fnma.s1 f8=f7,f8,f1
89  nop.i 0;;
90} { .mfi
91  // 2's complement of b
92  setf.sig f7=r33
93  // (4) q1 = q0 + e0 * q0
94  (p6) fma.s1 f10=f8,f10,f10
95  nop.i 0
96} { .mfi
97  nop.m 0
98  // (5) e1 = e0 * e0 + 2^-34
99  (p6) fma.s1 f8=f8,f8,f9
100  nop.i 0;;
101} { .mfi
102  nop.m 0
103  // (6) q2 = q1 + e1 * q1
104  (p6) fma.s1 f8=f8,f10,f10
105  nop.i 0;;
106} { .mfi
107  nop.m 0
108  // (7) q = trunc(q2)
109  fcvt.fx.trunc.s1 f8=f8
110  nop.i 0;;
111} { .mfi
112  nop.m 0
113  // (8) r = a + (-b) * q
114  xma.l f8=f8,f7,f11
115  nop.i 0;;
116}  { .mmi
117  // remainder will be in the least significant 32 bits of r8 (if b != 0)
118  getf.sig r8=f8
119  nop.m 0
120  nop.i 0;;
121}
122
123  // 32-BIT SIGNED INTEGER REMAINDER ENDS HERE
124
125{ .mmb
126  nop.m 0
127  nop.m 0
128  br.ret.sptk b0;;
129}
130
131.endp __modsi3
132