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22 *******************************************************************************/
23 
24 #include "uvm_hal.h"
25 #include "uvm_gpu.h"
26 #include "uvm_mem.h"
27 
28 void uvm_hal_maxwell_arch_init_properties(uvm_parent_gpu_t *parent_gpu)
29 {
30     parent_gpu->tlb_batch.va_invalidate_supported = false;
31 
32     // 128 GB should be enough for all current RM allocations and leaves enough
33     // space for UVM internal mappings.
34     // A single top level PDE covers 64 or 128 MB on Maxwell so 128 GB is fine to use.
35     parent_gpu->rm_va_base = 0;
36     parent_gpu->rm_va_size = 128 * UVM_SIZE_1GB;
37 
38     parent_gpu->uvm_mem_va_base = 768 * UVM_SIZE_1GB;
39     parent_gpu->uvm_mem_va_size = UVM_MEM_VA_SIZE;
40 
41     parent_gpu->ce_phys_vidmem_write_supported = true;
42 
43     // We don't have a compelling use case in UVM-Lite for direct peer
44     // migrations between GPUs, so don't bother setting them up.
45     parent_gpu->peer_copy_mode = UVM_GPU_PEER_COPY_MODE_UNSUPPORTED;
46 
47     parent_gpu->max_channel_va = 1ULL << 40;
48 
49     parent_gpu->max_host_va = 1ULL << 40;
50 
51     // Maxwell can only map sysmem with 4K pages
52     parent_gpu->can_map_sysmem_with_large_pages = false;
53 
54     // Maxwell cannot place GPFIFO in vidmem
55     parent_gpu->gpfifo_in_vidmem_supported = false;
56 
57     parent_gpu->replayable_faults_supported = false;
58 
59     parent_gpu->non_replayable_faults_supported = false;
60 
61     parent_gpu->access_counters_supported = false;
62 
63     parent_gpu->fault_cancel_va_supported = false;
64 
65     parent_gpu->scoped_atomics_supported = false;
66 
67     parent_gpu->sparse_mappings_supported = false;
68 
69     parent_gpu->map_remap_larger_page_promotion = false;
70 
71     parent_gpu->smc.supported = false;
72 
73     parent_gpu->plc_supported = false;
74 }
75