1 /* 2 * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. 3 * SPDX-License-Identifier: MIT 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 */ 23 24 #ifndef NVLINK_INBAND_MSG_HDR_H 25 #define NVLINK_INBAND_MSG_HDR_H 26 27 /* 28 * Messages do not have individual versioning, instead a strict ABI is maintained. When a change is 29 * required on existing message, instead of modifying corresponding message structure, a completely 30 * new message type (like INBAND_MSG_TYPE_XXX_V1, INBAND_MSG_TYPE_XXX_V2) and corresponding message 31 * definition structure needs to be added. Do not modify existing structs in any way. 32 * 33 * Messages may contain fields which are debug only and must be used for logging purpose. Such 34 * fields shouldn't be trusted. 35 * 36 * - Avoid use of enums or bitfields. Always use fixed types. 37 * - Avoid conditional fields in the structs. 38 * - Avoid nested and complex structs. Keep them simple and flat for ease of encoding and decoding. 39 * - Avoid embedded pointers. Flexible arrays at the end of the struct are allowed. 40 * - Always use the packed struct to typecast inband messages. More details: 41 * - Always have reserved flags or fields to CYA given the stable ABI conditions. 42 */ 43 44 /* Align to byte boundaries */ 45 #pragma pack(push, 1) 46 47 #include "nvtypes.h" 48 #include "nvmisc.h" 49 #include "nvCpuUuid.h" 50 #include "nvstatus.h" 51 #include "nvstatuscodes.h" 52 53 #define NVLINK_INBAND_MAX_MSG_SIZE 4096 54 #define NVLINK_INBAND_MSG_MAGIC_ID_FM 0xadbc 55 56 /* Nvlink Inband messages types */ 57 #define NVLINK_INBAND_MSG_TYPE_GPU_PROBE_REQ 0 58 #define NVLINK_INBAND_MSG_TYPE_GPU_PROBE_RSP 1 59 #define NVLINK_INBAND_MSG_TYPE_MC_TEAM_SETUP_REQ 2 60 #define NVLINK_INBAND_MSG_TYPE_MC_TEAM_SETUP_RSP 3 61 #define NVLINK_INBAND_MSG_TYPE_MC_TEAM_RELEASE_REQ 4 62 #define NVLINK_INBAND_MSG_TYPE_MAX 5 63 64 /* Nvlink Inband message packet header */ 65 typedef struct 66 { 67 NvU16 magicId; /* Identifier to represent in-band msg, will be NVLINK_INBAND_MSG_MAGIC_ID */ 68 NvU64 requestId; /* Unique Id for a request and response will carry same id */ 69 NV_STATUS status; /* High level status of the message/request */ 70 NvU16 type; /* Type of encoded message. One of NVLINK_INBAND_MSG_TYPE_xxx */ 71 NvU32 length; /* Length of encoded message */ 72 NvU8 reserved[8]; /* For future use. Must be initialized to zero */ 73 } nvlink_inband_msg_header_t; 74 75 #define NVLINK_INBAND_GPU_PROBE_CAPS_SRIOV_ENABLED NVBIT(0) 76 77 /* Add more caps as need in the future */ 78 79 #define NVLINK_INBAND_BW_MODE_FULL 0 80 #define NVLINK_INBAND_BW_MODE_OFF 1 81 #define NVLINK_INBAND_BW_MODE_MIN 2 82 #define NVLINK_INBAND_BW_MODE_HALF 3 83 #define NVLINK_INBAND_BW_MODE_3QUARTER 4 84 85 typedef struct 86 { 87 NvU64 pciInfo; /* Encoded as Domain(63:32):Bus(15:8):Device(0:7). (debug only) */ 88 NvU8 moduleId; /* GPIO based physical/module ID of the GPU. (debug only) */ 89 NvUuid gpuUuid; /* UUID of the GPU. (debug only) */ 90 NvU64 discoveredLinkMask; /* GPU's discovered NVLink mask info. (debug only) */ 91 NvU64 enabledLinkMask; /* GPU's currently enabled NvLink mask info. (debug only) */ 92 93 NvU32 gpuCapMask; /* GPU capabilities, one of NVLINK_INBAND_GPU_PROBE_CAPS */ 94 NvU8 bwMode; /* NVLink bandwidth mode, one of NVLINK_INBAND_BW_MODE */ 95 NvU8 reserved[31]; /* For future use. Must be initialized to zero */ 96 } nvlink_inband_gpu_probe_req_t; 97 98 typedef struct 99 { 100 nvlink_inband_msg_header_t msgHdr; 101 nvlink_inband_gpu_probe_req_t probeReq; 102 } nvlink_inband_gpu_probe_req_msg_t; 103 104 #define NVLINK_INBAND_FM_CAPS_MC_TEAM_SETUP_V1 NVBIT64(0) 105 #define NVLINK_INBAND_FM_CAPS_MC_TEAM_RELEASE_V1 NVBIT64(1) 106 #define NVLINK_INBAND_FM_CAPS_BW_MODE_MIN NVBIT64(2) 107 #define NVLINK_INBAND_FM_CAPS_BW_MODE_HALF NVBIT64(3) 108 #define NVLINK_INBAND_FM_CAPS_BW_MODE_3QUARTER NVBIT64(4) 109 110 typedef struct 111 { 112 NvU64 gpuHandle; /* Unique handle assigned by initialization entity for this GPU */ 113 NvU32 gfId; /* GFID which supports NVLink */ 114 NvU64 fmCaps; /* Capability of FM e.g. what features FM support. */ 115 NvUuid clusterUuid; /* Cluster UUID to which this node belongs */ 116 NvU16 fabricPartitionId; /* Partition ID if the GPU belongs to a fabric partition */ 117 NvU64 gpaAddress; /* GPA starting address for the GPU */ 118 NvU64 gpaAddressRange; /* GPU GPA address range */ 119 NvU64 flaAddress; /* FLA starting address for the GPU */ 120 NvU64 flaAddressRange; /* GPU FLA address range */ 121 NvU32 linkMaskToBeReduced; /* bit mask of unused NVLink ports for P2P */ 122 NvU8 reserved[28]; /* For future use. Must be initialized to zero */ 123 } nvlink_inband_gpu_probe_rsp_t; 124 125 typedef struct 126 { 127 nvlink_inband_msg_header_t msgHdr; 128 nvlink_inband_gpu_probe_rsp_t probeRsp; 129 } nvlink_inband_gpu_probe_rsp_msg_t; 130 131 typedef struct 132 { 133 NvU64 mcAllocSize; /* Multicast allocation size requested */ 134 NvU32 flags; /* For future use. Must be initialized to zero */ 135 NvU8 reserved[8]; /* For future use. Must be initialized to zero */ 136 NvU16 numGpuHandles; /* Number of GPUs in this team */ 137 NvU64 gpuHandles[]; /* Array of probed handles, should be last */ 138 } nvlink_inband_mc_team_setup_req_t; 139 140 typedef struct 141 { 142 nvlink_inband_msg_header_t msgHdr; 143 nvlink_inband_mc_team_setup_req_t mcTeamSetupReq; 144 } nvlink_inband_mc_team_setup_req_msg_t; 145 146 typedef struct 147 { 148 NvU64 mcTeamHandle; /* Unique handle assigned for this Multicast team */ 149 NvU32 flags; /* For future use. Must be initialized to zero */ 150 NvU8 reserved[8]; /* For future use. Must be initialized to zero */ 151 NvU64 mcAddressBase; /* FLA starting address assigned for the Multicast slot */ 152 NvU64 mcAddressSize; /* Size of FLA assigned to the Multicast slot */ 153 } nvlink_inband_mc_team_setup_rsp_t; 154 155 typedef struct 156 { 157 nvlink_inband_msg_header_t msgHdr; 158 nvlink_inband_mc_team_setup_rsp_t mcTeamSetupRsp; 159 } nvlink_inband_mc_team_setup_rsp_msg_t; 160 161 typedef struct 162 { 163 NvU64 mcTeamHandle; /* Unique handle assigned for the Multicast team */ 164 NvU32 flags; /* For future use. Must be initialized to zero */ 165 NvU8 reserved[8]; /* For future use. Must be initialized to zero */ 166 } nvlink_inband_mc_team_release_req_t; 167 168 typedef struct 169 { 170 nvlink_inband_msg_header_t msgHdr; 171 nvlink_inband_mc_team_release_req_t mcTeamReleaseReq; 172 } nvlink_inband_mc_team_release_req_msg_t; 173 174 #pragma pack(pop) 175 176 /* Don't add any code after this line */ 177 178 #endif 179