1 /* 2 * SPDX-FileCopyrightText: Copyright (c) 2017-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. 3 * SPDX-License-Identifier: MIT 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 */ 23 24 #ifndef _COMMON_NVSWITCH_H_ 25 #define _COMMON_NVSWITCH_H_ 26 27 #ifdef INCLUDE_NVLINK_LIB 28 #include "nvlink.h" 29 #endif 30 31 #include "export_nvswitch.h" 32 #include "error_nvswitch.h" 33 #include "io_nvswitch.h" 34 #include "rom_nvswitch.h" 35 #include "haldef_nvswitch.h" 36 #include "nvctassert.h" 37 #include "flcn/flcnable_nvswitch.h" 38 #include "inforom/inforom_nvswitch.h" 39 #include "spi_nvswitch.h" 40 #include "smbpbi_nvswitch.h" 41 #include "nvCpuUuid.h" 42 43 #define NVSWITCH_GET_BIT(v, p) (((v) >> (p)) & 1) 44 #define NVSWITCH_SET_BIT(v, p) ((v) | NVBIT(p)) 45 #define NVSWITCH_CLEAR_BIT(v, p) ((v) & ~NVBIT(p)) 46 #define NVSWITCH_MASK_BITS(n) (~(0xFFFFFFFF << (n))) 47 48 static NV_INLINE NvBool nvswitch_test_flags(NvU32 val, NvU32 flags) 49 { 50 return !!(val & flags); 51 } 52 53 static NV_INLINE void nvswitch_set_flags(NvU32 *val, NvU32 flags) 54 { 55 *val |= flags; 56 } 57 58 static NV_INLINE void nvswitch_clear_flags(NvU32 *val, NvU32 flags) 59 { 60 *val &= ~flags; 61 } 62 63 // Destructive operation to reverse bits in a mask 64 #define NVSWITCH_REVERSE_BITMASK_32(numBits, mask) \ 65 { \ 66 NvU32 i, reverse = 0; \ 67 FOR_EACH_INDEX_IN_MASK(32, i, mask) \ 68 { \ 69 reverse |= NVBIT((numBits - 1) - i); \ 70 } \ 71 FOR_EACH_INDEX_IN_MASK_END; \ 72 \ 73 mask = reverse; \ 74 } 75 76 #define NVSWITCH_CHECK_STATUS(_d, _status) \ 77 if (_status != NVL_SUCCESS) \ 78 { \ 79 NVSWITCH_PRINT(_d, MMIO, "%s(%d): status=%d\n", \ 80 __FUNCTION__, __LINE__, \ 81 _status); \ 82 } 83 84 #define IS_RTLSIM(device) (device->is_rtlsim) 85 #define IS_FMODEL(device) (device->is_fmodel) 86 #define IS_EMULATION(device) (device->is_emulation) 87 88 #define NVSWITCH_DEVICE_NAME "nvswitch" 89 #define NVSWITCH_LINK_NAME "link" 90 91 // Max size of sprintf("%d", valid_instance) compile time check 92 #if NVSWITCH_DEVICE_INSTANCE_MAX < 100 93 #define NVSWITCH_INSTANCE_LEN 2 94 #endif 95 96 #define NV_ARRAY_ELEMENTS(x) ((sizeof(x)/sizeof((x)[0]))) 97 98 #define NVSWITCH_DBG_LEVEL NVSWITCH_DBG_LEVEL_INFO 99 100 #if defined(DEVELOP) || defined(DEBUG) || defined(NV_MODS) 101 #define NVSWITCH_PRINT(_d, _lvl, _fmt, ...) \ 102 ((NVSWITCH_DBG_LEVEL <= NVSWITCH_DBG_LEVEL_ ## _lvl) ? \ 103 nvswitch_os_print(NVSWITCH_DBG_LEVEL_ ## _lvl, \ 104 "%s[%-5s]: " _fmt, \ 105 ((_d == NULL) ? \ 106 "nvswitchx" : \ 107 ((nvswitch_device *)_d)->name), \ 108 #_lvl, \ 109 ## __VA_ARGS__) : \ 110 ((void)(0)) \ 111 ) 112 #else 113 #define NVSWITCH_PRINT(_d, _lvl, _fmt, ...) ((void)0) 114 #endif 115 116 #if defined(DEVELOP) || defined(DEBUG) || defined(NV_MODS) 117 #define nvswitch_os_malloc(_size) \ 118 nvswitch_os_malloc_trace(_size, __FILE__, __LINE__) 119 #else 120 #define nvswitch_os_malloc(_size) \ 121 nvswitch_os_malloc_trace(_size, NULL, 0) 122 #endif 123 124 // 125 // This macro should be used to check assertion statements and print Error messages. 126 // 127 #if defined(DEVELOP) || defined(DEBUG) || defined(NV_MODS) 128 void nvswitch_assert_log 129 ( 130 const char *function, 131 const char *file, 132 NvU32 line 133 ); 134 135 #define NVSWITCH_ASSERT(_cond) \ 136 ((void)((!(_cond)) ? nvswitch_assert_log(__FUNCTION__, __FILE__, __LINE__) : 0)) 137 138 #else 139 void nvswitch_assert_log(void); 140 141 #define NVSWITCH_ASSERT(_cond) \ 142 ((void)((!(_cond)) ? nvswitch_assert_log() : 0)) 143 #endif 144 145 #define NVSWITCH_ASSERT_ERROR_INFO(errorCategory, errorInfo) NVSWITCH_ASSERT(0x0) 146 #define NVSWITCH_ASSERT_INFO(errCode, errLinkMask, errSubcode) NVSWITCH_ASSERT(0x0) 147 148 // 149 // This macro should be used cautiously as it prints information in the release 150 // drivers. 151 // 152 #define NVSWITCH_PRINT_SXID(_d, _sxid, _fmt, ...) \ 153 do \ 154 { \ 155 NVSWITCH_ASSERT(nvswitch_translate_hw_error(_sxid) != NVSWITCH_NVLINK_HW_GENERIC); \ 156 nvswitch_os_print(NVSWITCH_DBG_LEVEL_ERROR, \ 157 "nvidia-%s: SXid (PCI:" NVLINK_PCI_DEV_FMT "): %05d, " _fmt, \ 158 (_d)->name, NVLINK_PCI_DEV_FMT_ARGS(&(_d)->nvlink_device->pciInfo), _sxid, \ 159 ##__VA_ARGS__); \ 160 nvswitch_lib_smbpbi_log_sxid(_d, _sxid, _fmt, ##__VA_ARGS__); \ 161 nvswitch_inforom_bbx_add_sxid(_d, _sxid, 0, 0, 0); \ 162 } while(0) 163 164 #define NVSWITCH_PRINT_SXID_NO_BBX(_d, _sxid, _fmt, ...) \ 165 do \ 166 { \ 167 NVSWITCH_ASSERT(nvswitch_translate_hw_error(_sxid) != NVSWITCH_NVLINK_HW_GENERIC); \ 168 nvswitch_os_print(NVSWITCH_DBG_LEVEL_ERROR, \ 169 "nvidia-%s: SXid (PCI:" NVLINK_PCI_DEV_FMT "): %05d, " _fmt, \ 170 (_d)->name, NVLINK_PCI_DEV_FMT_ARGS(&(_d)->nvlink_device->pciInfo), _sxid, \ 171 ##__VA_ARGS__); \ 172 nvswitch_lib_smbpbi_log_sxid(_d, _sxid, _fmt, ##__VA_ARGS__); \ 173 } while(0) 174 175 #define NVSWITCH_DEV_CMD_DISPATCH_WITH_PRIVATE_DATA(cmd, function, type, private)\ 176 case cmd: \ 177 { \ 178 if (sizeof(type) == size) \ 179 { \ 180 retval = function(device, params, private); \ 181 } \ 182 else \ 183 { \ 184 retval = -NVL_BAD_ARGS; \ 185 } \ 186 break; \ 187 } 188 189 #define NVSWITCH_DEV_CMD_DISPATCH_HELPER(cmd, supported, function, type) \ 190 case cmd: \ 191 { \ 192 if (!supported) \ 193 { \ 194 retval = -NVL_ERR_NOT_SUPPORTED; \ 195 } \ 196 else if (sizeof(type) == size) \ 197 { \ 198 retval = function(device, params); \ 199 } \ 200 else \ 201 { \ 202 retval = -NVL_BAD_ARGS; \ 203 } \ 204 break; \ 205 } 206 207 #define NVSWITCH_DEV_CMD_DISPATCH(cmd, function, type) \ 208 NVSWITCH_DEV_CMD_DISPATCH_HELPER(cmd, NV_TRUE, function, type) 209 210 #define NVSWITCH_MODS_CMDS_SUPPORTED NV_FALSE 211 212 #define NVSWITCH_DEV_CMD_DISPATCH_MODS(cmd, function, type) \ 213 NVSWITCH_DEV_CMD_DISPATCH_HELPER(cmd, NVSWITCH_MODS_CMDS_SUPPORTED, function, type) 214 215 #define NVSWITCH_MAX_NUM_LINKS 100 216 #if NVSWITCH_MAX_NUM_LINKS <= 100 217 #define NVSWITCH_LINK_INSTANCE_LEN 2 218 #endif 219 220 extern const nvlink_link_handlers nvswitch_link_handlers; 221 222 // 223 // link_info is used to store private link information 224 // 225 typedef struct 226 { 227 char name[sizeof(NVSWITCH_LINK_NAME) + NVSWITCH_LINK_INSTANCE_LEN]; 228 } LINK_INFO; 229 230 typedef struct 231 { 232 NvU32 external_fabric_mgmt; 233 NvU32 txtrain_control; 234 NvU32 crossbar_DBI; 235 NvU32 link_DBI; 236 NvU32 ac_coupled_mask; 237 NvU32 ac_coupled_mask2; 238 NvU32 swap_clk; 239 NvU32 link_enable_mask; 240 NvU32 link_enable_mask2; 241 NvU32 bandwidth_shaper; 242 NvU32 ssg_control; 243 NvU32 skip_buffer_ready; 244 NvU32 enable_pm; 245 NvU32 chiplib_forced_config_link_mask; 246 NvU32 chiplib_forced_config_link_mask2; 247 NvU32 soe_dma_self_test; 248 NvU32 soe_disable; 249 NvU32 soe_enable; 250 NvU32 soe_boot_core; 251 NvU32 latency_counter; 252 NvU32 nvlink_speed_control; 253 NvU32 inforom_bbx_periodic_flush; 254 NvU32 inforom_bbx_write_periodicity; 255 NvU32 inforom_bbx_write_min_duration; 256 NvU32 ato_control; 257 NvU32 sto_control; 258 NvU32 minion_disable; 259 NvU32 set_ucode_target; 260 NvU32 set_simmode; 261 NvU32 set_smf_settings; 262 NvU32 select_uphy_tables; 263 NvU32 link_training_mode; 264 NvU32 i2c_access_control; 265 NvU32 force_kernel_i2c; 266 NvU32 link_recal_settings; 267 NvU32 crc_bit_error_rate_short; 268 NvU32 crc_bit_error_rate_long; 269 NvU32 lp_threshold; 270 NvU32 minion_intr; 271 NvU32 surpress_link_errors_for_gpu_reset; 272 NvU32 block_code_mode; 273 NvU32 reference_clock_mode; 274 } NVSWITCH_REGKEY_TYPE; 275 276 // 277 // Background tasks 278 // 279 typedef struct NVSWITCH_TASK 280 { 281 struct NVSWITCH_TASK *prev; 282 struct NVSWITCH_TASK *next; 283 void (*task_fn_vdptr)(nvswitch_device *, void *); 284 void (*task_fn_devptr)(nvswitch_device *); 285 void *task_args; 286 NvU64 period_nsec; 287 NvU64 last_run_nsec; 288 NvU32 flags; 289 } NVSWITCH_TASK_TYPE; 290 291 #define NVSWITCH_TASK_TYPE_FLAGS_RUN_EVEN_IF_DEVICE_NOT_INITIALIZED 0x1 // Run even the if not initialized 292 #define NVSWITCH_TASK_TYPE_FLAGS_RUN_ONCE 0x2 // Only run the task once. Memory for task struct and args will be freed by dispatcher after running. 293 #define NVSWITCH_TASK_TYPE_FLAGS_VOID_PTR_ARGS 0x4 // Function accepts args as void * args. 294 295 // 296 // Wrapper struct for deffered SXID errors 297 // 298 typedef struct 299 { 300 NvU32 nvlipt_instance; 301 NvU32 link; 302 } NVSWITCH_DEFERRED_ERROR_REPORTING_ARGS; 303 304 // 305 // PLL 306 // 307 typedef struct 308 { 309 NvU32 src_freq_khz; 310 NvU32 M; 311 NvU32 N; 312 NvU32 PL; 313 NvU32 dist_mode; 314 NvU32 refclk_div; 315 NvU32 vco_freq_khz; 316 NvU32 freq_khz; 317 } NVSWITCH_PLL_INFO; 318 319 // Per-unit interrupt masks 320 typedef struct 321 { 322 NvU32 fatal; 323 NvU32 nonfatal; 324 NvU32 correctable; 325 } NVSWITCH_INTERRUPT_MASK; 326 327 // BIOS Image 328 typedef struct 329 { 330 // Size of the image. 331 NvU32 size; 332 333 // pointer to the BIOS image. 334 NvU8* pImage; 335 } NVSWITCH_BIOS_IMAGE; 336 337 struct NVSWITCH_CLIENT_EVENT 338 { 339 NVListRec entry; 340 NvU32 eventId; 341 void *private_driver_data; 342 }; 343 344 // 345 // common device information 346 // 347 struct nvswitch_device 348 { 349 #ifdef INCLUDE_NVLINK_LIB 350 nvlink_device *nvlink_device; 351 #endif 352 353 char name[sizeof(NVSWITCH_DEVICE_NAME) + NVSWITCH_INSTANCE_LEN]; 354 355 void *os_handle; 356 NvU32 os_instance; 357 358 NvBool is_emulation; 359 NvBool is_rtlsim; 360 NvBool is_fmodel; 361 362 NVSWITCH_REGKEY_TYPE regkeys; 363 364 // Tasks 365 NVSWITCH_TASK_TYPE *tasks; 366 367 // Errors 368 NvU64 error_total; // Total errors recorded across all error logs 369 NVSWITCH_ERROR_LOG_TYPE log_FATAL_ERRORS; 370 NVSWITCH_ERROR_LOG_TYPE log_NONFATAL_ERRORS; 371 372 NVSWITCH_FIRMWARE firmware; 373 374 // HAL connectivity 375 nvswitch_hal hal; 376 377 // SOE 378 FLCNABLE *pSoe; 379 380 // DMA 381 NvU32 dma_addr_width; 382 383 // InfoROM 384 struct inforom *pInforom; 385 386 // I2C 387 struct NVSWITCH_OBJI2C *pI2c; 388 389 // SMBPBI 390 struct smbpbi *pSmbpbi; 391 392 // NVSWITCH_LINK_TYPE 393 NVSWITCH_LINK_TYPE link[NVSWITCH_MAX_LINK_COUNT]; 394 395 // PLL 396 NVSWITCH_PLL_INFO switch_pll; 397 398 // Device specific information 399 NvU32 chip_arch; // NVSWITCH_GET_INFO_INDEX_ARCH_* 400 NvU32 chip_impl; // NVSWITCH_GET_INFO_INDEX_IMPL_* 401 // 402 NvU32 chip_id; // NV_PSMC/PMC_BOOT_42_CHIP_ID_* 403 void * chip_device; 404 405 // UUID in big-endian format 406 NvUuid uuid; 407 408 // Fabric Manager timeout value for the heartbeat 409 NvU32 fm_timeout; 410 411 // Fabric State 412 NVSWITCH_DRIVER_FABRIC_STATE driver_fabric_state; 413 NVSWITCH_DEVICE_FABRIC_STATE device_fabric_state; 414 NVSWITCH_DEVICE_BLACKLIST_REASON device_blacklist_reason; 415 NvU64 fabric_state_timestamp; 416 NvU32 fabric_state_sequence_number; 417 418 // Full BIOS image 419 NVSWITCH_BIOS_IMAGE biosImage; 420 421 // List of client events 422 NVListRec client_events_list; 423 424 // To be removed once newer vbios is on TOT. 425 NvBool bIsNvlinkVbiosTableVersion2; 426 }; 427 428 #define NVSWITCH_IS_DEVICE_VALID(device) \ 429 ((device != NULL) && \ 430 (device->nvlink_device->type == NVLINK_DEVICE_TYPE_NVSWITCH)) 431 432 #define NVSWITCH_IS_DEVICE_ACCESSIBLE(device) \ 433 (NVSWITCH_IS_DEVICE_VALID(device) && \ 434 (device->nvlink_device->pciInfo.bars[0].pBar != NULL)) 435 436 #define NVSWITCH_IS_DEVICE_INITIALIZED(device) \ 437 (NVSWITCH_IS_DEVICE_ACCESSIBLE(device) && \ 438 (device->nvlink_device->initialized)) 439 440 // 441 // Error Function defines 442 // 443 444 NvlStatus 445 nvswitch_construct_error_log 446 ( 447 NVSWITCH_ERROR_LOG_TYPE *errors, 448 NvU32 error_log_size, 449 NvBool overwritable 450 ); 451 452 void 453 nvswitch_destroy_error_log 454 ( 455 nvswitch_device *device, 456 NVSWITCH_ERROR_LOG_TYPE *errors 457 ); 458 459 void 460 nvswitch_record_error 461 ( 462 nvswitch_device *device, 463 NVSWITCH_ERROR_LOG_TYPE *errors, 464 NvU32 error_type, // NVSWITCH_ERR_* 465 NvU32 instance, 466 NvU32 subinstance, 467 NVSWITCH_ERROR_SRC_TYPE error_src, // NVSWITCH_ERROR_SRC_* 468 NVSWITCH_ERROR_SEVERITY_TYPE severity, // NVSWITCH_ERROR_SEVERITY_* 469 NvBool error_resolved, 470 void *data, 471 NvU32 data_size, 472 NvU32 line, 473 const char *description 474 ); 475 476 void 477 nvswitch_discard_errors 478 ( 479 NVSWITCH_ERROR_LOG_TYPE *errors, 480 NvU32 error_discard_count 481 ); 482 483 void 484 nvswitch_get_error 485 ( 486 nvswitch_device *device, 487 NVSWITCH_ERROR_LOG_TYPE *errors, 488 NVSWITCH_ERROR_TYPE *error_entry, 489 NvU32 error_idx, 490 NvU32 *error_count 491 ); 492 493 void 494 nvswitch_get_next_error 495 ( 496 nvswitch_device *device, 497 NVSWITCH_ERROR_LOG_TYPE *errors, 498 NVSWITCH_ERROR_TYPE *error_entry, 499 NvU32 *error_count, 500 NvBool remove_from_list 501 ); 502 503 void 504 nvswitch_get_link_handlers 505 ( 506 nvlink_link_handlers *nvswitch_link_handlers 507 ); 508 509 // 510 // Timeout checking 511 // 512 513 typedef struct NVSWITCH_TIMEOUT 514 { 515 NvU64 timeout_ns; 516 } NVSWITCH_TIMEOUT; 517 518 #define NVSWITCH_INTERVAL_1USEC_IN_NS 1000LL 519 #define NVSWITCH_INTERVAL_50USEC_IN_NS 50000LL 520 #define NVSWITCH_INTERVAL_1MSEC_IN_NS 1000000LL 521 #define NVSWITCH_INTERVAL_5MSEC_IN_NS 5000000LL 522 #define NVSWITCH_INTERVAL_750MSEC_IN_NS 750000000LL 523 #define NVSWITCH_INTERVAL_1SEC_IN_NS 1000000000LL 524 #define NVSWITCH_INTERVAL_4SEC_IN_NS 4000000000LL 525 526 #define NVSWITCH_HEARTBEAT_INTERVAL_NS NVSWITCH_INTERVAL_1SEC_IN_NS 527 528 // This should only be used for short delays 529 #define NVSWITCH_NSEC_DELAY(nsec_delay) \ 530 do \ 531 { \ 532 if (!IS_FMODEL(device)) \ 533 { \ 534 NVSWITCH_TIMEOUT timeout; \ 535 nvswitch_timeout_create(nsec_delay, &timeout); \ 536 do { } \ 537 while (!nvswitch_timeout_check(&timeout)); \ 538 } \ 539 } while(0) 540 541 #define NVSWITCH_GET_CAP(tbl,cap,field) (((NvU8)tbl[((1?cap##field)>=cap##_TBL_SIZE) ? 0/0 : (1?cap##field)]) & (0?cap##field)) 542 #define NVSWITCH_SET_CAP(tbl,cap,field) ((tbl[((1?cap##field)>=cap##_TBL_SIZE) ? 0/0 : (1?cap##field)]) |= (0?cap##field)) 543 544 NvBool nvswitch_is_lr10_device_id(NvU32 device_id); 545 NvBool nvswitch_is_ls10_device_id(NvU32 device_id); 546 547 NvU32 nvswitch_reg_read_32(nvswitch_device *device, NvU32 offset); 548 void nvswitch_reg_write_32(nvswitch_device *device, NvU32 offset, NvU32 data); 549 NvU64 nvswitch_read_64bit_counter(nvswitch_device *device, NvU32 lo_offset, NvU32 hi_offset); 550 void nvswitch_timeout_create(NvU64 timeout_ns, NVSWITCH_TIMEOUT *time); 551 NvBool nvswitch_timeout_check(NVSWITCH_TIMEOUT *time); 552 NvlStatus nvswitch_task_create(nvswitch_device *device, 553 void (*task_fn)(nvswitch_device *device), 554 NvU64 period_nsec, NvU32 flags); 555 NvlStatus nvswitch_task_create_args(nvswitch_device* device, void *fn_args, 556 void (*task_fn)(nvswitch_device* device, void *fn_args), 557 NvU64 period_nsec, NvU32 flags); 558 void nvswitch_tasks_destroy(nvswitch_device *device); 559 560 void nvswitch_free_chipdevice(nvswitch_device *device); 561 NvlStatus nvswitch_create_link(nvswitch_device *device, NvU32 link_number, nvlink_link **link); 562 nvlink_link* nvswitch_get_link(nvswitch_device *device, NvU8 link_id); 563 NvU64 nvswitch_get_enabled_link_mask(nvswitch_device *device); 564 void nvswitch_destroy_link(nvlink_link *link); 565 NvlStatus nvswitch_validate_pll_config(nvswitch_device *device, 566 NVSWITCH_PLL_INFO *switch_pll, 567 NVSWITCH_PLL_LIMITS default_pll_limits); 568 569 NvlStatus nvswitch_poll_sublink_state(nvswitch_device *device, nvlink_link *link); 570 void nvswitch_setup_link_loopback_mode(nvswitch_device *device, NvU32 linkNumber); 571 void nvswitch_reset_persistent_link_hw_state(nvswitch_device *device, NvU32 linkNumber); 572 void nvswitch_store_topology_information(nvswitch_device *device, nvlink_link *link); 573 574 NvlStatus nvswitch_launch_ALI(nvswitch_device *device); 575 NvlStatus nvswitch_launch_ALI_link_training(nvswitch_device *device, nvlink_link *link, NvBool bSync); 576 NvlStatus nvswitch_inband_read_data(nvswitch_device *device, NvU8 *dest, NvU32 linkId, NvU32 *dataSize); 577 void nvswitch_filter_messages(nvswitch_device *device, NvU32 linkId); 578 NvlStatus nvswitch_reset_and_train_link(nvswitch_device *device, nvlink_link *link); 579 NvlStatus nvswitch_set_training_mode(nvswitch_device *device); 580 NvBool nvswitch_is_link_in_reset(nvswitch_device *device, nvlink_link *link); 581 void nvswitch_apply_recal_settings(nvswitch_device *device, nvlink_link *link); 582 void nvswitch_init_buffer_ready(nvswitch_device *device, nvlink_link *link, NvBool bNportBufferReady); 583 NvBool nvswitch_does_link_need_termination_enabled(nvswitch_device *device, nvlink_link *link); 584 NvlStatus nvswitch_link_termination_setup(nvswitch_device *device, nvlink_link* link); 585 #endif //_COMMON_NVSWITCH_H_ 586