1 /* 2 * SPDX-FileCopyrightText: Copyright (c) 2018-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. 3 * SPDX-License-Identifier: MIT 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 */ 23 24 #ifndef _REGKEY_NVSWITCH_H_ 25 #define _REGKEY_NVSWITCH_H_ 26 27 28 #include "export_nvswitch.h" 29 30 /* 31 * NV_SWITCH_REGKEY_TXTRAIN_OPTIMIZATION_ALGORITHM - Select TXTRAIN optimization algorithm 32 * 33 * NVLink3.0 Allows for multiple optimization algorithms A0-A7 34 * Documentation on details about each algorithm can be found in 35 * the IAS section "4.4.3.3. Optimization Algorithms" 36 * 37 * Private: Debug use only 38 */ 39 40 #define NV_SWITCH_REGKEY_TXTRAIN_CONTROL "TxTrainControl" 41 42 #define NV_SWITCH_REGKEY_TXTRAIN_CONTROL_NOP 0x00000000 43 #define NV_SWITCH_REGKEY_TXTRAIN_CONTROL_FOM_FORMAT 2:0 44 #define NV_SWITCH_REGKEY_TXTRAIN_CONTROL_FOM_FORMAT_NOP 0x00000000 45 #define NV_SWITCH_REGKEY_TXTRAIN_CONTROL_FOM_FORMAT_FOMA 0x00000001 46 #define NV_SWITCH_REGKEY_TXTRAIN_CONTROL_FOM_FORMAT_FOMB 0x00000002 47 #define NV_SWITCH_REGKEY_TXTRAIN_CONTROL_OPTIMIZATION_ALGORITHM 10:3 48 #define NV_SWITCH_REGKEY_TXTRAIN_CONTROL_OPTIMIZATION_ALGORITHM_NOP 0x00000000 49 #define NV_SWITCH_REGKEY_TXTRAIN_CONTROL_OPTIMIZATION_ALGORITHM_A0 0x00000001 50 #define NV_SWITCH_REGKEY_TXTRAIN_CONTROL_OPTIMIZATION_ALGORITHM_A1 0x00000002 51 #define NV_SWITCH_REGKEY_TXTRAIN_CONTROL_OPTIMIZATION_ALGORITHM_A2 0x00000004 52 #define NV_SWITCH_REGKEY_TXTRAIN_CONTROL_OPTIMIZATION_ALGORITHM_A3 0x00000008 53 #define NV_SWITCH_REGKEY_TXTRAIN_CONTROL_OPTIMIZATION_ALGORITHM_A4 0x00000010 54 #define NV_SWITCH_REGKEY_TXTRAIN_CONTROL_OPTIMIZATION_ALGORITHM_A5 0x00000020 55 #define NV_SWITCH_REGKEY_TXTRAIN_CONTROL_OPTIMIZATION_ALGORITHM_A6 0x00000040 56 #define NV_SWITCH_REGKEY_TXTRAIN_CONTROL_OPTIMIZATION_ALGORITHM_A7 0x00000080 57 #define NV_SWITCH_REGKEY_TXTRAIN_CONTROL_ADJUSTMENT_ALGORITHM 15:11 58 #define NV_SWITCH_REGKEY_TXTRAIN_CONTROL_ADJUSTMENT_ALGORITHM_NOP 0x00000000 59 #define NV_SWITCH_REGKEY_TXTRAIN_CONTROL_ADJUSTMENT_ALGORITHM_B0 0x00000001 60 #define NV_SWITCH_REGKEY_TXTRAIN_CONTROL_ADJUSTMENT_ALGORITHM_B1 0x00000002 61 #define NV_SWITCH_REGKEY_TXTRAIN_CONTROL_ADJUSTMENT_ALGORITHM_B2 0x00000004 62 #define NV_SWITCH_REGKEY_TXTRAIN_CONTROL_ADJUSTMENT_ALGORITHM_B3 0x00000008 63 #define NV_SWITCH_REGKEY_TXTRAIN_CONTROL_MINIMUM_TRAIN_TIME_MANTISSA 19:16 64 #define NV_SWITCH_REGKEY_TXTRAIN_CONTROL_MINIMUM_TRAIN_TIME_MANTISSA_NOP 0x00000000 65 #define NV_SWITCH_REGKEY_TXTRAIN_CONTROL_MINIMUM_TRAIN_TIME_EXPONENT 23:20 66 #define NV_SWITCH_REGKEY_TXTRAIN_CONTROL_MINIMUM_TRAIN_TIME_EXPONENT_NOP 0x00000000 67 68 /* 69 * NV_SWITCH_REGKEY_EXTERNAL_FABRIC_MGMT - Toggle external fabric management. 70 * 71 * Switch driver currently uses nvlink core driver APIs which internally trigger 72 * link initialization and training. However, nvlink core driver now exposes a 73 * set of APIs for managing nvlink fabric externally (from user mode). 74 * 75 * When the regkey is enabled, switch driver will skip use of APIs which trigger 76 * link initialization and training. In that case, link training needs to be 77 * triggered externally. 78 * 79 * Private: Debug use only 80 */ 81 82 #define NV_SWITCH_REGKEY_EXTERNAL_FABRIC_MGMT "ExternalFabricMgmt" 83 84 #define NV_SWITCH_REGKEY_EXTERNAL_FABRIC_MGMT_DISABLE 0x0 85 #define NV_SWITCH_REGKEY_EXTERNAL_FABRIC_MGMT_ENABLE 0x1 86 87 /* 88 * NV_SWITCH_REGKEY_CROSSBAR_DBI - Enable/disable crossbar DBI 89 * DBI - Data bus inversion provides some small power savings. 90 * 91 * Private: Debug use only 92 */ 93 94 #define NV_SWITCH_REGKEY_CROSSBAR_DBI "CrossbarDBI" 95 96 #define NV_SWITCH_REGKEY_CROSSBAR_DBI_DISABLE 0x0 97 #define NV_SWITCH_REGKEY_CROSSBAR_DBI_ENABLE 0x1 98 99 /* 100 * NV_SWITCH_REGKEY_LINK_DBI - Enable/disable link DBI 101 * DBI - Data bus inversion provides some small power savings. 102 * 103 * Private: Debug use only 104 */ 105 106 #define NV_SWITCH_REGKEY_LINK_DBI "LinkDBI" 107 108 #define NV_SWITCH_REGKEY_LINK_DBI_DISABLE 0x0 109 #define NV_SWITCH_REGKEY_LINK_DBI_ENABLE 0x1 110 111 /* 112 * NV_SWITCH_REGKEY_AC_COUPLING_MASK 113 * 114 * Value is a bitmask of which links are AC coupled and should be 115 * configured with SETACMODE. 116 * All links default to DC coupled. 117 * 118 * Mask contains links 0-31 119 * Mask2 contains links 32-63 120 * 121 * Private: Debug use only 122 */ 123 124 #define NV_SWITCH_REGKEY_AC_COUPLED_MASK "ACCoupledMask" 125 #define NV_SWITCH_REGKEY_AC_COUPLED_MASK2 "ACCoupledMask2" 126 127 /* 128 * NV_SWITCH_REGKEY_SWAP_CLK_OVERRIDE 129 * 130 * Value is a bitmask applied directly to _SWAP_CLK field. 131 * bit 0: select source for RXCLK_0P/N - ports 0-7 132 * bit 1: select source for RXCLK_1P/N - ports 16-17 133 * bit 2: select source for RXCLK_2P/N - ports 8-15 134 * bit 3: unconnected 135 * 136 * Private: Debug use only 137 */ 138 139 #define NV_SWITCH_REGKEY_SWAP_CLK_OVERRIDE "SwapClkOverride" 140 141 #define NV_SWITCH_REGKEY_SWAP_CLK_OVERRIDE_FIELD 3:0 142 143 /* 144 * NV_SWITCH_REGKEY_ENABLE_LINK_MASK - Mask of links to enable 145 * 146 * By default, all links are enabled 147 * 148 * [0]=1 - Enable link 0 149 * : 150 * [31]=1 - Enable link 31 151 * 152 * Mask contains links 0-31 153 * Mask2 contains links 32-63 154 * 155 * Private: Debug use only 156 */ 157 158 #define NV_SWITCH_REGKEY_ENABLE_LINK_MASK "LinkEnableMask" 159 #define NV_SWITCH_REGKEY_ENABLE_LINK_MASK2 "LinkEnableMask2" 160 161 /* 162 * NV_SWITCH_REGKEY_BANDWIDTH_SHAPER 163 * 164 * Selects among various transaction fairness modes affecting bandwidth 165 * 166 * Private: Debug use only 167 */ 168 169 #define NV_SWITCH_REGKEY_BANDWIDTH_SHAPER "BandwidthShaper" 170 171 #define NV_SWITCH_REGKEY_BANDWIDTH_SHAPER_PROD 0x0 172 #define NV_SWITCH_REGKEY_BANDWIDTH_SHAPER_XSD 0x1 173 #define NV_SWITCH_REGKEY_BANDWIDTH_SHAPER_BUCKET_BW 0x2 174 #define NV_SWITCH_REGKEY_BANDWIDTH_SHAPER_BUCKET_TX_FAIR 0x3 175 176 /* 177 * NV_SWITCH_REGKEY_SSG_CONTROL 178 * 179 * Internal use only (supported only on MODS) 180 * Allows SSG interface to tweak internal behavior for testing & debugging 181 * 182 * Private: Debug use only 183 */ 184 185 #define NV_SWITCH_REGKEY_SSG_CONTROL "SSGControl" 186 #define NV_SWITCH_REGKEY_SSG_CONTROL_BREAK_AFTER_UPHY_INIT 0:0 187 #define NV_SWITCH_REGKEY_SSG_CONTROL_BREAK_AFTER_UPHY_INIT_NO (0x00000000) 188 #define NV_SWITCH_REGKEY_SSG_CONTROL_BREAK_AFTER_UPHY_INIT_YES (0x00000001) 189 #define NV_SWITCH_REGKEY_SSG_CONTROL_BREAK_AFTER_DLPL_INIT 1:1 190 #define NV_SWITCH_REGKEY_SSG_CONTROL_BREAK_AFTER_DLPL_INIT_NO (0x00000000) 191 #define NV_SWITCH_REGKEY_SSG_CONTROL_BREAK_AFTER_DLPL_INIT_YES (0x00000001) 192 193 /* 194 * NV_SWITCH_REGKEY_SKIP_BUFFER_READY 195 * 196 * Used to optionally skip the initialization of NVLTLC_TX_CTRL_BUFFER_READY, 197 * NVLTLC_RX_CTRL_BUFFER_READY, and NPORT_CTRL_BUFFER_READY registers. 198 * 199 * Private: Debug use only 200 */ 201 #define NV_SWITCH_REGKEY_SKIP_BUFFER_READY "SkipBufferReady" 202 #define NV_SWITCH_REGKEY_SKIP_BUFFER_READY_TLC 0:0 203 #define NV_SWITCH_REGKEY_SKIP_BUFFER_READY_TLC_NO (0x00000000) 204 #define NV_SWITCH_REGKEY_SKIP_BUFFER_READY_TLC_YES (0x00000001) 205 #define NV_SWITCH_REGKEY_SKIP_BUFFER_READY_NPORT 1:1 206 #define NV_SWITCH_REGKEY_SKIP_BUFFER_READY_NPORT_NO (0x00000000) 207 #define NV_SWITCH_REGKEY_SKIP_BUFFER_READY_NPORT_YES (0x00000001) 208 209 /* 210 * NV_SWITCH_REGKEY_SOE_DISABLE - Disables init and usage of SOE by the kernel driver 211 * 212 * The NVSwitch driver relies on SOE for some features, but can operate 213 * without it, with reduced functionality. 214 * 215 * When the regkey is set to YES, the Nvswitch driver disregards SOE and will not 216 * bootstrap it with the driver payload image. All interactions between 217 * the driver and SOE are disabled. 218 * 219 * Driver unload doesn't idle already bootstrapped SOE. Hence it is 220 * recommended to reset device in order disable SOE completely. The pre-OS image 221 * will still be running even though SOE is disabled through the driver. 222 * 223 * If set to NO, the SOE will function as normal. 224 * 225 * Private: Debug use only 226 */ 227 228 #define NV_SWITCH_REGKEY_SOE_DISABLE "SoeDisable" 229 #define NV_SWITCH_REGKEY_SOE_DISABLE_NO 0x0 230 #define NV_SWITCH_REGKEY_SOE_DISABLE_YES 0x1 231 232 /* 233 * NV_SWITCH_REGKEY_ENABLE_PM 234 * 235 * Used to optionally send the ENABLE_PM command to MINION on link training 236 * and DISABLE_PM on link teardown. 237 * 238 * Private: Debug use only 239 */ 240 241 #define NV_SWITCH_REGKEY_ENABLE_PM "EnablePM" 242 #define NV_SWITCH_REGKEY_ENABLE_PM_NO 0x0 243 #define NV_SWITCH_REGKEY_ENABLE_PM_YES 0x1 244 245 /* 246 * NV_SWITCH_REGKEY_MINION_SET_UCODE* 247 * 248 * The following regkeys are used to override MINION image in the driver. 249 * 250 * The ucode image is overriden from .js file given along the regkey -nvswitch_set_minion_ucode. 251 * 252 * Private: Debug use only 253 */ 254 255 /* 256 * Overrides MINION image data with g_os_ucode_data_nvswitch_minion it fetches from js file. 257 */ 258 #define NV_SWITCH_REGKEY_MINION_SET_UCODE_DATA "MinionSetUCodeData" 259 260 /* 261 * Overrides MINION header with g_os_ucode_header_nvswitch_minion it fetches from js file. 262 */ 263 #define NV_SWITCH_REGKEY_MINION_SET_UCODE_HDR "MinionSetUCodeHdr" 264 265 /* 266 * Overrides MINION ucode data size with g_os_ucode_data_nvswitch_minion_size it fetches from js file. 267 */ 268 #define NV_SWITCH_REGKEY_MINION_SET_UCODE_DATA_SIZE "MinionSetUCodeDataSize" 269 270 /* 271 * Overrides MINION ucode data size with g_os_ucode_data_nvswitch_minion_size it fetches from js file. 272 */ 273 #define NV_SWITCH_REGKEY_MINION_SET_UCODE_HDR_SIZE "MinionSetUCodeHdrSize" 274 275 /* 276 * NV_SWITCH_REGKEY_CHIPLIB_FORCED_LINK_CONFIG_MASK 277 * 278 * Internal use only 279 * This notifies the driver that we are using a chiplib forced link config 280 * to initialize and train the links. 281 * Mask contains links 0-31 282 * Mask2 contains links 32-63 283 * 284 * This is intended for sim platforms only where MINION is not available 285 * 286 * Private: Debug use only 287 */ 288 #define NV_SWITCH_REGKEY_CHIPLIB_FORCED_LINK_CONFIG_MASK "ChiplibForcedLinkConfigMask" 289 #define NV_SWITCH_REGKEY_CHIPLIB_FORCED_LINK_CONFIG_MASK2 "ChiplibForcedLinkConfigMask2" 290 291 /* 292 * Initiates DMA selftest on SOE during init. Default is disable. 293 * 294 * Private: Debug use only 295 */ 296 297 #define NV_SWITCH_REGKEY_SOE_DMA_SELFTEST "SoeDmaSelfTest" 298 #define NV_SWITCH_REGKEY_SOE_DMA_SELFTEST_DISABLE 0x00 299 #define NV_SWITCH_REGKEY_SOE_DMA_SELFTEST_ENABLE 0x01 300 301 /* 302 * CCI Control 303 * 304 * This regkey controls enablement of CCI on LS10 systems. 305 * 306 * Public: Available in release drivers 307 */ 308 #define NV_SWITCH_REGKEY_CCI_CONTROL "CCIControl" 309 #define NV_SWITCH_REGKEY_CCI_CONTROL_DEFAULT 0x1 310 #define NV_SWITCH_REGKEY_CCI_CONTROL_ENABLE 0:0 311 #define NV_SWITCH_REGKEY_CCI_CONTROL_ENABLE_FALSE 0x00 312 #define NV_SWITCH_REGKEY_CCI_CONTROL_ENABLE_TRUE 0x01 313 314 /* 315 * CCI Link Train Disable Mask 316 * 317 * These regkeys will disable link training for CCI managed links. 318 * 319 * Mask contains links 0-31 320 * Mask2 contains links 32-63 321 * 322 * Private: Will only be applied on debug/develop drivers and MODS 323 */ 324 #define NV_SWITCH_REGKEY_CCI_DISABLE_LINK_TRAIN_MASK "CCILinkTrainDisableMask" 325 #define NV_SWITCH_REGKEY_CCI_DISABLE_LINK_TRAIN_MASK2 "CCILinkTrainDisableMask2" 326 #define NV_SWITCH_REGKEY_CCI_DISABLE_LINK_TRAIN_MASK_DEFAULT 0x0 327 #define NV_SWITCH_REGKEY_CCI_DISABLE_LINK_TRAIN_MASK2_DEFAULT 0x0 328 329 /* 330 * CCI Max Onboard Attempts 331 * 332 * Public: Available in release drivers 333 */ 334 #define NV_SWITCH_REGKEY_CCI_MAX_ONBOARD_ATTEMPTS "CCIMaxOnboardAttempts" 335 #define NV_SWITCH_REGKEY_CCI_MAX_ONBOARD_ATTEMPTS_DEFAULT 0x5 336 337 /* 338 * CCI Error Log Enable 339 * 340 * This regkey will enable emission of CCI module onboarding SXids errors. 341 * 342 * Public: Available in release drivers 343 */ 344 #define NV_SWITCH_REGKEY_CCI_ERROR_LOG_ENABLE "CCIErrorLogEnable" 345 #define NV_SWITCH_REGKEY_CCI_ERROR_LOG_ENABLE_DEFAULT 0x1 346 347 /* 348 * Disables logging of latency counters 349 * 350 * Private: Debug use only 351 */ 352 #define NV_SWITCH_REGKEY_LATENCY_COUNTER_LOGGING "LatencyCounterLogging" 353 #define NV_SWITCH_REGKEY_LATENCY_COUNTER_LOGGING_DISABLE 0x00 354 #define NV_SWITCH_REGKEY_LATENCY_COUNTER_LOGGING_ENABLE 0x01 355 356 /* 357 * Knob to change NVLink link speed 358 * 359 * Private: Debug use only 360 */ 361 #define NV_SWITCH_REGKEY_SPEED_CONTROL "SpeedControl" 362 #define NV_SWITCH_REGKEY_SPEED_CONTROL_SPEED 4:0 363 #define NV_SWITCH_REGKEY_SPEED_CONTROL_SPEED_DEFAULT 0x00 364 #define NV_SWITCH_REGKEY_SPEED_CONTROL_SPEED_16G 0x01 365 #define NV_SWITCH_REGKEY_SPEED_CONTROL_SPEED_20G 0x03 366 #define NV_SWITCH_REGKEY_SPEED_CONTROL_SPEED_25G 0x08 367 #define NV_SWITCH_REGKEY_SPEED_CONTROL_SPEED_25_78125G 0x08 368 #define NV_SWITCH_REGKEY_SPEED_CONTROL_SPEED_32G 0x0E 369 #define NV_SWITCH_REGKEY_SPEED_CONTROL_SPEED_40G 0x0F 370 #define NV_SWITCH_REGKEY_SPEED_CONTROL_SPEED_50G 0x10 371 #define NV_SWITCH_REGKEY_SPEED_CONTROL_SPEED_53_12500G 0x11 372 #define NV_SWITCH_REGKEY_SPEED_CONTROL_SPEED_100_00000G 0x12 373 #define NV_SWITCH_REGKEY_SPEED_CONTROL_SPEED_106_25000G 0x13 374 375 /* 376 * Enable/Disable periodic flush to inforom. Default is disabled. 377 * 378 * Private: Debug use only 379 */ 380 #define NV_SWITCH_REGKEY_INFOROM_BBX_ENABLE_PERIODIC_FLUSHING "InforomBbxPeriodicFlush" 381 #define NV_SWITCH_REGKEY_INFOROM_BBX_ENABLE_PERIODIC_FLUSHING_DISABLE 0x00 382 #define NV_SWITCH_REGKEY_INFOROM_BBX_ENABLE_PERIODIC_FLUSHING_ENABLE 0x01 383 384 /* 385 * The rate at which the lifetime data about the NVSwitch is written into the BBX object in seconds. 386 * This is gated by NV_SWITCH_REGKEY_INFOROM_BBX_ENABLE_PERIODIC_FLUSHING 387 * 388 * Private: Debug use only 389 */ 390 #define NV_SWITCH_REGKEY_INFOROM_BBX_WRITE_PERIODICITY "InforomBbxWritePeriodicity" 391 #define NV_SWITCH_REGKEY_INFOROM_BBX_WRITE_PERIODICITY_DEFAULT 600 // 600 seconds (10 min) 392 393 /* 394 * The minimum duration the driver must run before writing to the BlackBox Recorder (BBX) object 395 * on driver exit (in seconds). 396 * 397 * Private: Debug use only 398 */ 399 #define NV_SWITCH_REGKEY_INFOROM_BBX_WRITE_MIN_DURATION "InforomBbxWriteMinDuration" 400 #define NV_SWITCH_REGKEY_INFOROM_BBX_WRITE_MIN_DURATION_DEFAULT 30 // 30 seconds 401 402 /* 403 * Change ATO timer value 404 * 405 * Public: Available in release drivers 406 */ 407 #define NV_SWITCH_REGKEY_ATO_CONTROL "ATOControl" 408 #define NV_SWITCH_REGKEY_ATO_CONTROL_DEFAULT 0x0 409 #define NV_SWITCH_REGKEY_ATO_CONTROL_TIMEOUT 19:0 410 #define NV_SWITCH_REGKEY_ATO_CONTROL_TIMEOUT_DEFAULT 0x00 411 #define NV_SWITCH_REGKEY_ATO_CONTROL_DISABLE 20:20 412 #define NV_SWITCH_REGKEY_ATO_CONTROL_DISABLE_FALSE 0x00 413 #define NV_SWITCH_REGKEY_ATO_CONTROL_DISABLE_TRUE 0x01 414 415 /* 416 * Change STO timer value 417 * 418 * Public: Available in release drivers 419 */ 420 #define NV_SWITCH_REGKEY_STO_CONTROL "STOControl" 421 #define NV_SWITCH_REGKEY_STO_CONTROL_DEFAULT 0x0 422 #define NV_SWITCH_REGKEY_STO_CONTROL_TIMEOUT 19:0 423 #define NV_SWITCH_REGKEY_STO_CONTROL_TIMEOUT_DEFAULT 0x00 424 #define NV_SWITCH_REGKEY_STO_CONTROL_DISABLE 20:20 425 #define NV_SWITCH_REGKEY_STO_CONTROL_DISABLE_FALSE 0x00 426 #define NV_SWITCH_REGKEY_STO_CONTROL_DISABLE_TRUE 0x01 427 428 /* 429 * NV_SWITCH_REGKEY_MINION_DISABLE - Disables init and usage of MINION by the kernel driver 430 * 431 * The NVSwitch driver relies on MINION for some features, but can operate 432 * without it and is required for Bug 2848340. 433 * 434 * When the regkey is set to YES, the Nvswitch driver disregards MINION and will not 435 * bootstrap it. All interactions between the driver and MINION are disabled. 436 * 437 * If set to NO, the MINION will function as normal. 438 * 439 * Private: Debug use only 440 */ 441 442 #define NV_SWITCH_REGKEY_MINION_DISABLE "MinionDisable" 443 #define NV_SWITCH_REGKEY_MINION_DISABLE_NO 0x0 444 #define NV_SWITCH_REGKEY_MINION_DISABLE_YES 0x1 445 446 /* 447 * NV_SWITCH_REGKEY_MINION_SET_UCODE_TARGET - Selects the core on which Minion will run 448 * 449 * When the regkey is set to FALCON, the Nvswitch driver will run MINION on Falcon core. 450 * 451 * If set to RISCV, the MINION will run on RISCV core in Non-Manifest Mode. 452 * If set to RISCV_MANIFEST, the MINION will run on RISCV core in Manifest Mode. 453 * 454 * In the default option, RISCV_BCR_CTRL register will be used to get the default core. 455 * 456 * Private: Debug use only 457 */ 458 #define NV_SWITCH_REGKEY_MINION_SET_UCODE_TARGET "MinionSetUcodeTarget" 459 #define NV_SWITCH_REGKEY_MINION_SET_UCODE_TARGET_DEFAULT 0x0 460 #define NV_SWITCH_REGKEY_MINION_SET_UCODE_TARGET_FALCON 0x1 461 #define NV_SWITCH_REGKEY_MINION_SET_UCODE_TARGET_RISCV 0x2 462 #define NV_SWITCH_REGKEY_MINION_SET_UCODE_TARGET_RISCV_MANIFEST 0x3 463 464 /* 465 * NV_SWITCH_REGKEY_MINION_SET_SIMMODE - Selects simmode settings to send to MINION 466 * 467 * Regkey is set to either SLOW, MEDIUM or FAST depending on the environment and timing 468 * needed by MINION to setup alarms during the training sequence 469 * 470 * In the default option, no SIMMODE is selected 471 * 472 * Private: Debug use only 473 */ 474 #define NV_SWITCH_REGKEY_MINION_SET_SIMMODE "MinionSetSimmode" 475 #define NV_SWITCH_REGKEY_MINION_SET_SIMMODE_DEFAULT 0x0 476 #define NV_SWITCH_REGKEY_MINION_SET_SIMMODE_FAST 0x1 477 #define NV_SWITCH_REGKEY_MINION_SET_SIMMODE_MEDIUM 0x2 478 #define NV_SWITCH_REGKEY_MINION_SET_SIMMODE_SLOW 0x3 479 480 /* 481 * NV_SWITCH_REGKEY_MINION_SET_SMF_SETTINGS - Selects SMF settings to send to MINION 482 * 483 * Regkey is set to either SLOW, MEDIUM or FAST depending on the environment and timing 484 * needed by MINION to setup alarms during the training sequence 485 * 486 * In the default option, no SMF settings are selected 487 * 488 * Private: Debug use only 489 */ 490 #define NV_SWITCH_REGKEY_MINION_SET_SMF_SETTINGS "MinionSmfSettings" 491 #define NV_SWITCH_REGKEY_MINION_SET_SMF_SETTINGS_DEFAULT 0x0 492 #define NV_SWITCH_REGKEY_MINION_SET_SMF_SETTINGS_FAST 0x1 493 #define NV_SWITCH_REGKEY_MINION_SET_SMF_SETTINGS_MEDIUM 0x2 494 #define NV_SWITCH_REGKEY_MINION_SET_SMF_SETTINGS_SLOW 0x3 495 #define NV_SWITCH_REGKEY_MINION_SET_SMF_SETTINGS_MEDIUM_SERIAL 0x4 496 497 /* 498 * NV_SWITCH_REGKEY_MINION_SELECT_UPHY_TABLES - Selects uphy tables to send to MINION 499 * 500 * Regkey is set to either SHORT or FAST depending on the environment and timing 501 * needed by MINION to setup alarms during the training sequence 502 * 503 * In the default option, no UPHY table is selected 504 * 505 * Private: Debug use only 506 */ 507 #define NV_SWITCH_REGKEY_MINION_SELECT_UPHY_TABLES "MinionSelectUphyTables" 508 #define NV_SWITCH_REGKEY_MINION_SELECT_UPHY_TABLES_DEFAULT 0x0 509 #define NV_SWITCH_REGKEY_MINION_SELECT_UPHY_TABLES_SHORT 0x1 510 #define NV_SWITCH_REGKEY_MINION_SELECT_UPHY_TABLES_FAST 0x2 511 512 /* 513 * NV_SWITCH_REGKEY_LINK_RECAL_SETTINGS - Programs the L1_RECAL fields 514 * 515 * Regkey is used to program the the following: 516 * 517 * MIN_RECAL_TIME_MANTISSA 518 * MIN_RECAL_TIME_EXPONENT 519 * MAX_RECAL_PERIOD_MANTISSA 520 * MAX_RECAL_PERIOD_EXPONENT 521 * 522 * In the default option, no L1_RECAL fields are programmed 523 * 524 * Private: Debug use only 525 */ 526 #define NV_SWITCH_REGKEY_LINK_RECAL_SETTINGS "LinkRecalSettings" 527 #define NV_SWITCH_REGKEY_LINK_RECAL_SETTINGS_NOP 0x0 528 #define NV_SWITCH_REGKEY_LINK_RECAL_SETTINGS_MIN_RECAL_TIME_MANTISSA 3:0 529 #define NV_SWITCH_REGKEY_LINK_RECAL_SETTINGS_MIN_RECAL_TIME_EXPONENT 7:4 530 #define NV_SWITCH_REGKEY_LINK_RECAL_SETTINGS_MAX_RECAL_PERIOD_MANTISSA 11:8 531 #define NV_SWITCH_REGKEY_LINK_RECAL_SETTINGS_MAX_RECAL_PERIOD_EXPONENT 15:12 532 533 /* 534 * Used to disable private internal-use only regkeys from release build drivers 535 */ 536 537 #define NV_SWITCH_REGKEY_PRIVATE 1 538 #define NV_SWITCH_REGKEY_PUBLIC 0 539 540 #if defined(DEVELOP) || defined(DEBUG) || defined(NV_MODS) 541 #define NV_SWITCH_REGKEY_PRIVATE_ALLOWED 1 542 #else 543 #define NV_SWITCH_REGKEY_PRIVATE_ALLOWED 0 544 #endif //defined(DEVELOP) || defined(DEBUG) || defined(NV_MODS) 545 546 /* 547 * NV_SWITCH_REGKEY_LINK_TRAINING_SELECT - Select the Link training to be done 548 * 549 * For LS10, links can be trained via non-ALI or ALI training. This regkey will 550 * allow for overriding System Defaults and can force either training method 551 * when desired. 552 */ 553 #define NV_SWITCH_REGKEY_LINK_TRAINING_SELECT "LinkTrainingMode" 554 #define NV_SWITCH_REGKEY_LINK_TRAINING_SELECT_DEFAULT 0x0 555 #define NV_SWITCH_REGKEY_LINK_TRAINING_SELECT_NON_ALI 0x1 556 #define NV_SWITCH_REGKEY_LINK_TRAINING_SELECT_ALI 0x2 557 /* 558 * NV_SWITCH_REGKEY_I2C_ACCESS_CONTROL - Enable access to all I2C Ports/Devices 559 * 560 * Private: Debug use only 561 */ 562 #define NV_SWITCH_REGKEY_I2C_ACCESS_CONTROL "I2cAccessControl" 563 #define NV_SWITCH_REGKEY_I2C_ACCESS_CONTROL_DEFAULT 0x0 564 #define NV_SWITCH_REGKEY_I2C_ACCESS_CONTROL_ENABLE 0x1 565 #define NV_SWITCH_REGKEY_I2C_ACCESS_CONTROL_DISABLE 0x0 566 567 /* 568 * NV_SWITCH_REGKEY_FORCE_KERNEL_I2C - Used to force Kernel I2C path 569 * 570 * Private: Debug use only 571 */ 572 #define NV_SWITCH_REGKEY_FORCE_KERNEL_I2C "ForceKernelI2c" 573 #define NV_SWITCH_REGKEY_FORCE_KERNEL_I2C_DEFAULT 0x0 574 #define NV_SWITCH_REGKEY_FORCE_KERNEL_I2C_ENABLE 0x1 575 #define NV_SWITCH_REGKEY_FORCE_KERNEL_I2C_DISABLE 0x0 576 577 /* 578 * NV_SWITCH_REGKEY_CRC_BIT_ERROR_RATE_SHORT - Configure the CRC bit error rate for the short interrupt 579 * 580 * Public: Available in release drivers 581 */ 582 #define NV_SWITCH_REGKEY_CRC_BIT_ERROR_RATE_SHORT "CRCBitErrorRateShort" 583 #define NV_SWITCH_REGKEY_CRC_BIT_ERROR_RATE_SHORT_DEFAULT 0x0 584 #define NV_SWITCH_REGKEY_CRC_BIT_ERROR_RATE_SHORT_THRESHOLD_MAN 2:0 585 #define NV_SWITCH_REGKEY_CRC_BIT_ERROR_RATE_SHORT_THRESHOLD_EXP 3:3 586 #define NV_SWITCH_REGKEY_CRC_BIT_ERROR_RATE_SHORT_TIMESCALE_MAN 6:4 587 #define NV_SWITCH_REGKEY_CRC_BIT_ERROR_RATE_SHORT_TIMESCALE_EXP 11:8 588 589 /* 590 * NV_SWITCH_REGKEY_CRC_BIT_ERROR_RATE_LONG - Configure the CRC bit error rate for the long interrupt 591 * 592 * Public: Available in release drivers 593 */ 594 #define NV_SWITCH_REGKEY_CRC_BIT_ERROR_RATE_LONG "CRCBitErrorRateLong" 595 #define NV_SWITCH_REGKEY_CRC_BIT_ERROR_RATE_LONG_DEFAULT 0x000 596 #define NV_SWITCH_REGKEY_CRC_BIT_ERROR_RATE_LONG_BUG_3365481_CASE_1 0x803 597 #define NV_SWITCH_REGKEY_CRC_BIT_ERROR_RATE_LONG_BUG_3365481_CASE_2 0x703 598 #define NV_SWITCH_REGKEY_CRC_BIT_ERROR_RATE_LONG_BUG_3365481_CASE_5 0x34D 599 #define NV_SWITCH_REGKEY_CRC_BIT_ERROR_RATE_LONG_BUG_3365481_CASE_6 0x00F 600 #define NV_SWITCH_REGKEY_CRC_BIT_ERROR_RATE_LONG_THRESHOLD_MAN 2:0 601 #define NV_SWITCH_REGKEY_CRC_BIT_ERROR_RATE_LONG_THRESHOLD_EXP 3:3 602 #define NV_SWITCH_REGKEY_CRC_BIT_ERROR_RATE_LONG_TIMESCALE_MAN 6:4 603 #define NV_SWITCH_REGKEY_CRC_BIT_ERROR_RATE_LONG_TIMESCALE_EXP 12:8 604 605 /* 606 * NV_SWITCH_REGKEY_SET_LP_THRESHOLD - Sets the LP Threshold Value 607 * 608 * Private: Debug use only 609 */ 610 #define NV_SWITCH_REGKEY_SET_LP_THRESHOLD "LPThreshold" 611 #define NV_SWITCH_REGKEY_SET_LP_THRESHOLD_DEFAULT 0x0 612 613 /* 614 * NV_SWITCH_REGKEY_MINION_INTERRUPTS - Enable/disable MINION interrupts 615 * 616 * Used for bug #3572329. To be removed once fmodel conflict is resolved. 617 * 618 * Public: Available in release drivers 619 */ 620 #define NV_SWITCH_REGKEY_MINION_INTERRUPTS "MINIONIntr" 621 #define NV_SWITCH_REGKEY_MINION_INTERRUPTS_DEFAULT 0x0 622 #define NV_SWITCH_REGKEY_MINION_INTERRUPTS_ENABLE 0x1 623 #define NV_SWITCH_REGKEY_MINION_INTERRUPTS_DISABLE 0x2 624 625 /* 626 * NV_SWITCH_REGKEY_SURPRESS_LINK_ERRORS_FOR_GPU_RESET - surpresses error prints/notifs 627 * 628 * When set, Heartbeat timeout, Short Error Rate and Fault Up interrupts won't be 629 * logged 630 * 631 * Public: Available in release drivers 632 */ 633 634 #define NV_SWITCH_REGKEY_SURPRESS_LINK_ERRORS_FOR_GPU_RESET "SurpressLinkErrorsForGpuReset" 635 #define NV_SWITCH_REGKEY_SURPRESS_LINK_ERRORS_FOR_GPU_RESET_DISABLE 0x0 636 #define NV_SWITCH_REGKEY_SURPRESS_LINK_ERRORS_FOR_GPU_RESET_ENABLE 0x1 637 638 /* 639 * NV_SWITCH_REGKEY_BLOCK_CODE_MODE - Indicates the Forward Error Correction Mode 640 * 641 * Forward Error Correction Mode (Pre-HS). 642 * DEFAULT = System Default 643 * OFF = 0x0 644 * ECC96_ENABLED = 0x1 645 * ECC88_ENABLED = 0x2 646 */ 647 #define NV_SWITCH_REGKEY_BLOCK_CODE_MODE "BlockCodeMode" 648 #define NV_SWITCH_REGKEY_BLOCK_CODE_MODE_DEFAULT 0x0 649 #define NV_SWITCH_REGKEY_BLOCK_CODE_MODE_OFF 0x0 650 #define NV_SWITCH_REGKEY_BLOCK_CODE_MODE_ECC96_ENABLED 0x1 651 #define NV_SWITCH_REGKEY_BLOCK_CODE_MODE_ECC88_ENABLED 0x2 652 653 /* 654 * NV_SWITCH_REGKEY_REFERENCE_CLOCK_MODE - Indicates the reference clock mode for 655 * the system w.r.t. this link. 656 * 657 * DEFAULT = System Default 658 * COMMON = Common reference clock. Spread Spectrum (SS) may or may not be enabled. 659 * NON_COMMON_NO_SS = Non-common reference clock without SS enabled. 660 * NON_COMMON_SS = Non-common reference clock with SS enabled. 661 */ 662 #define NV_SWITCH_REGKEY_REFERENCE_CLOCK_MODE "ReferenceClockMode" 663 #define NV_SWITCH_REGKEY_REFERENCE_CLOCK_MODE_DEFAULT 0x0 664 #define NV_SWITCH_REGKEY_REFERENCE_CLOCK_MODE_COMMON 0x0 665 #define NV_SWITCH_REGKEY_REFERENCE_CLOCK_MODE_RESERVED 0x1 666 #define NV_SWITCH_REGKEY_REFERENCE_CLOCK_MODE_NON_COMMON_NO_SS 0x2 667 #define NV_SWITCH_REGKEY_REFERENCE_CLOCK_MODE_NON_COMMON_SS 0x3 668 669 /* 670 * NV_SWITCH_REGKEY_DBG_LEVEL - Adjusts the amount of debug prints that will be generated 671 * 672 * Prints will be generated at the specified level and above. Eg. Debug level 0 will 673 * enable all prints 674 * 675 * Private: Debug use only 676 */ 677 #define NV_SWITCH_REGKEY_DBG_LEVEL "DebugLevel" 678 #define NV_SWITCH_REGKEY_DBG_LEVEL_DEFAULT NV_SWITCH_REGKEY_DBG_LEVEL_INFO 679 #define NV_SWITCH_REGKEY_DBG_LEVEL_MMIO 0x0 680 #define NV_SWITCH_REGKEY_DBG_LEVEL_NOISY 0x1 681 #define NV_SWITCH_REGKEY_DBG_LEVEL_INFO 0x2 682 #define NV_SWITCH_REGKEY_DBG_LEVEL_SETUP 0x3 683 #define NV_SWITCH_REGKEY_DBG_LEVEL_WARN 0x4 684 #define NV_SWITCH_REGKEY_DBG_LEVEL_ERROR 0x5 685 686 #endif //_REGKEY_NVSWITCH_H_ 687