1 /* 2 * SPDX-FileCopyrightText: Copyright (c) 2005-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. 3 * SPDX-License-Identifier: MIT 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 */ 23 24 #pragma once 25 26 #include <nvtypes.h> 27 28 // 29 // This file was generated with FINN, an NVIDIA coding tool. 30 // Source file: ctrl/ctrl0073/ctrl0073dp.finn 31 // 32 33 #include "ctrl/ctrl0073/ctrl0073base.h" 34 #include "ctrl/ctrl0073/ctrl0073common.h" 35 36 #include "nvcfg_sdk.h" 37 38 /* NV04_DISPLAY_COMMON dfp-display-specific control commands and parameters */ 39 40 /* 41 * NV0073_CTRL_CMD_DP_AUXCH_CTRL 42 * 43 * This command can be used to perform an aux channel transaction to the 44 * displayPort receiver. 45 * 46 * subDeviceInstance 47 * This parameter specifies the subdevice instance within the 48 * NV04_DISPLAY_COMMON parent device to which the operation should be 49 * directed. This parameter must specify a value between zero and the 50 * total number of subdevices within the parent device. This parameter 51 * should be set to zero for default behavior. 52 * displayId 53 * This parameter specifies the ID of the display for which the dfp 54 * caps should be returned. The display ID must a dfp display. 55 * If more than one displayId bit is set or the displayId is not a dfp, 56 * this call will return NV_ERR_INVALID_ARGUMENT. 57 * bAddrOnly 58 * If set to NV_TRUE, this parameter prompts an address-only 59 * i2c-over-AUX transaction to be issued, if supported. Else the 60 * call fails with NVOS_STATUS_ERR_NOT_SUPPORTED. The size parameter is 61 * expected to be 0 for address-only transactions. 62 * cmd 63 * This parameter is an input to this command. The cmd parameter follows 64 * Section 2.4 AUX channel syntax in the DisplayPort spec. 65 * Here are the current defined fields: 66 * NV0073_CTRL_DP_AUXCH_CMD_TYPE 67 * This specifies the request command transaction 68 * NV0073_CTRL_DP_AUXCH_CMD_TYPE_I2C 69 * Set this value to indicate a I2C transaction. 70 * NV0073_CTRL_DP_AUXCH_CMD_TYPE_AUX 71 * Set this value to indicate a DisplayPort transaction. 72 * NV0073_CTRL_DP_AUXCH_CMD_I2C_MOT 73 * This field is dependent on NV0073_CTRL_DP_AUXCH_CMD_TYPE. 74 * It is only valid if NV0073_CTRL_DP_AUXCH_CMD_TYPE_I2C 75 * is specified above and indicates a middle of transaction. 76 * In the case of AUX, this field should be set to zero. The valid 77 * values are: 78 * NV0073_CTRL_DP_AUXCH_CMD_I2C_MOT_FALSE 79 * The I2C transaction is not in the middle of a transaction. 80 * NV0073_CTRL_DP_AUXCH_CMD_I2C_MOT_TRUE 81 * The I2C transaction is in the middle of a transaction. 82 * NV0073_CTRL_DP_AUXCH_CMD_REQ_TYPE 83 * The request type specifies if we are doing a read/write or write 84 * status request: 85 * NV0073_CTRL_DP_AUXCH_CMD_REQ_TYPE_READ 86 * An I2C or AUX channel read is requested. 87 * NV0073_CTRL_DP_AUXCH_CMD_REQ_TYPE_WRITE 88 * An I2C or AUX channel write is requested. 89 * NV0073_CTRL_DP_AUXCH_CMD_REQ_TYPE_WRITE_STATUS 90 * An I2C write status request desired. This value should 91 * not be set in the case of an AUX CH request and only applies 92 * to I2C write transaction command. 93 * addr 94 * This parameter is an input to this command. The addr parameter follows 95 * Section 2.4 in DisplayPort spec and the client should refer to the valid 96 * address in DisplayPort spec. Only the first 20 bits are valid. 97 * data[] 98 * In the case of a read transaction, this parameter returns the data from 99 * transaction request. In the case of a write transaction, the client 100 * should write to this buffer for the data to send. The max # of bytes 101 * allowed is NV0073_CTRL_DP_AUXCH_MAX_DATA_SIZE. 102 * size 103 * Specifies how many data bytes to read/write depending on the transaction type. 104 * The input size value should be indexed from 0. That means if you want to read 105 * 1 byte -> size = 0, 2 bytes -> size = 1, 3 bytes -> size = 2, up to 16 bytes 106 * where size = 15. On return, this parameter returns total number of data bytes 107 * successfully read/written from/to the transaction (indexed from 1). That is, 108 * if you successfully requested 1 byte, you would send down size = 0. On return, 109 * you should expect size = 1 if all 1 byte were successfully read. (Note that 110 * it is valid for a display to reply with fewer than the requested number of 111 * bytes; in that case, it is up to the client to make a new request for the 112 * remaining bytes.) 113 * replyType 114 * This parameter is an output to this command. It returns the auxChannel 115 * status after the end of the aux Ch transaction. The valid values are 116 * based on the DisplayPort spec: 117 * NV0073_CTRL_DP_AUXCH_REPLYTYPE_ACK 118 * In the case of a write, 119 * AUX: write transaction completed and all data bytes written. 120 * I2C: return size bytes has been written to i2c slave. 121 * In the case of a read, return of ACK indicates ready to reply 122 * another read request. 123 * NV0073_CTRL_DP_AUXCH_REPLYTYPE_NACK 124 * In the case of a write, first return size bytes have been written. 125 * In the case of a read, implies that does not have requested data 126 * for the read request transaction. 127 * NV0073_CTRL_DP_AUXCH_REPLYTYPE_DEFER 128 * Not ready for the write/read request and client should retry later. 129 * NV0073_CTRL_DP_DISPLAYPORT_AUXCH_REPLYTYPE_I2CNACK 130 * Applies to I2C transactions only. For I2C write transaction: 131 * has written the first return size bytes to I2C slave before getting 132 * NACK. For a read I2C transaction, the I2C slave has NACKED the I2C 133 * address. 134 * NV0073_CTRL_DP_AUXCH_REPLYTYPE_I2CDEFER 135 * Applicable to I2C transactions. For I2C write and read 136 * transactions, I2C slave has yet to ACK or NACK the I2C transaction. 137 * NV0073_CTRL_DP_AUXCH_REPLYTYPE_TIMEOUT 138 * The receiver did not respond within the timeout period defined in 139 * the DisplayPort 1.1a specification. 140 * retryTimeMs 141 * This parameter is an output to this command. In case of 142 * NVOS_STATUS_ERROR_RETRY return status, this parameter returns the time 143 * duration in milli-seconds after which client should retry this command. 144 * 145 * Possible status values returned are: 146 * NV_OK 147 * NV_ERR_INVALID_PARAM_STRUCT 148 * NV_ERR_INVALID_ARGUMENT 149 * NVOS_STATUS_ERROR_RETRY 150 */ 151 #define NV0073_CTRL_CMD_DP_AUXCH_CTRL (0x731341U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_AUXCH_CTRL_PARAMS_MESSAGE_ID" */ 152 153 #define NV0073_CTRL_DP_AUXCH_MAX_DATA_SIZE 16U 154 #define NV0073_CTRL_DP_AUXCH_CTRL_PARAMS_MESSAGE_ID (0x41U) 155 156 typedef struct NV0073_CTRL_DP_AUXCH_CTRL_PARAMS { 157 NvU32 subDeviceInstance; 158 NvU32 displayId; 159 NvBool bAddrOnly; 160 NvU32 cmd; 161 NvU32 addr; 162 NvU8 data[NV0073_CTRL_DP_AUXCH_MAX_DATA_SIZE]; 163 NvU32 size; 164 NvU32 replyType; 165 NvU32 retryTimeMs; 166 } NV0073_CTRL_DP_AUXCH_CTRL_PARAMS; 167 168 #define NV0073_CTRL_DP_AUXCH_CMD_TYPE 3:3 169 #define NV0073_CTRL_DP_AUXCH_CMD_TYPE_I2C (0x00000000U) 170 #define NV0073_CTRL_DP_AUXCH_CMD_TYPE_AUX (0x00000001U) 171 #define NV0073_CTRL_DP_AUXCH_CMD_I2C_MOT 2:2 172 #define NV0073_CTRL_DP_AUXCH_CMD_I2C_MOT_FALSE (0x00000000U) 173 #define NV0073_CTRL_DP_AUXCH_CMD_I2C_MOT_TRUE (0x00000001U) 174 #define NV0073_CTRL_DP_AUXCH_CMD_REQ_TYPE 1:0 175 #define NV0073_CTRL_DP_AUXCH_CMD_REQ_TYPE_WRITE (0x00000000U) 176 #define NV0073_CTRL_DP_AUXCH_CMD_REQ_TYPE_READ (0x00000001U) 177 #define NV0073_CTRL_DP_AUXCH_CMD_REQ_TYPE_WRITE_STATUS (0x00000002U) 178 179 #define NV0073_CTRL_DP_AUXCH_ADDR 20:0 180 181 #define NV0073_CTRL_DP_AUXCH_REPLYTYPE 3:0 182 #define NV0073_CTRL_DP_AUXCH_REPLYTYPE_ACK (0x00000000U) 183 #define NV0073_CTRL_DP_AUXCH_REPLYTYPE_NACK (0x00000001U) 184 #define NV0073_CTRL_DP_AUXCH_REPLYTYPE_DEFER (0x00000002U) 185 #define NV0073_CTRL_DP_AUXCH_REPLYTYPE_TIMEOUT (0x00000003U) 186 #define NV0073_CTRL_DP_AUXCH_REPLYTYPE_I2CNACK (0x00000004U) 187 #define NV0073_CTRL_DP_AUXCH_REPLYTYPE_I2CDEFER (0x00000008U) 188 189 //This is not the register field, this is software failure case when we 190 //have invalid argument 191 #define NV0073_CTRL_DP_AUXCH_REPLYTYPE_INVALID_ARGUMENT (0xffffffffU) 192 193 /* 194 * NV0073_CTRL_CMD_DP_AUXCH_SET_SEMA 195 * 196 * This command can be used to set the semaphore in order to gain control of 197 * the aux channel. This control is only used in HW verification. 198 * 199 * subDeviceInstance 200 * This parameter specifies the subdevice instance within the 201 * NV04_DISPLAY_COMMON parent device to which the operation should be 202 * directed. This parameter must specify a value between zero and the 203 * total number of subdevices within the parent device. This parameter 204 * should be set to zero for default behavior. 205 * displayId 206 * This parameter specifies the ID of the display for which the dfp 207 * caps should be returned. The display ID must a dfp display 208 * as determined with the NV0073_CTRL_CMD_SPECIFIC_GET_TYPE command. 209 * If more than one displayId bit is set or the displayId is not a dfp, 210 * this call will return NV_ERR_INVALID_ARGUMENT. 211 * owner 212 * This parameter is an input to this command. 213 * Here are the current defined fields: 214 * NV0073_CTRL_DP_AUXCH_SET_SEMA_OWNER_RM 215 * Write the aux channel semaphore for resource manager to own the 216 * the aux channel. 217 * NV0073_CTRL_DP_AUXCH_SET_SEMA_OWNER_VBIOS 218 * Write the aux channel semaphore for vbios/efi to own the 219 * the aux channel. This value is used only for HW verification 220 * and should not be used in normal driver operation. 221 * NV0073_CTRL_DP_AUXCH_SET_SEMA_OWNER_PMU 222 * Write the aux channel semaphore for pmu to own the 223 * the aux channel. This value is used only by pmu 224 * and should not be used in normal driver operation. 225 * NV0073_CTRL_DP_AUXCH_SET_SEMA_OWNER_DPU 226 * Write the aux channel semaphore for dpu to own the 227 * the aux channel and should not be used in normal 228 * driver operation. 229 * NV0073_CTRL_DP_AUXCH_SET_SEMA_OWNER_SEC2 230 * Write the aux channel semaphore for sec2 to own the 231 * the aux channel and should not be used in normal 232 * driver operation. 233 * NV0073_CTRL_DP_AUXCH_SET_SEMA_OWNER_RELEASE 234 * Write the aux channel semaphore for hardware to own the 235 * the aux channel. This value is used only for HW verification 236 * and should not be used in normal driver operation. 237 * Possible status values returned are: 238 * NV_OK 239 * NV_ERR_INVALID_PARAM_STRUCT 240 * NV_ERR_INVALID_ARGUMENT 241 */ 242 243 #define NV0073_CTRL_CMD_DP_AUXCH_SET_SEMA (0x731342U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_AUXCH_SET_SEMA_PARAMS_MESSAGE_ID" */ 244 245 #define NV0073_CTRL_DP_AUXCH_SET_SEMA_PARAMS_MESSAGE_ID (0x42U) 246 247 typedef struct NV0073_CTRL_DP_AUXCH_SET_SEMA_PARAMS { 248 NvU32 subDeviceInstance; 249 NvU32 displayId; 250 NvU32 owner; 251 } NV0073_CTRL_DP_AUXCH_SET_SEMA_PARAMS; 252 253 #define NV0073_CTRL_DP_AUXCH_SET_SEMA_OWNER 2:0 254 #define NV0073_CTRL_DP_AUXCH_SET_SEMA_OWNER_RELEASE (0x00000000U) 255 #define NV0073_CTRL_DP_AUXCH_SET_SEMA_OWNER_RM (0x00000001U) 256 #define NV0073_CTRL_DP_AUXCH_SET_SEMA_OWNER_VBIOS (0x00000002U) 257 #define NV0073_CTRL_DP_AUXCH_SET_SEMA_OWNER_PMU (0x00000003U) 258 #define NV0073_CTRL_DP_AUXCH_SET_SEMA_OWNER_DPU (0x00000004U) 259 #define NV0073_CTRL_DP_AUXCH_SET_SEMA_OWNER_SEC2 (0x00000005U) 260 261 /* 262 * NV0073_CTRL_CMD_DP_CTRL 263 * 264 * This command is used to set various displayPort configurations for 265 * the specified displayId such a lane count and link bandwidth. It 266 * is assumed that link training has already occurred. 267 * 268 * subDeviceInstance 269 * This parameter specifies the subdevice instance within the 270 * NV04_DISPLAY_COMMON parent device to which the operation should be 271 * directed. This parameter must specify a value between zero and the 272 * total number of subdevices within the parent device. This parameter 273 * should be set to zero for default behavior. 274 * displayId 275 * This parameter specifies the ID of the display for which the dfp 276 * caps should be returned. The display ID must a dfp display. 277 * If more than one displayId bit is set or the displayId is not a dfp, 278 * this call will return NV_ERR_INVALID_ARGUMENT. 279 * cmd 280 * This parameter is an input to this command. 281 * Here are the current defined fields: 282 * NV0073_CTRL_DP_CMD_SET_LANE_COUNT 283 * Set to specify the number of displayPort lanes to configure. 284 * NV0073_CTRL_DP_CMD_SET_LANE_COUNT_FALSE 285 * No request to set the displayport lane count. 286 * NV0073_CTRL_DP_CMD_SET_LANE_COUNT_TRUE 287 * Set this value to indicate displayport lane count change. 288 * NV0073_CTRL_DP_CMD_SET_LINK_BANDWIDTH 289 * Set to specify a request to change the link bandwidth. 290 * NV0073_CTRL_DP_CMD_SET_LINK_BANDWIDTH_FALSE 291 * No request to set the displayport link bandwidth. 292 * NV0073_CTRL_DP_CMD_SET_LINK_BANDWIDTH_TRUE 293 * Set this value to indicate displayport link bandwidth change. 294 * NV0073_CTRL_DP_CMD_SET_LINK_BANDWIDTH 295 * Set to specify a request to change the link bandwidth. 296 * NV0073_CTRL_DP_CMD_SET_LINK_BANDWIDTH_FALSE 297 * No request to set the displayport link bandwidth. 298 * NV0073_CTRL_DP_CMD_SET_LINK_BANDWIDTH_TRUE 299 * Set this value to indicate displayport link bandwidth change. 300 * NV0073_CTRL_DP_CMD_DISABLE_DOWNSPREAD 301 * Set to disable downspread during link training. 302 * NV0073_CTRL_DP_CMD_DISABLE_DOWNSPREAD_FALSE 303 * Downspread will be enabled. 304 * NV0073_CTRL_DP_CMD_DISABLE_DOWNSPREAD_TRUE 305 * Downspread will be disabled (e.g. for compliance testing). 306 * NV0073_CTRL_DP_CMD_SET_FORMAT_MODE 307 * This field specifies the DP stream mode. 308 * NV0073_CTRL_DP_CMD_SET_FORMAT_MODE_SINGLE_STREAM 309 * This value indicates that single stream mode is specified. 310 * NV0073_CTRL_DP_CMD_SET_FORMAT_MODE_MULTI_STREAM 311 * This value indicates that multi stream mode is specified. 312 * NV0073_CTRL_DP_CMD_FAST_LINK_TRAINING 313 * Set to do Fast link training (avoid AUX transactions for link 314 * training). We need to restore all the previous trained link settings 315 * (e.g. the drive current/preemphasis settings) before doing FLT. 316 * During FLT, we send training pattern 1 followed by training pattern 2 317 * each for a period of 500us. 318 * NV0073_CTRL_DP_CMD_FAST_LINK_TRAINING_NO 319 * Not a fast link training scenario. 320 * NV0073_CTRL_DP_CMD_FAST_LINK_TRAINING_YES 321 * Do fast link training. 322 * NV0073_CTRL_DP_CMD_NO_LINK_TRAINING 323 * Set to do No link training. We need to restore all the previous 324 * trained link settings (e.g. the drive current/preemphasis settings) 325 * before doing NLT, but we don't need to do the Clock Recovery and 326 * Channel Equalization. (Please refer to NVIDIA PANEL SELFREFRESH 327 * CONTROLLER SPECIFICATION 3.1.6 for detail flow) 328 * NV0073_CTRL_DP_CMD_NO_LINK_TRAINING_NO 329 * Not a no link training scenario. 330 * NV0073_CTRL_DP_CMD_NO_LINK_TRAINING_YES 331 * Do no link training. 332 * NV0073_CTRL_DP_CMD_USE_DOWNSPREAD_SETTING 333 * Specifies whether RM should use the DP Downspread setting specified by 334 * NV0073_CTRL_DP_CMD_DISABLE_DOWNSPREAD command regardless of what the Display 335 * is capable of. This is used along with the Fake link training option so that 336 * we can configure the GPU to enable/disable spread when a real display is 337 * not connected. 338 * NV0073_CTRL_DP_CMD_USE_DOWNSPREAD_SETTING_FORCE 339 * RM Always use the DP Downspread setting specified. 340 * NV0073_CTRL_DP_CMD_USE_DOWNSPREAD_SETTING_DEFAULT 341 * RM will enable Downspread only if the display supports it. (default) 342 * NV0073_CTRL_DP_CMD_SKIP_HW_PROGRAMMING 343 * Specifies whether RM should skip HW training of the link. 344 * If this is the case then RM only updates its SW state without actually 345 * touching any HW registers. Clients should use this ONLY if it has determined - 346 * a. link is trained and not lost 347 * b. desired link config is same as current trained link config 348 * c. link is not in D3 (should be in D0) 349 * NV0073_CTRL_DP_CMD_SKIP_HW_PROGRAMMING_NO 350 * RM doesn't skip HW LT as the current Link Config is not the same as the 351 * requested Link Config. 352 * NV0073_CTRL_DP_CMD_SKIP_HW_PROGRAMMING_YES 353 * RM skips HW LT and only updates its SW state as client has determined that 354 * the current state of the link and the requested Link Config is the same. 355 * NV0073_CTRL_DP_CMD_DISABLE_LINK_CONFIG 356 * Set if the client does not want link training to happen. 357 * This should ONLY be used for HW verification. 358 * NV0073_CTRL_DP_CMD_DISABLE_LINK_CONFIG_FALSE 359 * This is normal production behaviour which shall perform 360 * link training or follow the normal procedure for lane count 361 * reduction. 362 * NV0073_CTRL_DP_CMD_DISABLE_LINK_CONFIG_TRUE 363 * Set this value to not perform link config steps, this should 364 * only be turned on for HW verif testing. If _LINK_BANDWIDTH 365 * or _LANE_COUNT is set, RM will only write to the TX DP registers 366 * and perform no link training. 367 * NV0073_CTRL_DP_CMD_POST_LT_ADJ_REQ_GRANTED 368 * This field specifies if source grants Post Link training Adjustment request or not. 369 * NV0073_CTRL_DP_CMD_POST_LT_ADJ_REQ_GRANTED_NO 370 * Source does not grant Post Link training Adjustment request 371 * NV0073_CTRL_DP_CMD_POST_LT_ADJ_REQ_GRANTED_YES 372 * Source grants Post Link training Adjustment request 373 * Source wants to link train LT Tunable Repeaters 374 * NV0073_CTRL_DP_CMD_FAKE_LINK_TRAINING 375 * This field specifies if fake link training is to be done. This will 376 * program enough of the hardware to avoid any hardware hangs and 377 * depending upon option chosen by the client, OR will be enabled for 378 * transmisssion. 379 * NV0073_CTRL_DP_CMD_FAKE_LINK_TRAINING_NO 380 * No Fake LT will be performed 381 * NV0073_CTRL_DP_CMD_FAKE_LINK_TRAINING_DONOT_TOGGLE_TRANSMISSION 382 * SOR will be not powered up during Fake LT 383 * NV0073_CTRL_DP_CMD_FAKE_LINK_TRAINING_TOGGLE_TRANSMISSION_ON 384 * SOR will be powered up during Fake LT 385 * NV0073_CTRL_DP_CMD_TRAIN_PHY_REPEATER 386 * This field specifies if source wants to link train LT Tunable Repeaters or not. 387 * NV0073_CTRL_DP_CMD_TRAIN_PHY_REPEATER_NO 388 * Source does not want to link train LT Tunable Repeaters 389 * NV0073_CTRL_DP_CMD_TRAIN_PHY_REPEATER_YES 390 * NV0073_CTRL_DP_CMD_BANDWIDTH_TEST 391 * Set if the client wants to reset the link after the link 392 * training is done. As a part of uncommtting a DP display. 393 * NV0073_CTRL_DP_CMD_BANDWIDTH_TEST_NO 394 * This is for normal operation, if DD decided not to reset the link. 395 * NV0073_CTRL_DP_CMD_BANDWIDTH_TEST_YES 396 * This is to reset the link, if DD decided to uncommit the display because 397 * the link is no more required to be enabled, as in a DP compliance test. 398 * NV0073_CTRL_DP_CMD_LINK_CONFIG_CHECK_DISABLE 399 * Set if the client does not want link training to happen. 400 * This should ONLY be used for HW verification if necessary. 401 * NV0073_CTRL_DP_CMD_LINK_CONFIG_CHECK_DISABLE_FALSE 402 * This is normal production behaviour which shall perform 403 * pre link training checks such as if both rx and tx are capable 404 * of the requested config for lane and link bw. 405 * NV0073_CTRL_DP_CMD_LINK_CONFIG_CHECK_DISABLE_TRUE 406 * Set this value to bypass link config check, this should 407 * only be turned on for HW verif testing. If _LINK_BANDWIDTH 408 * or _LANE_COUNT is set, RM will not check TX and DX caps. 409 * NV0073_CTRL_DP_CMD_FALLBACK_CONFIG 410 * Set if requested config by client fails and if link if being 411 * trained for the fallback config. 412 * NV0073_CTRL_DP_CMD_FALLBACK_CONFIG_FALSE 413 * This is the normal case when the link is being trained for a requested config. 414 * NV0073_CTRL_DP_CMD_LINK_CONFIG_CHECK_DISABLE_TRUE 415 * Set this value in case the link configuration for requested config fails 416 * and the link is being trained for a fallback config. 417 * NV0073_CTRL_DP_CMD_ENABLE_FEC 418 * Specifies whether RM should set NV_DPCD14_FEC_CONFIGURATION_FEC_READY 419 * before link training if client has determined that FEC is required(for DSC). 420 * If required to be enabled RM sets FEC enable bit in panel, start link training. 421 * Enabling/disabling FEC on GPU side is not done during Link training 422 * and RM Ctrl call NV0073_CTRL_CMD_DP_CONFIGURE_FEC has to be called 423 * explicitly to enable/disable FEC after LT(including PostLT LQA). 424 * If enabled, FEC would be disabled while powering down the link. 425 * Client has to make sure to account for 3% overhead of transmitting 426 * FEC symbols while calculating DP bandwidth. 427 * NV0073_CTRL_DP_CMD_ENABLE_FEC_FALSE 428 * This is the normal case when FEC is not required 429 * NV0073_CTRL_DP_CMD_ENABLE_FEC_TRUE 430 * Set this value in case FEC needs to be enabled 431 * data 432 * This parameter is an input and output to this command. 433 * Here are the current defined fields: 434 * NV0073_CTRL_DP_DATA_SET_LANE_COUNT 435 * This field specifies the desired setting for lane count. A client 436 * may choose any lane count as long as it does not exceed the 437 * capability of DisplayPort receiver as indicated in the 438 * receiver capability field. The valid values for this field are: 439 * NV0073_CTRL_DP_DATA_SET_LANE_COUNT_0 440 * For zero-lane configurations, link training is shut down. 441 * NV0073_CTRL_DP_DATA_SET_LANE_COUNT_1 442 * For one-lane configurations, lane0 is used. 443 * NV0073_CTRL_DP_DATA_SET_LANE_COUNT_2 444 * For two-lane configurations, lane0 and lane1 is used. 445 * NV0073_CTRL_DP_DATA_SET_LANE_COUNT_4 446 * For four-lane configurations, all lanes are used. 447 * NV0073_CTRL_DP_DATA_SET_LANE_COUNT_8 448 * For devices that supports 8-lane DP. 449 * On return, the lane count setting is returned which may be 450 * different from the requested input setting. 451 * NV0073_CTRL_DP_DATA_SET_LINK_BW 452 * This field specifies the desired setting for link bandwidth. There 453 * are only four supported main link bandwidth settings. The 454 * valid values for this field are: 455 * NV0073_CTRL_DP_DATA_SET_LINK_BW_1_62GBPS 456 * NV0073_CTRL_DP_DATA_SET_LINK_BW_2_70GBPS 457 * NV0073_CTRL_DP_DATA_SET_LINK_BW_5_40GBPS 458 * NV0073_CTRL_DP_DATA_SET_LINK_BW_8_10GBPS 459 * On return, the link bandwidth setting is returned which may be 460 * different from the requested input setting. 461 * NV0073_CTRL_DP_DATA_TARGET 462 * This field specifies which physical repeater or sink to be trained. 463 * Client should make sure 464 * 1. Physical repeater should be targeted in order, start from the one closest to GPU. 465 * 2. All physical repeater is properly trained before targets sink. 466 * The valid values for this field are: 467 * NV0073_CTRL_DP_DATA_TARGET_PHY_REPEATER_X 468 * 'X' denotes physical repeater index. It's a 1-based index to 469 * reserve 0 for _SINK. 470 * 'X' can't be more than 8. 471 * NV0073_CTRL_DP_DATA_TARGET_SINK 472 * err 473 * This parameter specifies provides info regarding the outcome 474 * of this calling control call. If zero, no errors were found. 475 * Otherwise, this parameter will specify the error detected. 476 * The valid parameter is broken down as follows: 477 * NV0073_CTRL_DP_ERR_SET_LANE_COUNT 478 * If set to _ERR, set lane count failed. 479 * NV0073_CTRL_DP_ERR_SET_LINK_BANDWIDTH 480 * If set to _ERR, set link bandwidth failed. 481 * NV0073_CTRL_DP_ERR_DISABLE_DOWNSPREAD 482 * If set to _ERR, disable downspread failed. 483 * NV0073_CTRL_DP_ERR_INVALID_PARAMETER 484 * If set to _ERR, at least one of the calling functions 485 * failed due to an invalid parameter. 486 * NV0073_CTRL_DP_ERR_SET_LINK_TRAINING 487 * If set to _ERR, link training failed. 488 * NV0073_CTRL_DP_ERR_TRAIN_PHY_REPEATER 489 * If set to _ERR, the operation to Link Train repeater is failed. 490 * NV0073_CTRL_DP_ERR_ENABLE_FEC 491 * If set to _ERR, the operation to enable FEC is failed. 492 * retryTimeMs 493 * This parameter is an output to this command. In case of 494 * NVOS_STATUS_ERROR_RETRY return status, this parameter returns the time 495 * duration in milli-seconds after which client should retry this command. 496 * 497 * Possible status values returned are: 498 * NV_OK 499 * NV_ERR_INVALID_PARAM_STRUCT 500 * NV_ERR_INVALID_ARGUMENT 501 * NVOS_STATUS_ERROR_RETRY 502 */ 503 504 #define NV0073_CTRL_CMD_DP_CTRL (0x731343U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_CTRL_PARAMS_MESSAGE_ID" */ 505 506 #define NV0073_CTRL_DP_CTRL_PARAMS_MESSAGE_ID (0x43U) 507 508 typedef struct NV0073_CTRL_DP_CTRL_PARAMS { 509 NvU32 subDeviceInstance; 510 NvU32 displayId; 511 NvU32 cmd; 512 NvU32 data; 513 NvU32 err; 514 NvU32 retryTimeMs; 515 NvU32 eightLaneDpcdBaseAddr; 516 } NV0073_CTRL_DP_CTRL_PARAMS; 517 518 #define NV0073_CTRL_DP_CMD_SET_LANE_COUNT 0:0 519 #define NV0073_CTRL_DP_CMD_SET_LANE_COUNT_FALSE (0x00000000U) 520 #define NV0073_CTRL_DP_CMD_SET_LANE_COUNT_TRUE (0x00000001U) 521 #define NV0073_CTRL_DP_CMD_SET_LINK_BW 1:1 522 #define NV0073_CTRL_DP_CMD_SET_LINK_BW_FALSE (0x00000000U) 523 #define NV0073_CTRL_DP_CMD_SET_LINK_BW_TRUE (0x00000001U) 524 #define NV0073_CTRL_DP_CMD_DISABLE_DOWNSPREAD 2:2 525 #define NV0073_CTRL_DP_CMD_DISABLE_DOWNSPREAD_FALSE (0x00000000U) 526 #define NV0073_CTRL_DP_CMD_DISABLE_DOWNSPREAD_TRUE (0x00000001U) 527 #define NV0073_CTRL_DP_CMD_UNUSED 3:3 528 #define NV0073_CTRL_DP_CMD_SET_FORMAT_MODE 4:4 529 #define NV0073_CTRL_DP_CMD_SET_FORMAT_MODE_SINGLE_STREAM (0x00000000U) 530 #define NV0073_CTRL_DP_CMD_SET_FORMAT_MODE_MULTI_STREAM (0x00000001U) 531 #define NV0073_CTRL_DP_CMD_FAST_LINK_TRAINING 5:5 532 #define NV0073_CTRL_DP_CMD_FAST_LINK_TRAINING_NO (0x00000000U) 533 #define NV0073_CTRL_DP_CMD_FAST_LINK_TRAINING_YES (0x00000001U) 534 #define NV0073_CTRL_DP_CMD_NO_LINK_TRAINING 6:6 535 #define NV0073_CTRL_DP_CMD_NO_LINK_TRAINING_NO (0x00000000U) 536 #define NV0073_CTRL_DP_CMD_NO_LINK_TRAINING_YES (0x00000001U) 537 #define NV0073_CTRL_DP_CMD_SET_ENHANCED_FRAMING 7:7 538 #define NV0073_CTRL_DP_CMD_SET_ENHANCED_FRAMING_FALSE (0x00000000U) 539 #define NV0073_CTRL_DP_CMD_SET_ENHANCED_FRAMING_TRUE (0x00000001U) 540 #define NV0073_CTRL_DP_CMD_USE_DOWNSPREAD_SETTING 8:8 541 #define NV0073_CTRL_DP_CMD_USE_DOWNSPREAD_SETTING_DEFAULT (0x00000000U) 542 #define NV0073_CTRL_DP_CMD_USE_DOWNSPREAD_SETTING_FORCE (0x00000001U) 543 #define NV0073_CTRL_DP_CMD_SKIP_HW_PROGRAMMING 9:9 544 #define NV0073_CTRL_DP_CMD_SKIP_HW_PROGRAMMING_NO (0x00000000U) 545 #define NV0073_CTRL_DP_CMD_SKIP_HW_PROGRAMMING_YES (0x00000001U) 546 #define NV0073_CTRL_DP_CMD_POST_LT_ADJ_REQ_GRANTED 10:10 547 #define NV0073_CTRL_DP_CMD_POST_LT_ADJ_REQ_GRANTED_NO (0x00000000U) 548 #define NV0073_CTRL_DP_CMD_POST_LT_ADJ_REQ_GRANTED_YES (0x00000001U) 549 #define NV0073_CTRL_DP_CMD_FAKE_LINK_TRAINING 12:11 550 #define NV0073_CTRL_DP_CMD_FAKE_LINK_TRAINING_NO (0x00000000U) 551 #define NV0073_CTRL_DP_CMD_FAKE_LINK_TRAINING_DONOT_TOGGLE_TRANSMISSION (0x00000001U) 552 #define NV0073_CTRL_DP_CMD_FAKE_LINK_TRAINING_TOGGLE_TRANSMISSION_ON (0x00000002U) 553 #define NV0073_CTRL_DP_CMD_TRAIN_PHY_REPEATER 13:13 554 #define NV0073_CTRL_DP_CMD_TRAIN_PHY_REPEATER_NO (0x00000000U) 555 #define NV0073_CTRL_DP_CMD_TRAIN_PHY_REPEATER_YES (0x00000001U) 556 #define NV0073_CTRL_DP_CMD_FALLBACK_CONFIG 14:14 557 #define NV0073_CTRL_DP_CMD_FALLBACK_CONFIG_FALSE (0x00000000U) 558 #define NV0073_CTRL_DP_CMD_FALLBACK_CONFIG_TRUE (0x00000001U) 559 #define NV0073_CTRL_DP_CMD_ENABLE_FEC 15:15 560 #define NV0073_CTRL_DP_CMD_ENABLE_FEC_FALSE (0x00000000U) 561 #define NV0073_CTRL_DP_CMD_ENABLE_FEC_TRUE (0x00000001U) 562 563 #define NV0073_CTRL_DP_CMD_BANDWIDTH_TEST 29:29 564 #define NV0073_CTRL_DP_CMD_BANDWIDTH_TEST_NO (0x00000000U) 565 #define NV0073_CTRL_DP_CMD_BANDWIDTH_TEST_YES (0x00000001U) 566 #define NV0073_CTRL_DP_CMD_LINK_CONFIG_CHECK_DISABLE 30:30 567 #define NV0073_CTRL_DP_CMD_LINK_CONFIG_CHECK_DISABLE_FALSE (0x00000000U) 568 #define NV0073_CTRL_DP_CMD_LINK_CONFIG_CHECK_DISABLE_TRUE (0x00000001U) 569 #define NV0073_CTRL_DP_CMD_DISABLE_LINK_CONFIG 31:31 570 #define NV0073_CTRL_DP_CMD_DISABLE_LINK_CONFIG_FALSE (0x00000000U) 571 #define NV0073_CTRL_DP_CMD_DISABLE_LINK_CONFIG_TRUE (0x00000001U) 572 573 #define NV0073_CTRL_DP_DATA_SET_LANE_COUNT 4:0 574 #define NV0073_CTRL_DP_DATA_SET_LANE_COUNT_0 (0x00000000U) 575 #define NV0073_CTRL_DP_DATA_SET_LANE_COUNT_1 (0x00000001U) 576 #define NV0073_CTRL_DP_DATA_SET_LANE_COUNT_2 (0x00000002U) 577 #define NV0073_CTRL_DP_DATA_SET_LANE_COUNT_4 (0x00000004U) 578 #define NV0073_CTRL_DP_DATA_SET_LANE_COUNT_8 (0x00000008U) 579 #define NV0073_CTRL_DP_DATA_SET_LINK_BW 15:8 580 #define NV0073_CTRL_DP_DATA_SET_LINK_BW_1_62GBPS (0x00000006U) 581 #define NV0073_CTRL_DP_DATA_SET_LINK_BW_2_16GBPS (0x00000008U) 582 #define NV0073_CTRL_DP_DATA_SET_LINK_BW_2_43GBPS (0x00000009U) 583 #define NV0073_CTRL_DP_DATA_SET_LINK_BW_2_70GBPS (0x0000000AU) 584 #define NV0073_CTRL_DP_DATA_SET_LINK_BW_3_24GBPS (0x0000000CU) 585 #define NV0073_CTRL_DP_DATA_SET_LINK_BW_4_32GBPS (0x00000010U) 586 #define NV0073_CTRL_DP_DATA_SET_LINK_BW_5_40GBPS (0x00000014U) 587 #define NV0073_CTRL_DP_DATA_SET_LINK_BW_8_10GBPS (0x0000001EU) 588 #define NV0073_CTRL_DP_DATA_SET_ENHANCED_FRAMING 18:18 589 #define NV0073_CTRL_DP_DATA_SET_ENHANCED_FRAMING_NO (0x00000000U) 590 #define NV0073_CTRL_DP_DATA_SET_ENHANCED_FRAMING_YES (0x00000001U) 591 #define NV0073_CTRL_DP_DATA_TARGET 22:19 592 #define NV0073_CTRL_DP_DATA_TARGET_SINK (0x00000000U) 593 #define NV0073_CTRL_DP_DATA_TARGET_PHY_REPEATER_0 (0x00000001U) 594 #define NV0073_CTRL_DP_DATA_TARGET_PHY_REPEATER_1 (0x00000002U) 595 #define NV0073_CTRL_DP_DATA_TARGET_PHY_REPEATER_2 (0x00000003U) 596 #define NV0073_CTRL_DP_DATA_TARGET_PHY_REPEATER_3 (0x00000004U) 597 #define NV0073_CTRL_DP_DATA_TARGET_PHY_REPEATER_4 (0x00000005U) 598 #define NV0073_CTRL_DP_DATA_TARGET_PHY_REPEATER_5 (0x00000006U) 599 #define NV0073_CTRL_DP_DATA_TARGET_PHY_REPEATER_6 (0x00000007U) 600 #define NV0073_CTRL_DP_DATA_TARGET_PHY_REPEATER_7 (0x00000008U) 601 602 #define NV0073_CTRL_DP_ERR_SET_LANE_COUNT 0:0 603 #define NV0073_CTRL_DP_ERR_SET_LANE_COUNT_NOERR (0x00000000U) 604 #define NV0073_CTRL_DP_ERR_SET_LANE_COUNT_ERR (0x00000001U) 605 #define NV0073_CTRL_DP_ERR_SET_LINK_BW 1:1 606 #define NV0073_CTRL_DP_ERR_SET_LINK_BW_NOERR (0x00000000U) 607 #define NV0073_CTRL_DP_ERR_SET_LINK_BW_ERR (0x00000001U) 608 #define NV0073_CTRL_DP_ERR_DISABLE_DOWNSPREAD 2:2 609 #define NV0073_CTRL_DP_ERR_DISABLE_DOWNSPREAD_NOERR (0x00000000U) 610 #define NV0073_CTRL_DP_ERR_DISABLE_DOWNSPREAD_ERR (0x00000001U) 611 #define NV0073_CTRL_DP_ERR_UNUSED 3:3 612 #define NV0073_CTRL_DP_ERR_CLOCK_RECOVERY 4:4 613 #define NV0073_CTRL_DP_ERR_CLOCK_RECOVERY_NOERR (0x00000000U) 614 #define NV0073_CTRL_DP_ERR_CLOCK_RECOVERY_ERR (0x00000001U) 615 #define NV0073_CTRL_DP_ERR_CHANNEL_EQUALIZATION 5:5 616 #define NV0073_CTRL_DP_ERR_CHANNEL_EQUALIZATION_NOERR (0x00000000U) 617 #define NV0073_CTRL_DP_ERR_CHANNEL_EQUALIZATION_ERR (0x00000001U) 618 #define NV0073_CTRL_DP_ERR_TRAIN_PHY_REPEATER 6:6 619 #define NV0073_CTRL_DP_ERR_TRAIN_PHY_REPEATER_NOERR (0x00000000U) 620 #define NV0073_CTRL_DP_ERR_TRAIN_PHY_REPEATER_ERR (0x00000001U) 621 #define NV0073_CTRL_DP_ERR_ENABLE_FEC 7:7 622 #define NV0073_CTRL_DP_ERR_ENABLE_FEC_NOERR (0x00000000U) 623 #define NV0073_CTRL_DP_ERR_ENABLE_FEC_ERR (0x00000001U) 624 #define NV0073_CTRL_DP_ERR_CR_DONE_LANE 11:8 625 #define NV0073_CTRL_DP_ERR_CR_DONE_LANE_0_LANE (0x00000000U) 626 #define NV0073_CTRL_DP_ERR_CR_DONE_LANE_1_LANE (0x00000001U) 627 #define NV0073_CTRL_DP_ERR_CR_DONE_LANE_2_LANE (0x00000002U) 628 #define NV0073_CTRL_DP_ERR_CR_DONE_LANE_4_LANE (0x00000004U) 629 #define NV0073_CTRL_DP_ERR_CR_DONE_LANE_8_LANE (0x00000008U) 630 #define NV0073_CTRL_DP_ERR_EQ_DONE_LANE 15:12 631 #define NV0073_CTRL_DP_ERR_EQ_DONE_LANE_0_LANE (0x00000000U) 632 #define NV0073_CTRL_DP_ERR_EQ_DONE_LANE_1_LANE (0x00000001U) 633 #define NV0073_CTRL_DP_ERR_EQ_DONE_LANE_2_LANE (0x00000002U) 634 #define NV0073_CTRL_DP_ERR_EQ_DONE_LANE_4_LANE (0x00000004U) 635 #define NV0073_CTRL_DP_ERR_EQ_DONE_LANE_8_LANE (0x00000008U) 636 #define NV0073_CTRL_DP_ERR_INVALID_PARAMETER 30:30 637 #define NV0073_CTRL_DP_ERR_INVALID_PARAMETER_NOERR (0x00000000U) 638 #define NV0073_CTRL_DP_ERR_INVALID_PARAMETER_ERR (0x00000001U) 639 #define NV0073_CTRL_DP_ERR_LINK_TRAINING 31:31 640 #define NV0073_CTRL_DP_ERR_LINK_TRAINING_NOERR (0x00000000U) 641 #define NV0073_CTRL_DP_ERR_LINK_TRAINING_ERR (0x00000001U) 642 643 /* 644 * NV0073_CTRL_DP_LANE_DATA_PARAMS 645 * 646 * This structure provides lane characteristics. 647 * 648 * subDeviceInstance 649 * This parameter specifies the subdevice instance within the 650 * NV04_DISPLAY_COMMON parent device to which the operation should be 651 * directed. This parameter must specify a value between zero and the 652 * total number of subdevices within the parent device. This parameter 653 * should be set to zero for default behavior. 654 * displayId 655 * This parameter specifies the ID of the display for which the dfp 656 * caps should be returned. The display ID must a dfp display. 657 * If more than one displayId bit is set or the displayId is not a dfp, 658 * this call will return NV_ERR_INVALID_ARGUMENT. 659 * numLanes 660 * Indicates number of lanes for which the data is valid 661 * data 662 * This parameter is an input to this command. 663 * Here are the current defined fields: 664 * NV0073_CTRL_DP_LANE_DATA_PREEMPHASIS 665 * This field specifies the preemphasis level set in the lane. 666 * The valid values for this field are: 667 * NV0073_CTRL_DP_LANE_DATA_PREEMPHASIS_NONE 668 * No-preemphais for this lane. 669 * NV0073_CTRL_DP_LANE_DATA_PREEMPHASIS_LEVEL1 670 * Preemphasis set to 3.5 dB. 671 * NV0073_CTRL_DP_LANE_DATA_PREEMPHASIS_LEVEL2 672 * Preemphasis set to 6.0 dB. 673 * NV0073_CTRL_DP_LANE_DATA_PREEMPHASIS_LEVEL3 674 * Preemphasis set to 9.5 dB. 675 * NV0073_CTRL_DP_LANE_DATA_DRIVECURRENT 676 * This field specifies the drive current set in the lane. 677 * The valid values for this field are: 678 * NV0073_CTRL_DP_LANE_DATA_DRIVECURRENT_LEVEL0 679 * Drive current level is set to 8 mA 680 * NV0073_CTRL_DP_LANE_DATA_DRIVECURRENT_LEVEL1 681 * Drive current level is set to 12 mA 682 * NV0073_CTRL_DP_LANE_DATA_DRIVECURRENT_LEVEL2 683 * Drive current level is set to 16 mA 684 * NV0073_CTRL_DP_LANE_DATA_DRIVECURRENT_LEVEL3 685 * Drive current level is set to 24 mA 686 * Possible status values returned are: 687 * NV_OK 688 * NV_ERR_INVALID_PARAM_STRUCT 689 * NV_ERR_INVALID_ARGUMENT 690 */ 691 #define NV0073_CTRL_MAX_LANES 8U 692 693 typedef struct NV0073_CTRL_DP_LANE_DATA_PARAMS { 694 NvU32 subDeviceInstance; 695 NvU32 displayId; 696 NvU32 numLanes; 697 NvU32 data[NV0073_CTRL_MAX_LANES]; 698 } NV0073_CTRL_DP_LANE_DATA_PARAMS; 699 700 #define NV0073_CTRL_DP_LANE_DATA_PREEMPHASIS 1:0 701 #define NV0073_CTRL_DP_LANE_DATA_PREEMPHASIS_NONE (0x00000000U) 702 #define NV0073_CTRL_DP_LANE_DATA_PREEMPHASIS_LEVEL1 (0x00000001U) 703 #define NV0073_CTRL_DP_LANE_DATA_PREEMPHASIS_LEVEL2 (0x00000002U) 704 #define NV0073_CTRL_DP_LANE_DATA_PREEMPHASIS_LEVEL3 (0x00000003U) 705 #define NV0073_CTRL_DP_LANE_DATA_DRIVECURRENT 3:2 706 #define NV0073_CTRL_DP_LANE_DATA_DRIVECURRENT_LEVEL0 (0x00000000U) 707 #define NV0073_CTRL_DP_LANE_DATA_DRIVECURRENT_LEVEL1 (0x00000001U) 708 #define NV0073_CTRL_DP_LANE_DATA_DRIVECURRENT_LEVEL2 (0x00000002U) 709 #define NV0073_CTRL_DP_LANE_DATA_DRIVECURRENT_LEVEL3 (0x00000003U) 710 711 /* 712 * NV0073_CTRL_CMD_GET_DP_LANE_DATA 713 * 714 * This command is used to get the current pre-emphasis and drive current 715 * level values for the specified number of lanes. 716 * 717 * The command takes a NV0073_CTRL_DP_LANE_DATA_PARAMS structure as the 718 * argument with the appropriate subDeviceInstance and displayId filled. 719 * The arguments of this structure and the format of preemphasis and drive- 720 * current levels are described above. 721 * 722 * Possible status values returned are: 723 * NV_OK 724 * NV_ERR_INVALID_PARAM_STRUCT 725 * NV_ERR_INVALID_ARGUMENT 726 * 727 * NOTE: This control call is only for testing purposes and 728 * should not be used in normal DP operations. Preemphais 729 * and drive current level will be set during Link training 730 * in normal DP operations 731 * 732 */ 733 734 #define NV0073_CTRL_CMD_DP_GET_LANE_DATA (0x731345U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_GET_LANE_DATA_PARAMS_MESSAGE_ID" */ 735 736 #define NV0073_CTRL_DP_GET_LANE_DATA_PARAMS_MESSAGE_ID (0x45U) 737 738 typedef NV0073_CTRL_DP_LANE_DATA_PARAMS NV0073_CTRL_DP_GET_LANE_DATA_PARAMS; 739 740 741 /* 742 * NV0073_CTRL_CMD_SET_DP_LANE_DATA 743 * 744 * This command is used to set the pre-emphasis and drive current 745 * level values for the specified number of lanes. 746 * 747 * The command takes a NV0073_CTRL_DP_LANE_DATA_PARAMS structure as the 748 * argument with the appropriate subDeviceInstance, displayId, number of 749 * lanes, preemphasis and drive current values filled in. 750 * The arguments of this structure and the format of preemphasis and drive- 751 * current levels are described above. 752 * 753 * Possible status values returned are: 754 * NV_OK 755 * NV_ERR_INVALID_PARAM_STRUCT 756 * NV_ERR_INVALID_ARGUMENT 757 * 758 * NOTE: This control call is only for testing purposes and 759 * should not be used in normal DP operations. Preemphais 760 * and drivecurrent will be set during Link training in 761 * normal DP operations 762 * 763 */ 764 765 #define NV0073_CTRL_CMD_DP_SET_LANE_DATA (0x731346U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_SET_LANE_DATA_PARAMS_MESSAGE_ID" */ 766 767 #define NV0073_CTRL_DP_SET_LANE_DATA_PARAMS_MESSAGE_ID (0x46U) 768 769 typedef NV0073_CTRL_DP_LANE_DATA_PARAMS NV0073_CTRL_DP_SET_LANE_DATA_PARAMS; 770 771 /* 772 * NV0073_CTRL_DP_CSTM 773 * 774 * This structure specifies the 80 bit DP CSTM Test Pattern data 775 * The fields of this structure are to be specified as follows: 776 * lower takes bits 31:0 777 * middle takes bits 63:32 778 * upper takes bits 79:64 779 * 780 */ 781 typedef struct NV0073_CTRL_DP_CSTM { 782 NvU32 lower; 783 NvU32 middle; 784 NvU32 upper; 785 } NV0073_CTRL_DP_CSTM; 786 787 /* 788 * NV0073_CTRL_DP_TESTPATTERN 789 * 790 * This structure specifies the possible test patterns available in 791 * display port. The field testPattern can be one of the following 792 * values. 793 * NV0073_CTRL_DP_SET_TESTPATTERN_DATA_NONE 794 * No test pattern on the main link 795 * NV0073_CTRL_DP_SET_TESTPATTERN_DATA_D10_2 796 * D10.2 pattern on the main link 797 * NV0073_CTRL_DP_SET_TESTPATTERN_DATA_SERMP 798 * SERMP pattern on main link 799 * NV0073_CTRL_DP_SET_TESTPATTERN_DATA_PRBS_7 800 * PRBS7 pattern on the main link 801 * 802 */ 803 804 typedef struct NV0073_CTRL_DP_TESTPATTERN { 805 NvU32 testPattern; 806 } NV0073_CTRL_DP_TESTPATTERN; 807 808 #define NV0073_CTRL_DP_TESTPATTERN_DATA 2:0 809 #define NV0073_CTRL_DP_TESTPATTERN_DATA_NONE (0x00000000U) 810 #define NV0073_CTRL_DP_TESTPATTERN_DATA_D10_2 (0x00000001U) 811 #define NV0073_CTRL_DP_TESTPATTERN_DATA_SERMP (0x00000002U) 812 #define NV0073_CTRL_DP_TESTPATTERN_DATA_PRBS_7 (0x00000003U) 813 #define NV0073_CTRL_DP_TESTPATTERN_DATA_CSTM (0x00000004U) 814 #define NV0073_CTRL_DP_TESTPATTERN_DATA_HBR2COMPLIANCE (0x00000005U) 815 #define NV0073_CTRL_DP_TESTPATTERN_DATA_CP2520PAT3 (0x00000006U) 816 817 /* 818 * NV0073_CTRL_CMD_DP_SET_TESTPATTERN 819 * 820 * This command forces the main link to output the selected test patterns 821 * supported in DP specs. 822 * 823 * The command takes a NV0073_CTRL_DP_SET_TESTPATTERN_PARAMS structure as the 824 * argument with the appropriate subDeviceInstance, displayId and test pattern 825 * to be set as inputs. 826 * The arguments of this structure and the format of test patterns are 827 * described above. 828 * 829 * subDeviceInstance 830 * This parameter specifies the subdevice instance within the 831 * NV04_DISPLAY_COMMON parent device to which the operation should be 832 * directed. This parameter must specify a value between zero and the 833 * total number of subdevices within the parent device. This parameter 834 * should be set to zero for default behavior. 835 * displayId 836 * This parameter specifies the ID of the display for which the dfp 837 * caps should be returned. The display ID must a dfp display. 838 * If more than one displayId bit is set or the displayId is not a dfp, 839 * this call will return NV_ERR_INVALID_ARGUMENT. 840 * testPattern 841 * This parameter is of type NV0073_CTRL_DP_TESTPATTERN and specifies 842 * the testpattern to set on displayport. The format of this structure 843 * is described above. 844 * laneMask 845 * This parameter specifies the bit mask of DP lanes on which test 846 * pattern is to be applied. 847 * lower 848 * This parameter specifies the lower 64 bits of the CSTM test pattern 849 * upper 850 * This parameter specifies the upper 16 bits of the CSTM test pattern 851 * bIsHBR2 852 * This Boolean parameter is set to TRUE if HBR2 compliance test is 853 * being performed. 854 * bSkipLaneDataOverride 855 * skip override of pre-emp and drive current 856 * 857 * Possible status values returned are: 858 * NV_OK 859 * NV_ERR_INVALID_PARAM_STRUCT 860 * NV_ERR_INVALID_ARGUMENT 861 * 862 * NOTE: This control call is only for testing purposes and 863 * should not be used in normal DP operations. Preemphais 864 * and drivecurrent will be set during Link training in 865 * normal DP operations 866 * 867 */ 868 869 #define NV0073_CTRL_DP_SET_TESTPATTERN_PARAMS_MESSAGE_ID (0x47U) 870 871 typedef struct NV0073_CTRL_DP_SET_TESTPATTERN_PARAMS { 872 NvU32 subDeviceInstance; 873 NvU32 displayId; 874 NV0073_CTRL_DP_TESTPATTERN testPattern; 875 NvU8 laneMask; 876 NV0073_CTRL_DP_CSTM cstm; 877 NvBool bIsHBR2; 878 NvBool bSkipLaneDataOverride; 879 } NV0073_CTRL_DP_SET_TESTPATTERN_PARAMS; 880 881 #define NV0073_CTRL_CMD_DP_SET_TESTPATTERN (0x731347U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_SET_TESTPATTERN_PARAMS_MESSAGE_ID" */ 882 883 #define NV0073_CTRL_DP_SET_TESTPATTERN_PARAMS_CSTM0 31:0 884 #define NV0073_CTRL_DP_SET_TESTPATTERN_PARAMS_CSTM1 63:32 885 #define NV0073_CTRL_DP_SET_TESTPATTERN_PARAMS_CSTM2 15:0 886 887 /* 888 * NV0073_CTRL_CMD_GET_DP_TESTPATTERN 889 * 890 * This command returns the current test pattern set on the main link of 891 * Display Port. 892 * 893 * The command takes a NV0073_CTRL_DP_GET_TESTPATTERN_PARAMS structure as the 894 * argument with the appropriate subDeviceInstance, displayId as inputs and 895 * returns the current test pattern in testPattern field of the structure. 896 * 897 * subDeviceInstance 898 * This parameter specifies the subdevice instance within the 899 * NV04_DISPLAY_COMMON parent device to which the operation should be 900 * directed. This parameter must specify a value between zero and the 901 * total number of subdevices within the parent device. This parameter 902 * should be set to zero for default behavior. 903 * displayId 904 * This parameter specifies the ID of the display for which the dfp 905 * caps should be returned. The display ID must a dfp display. 906 * If more than one displayId bit is set or the displayId is not a dfp, 907 * this call will return NV_ERR_INVALID_ARGUMENT. 908 * testPattern 909 * This parameter is of type NV0073_CTRL_DP_TESTPATTERN and specifies the 910 * testpattern set on displayport. The format of this structure is 911 * described above. 912 * 913 * Possible status values returned are: 914 * NV_OK 915 * NV_ERR_INVALID_PARAM_STRUCT 916 * NV_ERR_INVALID_ARGUMENT 917 * 918 * NOTE: This control call is only for testing purposes and 919 * should not be used in normal DP operations. 920 * 921 */ 922 923 #define NV0073_CTRL_DP_GET_TESTPATTERN_PARAMS_MESSAGE_ID (0x48U) 924 925 typedef struct NV0073_CTRL_DP_GET_TESTPATTERN_PARAMS { 926 NvU32 subDeviceInstance; 927 NvU32 displayId; 928 NV0073_CTRL_DP_TESTPATTERN testPattern; 929 } NV0073_CTRL_DP_GET_TESTPATTERN_PARAMS; 930 931 932 #define NV0073_CTRL_CMD_DP_GET_TESTPATTERN (0x731348U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_GET_TESTPATTERN_PARAMS_MESSAGE_ID" */ 933 934 /* 935 * NV0073_CTRL_DP_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA 936 * 937 * This structure specifies the Pre-emphasis/Drive Current/Postcursor2/TxPu information 938 * for a display port device. These are the the current values that RM is 939 * using to map the levels for Pre-emphasis and Drive Current for Link 940 * Training. 941 * preEmphasis 942 * This field specifies the preemphasis values. 943 * driveCurrent 944 * This field specifies the driveCurrent values. 945 * postcursor2 946 * This field specifies the postcursor2 values. 947 * TxPu 948 * This field specifies the pull-up current source drive values. 949 */ 950 #define NV0073_CTRL_MAX_DRIVECURRENT_LEVELS 4U 951 #define NV0073_CTRL_MAX_PREEMPHASIS_LEVELS 4U 952 #define NV0073_CTRL_MAX_POSTCURSOR2_LEVELS 4U 953 954 typedef struct NV0073_CTRL_DP_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_1 { 955 NvU32 preEmphasis; 956 NvU32 driveCurrent; 957 NvU32 postCursor2; 958 NvU32 TxPu; 959 } NV0073_CTRL_DP_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_1; 960 961 typedef NV0073_CTRL_DP_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_1 NV0073_CTRL_DP_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_SLICE1[NV0073_CTRL_MAX_PREEMPHASIS_LEVELS]; 962 963 typedef NV0073_CTRL_DP_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_SLICE1 NV0073_CTRL_DP_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_SLICE2[NV0073_CTRL_MAX_DRIVECURRENT_LEVELS]; 964 965 typedef NV0073_CTRL_DP_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_SLICE2 NV0073_CTRL_DP_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA[NV0073_CTRL_MAX_POSTCURSOR2_LEVELS]; 966 967 968 /* 969 * NV0073_CTRL_DP_SET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA 970 * 971 * This command is used to override the Pre-emphasis/Drive Current/PostCursor2/TxPu 972 * data in the RM. 973 * subDeviceInstance 974 * This parameter specifies the subdevice instance within the 975 * NV04_DISPLAY_COMMON parent device to which the operation should be 976 * directed. This parameter must specify a value between zero and the 977 * total number of subdevices within the parent device. This parameter 978 * should be set to zero for default behavior. 979 * displayId 980 * This parameter specifies the ID of the digital display for which the 981 * data should be returned. The display ID must a digital display. 982 * If more than one displayId bit is set or the displayId is not a DP, 983 * this call will return NV_ERR_INVALID_ARGUMENT. 984 * dpData 985 * This parameter is of type NV0073_CTRL_DP_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA 986 * and specifies the Pre-emphasis/Drive Current/Postcursor2/TxPu information 987 * for a display port device. 988 * The command takes a NV0073_CTRL_DP_SET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS 989 * structure as the argument with the appropriate subDeviceInstance, displayId, 990 * and dpData. The fields of this structure are described above. 991 * 992 * Possible status values returned are: 993 * NV_OK 994 * NV_ERR_INVALID_PARAM_STRUCT 995 * NV_ERR_INVALID_ARGUMENT 996 * 997 */ 998 #define NV0073_CTRL_DP_SET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS_MESSAGE_ID (0x51U) 999 1000 typedef struct NV0073_CTRL_DP_SET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS { 1001 NvU32 subDeviceInstance; 1002 NvU32 displayId; 1003 NV0073_CTRL_DP_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA dpData; 1004 } NV0073_CTRL_DP_SET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS; 1005 1006 #define NV0073_CTRL_CMD_DP_SET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA (0x731351U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_SET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS_MESSAGE_ID" */ 1007 1008 /* 1009 * NV0073_CTRL_DP_GET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA 1010 * 1011 * This command is used to get the Pre-emphasis/Drive Current/PostCursor2/TxPu data. 1012 * subDeviceInstance 1013 * This parameter specifies the subdevice instance within the 1014 * NV04_DISPLAY_COMMON parent device to which the operation should be 1015 * directed. This parameter must specify a value between zero and the 1016 * total number of subdevices within the parent device. This parameter 1017 * should be set to zero for default behavior. 1018 * displayId 1019 * This parameter specifies the ID of the digital display for which the 1020 * data should be returned. The display ID must a digital display. 1021 * If more than one displayId bit is set or the displayId is not a DP, 1022 * this call will return NV_ERR_INVALID_ARGUMENT. 1023 * The command takes a NV0073_CTRL_DP_GET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS 1024 * structure as the argument with the appropriate subDeviceInstance, displayId, 1025 * and dpData. The fields of this structure are described above. 1026 * 1027 * Possible status values returned are: 1028 * NV_OK 1029 * NV_ERR_INVALID_PARAM_STRUCT 1030 * NV_ERR_INVALID_ARGUMENT 1031 * 1032 */ 1033 #define NV0073_CTRL_DP_GET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS_MESSAGE_ID (0x52U) 1034 1035 typedef struct NV0073_CTRL_DP_GET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS { 1036 NvU32 subDeviceInstance; 1037 NvU32 displayId; 1038 NV0073_CTRL_DP_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA dpData; 1039 } NV0073_CTRL_DP_GET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS; 1040 1041 #define NV0073_CTRL_CMD_DP_GET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA (0x731352U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_GET_PREEMPHASIS_DRIVECURRENT_POSTCURSOR2_DATA_PARAMS_MESSAGE_ID" */ 1042 1043 1044 1045 /* 1046 * NV0073_CTRL_CMD_DP_MAIN_LINK_CTRL 1047 * 1048 * This command is used to set various Main Link configurations for 1049 * the specified displayId such as powering up/down Main Link. 1050 * 1051 * subDeviceInstance 1052 * This parameter specifies the subdevice instance within the 1053 * NV04_DISPLAY_COMMON parent device to which the operation should be 1054 * directed. This parameter must specify a value between zero and the 1055 * total number of subdevices within the parent device. This parameter 1056 * should be set to zero for default behavior. 1057 * displayId 1058 * This parameter specifies the ID of the DP display which owns 1059 * the Main Link to be adjusted. The display ID must a DP display 1060 * as determined with the NV0073_CTRL_CMD_SPECIFIC_GET_TYPE command. 1061 * If more than one displayId bit is set or the displayId is not a DP, 1062 * this call will return NV_ERR_INVALID_ARGUMENT. 1063 * ctrl 1064 * Here are the current defined fields: 1065 * NV0073_CTRL_DP_MAIN_LINK_CTRL_POWER_STATE_POWERDOWN 1066 * This value will power down Main Link. 1067 * NV0073_CTRL_DP_MAIN_LINK_CTRL_POWER_STATE_POWERUP 1068 * This value will power up Main Link. 1069 * 1070 */ 1071 #define NV0073_CTRL_CMD_DP_MAIN_LINK_CTRL (0x731356U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_MAIN_LINK_CTRL_PARAMS_MESSAGE_ID" */ 1072 1073 #define NV0073_CTRL_DP_MAIN_LINK_CTRL_PARAMS_MESSAGE_ID (0x56U) 1074 1075 typedef struct NV0073_CTRL_DP_MAIN_LINK_CTRL_PARAMS { 1076 NvU32 subDeviceInstance; 1077 NvU32 displayId; 1078 NvU32 ctrl; 1079 } NV0073_CTRL_DP_MAIN_LINK_CTRL_PARAMS; 1080 1081 #define NV0073_CTRL_DP_MAIN_LINK_CTRL_POWER_STATE 0:0 1082 #define NV0073_CTRL_DP_MAIN_LINK_CTRL_POWER_STATE_POWERDOWN (0x00000000U) 1083 #define NV0073_CTRL_DP_MAIN_LINK_CTRL_POWER_STATE_POWERUP (0x00000001U) 1084 1085 1086 1087 /* 1088 * NV0073_CTRL_CMD_DP_GET_AUDIO_MUTESTREAM 1089 * 1090 * This command returns the current audio mute state on the main link of Display Port 1091 * 1092 * The command takes a NV0073_CTRL_DP_GET_AUDIO_MUTESTREAM_PARAMS structure as the 1093 * argument with the appropriate subDeviceInstance, displayId as inputs and returns the 1094 * current mute status in mute field of the structure. 1095 * 1096 * subDeviceInstance 1097 * This parameter specifies the subdevice instance within the 1098 * NV04_DISPLAY_COMMON parent device to which the operation should be 1099 * directed. This parameter must specify a value between zero and the 1100 * total number of subdevices within the parent device. This parameter 1101 * should be set to zero for default behavior. 1102 * displayId 1103 * This parameter specifies the ID of the display for which the audio stream 1104 * state should be returned. The display ID must a DP display. 1105 * If the display ID is invalid or if it is not a DP display, 1106 * this call will return NV_ERR_INVALID_ARGUMENT. 1107 * mute 1108 * This parameter will return one of the following values: 1109 * NV0073_CTRL_DP_AUDIO_MUTESTREAM_MUTE_DISABLE 1110 * Audio mute is currently disabled. 1111 * NV0073_CTRL_DP_AUDIO_MUTESTREAM_MUTE_ENABLE 1112 * Audio mute is currently enabled. 1113 * NV0073_CTRL_DP_AUDIO_MUTESTREAM_MUTE_AUTO 1114 * Audio mute is automatically controlled by hardware. 1115 * NV0073_CTRL_DP_AUDIO_MUTESTREAM_MUTE_UNKNOWN 1116 * Audio mute is currently in an unknown state. 1117 * 1118 * Possible status values returned are: 1119 * NV_OK 1120 * NV_ERR_INVALID_PARAM_STRUCT 1121 * NV_ERR_INVALID_ARGUMENT 1122 * 1123 * 1124 */ 1125 #define NV0073_CTRL_CMD_DP_GET_AUDIO_MUTESTREAM (0x731358U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_GET_AUDIO_MUTESTREAM_PARAMS_MESSAGE_ID" */ 1126 1127 #define NV0073_CTRL_DP_GET_AUDIO_MUTESTREAM_PARAMS_MESSAGE_ID (0x58U) 1128 1129 typedef struct NV0073_CTRL_DP_GET_AUDIO_MUTESTREAM_PARAMS { 1130 NvU32 subDeviceInstance; 1131 NvU32 displayId; 1132 NvU32 mute; 1133 } NV0073_CTRL_DP_GET_AUDIO_MUTESTREAM_PARAMS; 1134 1135 #define NV0073_CTRL_DP_AUDIO_MUTESTREAM_MUTE_DISABLE (0x00000000U) 1136 #define NV0073_CTRL_DP_AUDIO_MUTESTREAM_MUTE_ENABLE (0x00000001U) 1137 #define NV0073_CTRL_DP_AUDIO_MUTESTREAM_MUTE_AUTO (0x00000002U) 1138 #define NV0073_CTRL_DP_AUDIO_MUTESTREAM_MUTE_UNKNOWN (0x00000003U) 1139 1140 /* 1141 * NV0073_CTRL_CMD_DP_SET_AUDIO_MUTESTREAM 1142 * 1143 * This command sets the current audio mute state on the main link of Display Port 1144 * 1145 * The command takes a NV0073_CTRL_DP_SET_AUDIO_MUTESTREAM_PARAMS structure as the 1146 * argument with the appropriate subDeviceInstance, displayId as inputs and whether to enable 1147 * or disable mute in the parameter - mute. 1148 * 1149 * subDeviceInstance 1150 * This parameter specifies the subdevice instance within the 1151 * NV04_DISPLAY_COMMON parent device to which the operation should be 1152 * directed. This parameter must specify a value between zero and the 1153 * total number of subdevices within the parent device. This parameter 1154 * should be set to zero for default behavior. 1155 * displayId 1156 * This parameter specifies the ID of the display for which the audio stream 1157 * state should be returned. The display ID must a DP display. 1158 * If the display ID is invalid or if it is not a DP display, 1159 * this call will return NV_ERR_INVALID_ARGUMENT. 1160 * mute 1161 * This parameter is an input to this command. 1162 * Here are the current defined values: 1163 * NV0073_CTRL_DP_AUDIO_MUTESTREAM_MUTE_DISABLE 1164 * Audio mute will be disabled. 1165 * NV0073_CTRL_DP_AUDIO_MUTESTREAM_MUTE_ENABLE 1166 * Audio mute will be enabled. 1167 * NV0073_CTRL_DP_AUDIO_MUTESTREAM_MUTE_AUTO 1168 * Audio mute will be automatically controlled by hardware. 1169 * 1170 * Note: Any other value for mute in NV0073_CTRL_DP_SET_AUDIO_MUTESTREAM_PARAMS is not allowed and 1171 * the API will return an error. 1172 * 1173 * Possible status values returned are: 1174 * NV_OK 1175 * NV_ERR_INVALID_PARAM_STRUCT 1176 * NV_ERR_INVALID_ARGUMENT 1177 * 1178 * 1179 */ 1180 #define NV0073_CTRL_CMD_DP_SET_AUDIO_MUTESTREAM (0x731359U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_SET_AUDIO_MUTESTREAM_PARAMS_MESSAGE_ID" */ 1181 1182 #define NV0073_CTRL_DP_SET_AUDIO_MUTESTREAM_PARAMS_MESSAGE_ID (0x59U) 1183 1184 typedef struct NV0073_CTRL_DP_SET_AUDIO_MUTESTREAM_PARAMS { 1185 NvU32 subDeviceInstance; 1186 NvU32 displayId; 1187 NvU32 mute; 1188 } NV0073_CTRL_DP_SET_AUDIO_MUTESTREAM_PARAMS; 1189 1190 /* 1191 * NV0073_CTRL_CMD_DP_ASSR_CTRL 1192 * 1193 * This command is used to control and query DisplayPort ASSR 1194 * settings for the specified displayId. 1195 * 1196 * subDeviceInstance 1197 * This parameter specifies the subdevice instance within the 1198 * NV04_DISPLAY_COMMON parent device to which the operation should be 1199 * directed. This parameter must specify a value between zero and the 1200 * total number of subdevices within the parent device. This parameter 1201 * should be set to zero for default behavior. 1202 * displayId 1203 * This parameter specifies the ID of the DP display which owns 1204 * the Main Link to be adjusted. The display ID must a DP display 1205 * as determined with the NV0073_CTRL_CMD_SPECIFIC_GET_TYPE command. 1206 * If more than one displayId bit is set or the displayId is not a DP, 1207 * this call will return NV_ERR_INVALID_ARGUMENT. 1208 * cmd 1209 * This input parameter specifies the command to execute. Legal 1210 * values for this parameter include: 1211 * NV0073_CTRL_DP_ASSR_CMD_QUERY_STATE 1212 * This field can be used to query ASSR state. When used the ASSR 1213 * state value is returned in the data parameter. 1214 * NV0073_CTRL_DP_ASSR_CMD_DISABLE 1215 * This field can be used to control the ASSR disable state. 1216 * NV0073_CTRL_DP_ASSR_CMD_FORCE_STATE 1217 * This field can be used to control ASSR State without looking at 1218 * whether the display supports it. Used in conjunction with 1219 * Fake link training. Note that this updates the state on the 1220 * source side only. The sink is assumed to be configured for ASSR 1221 * by the client (DD). 1222 * data 1223 * This parameter specifies the data associated with the cmd 1224 * parameter. 1225 * NV0073_CTRL_DP_ASSR_DATA_STATE_ENABLED 1226 * This field indicates the state of ASSR when queried using cmd 1227 * parameter. When used to control the State, it indicates whether 1228 * ASSR should be enabled or disabled. 1229 * NV0073_CTRL_DP_ASSR_DATA_STATE_ENABLED_NO 1230 * When queried this flag indicates that ASSR is not enabled on the sink. 1231 * When used as the data for CMD_FORCE_STATE, it requests ASSR to 1232 * to be disabled on the source side. 1233 * NV0073_CTRL_DP_ASSR_DATA_STATE_ENABLED_YES 1234 * When queried this flag indicates that ASSR is not enabled on the sink. 1235 * When used as the data for CMD_FORCE_STATE, it requests ASSR to 1236 * to be enabled on the source side. 1237 * err 1238 * This output parameter specifies any errors associated with the cmd 1239 * parameter. 1240 * NV0073_CTRL_DP_ASSR_ERR_CAP 1241 * This field indicates the error pertaining to ASSR capability of 1242 * the sink device. 1243 * NV0073_CTRL_DP_ASSR_ERR_CAP_NOERR 1244 * This flag indicates there is no error. 1245 * NV0073_CTRL_DP_ASSR_ERR_CAP_ERR 1246 * This flag indicates that the sink is not ASSR capable. 1247 * 1248 * Possible status values returned are: 1249 * NV_OK 1250 * NV_ERR_INVALID_PARAM_STRUCT 1251 * NV_ERR_INVALID_ARGUMENT 1252 * 1253 */ 1254 #define NV0073_CTRL_CMD_DP_ASSR_CTRL (0x73135aU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_ASSR_CTRL_PARAMS_MESSAGE_ID" */ 1255 1256 #define NV0073_CTRL_DP_ASSR_CTRL_PARAMS_MESSAGE_ID (0x5AU) 1257 1258 typedef struct NV0073_CTRL_DP_ASSR_CTRL_PARAMS { 1259 NvU32 subDeviceInstance; 1260 NvU32 displayId; 1261 NvU32 cmd; 1262 NvU32 data; 1263 NvU32 err; 1264 } NV0073_CTRL_DP_ASSR_CTRL_PARAMS; 1265 1266 #define NV0073_CTRL_DP_ASSR_CMD 31:0 1267 #define NV0073_CTRL_DP_ASSR_CMD_QUERY_STATE (0x00000001U) 1268 #define NV0073_CTRL_DP_ASSR_CMD_DISABLE (0x00000002U) 1269 #define NV0073_CTRL_DP_ASSR_CMD_FORCE_STATE (0x00000003U) 1270 #define NV0073_CTRL_DP_ASSR_CMD_ENABLE (0x00000004U) 1271 #define NV0073_CTRL_DP_ASSR_DATA_STATE_ENABLED 0:0 1272 #define NV0073_CTRL_DP_ASSR_DATA_STATE_ENABLED_NO (0x00000000U) 1273 #define NV0073_CTRL_DP_ASSR_DATA_STATE_ENABLED_YES (0x00000001U) 1274 #define NV0073_CTRL_DP_ASSR_ERR_CAP 0:0 1275 #define NV0073_CTRL_DP_ASSR_ERR_CAP_NOERR (0x00000000U) 1276 #define NV0073_CTRL_DP_ASSR_ERR_CAP_ERR (0x00000001U) 1277 1278 /* 1279 * NV0073_CTRL_CMD_DP_TOPOLOGY_ALLOCATE_DISPLAYID 1280 * 1281 * This command is used to assign a displayId from the free pool 1282 * to a specific AUX Address in a DP 1.2 topology. The topology 1283 * is uniquely identified by the DisplayId of the DP connector. 1284 * 1285 * subDeviceInstance 1286 * This parameter specifies the subdevice instance within the 1287 * NV04_DISPLAY_COMMON parent device to which the operation should be 1288 * directed. This parameter must specify a value between zero and the 1289 * total number of subdevices within the parent device. This parameter 1290 * should be set to zero for default behavior. 1291 * displayId 1292 * This is the DisplayId of the DP connector to which the topology 1293 * is rooted. 1294 * preferredDisplayId 1295 * Client can sent a preferredDisplayID which RM can use during allocation 1296 * if available. If this Id is a part of allDisplayMask in RM then we return 1297 * a free available Id to the client. However, if this is set to 1298 * NV0073_CTRL_CMD_DP_INVALID_PREFERRED_DISPLAY_ID then we return allDisplayMask value. 1299 * useBFM 1300 * Set to true if DP-BFM is used during emulation/RTL Sim. 1301 * 1302 * [out] displayIdAssigned 1303 * This is the out field that will receive the new displayId. If the 1304 * function fails this is guaranteed to be 0. 1305 * [out] allDisplayMask 1306 * This is allDisplayMask RM variable which is returned only when 1307 * preferredDisplayId is set to NV0073_CTRL_CMD_DP_INVALID_PREFERRED_DISPLAY_ID 1308 * 1309 * 1310 * Possible status values returned are: 1311 * NV_OK 1312 * NV_ERR_INVALID_PARAM_STRUCT 1313 * NV_ERR_INVALID_ARGUMENT 1314 * NV_ERR_NOT_SUPPORTED 1315 * 1316 */ 1317 #define NV0073_CTRL_CMD_DP_TOPOLOGY_ALLOCATE_DISPLAYID (0x73135bU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_TOPOLOGY_ALLOCATE_DISPLAYID_PARAMS_MESSAGE_ID" */ 1318 1319 /* 1320 * There cannot be more than 128 devices in a topology (also by DP 1.2 specification) 1321 * NOTE: Temporarily lowered to pass XAPI RM tests. Should be reevaluated! 1322 */ 1323 #define NV0073_CTRL_CMD_DP_MAX_TOPOLOGY_NODES 120U 1324 #define NV0073_CTRL_CMD_DP_INVALID_PREFERRED_DISPLAY_ID 0xffffffffU 1325 1326 #define NV0073_CTRL_CMD_DP_TOPOLOGY_ALLOCATE_DISPLAYID_PARAMS_MESSAGE_ID (0x5BU) 1327 1328 typedef struct NV0073_CTRL_CMD_DP_TOPOLOGY_ALLOCATE_DISPLAYID_PARAMS { 1329 NvU32 subDeviceInstance; 1330 NvU32 displayId; 1331 NvU32 preferredDisplayId; 1332 1333 NvBool force; 1334 NvBool useBFM; 1335 1336 NvU32 displayIdAssigned; 1337 NvU32 allDisplayMask; 1338 } NV0073_CTRL_CMD_DP_TOPOLOGY_ALLOCATE_DISPLAYID_PARAMS; 1339 1340 /* 1341 * NV0073_CTRL_CMD_DP_TOPOLOGY_FREE_DISPLAYID 1342 * 1343 * This command is used to return a multistream displayid to the unused pool. 1344 * You must not call this function while either the ARM or ASSEMBLY state cache 1345 * refers to this display-id. The head must not be attached. 1346 * 1347 * subDeviceInstance 1348 * This parameter specifies the subdevice instance within the 1349 * NV04_DISPLAY_COMMON parent device to which the operation should be 1350 * directed. This parameter must specify a value between zero and the 1351 * total number of subdevices within the parent device. This parameter 1352 * should be set to zero for default behavior. 1353 * displayId 1354 * This is the displayId to free. 1355 * 1356 * Possible status values returned are: 1357 * NV_OK 1358 * NV_ERR_INVALID_PARAM_STRUCT 1359 * NV_ERR_INVALID_ARGUMENT 1360 * NV_ERR_NOT_SUPPORTED 1361 * 1362 * 1363 */ 1364 #define NV0073_CTRL_CMD_DP_TOPOLOGY_FREE_DISPLAYID (0x73135cU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_TOPOLOGY_FREE_DISPLAYID_PARAMS_MESSAGE_ID" */ 1365 1366 #define NV0073_CTRL_CMD_DP_TOPOLOGY_FREE_DISPLAYID_PARAMS_MESSAGE_ID (0x5CU) 1367 1368 typedef struct NV0073_CTRL_CMD_DP_TOPOLOGY_FREE_DISPLAYID_PARAMS { 1369 NvU32 subDeviceInstance; 1370 NvU32 displayId; 1371 } NV0073_CTRL_CMD_DP_TOPOLOGY_FREE_DISPLAYID_PARAMS; 1372 1373 1374 1375 /* 1376 * NV0073_CTRL_CMD_DP_GET_LINK_CONFIG 1377 * 1378 * This command is used to query DisplayPort link config 1379 * settings on the transmitter side. 1380 * 1381 * subDeviceInstance 1382 * This parameter specifies the subdevice instance within the 1383 * NV04_DISPLAY_COMMON parent device to which the operation should be 1384 * directed. This parameter must specify a value between zero and the 1385 * total number of subdevices within the parent device. This parameter 1386 * should be set to zero for default behavior. 1387 * displayId 1388 * This parameter specifies the ID of the DP display which owns 1389 * the Main Link to be queried. 1390 * If more than one displayId bit is set or the displayId is not a DP, 1391 * this call will return NV_ERR_INVALID_ARGUMENT. 1392 * laneCount 1393 * Number of lanes the DP transmitter hardware is set up to drive. 1394 * linkBW 1395 * The BW of each lane that the DP transmitter hardware is set up to drive. 1396 * The values returned will be according to the DP specifications. 1397 * dp2LinkBW 1398 * Current BW of each lane that the DP transmitter hardware is set up to drive is UHBR. 1399 * The values returned will be using 10M convention. 1400 * 1401 * Note: 1402 * linkBW and dp2LinkBw are mutual exclusive. Only one of the value will be non-zero. 1403 * 1404 */ 1405 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG (0x731360U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_GET_LINK_CONFIG_PARAMS_MESSAGE_ID" */ 1406 1407 #define NV0073_CTRL_DP_GET_LINK_CONFIG_PARAMS_MESSAGE_ID (0x60U) 1408 1409 typedef struct NV0073_CTRL_DP_GET_LINK_CONFIG_PARAMS { 1410 NvU32 subDeviceInstance; 1411 NvU32 displayId; 1412 NvU32 laneCount; 1413 NvU32 linkBW; 1414 NvU32 dp2LinkBW; 1415 } NV0073_CTRL_DP_GET_LINK_CONFIG_PARAMS; 1416 1417 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LANE_COUNT 3:0 1418 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LANE_COUNT_0 (0x00000000U) 1419 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LANE_COUNT_1 (0x00000001U) 1420 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LANE_COUNT_2 (0x00000002U) 1421 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LANE_COUNT_4 (0x00000004U) 1422 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LINK_BW 3:0 1423 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LINK_BW_1_62GBPS (0x00000006U) 1424 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LINK_BW_2_70GBPS (0x0000000aU) 1425 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LINK_BW_5_40GBPS (0x00000014U) 1426 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LINK_BW_8_10GBPS (0x0000001EU) 1427 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LINK_BW_2_16GBPS (0x00000008U) 1428 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LINK_BW_2_43GBPS (0x00000009U) 1429 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LINK_BW_3_24GBPS (0x0000000CU) 1430 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LINK_BW_4_32GBPS (0x00000010U) 1431 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_LINK_BW_6_75GBPS (0x00000019U) 1432 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_DP2LINK_BW 15:0 1433 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_DP2LINK_BW_1_62GBPS (0x000000A2U) 1434 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_DP2LINK_BW_2_70GBPS (0x0000010EU) 1435 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_DP2LINK_BW_5_40GBPS (0x0000021CU) 1436 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_DP2LINK_BW_8_10GBPS (0x0000032AU) 1437 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_DP2LINK_BW_2_16GBPS (0x000000D8U) 1438 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_DP2LINK_BW_2_43GBPS (0x000000F3U) 1439 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_DP2LINK_BW_3_24GBPS (0x00000114U) 1440 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_DP2LINK_BW_4_32GBPS (0x000001B0U) 1441 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_DP2LINK_BW_6_75GBPS (0x000002A3U) 1442 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_DP2LINK_BW_10_0GBPS (0x000003E8U) 1443 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_DP2LINK_BW_13_5GBPS (0x00000546U) 1444 #define NV0073_CTRL_CMD_DP_GET_LINK_CONFIG_DP2LINK_BW_20_0GBPS (0x000007D0U) 1445 1446 /* 1447 * NV0073_CTRL_CMD_DP_GET_EDP_DATA 1448 * 1449 * This command is used to query Embedded DisplayPort information. 1450 * 1451 * subDeviceInstance 1452 * This parameter specifies the subdevice instance within the 1453 * NV04_DISPLAY_COMMON parent device to which the operation should be 1454 * directed. This parameter must specify a value between zero and the 1455 * total number of subdevices within the parent device. This parameter 1456 * should be set to zero for default behavior. 1457 * displayId 1458 * This parameter specifies the ID of the eDP display which owns 1459 * the Main Link to be queried. 1460 * If more than one displayId bit is set or the displayId is not a eDP, 1461 * this call will return NV_ERR_INVALID_ARGUMENT. 1462 * data 1463 * This output parameter specifies the data associated with the eDP display. 1464 * It is only valid if this function returns NV_OK. 1465 * NV0073_CTRL_CMD_DP_GET_EDP_DATA_PANEL_POWER 1466 * This field indicates the state of the eDP panel power. 1467 * NV0073_CTRL_CMD_DP_GET_EDP_DATA_PANEL_POWER_OFF 1468 * This eDP panel is powered off. 1469 * NV0073_CTRL_CMD_DP_GET_EDP_DATA_PANEL_POWER_ON 1470 * This eDP panel is powered on. 1471 * NV0073_CTRL_CMD_DP_GET_EDP_DATA_DPCD_POWER_OFF 1472 * This field tells the client if DPCD power off command 1473 * should be used for the current eDP panel. 1474 * NV0073_CTRL_DP_GET_EDP_DATA_DPCD_POWER_OFF_ENABLE 1475 * This eDP panel can use DPCD to power off the panel. 1476 * NV0073_CTRL_DP_GET_EDP_DATA_DPCD_POWER_OFF_DISABLE 1477 * This eDP panel cannot use DPCD to power off the panel. 1478 * NV0073_CTRL_DP_GET_EDP_DATA_DPCD_SET_POWER 1479 * This field tells the client current eDP panel DPCD SET_POWER (0x600) status 1480 * NV0073_CTRL_DP_GET_EDP_DATA_DPCD_SET_POWER_D0 1481 * This eDP panel is current up and in full power mode. 1482 * NV0073_CTRL_DP_GET_EDP_DATA_DPCD_SET_POWER_D3 1483 * This eDP panel is current standby. 1484 */ 1485 #define NV0073_CTRL_CMD_DP_GET_EDP_DATA (0x731361U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_GET_EDP_DATA_PARAMS_MESSAGE_ID" */ 1486 1487 #define NV0073_CTRL_DP_GET_EDP_DATA_PARAMS_MESSAGE_ID (0x61U) 1488 1489 typedef struct NV0073_CTRL_DP_GET_EDP_DATA_PARAMS { 1490 NvU32 subDeviceInstance; 1491 NvU32 displayId; 1492 NvU32 data; 1493 } NV0073_CTRL_DP_GET_EDP_DATA_PARAMS; 1494 1495 #define NV0073_CTRL_DP_GET_EDP_DATA_PANEL_POWER 0:0 1496 #define NV0073_CTRL_DP_GET_EDP_DATA_PANEL_POWER_OFF (0x00000000U) 1497 #define NV0073_CTRL_DP_GET_EDP_DATA_PANEL_POWER_ON (0x00000001U) 1498 #define NV0073_CTRL_DP_GET_EDP_DATA_DPCD_POWER_OFF 1:1 1499 #define NV0073_CTRL_DP_GET_EDP_DATA_DPCD_POWER_OFF_ENABLE (0x00000000U) 1500 #define NV0073_CTRL_DP_GET_EDP_DATA_DPCD_POWER_OFF_DISABLE (0x00000001U) 1501 #define NV0073_CTRL_DP_GET_EDP_DATA_DPCD_POWER_STATE 2:2 1502 #define NV0073_CTRL_DP_GET_EDP_DATA_DPCD_POWER_STATE_D0 (0x00000000U) 1503 #define NV0073_CTRL_DP_GET_EDP_DATA_DPCD_POWER_STATE_D3 (0x00000001U) 1504 /* 1505 * NV0073_CTRL_CMD_DP_CONFIG_STREAM 1506 * 1507 * This command sets various multi/single stream related params for 1508 * for a given head. 1509 * 1510 * subDeviceInstance 1511 * This parameter specifies the subdevice instance within the 1512 * NV04_DISPLAY_COMMON parent device to which the operation should be 1513 * directed. This parameter must specify a value between zero and the 1514 * total number of subdevices within the parent device. This parameter 1515 * should be set to zero for default behavior. 1516 * Head 1517 * Specifies the head index for the stream. 1518 * sorIndex 1519 * Specifies the SOR index for the stream. 1520 * dpLink 1521 * Specifies the DP link: either 0 or 1 (A , B) 1522 * bEnableOverride 1523 * Specifies whether we're manually configuring this stream. 1524 * If not set, none of the remaining settings have any effect. 1525 * bMST 1526 * Specifies whether in Multistream or Singlestream mode. 1527 * MST/SST 1528 * Structures for passing in either Multistream or Singlestream params 1529 * slotStart 1530 * Specifies the start value of the timeslot 1531 * slotEnd 1532 * Specifies the end value of the timeslot 1533 * PBN 1534 * Specifies the PBN for the timeslot. 1535 * minHBlank 1536 * Specifies the min HBlank 1537 * minVBlank 1538 * Specifies the min VBlank 1539 * sendACT -- deprecated. A new control call has been added. 1540 * Specifies whether ACT has to be sent or not. 1541 * tuSize 1542 * Specifies TU size value 1543 * watermark 1544 * Specifies stream watermark. 1545 * linkClkFreqHz -- moving to MvidWarParams. Use that instead. 1546 * Specifies the link freq in Hz. Note that this is the byte clock. 1547 * eg: = (5.4 Ghz / 10) 1548 * actualPclkHz; -- moving to MvidWarParams. Use that instead. 1549 * Specifies the actual pclk freq in Hz. 1550 * mvidWarEnabled 1551 * Specifies whether MVID WAR is enabled. 1552 * MvidWarParams 1553 * Is valid if mvidWarEnabled is true. 1554 * bEnableTwoHeadOneOr 1555 * Whether two head one OR is enabled. If this is set then RM will 1556 * replicate SF settings of Master head on Slave head. Head index 1557 * passed should be of Master Head. 1558 * 1559 * Possible status values returned are: 1560 * NV_OK 1561 * NV_ERR_INVALID_ARGUMENT 1562 * NV_ERR_GENERIC: when this command has already been called 1563 * 1564 */ 1565 #define NV0073_CTRL_CMD_DP_CONFIG_STREAM (0x731362U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_CONFIG_STREAM_PARAMS_MESSAGE_ID" */ 1566 1567 #define NV0073_CTRL_CMD_DP_CONFIG_STREAM_PARAMS_MESSAGE_ID (0x62U) 1568 1569 typedef struct NV0073_CTRL_CMD_DP_CONFIG_STREAM_PARAMS { 1570 NvU32 subDeviceInstance; 1571 NvU32 head; 1572 NvU32 sorIndex; 1573 NvU32 dpLink; 1574 1575 NvBool bEnableOverride; 1576 NvBool bMST; 1577 NvU32 singleHeadMultistreamMode; 1578 NvU32 hBlankSym; 1579 NvU32 vBlankSym; 1580 NvU32 colorFormat; 1581 NvBool bEnableTwoHeadOneOr; 1582 1583 struct { 1584 NvU32 slotStart; 1585 NvU32 slotEnd; 1586 NvU32 PBN; 1587 NvU32 Timeslice; 1588 NvBool sendACT; // deprecated -Use NV0073_CTRL_CMD_DP_SEND_ACT 1589 NvU32 singleHeadMSTPipeline; 1590 NvBool bEnableAudioOverRightPanel; 1591 } MST; 1592 1593 struct { 1594 NvBool bEnhancedFraming; 1595 NvU32 tuSize; 1596 NvU32 waterMark; 1597 NvU32 actualPclkHz; // deprecated -Use MvidWarParams 1598 NvU32 linkClkFreqHz; // deprecated -Use MvidWarParams 1599 NvBool bEnableAudioOverRightPanel; 1600 struct { 1601 NvU32 activeCnt; 1602 NvU32 activeFrac; 1603 NvU32 activePolarity; 1604 NvBool mvidWarEnabled; 1605 struct { 1606 NvU32 actualPclkHz; 1607 NvU32 linkClkFreqHz; 1608 } MvidWarParams; 1609 } Legacy; 1610 } SST; 1611 } NV0073_CTRL_CMD_DP_CONFIG_STREAM_PARAMS; 1612 1613 /* 1614 * NV0073_CTRL_CMD_DP_SET_RATE_GOV 1615 * 1616 * This command enables rate governing for a MST. 1617 * 1618 * subDeviceInstance 1619 * This parameter specifies the subdevice instance within the 1620 * NV04_DISPLAY_COMMON parent device to which the operation should be 1621 * directed. This parameter must specify a value between zero and the 1622 * total number of subdevices within the parent device. This parameter 1623 * should be set to zero for default behavior. 1624 * Head 1625 * Specifies the head index for the stream. 1626 * sorIndex 1627 * Specifies the SOR index for the stream. 1628 * flags 1629 * Specifies Rate Governing, trigger type and wait on trigger and operation type. 1630 * 1631 * _FLAGS_OPERATION: whether this control call should program or check for status of previous operation. 1632 * 1633 * _FLAGS_STATUS: Out only. Caller should check the status for _FLAGS_OPERATION_CHECK_STATUS through 1634 * this bit. 1635 * 1636 * Possible status values returned are: 1637 * NV_OK 1638 * NV_ERR_INVALID_ARGUMENT 1639 * NV_ERR_GENERIC: when this command has already been called 1640 * 1641 */ 1642 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV (0x731363U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_SET_RATE_GOV_PARAMS_MESSAGE_ID" */ 1643 1644 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_PARAMS_MESSAGE_ID (0x63U) 1645 1646 typedef struct NV0073_CTRL_CMD_DP_SET_RATE_GOV_PARAMS { 1647 NvU32 subDeviceInstance; 1648 NvU32 head; 1649 NvU32 sorIndex; 1650 NvU32 flags; 1651 } NV0073_CTRL_CMD_DP_SET_RATE_GOV_PARAMS; 1652 1653 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_ENABLE_RG 0:0 1654 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_ENABLE_RG_OFF (0x00000000U) 1655 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_ENABLE_RG_ON (0x00000001U) 1656 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_TRIGGER_MODE 1:1 1657 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_TRIGGER_MODE_LOADV (0x00000000U) 1658 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_TRIGGER_MODE_IMMEDIATE (0x00000001U) 1659 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_WAIT_TRIGGER 2:2 1660 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_WAIT_TRIGGER_OFF (0x00000000U) 1661 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_WAIT_TRIGGER_ON (0x00000001U) 1662 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_OPERATION 3:3 1663 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_OPERATION_PROGRAM (0x00000000U) 1664 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_OPERATION_CHECK_STATUS (0x00000001U) 1665 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_STATUS 31:31 1666 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_STATUS_FAIL (0x00000000U) 1667 #define NV0073_CTRL_CMD_DP_SET_RATE_GOV_FLAGS_STATUS_PASS (0x00000001U) 1668 1669 /* 1670 * NV0073_CTRL_CMD_DP_SET_MANUAL_DISPLAYPORT 1671 * 1672 * This call is used by the displayport library. Once 1673 * all of the platforms have ported, this call will be 1674 * deprecated and made the default behavior. 1675 * 1676 * Disables automatic watermark programming 1677 * Disables automatic DP IRQ handling (CP IRQ) 1678 * Disables automatic retry on defers 1679 * 1680 * subDeviceInstance 1681 * This parameter specifies the subdevice instance within the 1682 * NV04_DISPLAY_COMMON parent device to which the operation should be 1683 * directed. This parameter must specify a value between zero and the 1684 * total number of subdevices within the parent device. This parameter 1685 * should be set to zero for default behavior. 1686 * 1687 * 1688 * Possible status values returned are: 1689 * NV_OK 1690 * NV_ERR_INVALID_ARGUMENT 1691 * NV_ERR_NOT_SUPPORTED 1692 * 1693 */ 1694 #define NV0073_CTRL_CMD_DP_SET_MANUAL_DISPLAYPORT (0x731365U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_SET_MANUAL_DISPLAYPORT_PARAMS_MESSAGE_ID" */ 1695 1696 #define NV0073_CTRL_CMD_DP_SET_MANUAL_DISPLAYPORT_PARAMS_MESSAGE_ID (0x65U) 1697 1698 typedef struct NV0073_CTRL_CMD_DP_SET_MANUAL_DISPLAYPORT_PARAMS { 1699 NvU32 subDeviceInstance; 1700 } NV0073_CTRL_CMD_DP_SET_MANUAL_DISPLAYPORT_PARAMS; 1701 1702 /* 1703 * NV0073_CTRL_CMD_DP_SET_ECF 1704 * 1705 * subDeviceInstance 1706 * This parameter specifies the subdevice instance within the 1707 * NV04_DISPLAY_COMMON parent device to which the operation should be 1708 * directed. This parameter must specify a value between zero and the 1709 * total number of subdevices within the parent device. This parameter 1710 * should be set to zero for default behavior. 1711 * sorIndex 1712 * This parameter specifies the Index of sor for which ecf 1713 * should be updated. 1714 * ecf 1715 * This parameter has the ECF bit mask. 1716 * 1717 * Possible status values returned are: 1718 * NV_OK 1719 * NV_ERR_INVALID_ARGUMENT 1720 * 1721 */ 1722 #define NV0073_CTRL_CMD_DP_SET_ECF (0x731366U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_SET_ECF_PARAMS_MESSAGE_ID" */ 1723 1724 #define NV0073_CTRL_CMD_DP_SET_ECF_PARAMS_MESSAGE_ID (0x66U) 1725 1726 typedef struct NV0073_CTRL_CMD_DP_SET_ECF_PARAMS { 1727 NvU32 subDeviceInstance; 1728 NvU32 sorIndex; 1729 NV_DECLARE_ALIGNED(NvU64 ecf, 8); 1730 NvBool bForceClearEcf; 1731 NvBool bAddStreamBack; 1732 } NV0073_CTRL_CMD_DP_SET_ECF_PARAMS; 1733 1734 /* 1735 * NV0073_CTRL_CMD_DP_SEND_ACT 1736 * 1737 * This command sends ACT. 1738 * 1739 * subDeviceInstance 1740 * This parameter specifies the subdevice instance within the 1741 * NV04_DISPLAY_COMMON parent device to which the operation should be 1742 * directed. This parameter must specify a value between zero and the 1743 * total number of subdevices within the parent device. This parameter 1744 * should be set to zero for default behavior. 1745 * 1746 * displayId 1747 * Specifies the root port displayId for which the trigger has to be done. 1748 * 1749 * Possible status values returned are: 1750 * NV_OK 1751 * NV_ERR_INVALID_ARGUMENT 1752 * NV_ERR_GENERIC: when this command has already been called 1753 * 1754 */ 1755 #define NV0073_CTRL_CMD_DP_SEND_ACT (0x731367U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_SEND_ACT_PARAMS_MESSAGE_ID" */ 1756 1757 #define NV0073_CTRL_CMD_DP_SEND_ACT_PARAMS_MESSAGE_ID (0x67U) 1758 1759 typedef struct NV0073_CTRL_CMD_DP_SEND_ACT_PARAMS { 1760 NvU32 subDeviceInstance; 1761 NvU32 displayId; 1762 } NV0073_CTRL_CMD_DP_SEND_ACT_PARAMS; 1763 1764 1765 1766 /* 1767 * NV0073_CTRL_CMD_DP_GET_CAPS 1768 * 1769 * This command returns the following info 1770 * 1771 * subDeviceInstance 1772 * This parameter specifies the subdevice instance within the 1773 * NV04_DISPLAY_COMMON parent device to which the operation should be 1774 * directed. This parameter must specify a value between zero and the 1775 * total number of subdevices within the parent device. This parameter 1776 * should be set to zero for default behavior. 1777 * sorIndex 1778 * Specifies the SOR index. 1779 * dpVersionsSupported 1780 * Specified the DP versions supported by the GPU 1781 * UHBRSupportedByGpu 1782 * Bitmask to specify the UHBR link rates supported by the GPU. 1783 * bIsMultistreamSupported 1784 * Returns NV_TRUE if MST is supported by the GPU else NV_FALSE 1785 * bIsSCEnabled 1786 * Returns NV_TRUE if Stream cloning is supported by the GPU else NV_FALSE 1787 * maxLinkRate 1788 * Returns Maximum allowed orclk for DP mode of SOR 1789 * 1 signifies 5.40(HBR2), 2 signifies 2.70(HBR), 3 signifies 1.62(RBR) 1790 * bHasIncreasedWatermarkLimits 1791 * Returns NV_TRUE if the GPU uses higher watermark limits, else NV_FALSE 1792 * bIsPC2Disabled 1793 * Returns NV_TRUE if VBIOS flag to disable PostCursor2 is set, else NV_FALSE 1794 * bFECSupported 1795 * Returns NV_TRUE if GPU supports FEC, else NV_FALSE 1796 * bIsTrainPhyRepeater 1797 * Returns NV_TRUE if LTTPR Link Training feature is set 1798 * bOverrideLinkBw 1799 * Returns NV_TRUE if DFP limits defined in DCB have to be honored, else NV_FALSE 1800 * 1801 * DSC caps 1802 * 1803 * Possible status values returned are: 1804 * NV_OK 1805 * NV_ERR_INVALID_ARGUMENT 1806 * NV_ERR_NOT_SUPPORTED 1807 * 1808 */ 1809 1810 #define NV0073_CTRL_CMD_DP_GET_CAPS (0x731369U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS_MESSAGE_ID" */ 1811 1812 #define NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS_MESSAGE_ID (0x69U) 1813 1814 typedef struct NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS { 1815 NvU32 subDeviceInstance; 1816 NvU32 sorIndex; 1817 NvU32 maxLinkRate; 1818 NvU32 dpVersionsSupported; 1819 NvU32 UHBRSupportedByGpu; 1820 NvBool bIsMultistreamSupported; 1821 NvBool bIsSCEnabled; 1822 NvBool bHasIncreasedWatermarkLimits; 1823 NvBool bIsPC2Disabled; 1824 NvBool isSingleHeadMSTSupported; 1825 NvBool bFECSupported; 1826 NvBool bIsTrainPhyRepeater; 1827 NvBool bOverrideLinkBw; 1828 NV0073_CTRL_CMD_DSC_CAP_PARAMS DSC; 1829 } NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS; 1830 1831 #define NV0073_CTRL_CMD_DP_GET_CAPS_DP_VERSIONS_SUPPORTED_DP1_2 0:0 1832 #define NV0073_CTRL_CMD_DP_GET_CAPS_DP_VERSIONS_SUPPORTED_DP1_2_NO (0x00000000U) 1833 #define NV0073_CTRL_CMD_DP_GET_CAPS_DP_VERSIONS_SUPPORTED_DP1_2_YES (0x00000001U) 1834 #define NV0073_CTRL_CMD_DP_GET_CAPS_DP_VERSIONS_SUPPORTED_DP1_4 1:1 1835 #define NV0073_CTRL_CMD_DP_GET_CAPS_DP_VERSIONS_SUPPORTED_DP1_4_NO (0x00000000U) 1836 #define NV0073_CTRL_CMD_DP_GET_CAPS_DP_VERSIONS_SUPPORTED_DP1_4_YES (0x00000001U) 1837 1838 1839 #define NV0073_CTRL_CMD_DP_GET_CAPS_MAX_LINK_RATE 2:0 1840 #define NV0073_CTRL_CMD_DP_GET_CAPS_MAX_LINK_RATE_NONE (0x00000000U) 1841 #define NV0073_CTRL_CMD_DP_GET_CAPS_MAX_LINK_RATE_1_62 (0x00000001U) 1842 #define NV0073_CTRL_CMD_DP_GET_CAPS_MAX_LINK_RATE_2_70 (0x00000002U) 1843 #define NV0073_CTRL_CMD_DP_GET_CAPS_MAX_LINK_RATE_5_40 (0x00000003U) 1844 #define NV0073_CTRL_CMD_DP_GET_CAPS_MAX_LINK_RATE_8_10 (0x00000004U) 1845 1846 1847 #define NV0073_CTRL_CMD_DP_GET_CAPS_DSC_ENCODER_COLOR_FORMAT_RGB (0x00000001U) 1848 #define NV0073_CTRL_CMD_DP_GET_CAPS_DSC_ENCODER_COLOR_FORMAT_Y_CB_CR_444 (0x00000002U) 1849 #define NV0073_CTRL_CMD_DP_GET_CAPS_DSC_ENCODER_COLOR_FORMAT_Y_CB_CR_NATIVE_422 (0x00000004U) 1850 #define NV0073_CTRL_CMD_DP_GET_CAPS_DSC_ENCODER_COLOR_FORMAT_Y_CB_CR_NATIVE_420 (0x00000008U) 1851 1852 #define NV0073_CTRL_CMD_DP_GET_CAPS_DSC_BITS_PER_PIXEL_PRECISION_1_16 (0x00000001U) 1853 #define NV0073_CTRL_CMD_DP_GET_CAPS_DSC_BITS_PER_PIXEL_PRECISION_1_8 (0x00000002U) 1854 #define NV0073_CTRL_CMD_DP_GET_CAPS_DSC_BITS_PER_PIXEL_PRECISION_1_4 (0x00000003U) 1855 #define NV0073_CTRL_CMD_DP_GET_CAPS_DSC_BITS_PER_PIXEL_PRECISION_1_2 (0x00000004U) 1856 #define NV0073_CTRL_CMD_DP_GET_CAPS_DSC_BITS_PER_PIXEL_PRECISION_1 (0x00000005U) 1857 1858 #define NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES (0x73136aU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_PARAMS_MESSAGE_ID" */ 1859 1860 #define NV0073_CTRL_CMD_DP_MSA_PROPERTIES_SYNC_POLARITY_LOW (0U) 1861 #define NV0073_CTRL_CMD_DP_MSA_PROPERTIES_SYNC_POLARITY_HIGH (1U) 1862 1863 typedef struct NV0073_CTRL_DP_MSA_PROPERTIES_MASK { 1864 NvU8 miscMask[2]; 1865 NvBool bRasterTotalHorizontal; 1866 NvBool bRasterTotalVertical; 1867 NvBool bActiveStartHorizontal; 1868 NvBool bActiveStartVertical; 1869 NvBool bSurfaceTotalHorizontal; 1870 NvBool bSurfaceTotalVertical; 1871 NvBool bSyncWidthHorizontal; 1872 NvBool bSyncPolarityHorizontal; 1873 NvBool bSyncHeightVertical; 1874 NvBool bSyncPolarityVertical; 1875 NvBool bReservedEnable[3]; 1876 } NV0073_CTRL_DP_MSA_PROPERTIES_MASK; 1877 1878 typedef struct NV0073_CTRL_DP_MSA_PROPERTIES_VALUES { 1879 NvU8 misc[2]; 1880 NvU16 rasterTotalHorizontal; 1881 NvU16 rasterTotalVertical; 1882 NvU16 activeStartHorizontal; 1883 NvU16 activeStartVertical; 1884 NvU16 surfaceTotalHorizontal; 1885 NvU16 surfaceTotalVertical; 1886 NvU16 syncWidthHorizontal; 1887 NvU16 syncPolarityHorizontal; 1888 NvU16 syncHeightVertical; 1889 NvU16 syncPolarityVertical; 1890 NvU8 reserved[3]; 1891 } NV0073_CTRL_DP_MSA_PROPERTIES_VALUES; 1892 1893 #define NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_PARAMS_MESSAGE_ID (0x6AU) 1894 1895 typedef struct NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_PARAMS { 1896 NvU32 subDeviceInstance; 1897 NvU32 displayId; 1898 NvBool bEnableMSA; 1899 NvBool bStereoPhaseInverse; 1900 NvBool bCacheMsaOverrideForNextModeset; 1901 NV0073_CTRL_DP_MSA_PROPERTIES_MASK featureMask; 1902 NV0073_CTRL_DP_MSA_PROPERTIES_VALUES featureValues; 1903 NV_DECLARE_ALIGNED(struct NV0073_CTRL_DP_MSA_PROPERTIES_VALUES *pFeatureDebugValues, 8); 1904 } NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_PARAMS; 1905 1906 /* 1907 * NV0073_CTRL_CMD_DP_GENERATE_FAKE_INTERRUPT 1908 * 1909 * This command can be used to invoke a fake interrupt for the operation of DP1.2 branch device 1910 * 1911 * subDeviceInstance 1912 * This parameter specifies the subdevice instance within the 1913 * NV04_DISPLAY_COMMON parent device to which the operation should be 1914 * directed. This parameter must specify a value between zero and the 1915 * total number of subdevices within the parent device. This parameter 1916 * should be set to zero for default behavior. 1917 * interruptType 1918 * This parameter specifies the type of fake interrupt to be invoked. Possible values are: 1919 * 0 => IRQ 1920 * 1 => HPDPlug 1921 * 2 => HPDUnPlug 1922 * displayId 1923 * should be for DP only 1924 * 1925 */ 1926 1927 #define NV0073_CTRL_CMD_DP_GENERATE_FAKE_INTERRUPT (0x73136bU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_GENERATE_FAKE_INTERRUPT_PARAMS_MESSAGE_ID" */ 1928 1929 #define NV0073_CTRL_CMD_DP_GENERATE_FAKE_INTERRUPT_PARAMS_MESSAGE_ID (0x6BU) 1930 1931 typedef struct NV0073_CTRL_CMD_DP_GENERATE_FAKE_INTERRUPT_PARAMS { 1932 NvU32 subDeviceInstance; 1933 NvU32 displayId; 1934 NvU32 interruptType; 1935 } NV0073_CTRL_CMD_DP_GENERATE_FAKE_INTERRUPT_PARAMS; 1936 1937 #define NV0073_CTRL_CMD_DP_GENERATE_FAKE_INTERRUPT_IRQ (0x00000000U) 1938 #define NV0073_CTRL_CMD_DP_GENERATE_FAKE_INTERRUPT_PLUG (0x00000001U) 1939 #define NV0073_CTRL_CMD_DP_GENERATE_FAKE_INTERRUPT_UNPLUG (0x00000002U) 1940 1941 /* 1942 * NV0073_CTRL_CMD_DP_CONFIG_RAD_SCRATCH_REG 1943 * 1944 * This command sets the MS displayId lit up by driver for further use of VBIOS 1945 * 1946 * subDeviceInstance 1947 * This parameter specifies the subdevice instance within the 1948 * NV04_DISPLAY_COMMON parent device to which the operation should be 1949 * directed. This parameter must specify a value between zero and the 1950 * total number of subdevices within the parent device. This parameter 1951 * should be set to zero for default behavior. 1952 * displayId 1953 * should be for DP only 1954 * activeDevAddr 1955 * Active MS panel address 1956 * sorIndex 1957 * SOR Index 1958 * dpLink 1959 * DP Sub Link Index 1960 * hopCount 1961 * Maximum hopcounts in MS address 1962 * dpMsDevAddrState 1963 * DP Multistream Device Address State. The values can be 1964 * 1965 * 1966 * Possible status values returned are: 1967 * NV_OK 1968 * NV_ERR_INVALID_ARGUMENT 1969 * NV_ERR_TIMEOUT 1970 * 1971 */ 1972 #define NV0073_CTRL_CMD_DP_CONFIG_RAD_SCRATCH_REG (0x73136cU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_CONFIG_RAD_SCRATCH_REG_PARAMS_MESSAGE_ID" */ 1973 1974 #define NV0073_CTRL_CMD_DP_CONFIG_RAD_SCRATCH_REG_PARAMS_MESSAGE_ID (0x6CU) 1975 1976 typedef struct NV0073_CTRL_CMD_DP_CONFIG_RAD_SCRATCH_REG_PARAMS { 1977 NvU32 subDeviceInstance; 1978 NvU32 displayId; 1979 NvU32 activeDevAddr; 1980 NvU32 sorIndex; 1981 NvU32 dpLink; 1982 NvU32 hopCount; 1983 NvU32 dpMsDevAddrState; 1984 } NV0073_CTRL_CMD_DP_CONFIG_RAD_SCRATCH_REG_PARAMS; 1985 1986 1987 1988 /* 1989 * NV0073_CTRL_CMD_DP_SET_TRIGGER_SELECT 1990 * 1991 * This command configures a new bit, NV_PDISP_SF_DP_LINKCTL_TRIGGER_SELECT 1992 * to indicate which pipeline will handle the 1993 * time slots allocation in single head MST mode 1994 * 1995 * subDeviceInstance 1996 * This parameter specifies the subdevice instance within the 1997 * NV04_DISPLAY_COMMON parent device to which the operation should be 1998 * directed. This parameter must specify a value between zero and the 1999 * total number of subdevices within the parent device. This parameter 2000 * should be set to zero for default behavior 2001 * Head 2002 * Specifies the head index for the stream 2003 * sorIndex 2004 * Specifies the SOR index for the stream 2005 * streamIndex 2006 * Stream Identifier 2007 * 2008 * 2009 * Possible status values returned are: 2010 * NV_OK 2011 * NV_ERR_INVALID_ARGUMENT 2012 * NV_ERR_GENERIC: when this command has already been called 2013 * 2014 */ 2015 #define NV0073_CTRL_CMD_DP_SET_TRIGGER_SELECT (0x73136fU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_SET_TRIGGER_SELECT_PARAMS_MESSAGE_ID" */ 2016 2017 #define NV0073_CTRL_CMD_DP_SET_TRIGGER_SELECT_PARAMS_MESSAGE_ID (0x6FU) 2018 2019 typedef struct NV0073_CTRL_CMD_DP_SET_TRIGGER_SELECT_PARAMS { 2020 NvU32 subDeviceInstance; 2021 NvU32 head; 2022 NvU32 sorIndex; 2023 NvU32 singleHeadMSTPipeline; 2024 } NV0073_CTRL_CMD_DP_SET_TRIGGER_SELECT_PARAMS; 2025 2026 /* 2027 * NV0073_CTRL_CMD_DP_CONFIG_SINGLE_HEAD_MULTI_STREAM 2028 * 2029 * This call is used by the displayport library.& clients of RM 2030 * Its main function is to configure single Head Multi stream mode 2031 * this call configures internal RM datastructures to support required mode. 2032 * 2033 * subDeviceInstance 2034 * This parameter specifies the subdevice instance within the 2035 * NV04_DISPLAY_COMMON parent device to which the operation should be 2036 * directed. This parameter must specify a value between zero and the 2037 * total number of subdevices within the parent device. This parameter 2038 * should be set to zero for default behavior. 2039 * 2040 * displayIDs 2041 * This parameter specifies array of DP displayIds to be configured which are driven out from a single head. 2042 * 2043 * numStreams 2044 * This parameter specifies number of streams driven from a single head 2045 * ex: for 2SST & 2MST its value is 2. 2046 * 2047 * mode 2048 * This parameter specifies single head multi stream mode to be configured. 2049 * 2050 * bSetConfigure 2051 * This parameter configures single head multistream mode 2052 * if TRUE it sets SST or MST based on 'mode' parameter and updates internal driver data structures with the given information. 2053 * if FALSE clears the configuration of single head multi stream mode. 2054 * 2055 * vbiosPrimaryDispIdIndex 2056 * This parameter specifies vbios master displayID index in displayIDs input array. 2057 * 2058 * Possible status values returned are: 2059 * NV_OK 2060 * NV_ERR_INVALID_ARGUMENT 2061 * NV_ERR_NOT_SUPPORTED 2062 * 2063 */ 2064 #define NV0073_CTRL_CMD_DP_CONFIG_SINGLE_HEAD_MULTI_STREAM (0x73136eU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_CONFIG_SINGLE_HEAD_MULTI_STREAM_PARAMS_MESSAGE_ID" */ 2065 2066 #define NV0073_CTRL_CMD_DP_SINGLE_HEAD_MAX_STREAMS (0x00000002U) 2067 #define NV0073_CTRL_CMD_DP_CONFIG_SINGLE_HEAD_MULTI_STREAM_PARAMS_MESSAGE_ID (0x6EU) 2068 2069 typedef struct NV0073_CTRL_CMD_DP_CONFIG_SINGLE_HEAD_MULTI_STREAM_PARAMS { 2070 NvU32 subDeviceInstance; 2071 NvU32 displayIDs[NV0073_CTRL_CMD_DP_SINGLE_HEAD_MAX_STREAMS]; 2072 NvU32 numStreams; 2073 NvU32 mode; 2074 NvBool bSetConfig; 2075 NvU8 vbiosPrimaryDispIdIndex; 2076 } NV0073_CTRL_CMD_DP_CONFIG_SINGLE_HEAD_MULTI_STREAM_PARAMS; 2077 2078 #define NV0073_CTRL_CMD_DP_SINGLE_HEAD_MULTI_STREAM_NONE (0x00000000U) 2079 #define NV0073_CTRL_CMD_DP_SINGLE_HEAD_MULTI_STREAM_MODE_SST (0x00000001U) 2080 #define NV0073_CTRL_CMD_DP_SINGLE_HEAD_MULTI_STREAM_MODE_MST (0x00000002U) 2081 2082 /* 2083 * NV0073_CTRL_CMD_DP_SET_TRIGGER_ALL 2084 * 2085 * This command configures a new bit, NV_PDISP_SF_DP_LINKCTL_TRIGGER_ALL 2086 * to indicate which if all the pipelines to take affect on ACT (sorFlushUpdates) 2087 * in single head MST mode 2088 * 2089 * subDeviceInstance 2090 * This parameter specifies the subdevice instance within the 2091 * NV04_DISPLAY_COMMON parent device to which the operation should be 2092 * directed. This parameter must specify a value between zero and the 2093 * total number of subdevices within the parent device. This parameter 2094 * should be set to zero for default behavior 2095 * Head 2096 * Specifies the head index for the stream 2097 * sorIndex 2098 * Specifies the SOR index for the stream 2099 * streamIndex 2100 * Stream Identifier 2101 * 2102 * 2103 * Possible status values returned are: 2104 * NV_OK 2105 * NV_ERR_INVALID_ARGUMENT 2106 * NV_ERR_GENERIC: when this command has already been called 2107 * 2108 */ 2109 #define NV0073_CTRL_CMD_DP_SET_TRIGGER_ALL (0x731370U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_SET_TRIGGER_ALL_PARAMS_MESSAGE_ID" */ 2110 2111 #define NV0073_CTRL_CMD_DP_SET_TRIGGER_ALL_PARAMS_MESSAGE_ID (0x70U) 2112 2113 typedef struct NV0073_CTRL_CMD_DP_SET_TRIGGER_ALL_PARAMS { 2114 NvU32 subDeviceInstance; 2115 NvU32 head; 2116 NvBool enable; 2117 } NV0073_CTRL_CMD_DP_SET_TRIGGER_ALL_PARAMS; 2118 2119 2120 2121 /* 2122 * NV0073_CTRL_CMD_DP_GET_AUXLOGGER_BUFFER_DATA 2123 * 2124 * This command collects the DP AUX log from the RM aux buffer and 2125 * sends it to the application. 2126 * 2127 * dpAuxBufferReadSize 2128 * Specifies the number of logs to be read from the 2129 * AUX buffer in RM 2130 * dpNumMessagesRead 2131 * Specifies the number of logs read from the AUX buffer 2132 * dpAuxBuffer 2133 * The local buffer to copy the specified number of logs 2134 * from RM to user application 2135 * 2136 * 2137 * Possible status values returned are: 2138 * NV_OK 2139 * NV_ERR_INVALID_ARGUMENT 2140 * NV_ERR_GENERIC: when this command has already been called 2141 * 2142 * 2143 *DPAUXPACKET - This structure holds the log information 2144 * auxPacket - carries the hex dump of the message transaction 2145 * auxEvents - Contains the information as in what request and reply type where 2146 * auxRequestTimeStamp - Request timestamp 2147 * auxMessageReqSize - Request Message size 2148 * auxMessageReplySize - Reply message size(how much information was actually send by receiver) 2149 * auxOutPort - DP port number 2150 * auxPortAddress - Address to which data was requested to be read or written 2151 * auxReplyTimeStamp - Reply timestamp 2152 * auxCount - Serial number to keep track of transactions 2153 */ 2154 2155 /*Maximum dp messages size is 16 as per the protocol*/ 2156 #define DP_MAX_MSG_SIZE 16U 2157 #define MAX_LOGS_PER_POLL 50U 2158 2159 /* Various kinds of DP Aux transactions */ 2160 #define NV_DP_AUXLOGGER_REQUEST_TYPE 3:0 2161 #define NV_DP_AUXLOGGER_REQUEST_TYPE_NULL 0x00000000U 2162 #define NV_DP_AUXLOGGER_REQUEST_TYPE_I2CWR 0x00000001U 2163 #define NV_DP_AUXLOGGER_REQUEST_TYPE_I2CREQWSTAT 0x00000002U 2164 #define NV_DP_AUXLOGGER_REQUEST_TYPE_MOTWR 0x00000003U 2165 #define NV_DP_AUXLOGGER_REQUEST_TYPE_MOTREQWSTAT 0x00000004U 2166 #define NV_DP_AUXLOGGER_REQUEST_TYPE_AUXWR 0x00000005U 2167 #define NV_DP_AUXLOGGER_REQUEST_TYPE_I2CRD 0x00000006U 2168 #define NV_DP_AUXLOGGER_REQUEST_TYPE_MOTRD 0x00000007U 2169 #define NV_DP_AUXLOGGER_REQUEST_TYPE_AUXRD 0x00000008U 2170 #define NV_DP_AUXLOGGER_REQUEST_TYPE_UNKNOWN 0x00000009U 2171 2172 #define NV_DP_AUXLOGGER_REPLY_TYPE 7:4 2173 #define NV_DP_AUXLOGGER_REPLY_TYPE_NULL 0x00000000U 2174 #define NV_DP_AUXLOGGER_REPLY_TYPE_SB_ACK 0x00000001U 2175 #define NV_DP_AUXLOGGER_REPLY_TYPE_RETRY 0x00000002U 2176 #define NV_DP_AUXLOGGER_REPLY_TYPE_TIMEOUT 0x00000003U 2177 #define NV_DP_AUXLOGGER_REPLY_TYPE_DEFER 0x00000004U 2178 #define NV_DP_AUXLOGGER_REPLY_TYPE_DEFER_TO 0x00000005U 2179 #define NV_DP_AUXLOGGER_REPLY_TYPE_ACK 0x00000006U 2180 #define NV_DP_AUXLOGGER_REPLY_TYPE_ERROR 0x00000007U 2181 #define NV_DP_AUXLOGGER_REPLY_TYPE_UNKNOWN 0x00000008U 2182 2183 #define NV_DP_AUXLOGGER_EVENT_TYPE 9:8 2184 #define NV_DP_AUXLOGGER_EVENT_TYPE_AUX 0x00000000U 2185 #define NV_DP_AUXLOGGER_EVENT_TYPE_HOT_PLUG 0x00000001U 2186 #define NV_DP_AUXLOGGER_EVENT_TYPE_HOT_UNPLUG 0x00000002U 2187 #define NV_DP_AUXLOGGER_EVENT_TYPE_IRQ 0x00000003U 2188 2189 #define NV_DP_AUXLOGGER_AUXCTL_CMD 15:12 2190 #define NV_DP_AUXLOGGER_AUXCTL_CMD_INIT 0x00000000U 2191 #define NV_DP_AUXLOGGER_AUXCTL_CMD_I2CWR 0x00000000U 2192 #define NV_DP_AUXLOGGER_AUXCTL_CMD_I2CRD 0x00000001U 2193 #define NV_DP_AUXLOGGER_AUXCTL_CMD_I2CREQWSTAT 0x00000002U 2194 #define NV_DP_AUXLOGGER_AUXCTL_CMD_MOTWR 0x00000004U 2195 #define NV_DP_AUXLOGGER_AUXCTL_CMD_MOTRD 0x00000005U 2196 #define NV_DP_AUXLOGGER_AUXCTL_CMD_MOTREQWSTAT 0x00000006U 2197 #define NV_DP_AUXLOGGER_AUXCTL_CMD_AUXWR 0x00000008U 2198 #define NV_DP_AUXLOGGER_AUXCTL_CMD_AUXRD 0x00000009U 2199 2200 2201 typedef struct DPAUXPACKET { 2202 NvU32 auxEvents; 2203 NvU32 auxRequestTimeStamp; 2204 NvU32 auxMessageReqSize; 2205 NvU32 auxMessageReplySize; 2206 NvU32 auxOutPort; 2207 NvU32 auxPortAddress; 2208 NvU32 auxReplyTimeStamp; 2209 NvU32 auxCount; 2210 NvU8 auxPacket[DP_MAX_MSG_SIZE]; 2211 } DPAUXPACKET; 2212 typedef struct DPAUXPACKET *PDPAUXPACKET; 2213 2214 #define NV0073_CTRL_CMD_DP_GET_AUXLOGGER_BUFFER_DATA (0x731373U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_GET_AUXLOGGER_BUFFER_DATA_PARAMS_MESSAGE_ID" */ 2215 2216 #define NV0073_CTRL_CMD_DP_GET_AUXLOGGER_BUFFER_DATA_PARAMS_MESSAGE_ID (0x73U) 2217 2218 typedef struct NV0073_CTRL_CMD_DP_GET_AUXLOGGER_BUFFER_DATA_PARAMS { 2219 //In 2220 NvU32 subDeviceInstance; 2221 NvU32 dpAuxBufferReadSize; 2222 2223 //Out 2224 NvU32 dpNumMessagesRead; 2225 DPAUXPACKET dpAuxBuffer[MAX_LOGS_PER_POLL]; 2226 } NV0073_CTRL_CMD_DP_GET_AUXLOGGER_BUFFER_DATA_PARAMS; 2227 2228 2229 2230 2231 /* NV0073_CTRL_CMD_DP_CONFIG_INDEXED_LINK_RATES 2232 * 2233 * This setup link rate table for target display to enable indexed link rate 2234 * and export valid link rates back to client. Client may pass empty table to 2235 * reset previous setting. 2236 * 2237 * subDeviceInstance 2238 * client will give a subdevice to get right pGpu/pDisp for it 2239 * displayId 2240 * DisplayId of the display for which the client targets 2241 * linkRateTbl 2242 * Link rates in 200KHz as native granularity from eDP 1.4 2243 * linkBwTbl 2244 * Link rates valid for client to apply to 2245 * linkBwCount 2246 * Total valid link rates 2247 * 2248 * Possible status values returned include: 2249 * NV_OK 2250 * NV_ERR_NOT_SUPPORTED 2251 * NV_ERR_INVALID_ARGUMENT 2252 */ 2253 2254 #define NV0073_CTRL_CMD_DP_CONFIG_INDEXED_LINK_RATES (0x731377U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_CONFIG_INDEXED_LINK_RATES_PARAMS_MESSAGE_ID" */ 2255 2256 #define NV0073_CTRL_DP_MAX_INDEXED_LINK_RATES 8U 2257 2258 #define NV0073_CTRL_CMD_DP_CONFIG_INDEXED_LINK_RATES_PARAMS_MESSAGE_ID (0x77U) 2259 2260 typedef struct NV0073_CTRL_CMD_DP_CONFIG_INDEXED_LINK_RATES_PARAMS { 2261 // In 2262 NvU32 subDeviceInstance; 2263 NvU32 displayId; 2264 NvU16 linkRateTbl[NV0073_CTRL_DP_MAX_INDEXED_LINK_RATES]; 2265 2266 // Out 2267 NvU16 linkBwTbl[NV0073_CTRL_DP_MAX_INDEXED_LINK_RATES]; 2268 NvU8 linkBwCount; 2269 } NV0073_CTRL_CMD_DP_CONFIG_INDEXED_LINK_RATES_PARAMS; 2270 2271 2272 /* 2273 * NV0073_CTRL_CMD_DP_SET_STEREO_MSA_PROPERTIES 2274 * 2275 * This command is used to not depend on supervisor interrupts for setting the 2276 * stereo msa params. We will not cache the values and can toggle stereo using 2277 * this ctrl call on demand. Note that this control call will only change stereo 2278 * settings and will leave other settings as is. 2279 * 2280 * subDeviceInstance 2281 * This parameter specifies the subdevice instance within the 2282 * NV04_DISPLAY_COMMON parent device to which the operation should be 2283 * directed. This parameter must specify a value between zero and the 2284 * total number of subdevices within the parent device. This parameter 2285 * should be set to zero for default behavior. 2286 * displayId 2287 * should be for DP only 2288 * bEnableMSA 2289 * To enable or disable MSA 2290 * bStereoPhaseInverse 2291 * To enable or disable Stereo Phase Inverse value 2292 * featureMask 2293 * Enable/Disable mask of individual MSA property. 2294 * featureValues 2295 * MSA property value to write 2296 * 2297 * Possible status values returned are: 2298 * NV_OK 2299 * NV_ERR_INVALID_ARGUMENT 2300 * NV_ERR_NOT_SUPPORTED 2301 * NV_ERR_TIMEOUT 2302 * 2303 */ 2304 #define NV0073_CTRL_CMD_DP_SET_STEREO_MSA_PROPERTIES (0x731378U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_SET_STEREO_MSA_PROPERTIES_PARAMS_MESSAGE_ID" */ 2305 2306 #define NV0073_CTRL_CMD_DP_SET_STEREO_MSA_PROPERTIES_PARAMS_MESSAGE_ID (0x78U) 2307 2308 typedef struct NV0073_CTRL_CMD_DP_SET_STEREO_MSA_PROPERTIES_PARAMS { 2309 NvU32 subDeviceInstance; 2310 NvU32 displayId; 2311 NvBool bEnableMSA; 2312 NvBool bStereoPhaseInverse; 2313 NV0073_CTRL_DP_MSA_PROPERTIES_MASK featureMask; 2314 NV0073_CTRL_DP_MSA_PROPERTIES_VALUES featureValues; 2315 } NV0073_CTRL_CMD_DP_SET_STEREO_MSA_PROPERTIES_PARAMS; 2316 2317 2318 2319 /* 2320 * NV0073_CTRL_CMD_DP_CONFIGURE_FEC 2321 * 2322 * This command is used to enable/disable FEC on DP Mainlink. 2323 * FEC is a prerequisite to DSC. This should be called only 2324 * after LT completes (including PostLT LQA) while enabling. 2325 * 2326 * subDeviceInstance 2327 * This parameter specifies the subdevice instance within the 2328 * NV04_DISPLAY_COMMON parent device to which the operation should be 2329 * directed. This parameter must specify a value between zero and the 2330 * total number of subdevices within the parent device. This parameter 2331 * should be set to zero for default behavior. 2332 * 2333 * displayId 2334 * Can only be 1 and must be DP. 2335 * 2336 * bEnableFec 2337 * To enable or disable FEC 2338 * 2339 * Possible status values returned are: 2340 * NV_OK 2341 * NV_ERR_INVALID_ARGUMENT 2342 * NV_ERR_NOT_SUPPORTED 2343 * 2344 */ 2345 #define NV0073_CTRL_CMD_DP_CONFIGURE_FEC (0x73137aU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_CONFIGURE_FEC_PARAMS_MESSAGE_ID" */ 2346 2347 #define NV0073_CTRL_CMD_DP_CONFIGURE_FEC_PARAMS_MESSAGE_ID (0x7AU) 2348 2349 typedef struct NV0073_CTRL_CMD_DP_CONFIGURE_FEC_PARAMS { 2350 NvU32 subDeviceInstance; 2351 NvU32 displayId; 2352 NvBool bEnableFec; 2353 } NV0073_CTRL_CMD_DP_CONFIGURE_FEC_PARAMS; 2354 2355 /* 2356 * NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD 2357 * 2358 * subDeviceInstance 2359 * This parameter specifies the subdevice instance within the 2360 * NV04_DISPLAY_COMMON parent device to which the operation should be 2361 * directed. This parameter must specify a value between zero and the 2362 * total number of subdevices within the parent device. This parameter 2363 * should be set to zero for default behavior 2364 * cmd 2365 * This parameter is an input to this command. 2366 * Here are the current defined fields: 2367 * NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_CMD_POWER 2368 * Set to specify what operation to run. 2369 * NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_CMD_POWER_UP 2370 * Request to power up pad. 2371 * NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_CMD_POWER_DOWN 2372 * Request to power down the pad. 2373 * linkBw 2374 * This parameter is used to pass in the link bandwidth required to run the 2375 * power up sequence. Refer enum DP_LINK_BANDWIDTH for valid values. 2376 * laneCount 2377 * This parameter is used to pass the lanecount. 2378 * sorIndex 2379 * This parameter is used to pass the SOR index. 2380 * sublinkIndex 2381 * This parameter is used to pass the sublink index. Please refer 2382 * enum DFPLINKINDEX for valid values 2383 * priPadLinkIndex 2384 * This parameter is used to pass the padlink index for primary link. 2385 * Please refer enum DFPPADLINK for valid index values for Link A~F. 2386 * secPadLinkIndex 2387 * This parameter is used to pass the padlink index for secondary link. 2388 * For Single SST pass in NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_PADLINK_INDEX_INVALID 2389 * bEnableSpread 2390 * This parameter is boolean value used to indicate if spread is to be enabled or disabled. 2391 */ 2392 2393 #define NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD (0x73137bU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_PARAMS_MESSAGE_ID" */ 2394 2395 #define NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_PARAMS_MESSAGE_ID (0x7BU) 2396 2397 typedef struct NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_PARAMS { 2398 NvU32 subDeviceInstance; 2399 NvU32 cmd; 2400 NvU32 linkBw; 2401 NvU32 laneCount; 2402 NvU32 sorIndex; 2403 NvU32 sublinkIndex; // sublink A/B 2404 NvU32 priPadLinkIndex; // padlink A/B/C/D/E/F 2405 NvU32 secPadLinkIndex; // padlink A/B/C/D/E/F for secondary link in DualSST case. 2406 NvBool bEnableSpread; 2407 } NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_PARAMS; 2408 2409 #define NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_CMD_POWER 0:0 2410 #define NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_CMD_POWER_UP (0x00000000U) 2411 #define NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_CMD_POWER_DOWN (0x00000001U) 2412 2413 #define NV0073_CTRL_CMD_DP_CONFIG_MACRO_PAD_PADLINK_INDEX_INVALID (0x000000FFU) 2414 2415 /* 2416 * NV0073_CTRL_CMD_DP_AUXCH_CTRL 2417 * 2418 * This command can be used to perform the I2C Bulk transfer over 2419 * DP Aux channel. This is the display port specific implementation 2420 * for sending bulk data over the DpAux channel, by splitting up the 2421 * data into pieces and retrying for pieces that aren't ACK'd. 2422 * 2423 * subDeviceInstance [IN] 2424 * This parameter specifies the subdevice instance within the 2425 * NV04_DISPLAY_COMMON parent device to which the operation should be 2426 * directed. This parameter must specify a value between zero and the 2427 * total number of subdevices within the parent device. This parameter 2428 * should be set to zero for default behavior. 2429 * displayId [IN] 2430 * This parameter specifies the ID of the display for which the dfp 2431 * caps should be returned. The display ID must a dfp display. 2432 * If more than one displayId bit is set or the displayId is not a dfp, 2433 * this call will return NV_ERR_INVALID_ARGUMENT. 2434 * addr [IN] 2435 * This parameter is an input to this command. The addr parameter follows 2436 * Section 2.4 in DisplayPort spec and the client should refer to the valid 2437 * address in DisplayPort spec. Only the first 20 bits are valid. 2438 * bWrite [IN] 2439 * This parameter specifies whether the command is a I2C write (NV_TRUE) or 2440 * a I2C read (NV_FALSE). 2441 * data [IN/OUT] 2442 * In the case of a read transaction, this parameter returns the data from 2443 * transaction request. In the case of a write transaction, the client 2444 * should write to this buffer for the data to send. 2445 * size [IN/OUT] 2446 * Specifies how many data bytes to read/write depending on the 2447 * transaction type. 2448 * 2449 * Possible status values returned are: 2450 * NV_OK 2451 * NV_ERR_INVALID_ARGUMENT 2452 * NV_ERR_NOT_SUPPORTED 2453 */ 2454 #define NV0073_CTRL_CMD_DP_AUXCH_I2C_TRANSFER_CTRL (0x73137cU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_AUXCH_I2C_TRANSFER_CTRL_PARAMS_MESSAGE_ID" */ 2455 2456 #define NV0073_CTRL_DP_AUXCH_I2C_TRANSFER_MAX_DATA_SIZE 256U 2457 2458 #define NV0073_CTRL_DP_AUXCH_I2C_TRANSFER_CTRL_PARAMS_MESSAGE_ID (0x7CU) 2459 2460 typedef struct NV0073_CTRL_DP_AUXCH_I2C_TRANSFER_CTRL_PARAMS { 2461 NvU32 subDeviceInstance; 2462 NvU32 displayId; 2463 NvU32 addr; 2464 NvBool bWrite; 2465 NvU8 data[NV0073_CTRL_DP_AUXCH_I2C_TRANSFER_MAX_DATA_SIZE]; 2466 NvU32 size; 2467 } NV0073_CTRL_DP_AUXCH_I2C_TRANSFER_CTRL_PARAMS; 2468 2469 /* 2470 * NV0073_CTRL_CMD_DP_ENABLE_VRR 2471 * 2472 * The command is used to enable VRR. 2473 * 2474 * subDeviceInstance [IN] 2475 * This parameter specifies the subdevice instance within the 2476 * NV04_DISPLAY_COMMON parent device to which the operation should be 2477 * directed. This parameter must specify a value between zero and the 2478 * total number of subdevices within the parent device. This parameter 2479 * should be set to zero for default behavior 2480 * displayId [IN] 2481 * This parameter is an input to this command, specifies the ID of the display 2482 * for client targeted to. 2483 * The display ID must a DP display. 2484 * If more than one displayId bit is set or the displayId is not a DP, 2485 * this call will return NV_ERR_INVALID_ARGUMENT. 2486 * cmd [IN] 2487 * This parameter is an input to this command. 2488 * 2489 * _STAGE: specifies the stage id to execute in the VRR enablement sequence. 2490 * _MONITOR_ENABLE_BEGIN: Send command to the monitor to start monitor 2491 * enablement procedure. 2492 * _MONITOR_ENABLE_CHALLENGE: Send challenge to the monitor 2493 * _MONITOR_ENABLE_CHECK: Read digest from the monitor, and verify 2494 * if the result is valid. 2495 * _DRIVER_ENABLE_BEGIN: Send command to the monitor to start driver 2496 * enablement procedure. 2497 * _DRIVER_ENABLE_CHALLENGE: Read challenge from the monitor and write back 2498 * corresponding digest. 2499 * _DRIVER_ENABLE_CHECK: Check if monitor enablement worked. 2500 * _RESET_MONITOR: Set the FW state m/c to a known state. 2501 * _INIT_PUBLIC_INFO: Send command to the monitor to prepare public info. 2502 * _GET_PUBLIC_INFO: Read public info from the monitor. 2503 * _STATUS_CHECK: Check if monitor is ready for next command. 2504 * result [OUT] 2505 * This is an output parameter to reflect the result of the operation. 2506 */ 2507 #define NV0073_CTRL_CMD_DP_ENABLE_VRR (0x73137dU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_ENABLE_VRR_PARAMS_MESSAGE_ID" */ 2508 2509 #define NV0073_CTRL_CMD_DP_ENABLE_VRR_PARAMS_MESSAGE_ID (0x7DU) 2510 2511 typedef struct NV0073_CTRL_CMD_DP_ENABLE_VRR_PARAMS { 2512 NvU32 subDeviceInstance; 2513 NvU32 displayId; 2514 NvU32 cmd; 2515 NvU32 result; 2516 } NV0073_CTRL_CMD_DP_ENABLE_VRR_PARAMS; 2517 2518 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE 3:0 2519 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_MONITOR_ENABLE_BEGIN (0x00000000U) 2520 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_MONITOR_ENABLE_CHALLENGE (0x00000001U) 2521 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_MONITOR_ENABLE_CHECK (0x00000002U) 2522 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_DRIVER_ENABLE_BEGIN (0x00000003U) 2523 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_DRIVER_ENABLE_CHALLENGE (0x00000004U) 2524 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_DRIVER_ENABLE_CHECK (0x00000005U) 2525 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_RESET_MONITOR (0x00000006U) 2526 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_INIT_PUBLIC_INFO (0x00000007U) 2527 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_GET_PUBLIC_INFO (0x00000008U) 2528 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_CMD_STAGE_STATUS_CHECK (0x00000009U) 2529 2530 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_STATUS_OK (0x00000000U) 2531 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_STATUS_PENDING (0x80000001U) 2532 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_STATUS_READ_ERROR (0x80000002U) 2533 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_STATUS_WRITE_ERROR (0x80000003U) 2534 #define NV0073_CTRL_DP_CMD_ENABLE_VRR_STATUS_DEVICE_ERROR (0x80000004U) 2535 2536 /* 2537 * NV0073_CTRL_CMD_DP_GET_GENERIC_INFOFRAME 2538 * 2539 * This command is used to capture the display output packets for DP protocol. 2540 * Common supported packets are Dynamic Range and mastering infoframe SDP for HDR, 2541 * VSC SDP for colorimetry and pixel encoding info. 2542 * 2543 * displayID (in) 2544 * This parameter specifies the displayID for the display resource to configure. 2545 * subDeviceInstance (in) 2546 * This parameter specifies the subdevice instance within the NV04_DISPLAY_COMMON 2547 * parent device to which the operation should be directed. 2548 * infoframeIndex (in) 2549 * HW provides support to program 2 generic infoframes per frame for DP. 2550 * This parameter indicates which infoframe packet is to be captured. 2551 * Possible flags are as follows: 2552 * NV0073_CTRL_DP_GET_GENERIC_INFOFRAME_CAPTURE_MODE 2553 * This flag indicates the INFOFRAME that needs to be read. 2554 * Set to _INFOFRAME0 if RM should read GENERIC_INFOFRAME 2555 * Set to _INFOFRAME1 if RM should read GENERIC_INFOFRAME1 2556 * packet (out) 2557 * pPacket points to the memory for reading the infoframe packet. 2558 * bTransmitControl (out) 2559 * This gives the transmit mode of infoframes. 2560 * If set, means infoframe will be sent as soon as possible and then on 2561 * every frame during vblank. 2562 * If cleared, means the infoframe will be sent once as soon as possible. 2563 * 2564 * Possible status values returned are: 2565 * NV_OK 2566 * NV_ERR_INVALID_ARGUMENT 2567 * NV_ERR_NOT_SUPPORTED 2568 */ 2569 #define NV0073_CTRL_CMD_DP_GET_GENERIC_INFOFRAME (0x73137eU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_GET_GENERIC_INFOFRAME_PARAMS_MESSAGE_ID" */ 2570 2571 #define NV0073_CTRL_DP_GENERIC_INFOFRAME_MAX_PACKET_SIZE 36U 2572 2573 #define NV0073_CTRL_DP_GET_GENERIC_INFOFRAME_PARAMS_MESSAGE_ID (0x7EU) 2574 2575 typedef struct NV0073_CTRL_DP_GET_GENERIC_INFOFRAME_PARAMS { 2576 NvU32 subDeviceInstance; 2577 NvU32 displayId; 2578 NvU32 infoframeIndex; 2579 NvU8 packet[NV0073_CTRL_DP_GENERIC_INFOFRAME_MAX_PACKET_SIZE]; 2580 NvBool bTransmitControl; 2581 } NV0073_CTRL_DP_GET_GENERIC_INFOFRAME_PARAMS; 2582 2583 2584 #define NV0073_CTRL_DP_GET_GENERIC_INFOFRAME_CAPTURE_MODE 0:0 2585 #define NV0073_CTRL_DP_GET_GENERIC_INFOFRAME_CAPTURE_MODE_INFOFRAME0 (0x0000000U) 2586 #define NV0073_CTRL_DP_GET_GENERIC_INFOFRAME_CAPTURE_MODE_INFOFRAME1 (0x0000001U) 2587 2588 2589 /* 2590 * NV0073_CTRL_CMD_DP_GET_MSA_ATTRIBUTES 2591 * 2592 * This command is used to capture the various data attributes sent in the MSA for DP protocol. 2593 * Refer table 2-94 'MSA Data Fields' in DP1.4a spec document for MSA data field description. 2594 * 2595 * displayID (in) 2596 * This parameter specifies the displayID for the display resource to configure. 2597 * subDeviceInstance (in) 2598 * This parameter specifies the subdevice instance within the NV04_DISPLAY_COMMON 2599 * parent device to which the operation should be directed. 2600 * mvid, nvid (out) 2601 * Video timestamp used by DP sink for regenerating pixel clock. 2602 * misc0, misc1 (out) 2603 * Miscellaneous MSA attributes. 2604 * hTotal, vTotal (out) 2605 * Htotal measured in pixel count and vtotal measured in line count. 2606 * hActiveStart, vActiveStart (out) 2607 * Active start measured from start of leading edge of the sync pulse. 2608 * hActiveWidth, vActiveWidth (out) 2609 * Active video width and height. 2610 * hSyncWidth, vSyncWidth (out) 2611 * Width of sync pulse. 2612 * hSyncPolarity, vSyncPolarity (out) 2613 * Polarity of sync pulse. 2614 * 2615 * Possible status values returned are: 2616 * NV_OK 2617 * NV_ERR_INVALID_ARGUMENT 2618 * NV_ERR_NOT_SUPPORTED 2619 */ 2620 #define NV0073_CTRL_CMD_DP_GET_MSA_ATTRIBUTES (0x73137fU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_GET_MSA_ATTRIBUTES_PARAMS_MESSAGE_ID" */ 2621 2622 #define NV0073_CTRL_DP_MSA_MAX_DATA_SIZE 7U 2623 2624 #define NV0073_CTRL_DP_GET_MSA_ATTRIBUTES_PARAMS_MESSAGE_ID (0x7FU) 2625 2626 typedef struct NV0073_CTRL_DP_GET_MSA_ATTRIBUTES_PARAMS { 2627 NvU32 subDeviceInstance; 2628 NvU32 displayId; 2629 NvU32 mvid; 2630 NvU32 nvid; 2631 NvU8 misc0; 2632 NvU8 misc1; 2633 NvU16 hTotal; 2634 NvU16 vTotal; 2635 NvU16 hActiveStart; 2636 NvU16 vActiveStart; 2637 NvU16 hActiveWidth; 2638 NvU16 vActiveWidth; 2639 NvU16 hSyncWidth; 2640 NvU16 vSyncWidth; 2641 NvBool hSyncPolarity; 2642 NvBool vSyncPolarity; 2643 } NV0073_CTRL_DP_GET_MSA_ATTRIBUTES_PARAMS; 2644 2645 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_MVID 23:0 2646 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_NVID 23:0 2647 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_MISC0 7:0 2648 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_MISC1 15:8 2649 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_HTOTAL 15:0 2650 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_VTOTAL 31:16 2651 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_HACTIVE_START 15:0 2652 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_VACTIVE_START 31:16 2653 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_HACTIVE_WIDTH 15:0 2654 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_VACTIVE_WIDTH 31:16 2655 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_HSYNC_WIDTH 14:0 2656 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_HSYNC_POLARITY 15:15 2657 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_VSYNC_WIDTH 30:16 2658 #define NV0073_CTRL_DP_MSA_ATTRIBUTES_VSYNC_POLARITY 31:31 2659 2660 /* 2661 * NV0073_CTRL_CMD_DP_AUXCH_OD_CTRL 2662 * 2663 * This command is used to query OD capability and status as well as 2664 * control OD functionality of eDP LCD panels. 2665 * 2666 * subDeviceInstance [in] 2667 * This parameter specifies the subdevice instance within the 2668 * NV04_DISPLAY_COMMON parent device to which the operation should be 2669 * directed. This parameter must specify a value between zero and the 2670 * total number of subdevices within the parent device. This parameter 2671 * should be set to zero for default behavior. 2672 * displayId [in] 2673 * This parameter specifies the ID of the DP display which owns 2674 * the Main Link to be adjusted. The display ID must a DP display 2675 * as determined with the NV0073_CTRL_CMD_SPECIFIC_GET_TYPE command. 2676 * If more than one displayId bit is set or the displayId is not a DP, 2677 * this call will return NV_ERR_INVALID_ARGUMENT. 2678 * cmd [in] 2679 * This parameter is an input to this command. The cmd parameter tells 2680 * whether we have to get the value of a specific field or set the 2681 * value in case of a writeable field. 2682 * control [in] 2683 * This parameter is input by the user. It is used by the user to decide the control 2684 * value to be written to change the Sink OD mode. The command to write is 2685 * the NV0073_CTRL_CMD_DP_AUXCH_OD_CTL_SET command. 2686 * bOdCapable [out] 2687 * This parameter reflects the OD capability of the Sink which can be 2688 * fetched by using the NV0073_CTRL_CMD_DP_AUXCH_OD_CAPABLE_QUERY command. 2689 * bOdControlCapable [out] 2690 * This parameter reflects the OD control capability of the Sink which can be 2691 * fetched by using the NV0073_CTRL_CMD_DP_AUXCH_OD_CTL_CAPABLE_QUERY command. 2692 * bOdStatus [out] 2693 * This parameter reflects the Sink OD status which can be 2694 * fetched by using the NV0073_CTRL_CMD_DP_AUXCH_OD_STATUS_QUERY command. 2695 * 2696 * Possible status values returned are: 2697 * NV_OK 2698 * NV_ERR_INVALID_ARGUMENT 2699 * NV_ERR_NOT_SUPPORTED 2700 */ 2701 #define NV0073_CTRL_CMD_DP_AUXCH_OD_CTRL (0x731380U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_AUXCH_OD_CTRL_PARAMS_MESSAGE_ID" */ 2702 2703 #define NV0073_CTRL_CMD_DP_AUXCH_OD_CTRL_PARAMS_MESSAGE_ID (0x80U) 2704 2705 typedef struct NV0073_CTRL_CMD_DP_AUXCH_OD_CTRL_PARAMS { 2706 NvU32 subDeviceInstance; 2707 NvU32 displayId; 2708 NvU8 control; 2709 NvU8 cmd; 2710 NvBool bOdCapable; 2711 NvBool bOdControlCapable; 2712 NvBool bOdStatus; 2713 } NV0073_CTRL_CMD_DP_AUXCH_OD_CTRL_PARAMS; 2714 2715 /* valid commands */ 2716 #define NV0073_CTRL_CMD_DP_AUXCHQUERY_OD_CAPABLE 0x00000000 2717 #define NV0073_CTRL_CMD_DP_AUXCHQUERY_OD_CTL_CAPABLE 0x00000001 2718 #define NV0073_CTRL_CMD_DP_AUXCHQUERY_OD_STATUS 0x00000002 2719 #define NV0073_CTRL_CMD_DP_AUXCH_OD_CTL_SET 0x00000003 2720 2721 /* valid state values */ 2722 #define NV0073_CTRL_CMD_DP_AUXCH_OD_CTL_SET_AUTONOMOUS 0x00000000 2723 #define NV0073_CTRL_CMD_DP_AUXCH_OD_CTL_SET_DISABLE_OD 0x00000002 2724 #define NV0073_CTRL_CMD_DP_AUXCH_OD_CTL_SET_ENABLE_OD 0x00000003 2725 2726 /* 2727 * NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES 2728 * 2729 * This command returns the following info 2730 * 2731 * subDeviceInstance 2732 * This parameter specifies the subdevice instance within the 2733 * NV04_DISPLAY_COMMON parent device to which the operation should be 2734 * directed. This parameter must specify a value between zero and the 2735 * total number of subdevices within the parent device. This parameter 2736 * should be set to zero for default behavior. 2737 * displayId 2738 * should be for DP only 2739 * bEnableMSA 2740 * To enable or disable MSA 2741 * bStereoPhaseInverse 2742 * To enable or disable Stereo Phase Inverse value 2743 * bCacheMsaOverrideForNextModeset 2744 * Cache the values and don't apply them until next modeset 2745 * featureMask 2746 * Enable/Disable mask of individual MSA property 2747 * featureValues 2748 * MSA property value to write 2749 * bDebugValues 2750 * To inform whether actual MSA values need to be returned 2751 * pFeatureDebugValues 2752 * It will actual MSA property value being written on HW. 2753 * If its NULL then no error but return nothing 2754 * 2755 * Possible status values returned are: 2756 * NV_OK 2757 * NV_ERR_INVALID_ARGUMENT 2758 * NV_ERR_NOT_SUPPORTED 2759 * NV_ERR_TIMEOUT 2760 * 2761 */ 2762 #define NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_V2 (0x731381U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_V2_PARAMS_MESSAGE_ID" */ 2763 2764 #define NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_V2_PARAMS_MESSAGE_ID (0x81U) 2765 2766 typedef struct NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_V2_PARAMS { 2767 NvU32 subDeviceInstance; 2768 NvU32 displayId; 2769 NvBool bEnableMSA; 2770 NvBool bStereoPhaseInverse; 2771 NvBool bCacheMsaOverrideForNextModeset; 2772 NV0073_CTRL_DP_MSA_PROPERTIES_MASK featureMask; 2773 NV0073_CTRL_DP_MSA_PROPERTIES_VALUES featureValues; 2774 NvBool bDebugValues; 2775 NV0073_CTRL_DP_MSA_PROPERTIES_VALUES featureDebugValues; 2776 } NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_V2_PARAMS; 2777 2778 /* 2779 * NV0073_CTRL_CMD_DP_EXECUTE_OVERDRIVE_POLICY 2780 * 2781 * This command is used to execute RM Over Drive policy and decide if TCON Overdrive needs to be enabled 2782 * or not based on the panel Overdrive grade determined using the panel manufId and prodId. 2783 * 2784 * subDeviceInstance [in] 2785 * This parameter specifies the subdevice instance within the 2786 * NV04_DISPLAY_COMMON parent device to which the operation should be 2787 * directed. This parameter must specify a value between zero and the 2788 * total number of subdevices within the parent device. This parameter 2789 * should be set to zero for default behavior. 2790 * displayId [in] 2791 * This parameter specifies the ID of the eDP display which owns 2792 * the Main Link to be adjusted. The display ID must a eDP display 2793 * as determined with the NV0073_CTRL_CMD_SPECIFIC_GET_TYPE command. 2794 * If more than one displayId bit is set or the displayId is not an eDP, 2795 * this call will return NV_ERR_INVALID_ARGUMENT. 2796 * manfId [in] 2797 * This parameter is an input to this command which tells the 2798 * Internal panel's manufacturer ID. 2799 * prodId [in] 2800 * This parameter is an input to this command which tells the 2801 * Internal panel's product ID. 2802 * 2803 * Possible status values returned are: 2804 * NV_OK 2805 * NV_ERR_INVALID_ARGUMENT 2806 * NV_ERR_NOT_SUPPORTED 2807 */ 2808 #define NV0073_CTRL_CMD_DP_EXECUTE_OVERDRIVE_POLICY (0x731382U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_DP_EXECUTE_OVERDRIVE_POLICY_PARAMS_MESSAGE_ID" */ 2809 2810 #define NV0073_CTRL_DP_EXECUTE_OVERDRIVE_POLICY_PARAMS_MESSAGE_ID (0x82U) 2811 2812 typedef struct NV0073_CTRL_DP_EXECUTE_OVERDRIVE_POLICY_PARAMS { 2813 NvU32 subDeviceInstance; 2814 NvU32 displayId; 2815 NvU16 manfId; 2816 NvU16 prodId; 2817 } NV0073_CTRL_DP_EXECUTE_OVERDRIVE_POLICY_PARAMS; 2818 2819 /* 2820 * NV0073_CTRL_CMD_DP2X_LINK_TRAINING_CTRL 2821 * 2822 * This command is used to trigger link training on DP2.x device with 128b132b channel encoding. 2823 * 2824 * subDeviceInstance 2825 * This parameter specifies the subdevice instance within the 2826 * NV04_DISPLAY_COMMON parent device to which the operation should be 2827 * directed. This parameter must specify a value between zero and the 2828 * total number of subdevices within the parent device. This parameter 2829 * should be set to zero for default behavior. 2830 * 2831 * displayId 2832 * This parameter specifies the ID of the display for which the dfp 2833 * caps should be returned. The display ID must a dfp display. 2834 * If more than one displayId bit is set or the displayId is not a dfp, 2835 * this call will return NV_ERR_INVALID_ARGUMENT. 2836 * 2837 * cmd 2838 * This parameter is an input to this command. 2839 * Here are the current defined fields: 2840 * 1.Ask RM to enter specific stage 2841 * NV0073_CTRL_DP2X_CMD_LINK_TRAINING_SETTING 2842 * NV0073_CTRL_DP2X_CMD_LINK_TRAINING_SET_CHNL_EQ 2843 * _CDS 2844 * _SET_* only valid if _SETTING_TRUE 2845 * 2846 * 2.Ask RM to check the completion of specific stage 2847 * NV0073_CTRL_DP2X_CMD_LINK_TRAINING_POLLING 2848 * NV0073_CTRL_DP2X_CMD_LINK_TRAINING_POLL_CHNL_EQ_DONE 2849 * _CHNL_EQ_INTERLANE_ALIGN 2850 * _CDS 2851 * _POLL_* only valid if _POLLING_TRUE 2852 * 2853 * _SETTING_TRUE and _POLLING_TRUE are mutual exclusive. 2854 * RM will return NV_ERR_INVALID_ARGUMENT if both bit are set. 2855 * 2856 * 3.Downspread configuration 2857 * NV0073_CTRL_DP2X_CMD_FORCED_DOWNSPREAD 2858 * Specifies whether RM should be forced to enable or disable the DP 2859 * Downspread setting. This can be used along with the Fake link 2860 * training option so that we can configure the GPU to enable/disable 2861 * spread when a real display is not connected. 2862 * 2863 * NV0073_CTRL_DP2X_CMD_FORCED_DOWNSPREAD_NO (default behavior) 2864 * RM will enable Downspread when the display supports it. 2865 * NV0073_CTRL_DP2X_CMD_FORCED_DOWNSPREAD_YES 2866 * RM will enable/disable Downspread according to _SET_DOWNSPREAD field. 2867 * 2868 * NV0073_CTRL_DP2X_CMD_SET_DOWNSPREAD 2869 * Specifies if RM should enable or disable downspread. 2870 * Only valid when _FORCED_DOWNSPREAD is set to _YES 2871 * 2872 * NV0073_CTRL_DP2X_CMD_SET_DOWNSPREAD_ENABLE 2873 * RM will enable Downspread even if the display does not support it. 2874 * NV0073_CTRL_DP2X_CMD_SET_DOWNSPREAD_DISABLE 2875 * RM will not enable Downspread even if the display does support it. 2876 * 2877 * 4.NV0073_CTRL_DP2X_CMD_FAKE_LINK_TRAINING 2878 * This field specifies if fake link training is to be done. This will 2879 * program enough of the hardware to avoid any hardware hangs and 2880 * depending upon option chosen by the client, OR will be enabled for 2881 * transmisssion. 2882 * 2883 * NV0073_CTRL_DP2X_CMD_FAKE_LINK_TRAINING_NO 2884 * No Fake LT will be performed 2885 * NV0073_CTRL_DP2X_CMD_FAKE_LINK_TRAINING_DONOT_TOGGLE_TRANSMISSION 2886 * SOR will be not powered up during Fake LT 2887 * NV0073_CTRL_DP2X_CMD_FAKE_LINK_TRAINING_TOGGLE_TRANSMISSION_ON 2888 * SOR will be powered up during Fake LT 2889 * 2890 * 5.NV0073_CTRL_DP2X_CMD_FALLBACK_CONFIG 2891 * 2892 * 6.NV0073_CTRL_DP2X_CMD_SKIP_HW_PROGRAMMING 2893 * Specifies whether RM should skip HW training of the link. 2894 * If this is the case then RM only updates its SW state without actually 2895 * touching any HW registers. Clients should use this ONLY if it has determined - 2896 * a. link is trained and not lost 2897 * b. desired link config is same as current trained link config 2898 * c. link is not in D3 (should be in D0) 2899 * 2900 * NV0073_CTRL_DP2X_CMD_SKIP_HW_PROGRAMMING_NO 2901 * RM doesn't skip HW LT as the current Link Config is not the same as the 2902 * requested Link Config. 2903 * NV0073_CTRL_DP2X_CMD_SKIP_HW_PROGRAMMING_YES 2904 * RM skips HW LT and only updates its SW state as client has determined that 2905 * the current state of the link and the requested Link Config is the same. 2906 * data 2907 * This parameter is an input and output to this command. 2908 * Here are the current defined fields: 2909 * NV0073_CTRL_DP2X_DATA_LANE_COUNT 2910 * Valid values: 0, 1, 2, 4 2911 * NV0073_CTRL_DP2X_DATA_LINK_BW 2912 * Valid values: all standard link rates defined in DP2.x and ILRs defined in eDP spec. 2913 * 2914 * pollingInfo 2915 * This parameter is an output to this command. 2916 * Here are the current defined fields: 2917 * 2918 * NV0073_CTRL_DP2X_POLLING_INFO_CHNL_EQ_INTERVAL 2919 * For Channel equalization, the polling interval is defined in DPCD 0x2216. 2920 * RM report to DPLib when _SET_STAGE is set to _CHNL_EQ. 2921 * (For CDS stage, the polling interval is fixed at 3ms.) 2922 * 2923 * NV0073_CTRL_DP2X_POLLING_INFO_RESULT 2924 * _DONE: if the specified stage is done. 2925 * _PENDING: if the specified stage is still pending. 2926 * 2927 * err 2928 * This parameter specifies provides info regarding the outcome 2929 * of this calling control call. If zero, no errors were found. 2930 * Otherwise, this parameter will specify the error detected. 2931 * The valid parameter is broken down as follows: 2932 * NV0073_CTRL_DP2X_ERR_CHANNEL_EQ_DONE 2933 * If set to _ERR, link training failed at channel equalization phase. 2934 * NV0073_CTRL_DP2X_ERR_CDS_DONE 2935 * If set to _ERR, link training failed at CDS phase. 2936 * NV0073_CTRL_DP2X_ERR_TIMEOUT 2937 * If set to _ERR, link training failed because of timeout. 2938 * NV0073_CTRL_DP2X_ERR_LT_FAILED 2939 * If set to _ERR, link training failed. 2940 * NV0073_CTRL_DP2X_ERR_INVALID_PARAMETER 2941 * If set to _ERR, link configuration or displayID is invalid. 2942 * NV0073_CTRL_DP2X_ERR_SET_LANE_COUNT 2943 * If set to _ERR, link training failed when setting lane count. 2944 * NV0073_CTRL_DP2X_ERR_SET_LINK_BW 2945 * If set to _ERR, link training failed when setting link rate. 2946 * NV0073_CTRL_DP2X_ERR_ENABLE_FEC 2947 * If set to _ERR, link training failed when enabling FEC. 2948 * NV0073_CTRL_DP2X_ERR_CONFIG_LTTPR 2949 * If set to _ERR, link training failed when setting LTTPR. 2950 * NV0073_CTRL_DP2X_ERR_PRE_LT 2951 * If set to _ERR, link training failed before link training start. 2952 * 2953 * Possible status values returned are: 2954 * NV_OK 2955 * NV_ERR_INVALID_ARGUMENT 2956 * NVOS_STATUS_ERROR 2957 */ 2958 2959 #define NV0073_CTRL_CMD_DP2X_LINK_TRAINING_CTRL (0x731383U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP2X_LINK_TRAINING_CTRL_PARAMS_MESSAGE_ID" */ 2960 2961 #define NV0073_CTRL_CMD_DP2X_LINK_TRAINING_CTRL_PARAMS_MESSAGE_ID (0x83U) 2962 2963 typedef struct NV0073_CTRL_CMD_DP2X_LINK_TRAINING_CTRL_PARAMS { 2964 NvU32 subDeviceInstance; 2965 NvU32 displayId; 2966 NvU32 cmd; 2967 NvU32 data; 2968 NvU32 pollingInfo; 2969 NvU32 err; 2970 } NV0073_CTRL_CMD_DP2X_LINK_TRAINING_CTRL_PARAMS; 2971 2972 #define NV0073_CTRL_DP2X_CMD_LINK_TRAINING_SETTING 0:0 2973 #define NV0073_CTRL_DP2X_CMD_LINK_TRAINING_SETTING_FALSE (0x00000000U) 2974 #define NV0073_CTRL_DP2X_CMD_LINK_TRAINING_SETTING_TRUE (0x00000001U) 2975 #define NV0073_CTRL_DP2X_CMD_LINK_TRAINING_SET 1:1 2976 #define NV0073_CTRL_DP2X_CMD_LINK_TRAINING_SET_CHNL_EQ (0x00000000U) 2977 #define NV0073_CTRL_DP2X_CMD_LINK_TRAINING_SET_CDS (0x00000001U) 2978 #define NV0073_CTRL_DP2X_CMD_LINK_TRAINING_POLLING 8:8 2979 #define NV0073_CTRL_DP2X_CMD_LINK_TRAINING_POLLING_FALSE (0x00000000U) 2980 #define NV0073_CTRL_DP2X_CMD_LINK_TRAINING_POLLING_TRUE (0x00000001U) 2981 #define NV0073_CTRL_DP2X_CMD_LINK_TRAINING_POLL 10:9 2982 #define NV0073_CTRL_DP2X_CMD_LINK_TRAINING_POLL_CHNL_EQ_DONE (0x00000000U) 2983 #define NV0073_CTRL_DP2X_CMD_LINK_TRAINING_POLL_CHNL_EQ_INTERLANE_ALIGN (0x00000001U) 2984 #define NV0073_CTRL_DP2X_CMD_LINK_TRAINING_POLL_CDS (0x00000002U) 2985 2986 // Flags for link training. 2987 #define NV0073_CTRL_DP2X_CMD_FORCED_DOWNSPREAD 16:16 2988 #define NV0073_CTRL_DP2X_CMD_FORCED_DOWNSPREAD_NO (0x00000000U) 2989 #define NV0073_CTRL_DP2X_CMD_FORCED_DOWNSPREAD_YES (0x00000001U) 2990 #define NV0073_CTRL_DP2X_CMD_SET_DOWNSPREAD 17:17 2991 #define NV0073_CTRL_DP2X_CMD_SET_DOWNSPREAD_DISABLE (0x00000000U) 2992 #define NV0073_CTRL_DP2X_CMD_SET_DOWNSPREAD_ENABLE (0x00000001U) 2993 #define NV0073_CTRL_DP2X_CMD_SKIP_HW_PROGRAMMING 18:18 2994 #define NV0073_CTRL_DP2X_CMD_SKIP_HW_PROGRAMMING_NO (0x00000000U) 2995 #define NV0073_CTRL_DP2X_CMD_SKIP_HW_PROGRAMMING_YES (0x00000001U) 2996 #define NV0073_CTRL_DP2X_CMD_FAKE_LINK_TRAINING 20:19 2997 #define NV0073_CTRL_DP2X_CMD_FAKE_LINK_TRAINING_NO (0x00000000U) 2998 #define NV0073_CTRL_DP2X_CMD_FAKE_LINK_TRAINING_DONOT_TOGGLE_TRANSMISSION (0x00000001U) 2999 #define NV0073_CTRL_DP2X_CMD_FAKE_LINK_TRAINING_TOGGLE_TRANSMISSION_ON (0x00000002U) 3000 #define NV0073_CTRL_DP2X_CMD_FALLBACK_CONFIG 21:21 3001 #define NV0073_CTRL_DP2X_CMD_FALLBACK_CONFIG_FALSE (0x00000000U) 3002 #define NV0073_CTRL_DP2X_CMD_FALLBACK_CONFIG_TRUE (0x00000001U) 3003 3004 // Basic Data for Link training: Lane count and bandwidth. 3005 #define NV0073_CTRL_DP2X_DATA_LANE_COUNT 3:0 3006 #define NV0073_CTRL_DP2X_DATA_LANE_COUNT_0 (0x00000000U) 3007 #define NV0073_CTRL_DP2X_DATA_LANE_COUNT_1 (0x00000001U) 3008 #define NV0073_CTRL_DP2X_DATA_LANE_COUNT_2 (0x00000002U) 3009 #define NV0073_CTRL_DP2X_DATA_LANE_COUNT_4 (0x00000004U) 3010 #define NV0073_CTRL_DP2X_DATA_LINK_BW 7:4 3011 #define NV0073_CTRL_DP2X_DATA_LINK_BW_1_62GBPS (0x00000001U) 3012 #define NV0073_CTRL_DP2X_DATA_LINK_BW_2_16GBPS (0x00000002U) 3013 #define NV0073_CTRL_DP2X_DATA_LINK_BW_2_43GBPS (0x00000003U) 3014 #define NV0073_CTRL_DP2X_DATA_LINK_BW_2_70GBPS (0x00000004U) 3015 #define NV0073_CTRL_DP2X_DATA_LINK_BW_3_24GBPS (0x00000005U) 3016 #define NV0073_CTRL_DP2X_DATA_LINK_BW_4_32GBPS (0x00000006U) 3017 #define NV0073_CTRL_DP2X_DATA_LINK_BW_5_40GBPS (0x00000007U) 3018 #define NV0073_CTRL_DP2X_DATA_LINK_BW_6_75GBPS (0x00000008U) 3019 #define NV0073_CTRL_DP2X_DATA_LINK_BW_8_10GBPS (0x00000009U) 3020 #define NV0073_CTRL_DP2X_DATA_LINK_BW_UHBR10_0 (0x0000000AU) 3021 #define NV0073_CTRL_DP2X_DATA_LINK_BW_UHBR13_5 (0x0000000BU) 3022 #define NV0073_CTRL_DP2X_DATA_LINK_BW_UHBR20_0 (0x0000000CU) 3023 3024 #define NV0073_CTRL_DP2X_ERR_CHANNEL_EQ 0:0 3025 #define NV0073_CTRL_DP2X_ERR_CHANNEL_EQ_DONE (0x00000000U) 3026 #define NV0073_CTRL_DP2X_ERR_CHANNEL_EQ_FAILED (0x00000001U) 3027 #define NV0073_CTRL_DP2X_ERR_CDS 1:1 3028 #define NV0073_CTRL_DP2X_ERR_CDS_DONE (0x00000000U) 3029 #define NV0073_CTRL_DP2X_ERR_CDS_FAILED (0x00000001U) 3030 #define NV0073_CTRL_DP2X_ERR_TIMEOUT 2:2 3031 #define NV0073_CTRL_DP2X_ERR_TIMEOUT_NO (0x00000000U) 3032 #define NV0073_CTRL_DP2X_ERR_TIMEOUT_YES (0x00000001U) 3033 #define NV0073_CTRL_DP2X_ERR_LT_FAILED 3:3 3034 #define NV0073_CTRL_DP2X_ERR_LT_FAILED_NO (0x00000000U) 3035 #define NV0073_CTRL_DP2X_ERR_LT_FAILED_YES (0x00000001U) 3036 #define NV0073_CTRL_DP2X_ERR_INVALID_PARAMETER 4:4 3037 #define NV0073_CTRL_DP2X_ERR_INVALID_PARAMETER_NOERR (0x00000000U) 3038 #define NV0073_CTRL_DP2X_ERR_INVALID_PARAMETER_ERR (0x00000001U) 3039 #define NV0073_CTRL_DP2X_ERR_SET_LANE_COUNT 5:5 3040 #define NV0073_CTRL_DP2X_ERR_SET_LANE_COUNT_NOERR (0x00000000U) 3041 #define NV0073_CTRL_DP2X_ERR_SET_LANE_COUNT_ERR (0x00000001U) 3042 #define NV0073_CTRL_DP2X_ERR_SET_LINK_BW 6:6 3043 #define NV0073_CTRL_DP2X_ERR_SET_LINK_BW_NOERR (0x00000000U) 3044 #define NV0073_CTRL_DP2X_ERR_SET_LINK_BW_ERR (0x00000001U) 3045 #define NV0073_CTRL_DP2X_ERR_ENABLE_FEC 7:7 3046 #define NV0073_CTRL_DP2X_ERR_ENABLE_FEC_NOERR (0x00000000U) 3047 #define NV0073_CTRL_DP2X_ERR_ENABLE_FEC_ERR (0x00000001U) 3048 #define NV0073_CTRL_DP2X_ERR_CONFIG_LTTPR 8:8 3049 #define NV0073_CTRL_DP2X_ERR_CONFIG_LTTPR_NOERR (0x00000000U) 3050 #define NV0073_CTRL_DP2X_ERR_CONFIG_LTTPR_ERR (0x00000001U) 3051 #define NV0073_CTRL_DP2X_ERR_PRE_LT 9:9 3052 #define NV0073_CTRL_DP2X_ERR_PRE_LT_NOERR (0x00000000U) 3053 #define NV0073_CTRL_DP2X_ERR_PRE_LT_ERR (0x00000001U) 3054 3055 #define NV0073_CTRL_DP2X_POLLING_INFO_CHNL_EQ_INTERVAL 7:0 3056 #define NV0073_CTRL_DP2X_POLLING_INFO_RESULT 31:31 3057 #define NV0073_CTRL_DP2X_POLLING_INFO_RESULT_PENDING (0x00000001U) 3058 #define NV0073_CTRL_DP2X_POLLING_INFO_RESULT_DONE (0x00000000U) 3059 /* _ctrl0073dp_h_ */ 3060