1 /*
2  * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
3  * SPDX-License-Identifier: MIT
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice shall be included in
13  * all copies or substantial portions of the Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21  * DEALINGS IN THE SOFTWARE.
22  */
23 
24 #pragma once
25 
26 #include <nvtypes.h>
27 
28 //
29 // This file was generated with FINN, an NVIDIA coding tool.
30 // Source file:      ctrl/ctrl00fd.finn
31 //
32 
33 #include "ctrl/ctrlxxxx.h"
34 
35 #define NV00FD_CTRL_CMD(cat,idx)       NVXXXX_CTRL_CMD(0x00fd, NV00FD_CTRL_##cat, idx)
36 
37 /* NV00FD command categories (6bits) */
38 #define NV00FD_CTRL_RESERVED         (0x00)
39 #define NV00FD_CTRL_MULTICAST_FABRIC (0x01)
40 
41 /*
42  * NV00FD_CTRL_CMD_NULL
43  *
44  * This command does nothing.
45  * This command does not take any parameters.
46  *
47  * Possible status values returned are:
48  *   NV_OK
49  */
50 #define NV00FD_CTRL_CMD_NULL         (0xfd0000) /* finn: Evaluated from "(FINN_NV_MEMORY_MULTICAST_FABRIC_RESERVED_INTERFACE_ID << 8) | 0x0" */
51 
52 
53 
54 /*
55  * NV00FD_CTRL_CMD_GET_INFO
56  *
57  * Queries multicast memory fabric allocation attributes.
58  *
59  *  alignment [OUT]
60  *    Alignment for the allocation.
61  *
62  *  allocSize [OUT]
63  *    Size of the allocation.
64  *
65  *  pageSize [OUT]
66  *    Page size of the allocation.
67  *
68  *  numMaxGpus [OUT]
69  *    Maximum number of attachable GPUs
70  *
71  *  numAttachedGpus [OUT]
72  *    Number of GPUs currently attached
73  *
74  */
75 #define NV00FD_CTRL_CMD_GET_INFO (0xfd0101) /* finn: Evaluated from "(FINN_NV_MEMORY_MULTICAST_FABRIC_FABRIC_INTERFACE_ID << 8) | NV00FD_CTRL_GET_INFO_PARAMS_MESSAGE_ID" */
76 
77 #define NV00FD_CTRL_GET_INFO_PARAMS_MESSAGE_ID (0x1U)
78 
79 typedef struct NV00FD_CTRL_GET_INFO_PARAMS {
80     NV_DECLARE_ALIGNED(NvU64 alignment, 8);
81     NV_DECLARE_ALIGNED(NvU64 allocSize, 8);
82     NvU32 pageSize;
83     NvU32 numMaxGpus;
84     NvU32 numAttachedGpus;
85 } NV00FD_CTRL_GET_INFO_PARAMS;
86 
87 /*
88  * NV00FD_CTRL_CMD_ATTACH_MEM
89  *
90  * Attaches the physical memory handle and in turn the memory
91  * owner of the physical memory to the Multicast FLA object.
92  *
93  *  hSubdevice [IN]
94  *    Subdevice handle of the owner GPU
95  *
96  *  hMemory [IN]
97  *    Physical memory handle to be attached.
98  *
99  *  offset [IN]
100  *    Offset into the MCFLA object. Must be at least physical pagesize aligned.
101  *
102  *  mapOffSet [IN]
103  *    Offset into the physical memory descriptor.
104  *    Must be physical memory pagesize aligned.
105  *
106  *  mapLength [IN]
107  *    Length of physical memory handle to be mapped.
108  *    Must be physical memory pagesize aligned and less than or equal to
109  *    MCFLA alloc size
110  *
111  *  flags [IN]
112  *    For future use only. Must be zero for now.
113  *
114  *  Restrictions:
115  *  a. Memory belonging to only NVSwitch P2P supported GPUs
116  *     which can do multicast can be attached
117  *  b. Physical memory with 2MB or 512MB pagesize is allowed
118  *  c. Memory of an already attached GPU should not be attached
119  *  d. Only vidmem physical memory handle can be attached
120  *
121  */
122 #define NV00FD_CTRL_CMD_ATTACH_MEM (0xfd0102) /* finn: Evaluated from "(FINN_NV_MEMORY_MULTICAST_FABRIC_FABRIC_INTERFACE_ID << 8) | NV00FD_CTRL_ATTACH_MEM_PARAMS_MESSAGE_ID" */
123 
124 #define NV00FD_CTRL_ATTACH_MEM_PARAMS_MESSAGE_ID (0x2U)
125 
126 typedef struct NV00FD_CTRL_ATTACH_MEM_PARAMS {
127     NvHandle hSubdevice;
128     NvHandle hMemory;
129     NV_DECLARE_ALIGNED(NvU64 offset, 8);
130     NV_DECLARE_ALIGNED(NvU64 mapOffset, 8);
131     NV_DECLARE_ALIGNED(NvU64 mapLength, 8);
132     NvU32    flags;
133 } NV00FD_CTRL_ATTACH_MEM_PARAMS;
134 
135 /*
136  * NV00FD_CTRL_CMD_REGISTER_EVENT
137  *
138  * Allows clients to optionally register for events after the Multicast
139  * FLA object is duped under another client.
140  *
141  *  pOsEvent [IN]
142  *    OS event handle created with NvRmAllocOsEvent().
143  *
144  */
145 #define NV00FD_CTRL_CMD_REGISTER_EVENT (0xfd0103) /* finn: Evaluated from "(FINN_NV_MEMORY_MULTICAST_FABRIC_FABRIC_INTERFACE_ID << 8) | NV00FD_CTRL_REGISTER_EVENT_PARAMS_MESSAGE_ID" */
146 
147 #define NV00FD_CTRL_REGISTER_EVENT_PARAMS_MESSAGE_ID (0x3U)
148 
149 typedef struct NV00FD_CTRL_REGISTER_EVENT_PARAMS {
150     NV_DECLARE_ALIGNED(NvP64 pOsEvent, 8);
151 } NV00FD_CTRL_REGISTER_EVENT_PARAMS;
152 
153 /*
154  * NV00FD_CTRL_CMD_ATTACH_GPU
155  *
156  * Attaches GPU to the Multicast FLA object. This step must be done before
157  * attaching memory to the Multicast FLA object.
158  *
159  *  hSubdevice [IN]
160  *    Subdevice handle of the owner GPU
161  *
162  *  flags [IN]
163  *    For future use only. Must be zero for now.
164  *
165  *  devDescriptor [IN]
166  *    devDescriptor is a file descriptor for unix RM clients, but a void
167  *    pointer for windows RM clients. It is transparent to RM clients i.e. RM's
168  *    user-mode shim populates this field on behalf of clients.
169  */
170 #define NV00FD_CTRL_CMD_ATTACH_GPU (0xfd0104) /* finn: Evaluated from "(FINN_NV_MEMORY_MULTICAST_FABRIC_FABRIC_INTERFACE_ID << 8) | NV00FD_CTRL_ATTACH_GPU_PARAMS_MESSAGE_ID" */
171 
172 #define NV00FD_CTRL_ATTACH_GPU_PARAMS_MESSAGE_ID (0x4U)
173 
174 typedef struct NV00FD_CTRL_ATTACH_GPU_PARAMS {
175     NvHandle hSubdevice;
176     NvU32    flags;
177     NV_DECLARE_ALIGNED(NvU64 devDescriptor, 8);
178 } NV00FD_CTRL_ATTACH_GPU_PARAMS;
179 
180 /*
181  * NV00FD_CTRL_CMD_DETACH_MEM
182  *
183  * Detaches the physical memory handle for a given GPU.
184  *
185  *  hSubdevice [IN]
186  *    Subdevice handle of the GPU for which memory to be detached.
187  *
188  *  offset [IN]
189  *    Offset into the MCFLA object at which memory to be detached. Same as
190  *    NV00FD_CTRL_CMD_ATTACH_MEM.
191  *
192  *  flags [IN]
193  *    For future use only. Must be zero for now.
194  */
195 #define NV00FD_CTRL_CMD_DETACH_MEM (0xfd0105) /* finn: Evaluated from "(FINN_NV_MEMORY_MULTICAST_FABRIC_FABRIC_INTERFACE_ID << 8) | NV00FD_CTRL_DETACH_MEM_PARAMS_MESSAGE_ID" */
196 
197 #define NV00FD_CTRL_DETACH_MEM_PARAMS_MESSAGE_ID (0x5U)
198 
199 typedef struct NV00FD_CTRL_DETACH_MEM_PARAMS {
200     NvHandle hSubdevice;
201     NV_DECLARE_ALIGNED(NvU64 offset, 8);
202     NvU32    flags;
203 } NV00FD_CTRL_DETACH_MEM_PARAMS;
204 
205 /* _ctrl00fd_h_ */
206