1 /* 2 * SPDX-FileCopyrightText: Copyright (c) 2014-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. 3 * SPDX-License-Identifier: MIT 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 */ 23 24 #pragma once 25 26 #include <nvtypes.h> 27 28 // 29 // This file was generated with FINN, an NVIDIA coding tool. 30 // Source file: ctrl/ctrl2080/ctrl2080nvlink.finn 31 // 32 33 #include "ctrl/ctrl2080/ctrl2080base.h" 34 35 /* NV20_SUBDEVICE_XX bus control commands and parameters */ 36 37 /* 38 * NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS 39 * 40 * This command returns the NVLink capabilities supported by the subdevice. 41 * 42 * capsTbl 43 * This is bit field for getting different global caps. The individual bitfields are specified by NV2080_CTRL_NVLINK_CAPS_* 44 * lowestNvlinkVersion 45 * This field specifies the lowest supported NVLink version for this subdevice. 46 * highestNvlinkVersion 47 * This field specifies the highest supported NVLink version for this subdevice. 48 * lowestNciVersion 49 * This field specifies the lowest supported NCI version for this subdevice. 50 * highestNciVersion 51 * This field specifies the highest supported NCI version for this subdevice. 52 * discoveredLinkMask 53 * This field provides a bitfield mask of NVLink links discovered on this subdevice. 54 * enabledLinkMask 55 * This field provides a bitfield mask of NVLink links enabled on this subdevice. 56 * 57 */ 58 #define NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS_MESSAGE_ID (0x1U) 59 60 typedef struct NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS { 61 NvU32 capsTbl; 62 63 NvU8 lowestNvlinkVersion; 64 NvU8 highestNvlinkVersion; 65 NvU8 lowestNciVersion; 66 NvU8 highestNciVersion; 67 68 NvU32 discoveredLinkMask; 69 NvU32 enabledLinkMask; 70 } NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS; 71 72 /* extract cap bit setting from tbl */ 73 #define NV2080_CTRL_NVLINK_GET_CAP(tbl,c) (((NvU8)tbl[(1?c)]) & (0?c)) 74 75 /* 76 * NV2080_CTRL_NVLINK_CAPS 77 * 78 * SUPPORTED 79 * Set if NVLink is present and supported on this subdevice, NV_FALSE otherwise. This field is used for *global* caps only and NOT for per-link caps 80 * P2P_SUPPORTED 81 * Set if P2P over NVLink is supported on this subdevice, NV_FALSE otherwise. 82 * SYSMEM_ACCESS 83 * Set if sysmem can be accessed over NVLink on this subdevice, NV_FALSE otherwise. 84 * PEER_ATOMICS 85 * Set if P2P atomics are supported over NVLink on this subdevice, NV_FALSE otherwise. 86 * SYSMEM_ATOMICS 87 * Set if sysmem atomic transcations are supported over NVLink on this subdevice, NV_FALSE otherwise. 88 * PEX_TUNNELING 89 * Set if PEX tunneling over NVLink is supported on this subdevice, NV_FALSE otherwise. 90 * SLI_BRIDGE 91 * GLOBAL: Set if SLI over NVLink is supported on this subdevice, NV_FALSE otherwise. 92 * LINK: Set if SLI over NVLink is supported on a link, NV_FALSE otherwise. 93 * SLI_BRIDGE_SENSABLE 94 * GLOBAL: Set if the subdevice is capable of sensing SLI bridges, NV_FALSE otherwise. 95 * LINK: Set if the link is capable of sensing an SLI bridge, NV_FALSE otherwise. 96 * POWER_STATE_L0 97 * Set if L0 is a supported power state on this subdevice/link, NV_FALSE otherwise. 98 * POWER_STATE_L1 99 * Set if L1 is a supported power state on this subdevice/link, NV_FALSE otherwise. 100 * POWER_STATE_L2 101 * Set if L2 is a supported power state on this subdevice/link, NV_FALSE otherwise. 102 * POWER_STATE_L3 103 * Set if L3 is a supported power state on this subdevice/link, NV_FALSE otherwise. 104 * VALID 105 * Set if this link is supported on this subdevice, NV_FALSE otherwise. This field is used for *per-link* caps only and NOT for global caps. 106 * 107 */ 108 109 /* caps format is byte_index:bit_mask */ 110 #define NV2080_CTRL_NVLINK_CAPS_SUPPORTED 0:0x01 111 #define NV2080_CTRL_NVLINK_CAPS_P2P_SUPPORTED 0:0x02 112 #define NV2080_CTRL_NVLINK_CAPS_SYSMEM_ACCESS 0:0x04 113 #define NV2080_CTRL_NVLINK_CAPS_P2P_ATOMICS 0:0x08 114 #define NV2080_CTRL_NVLINK_CAPS_SYSMEM_ATOMICS 0:0x10 115 #define NV2080_CTRL_NVLINK_CAPS_PEX_TUNNELING 0:0x20 116 #define NV2080_CTRL_NVLINK_CAPS_SLI_BRIDGE 0:0x40 117 #define NV2080_CTRL_NVLINK_CAPS_SLI_BRIDGE_SENSABLE 0:0x80 118 #define NV2080_CTRL_NVLINK_CAPS_POWER_STATE_L0 1:0x01 119 #define NV2080_CTRL_NVLINK_CAPS_POWER_STATE_L1 1:0x02 120 #define NV2080_CTRL_NVLINK_CAPS_POWER_STATE_L2 1:0x04 121 #define NV2080_CTRL_NVLINK_CAPS_POWER_STATE_L3 1:0x08 122 #define NV2080_CTRL_NVLINK_CAPS_VALID 1:0x10 123 124 /* 125 * Size in bytes of nvlink caps table. This value should be one greater 126 * than the largest byte_index value above. 127 */ 128 #define NV2080_CTRL_NVLINK_CAPS_TBL_SIZE 2U 129 130 #define NV2080_CTRL_NVLINK_CAPS_NVLINK_VERSION_INVALID (0x00000000U) 131 #define NV2080_CTRL_NVLINK_CAPS_NVLINK_VERSION_1_0 (0x00000001U) 132 #define NV2080_CTRL_NVLINK_CAPS_NVLINK_VERSION_2_0 (0x00000002U) 133 #define NV2080_CTRL_NVLINK_CAPS_NVLINK_VERSION_2_2 (0x00000004U) 134 #define NV2080_CTRL_NVLINK_CAPS_NVLINK_VERSION_3_0 (0x00000005U) 135 #define NV2080_CTRL_NVLINK_CAPS_NVLINK_VERSION_3_1 (0x00000006U) 136 #define NV2080_CTRL_NVLINK_CAPS_NVLINK_VERSION_4_0 (0x00000007U) 137 138 #define NV2080_CTRL_NVLINK_CAPS_NCI_VERSION_INVALID (0x00000000U) 139 #define NV2080_CTRL_NVLINK_CAPS_NCI_VERSION_1_0 (0x00000001U) 140 #define NV2080_CTRL_NVLINK_CAPS_NCI_VERSION_2_0 (0x00000002U) 141 #define NV2080_CTRL_NVLINK_CAPS_NCI_VERSION_2_2 (0x00000004U) 142 #define NV2080_CTRL_NVLINK_CAPS_NCI_VERSION_3_0 (0x00000005U) 143 #define NV2080_CTRL_NVLINK_CAPS_NCI_VERSION_3_1 (0x00000006U) 144 #define NV2080_CTRL_NVLINK_CAPS_NCI_VERSION_4_0 (0x00000007U) 145 146 147 /* 148 * NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS 149 * 150 * Possible status values returned are: 151 * NV_OK 152 * NV_ERR_INVALID_PARAM_STRUCT 153 * NV_ERR_INVALID_ARGUMENT 154 */ 155 156 #define NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS (0x20803001U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS_MESSAGE_ID" */ 157 158 /* 159 * NV2080_CTRL_NVLINK_DEVICE_INFO 160 * 161 * This structure stores information about the device to which this link is associated 162 * 163 * deviceIdFlags 164 * Bitmask that specifies which IDs are valid for the device 165 * Refer NV2080_CTRL_NVLINK_DEVICE_INFO_DEVICE_ID_FLAGS_* for possible values 166 * If NV2080_CTRL_NVLINK_DEVICE_INFO_DEVICE_ID_FLAGS_PCI is set, PCI information is valid 167 * If NV2080_CTRL_NVLINK_DEVICE_INFO_DEVICE_ID_FLAGS_UUID is set, UUID is valid 168 * domain, bus, device, function, pciDeviceId 169 * PCI information for the device 170 * deviceType 171 * Type of the device 172 * See NV2080_CTRL_NVLINK_DEVICE_INFO_DEVICE_TYPE_* for possible values 173 * deviceUUID 174 * This field specifies the device UUID of the device. Useful for identifying the device (or version) 175 */ 176 typedef struct NV2080_CTRL_NVLINK_DEVICE_INFO { 177 // ID Flags 178 NvU32 deviceIdFlags; 179 180 // PCI Information 181 NvU32 domain; 182 NvU16 bus; 183 NvU16 device; 184 NvU16 function; 185 NvU32 pciDeviceId; 186 187 // Device Type 188 NV_DECLARE_ALIGNED(NvU64 deviceType, 8); 189 190 // Device UUID 191 NvU8 deviceUUID[16]; 192 } NV2080_CTRL_NVLINK_DEVICE_INFO; 193 194 #define NV2080_CTRL_NVLINK_DEVICE_INFO_DEVICE_ID_FLAGS 31:0 195 #define NV2080_CTRL_NVLINK_DEVICE_INFO_DEVICE_ID_FLAGS_NONE (0x00000000U) 196 #define NV2080_CTRL_NVLINK_DEVICE_INFO_DEVICE_ID_FLAGS_PCI (0x00000001U) 197 #define NV2080_CTRL_NVLINK_DEVICE_INFO_DEVICE_ID_FLAGS_UUID (0x00000002U) 198 199 #define NV2080_CTRL_NVLINK_DEVICE_INFO_DEVICE_TYPE_EBRIDGE (0x00000000U) 200 #define NV2080_CTRL_NVLINK_DEVICE_INFO_DEVICE_TYPE_NPU (0x00000001U) 201 #define NV2080_CTRL_NVLINK_DEVICE_INFO_DEVICE_TYPE_GPU (0x00000002U) 202 #define NV2080_CTRL_NVLINK_DEVICE_INFO_DEVICE_TYPE_SWITCH (0x00000003U) 203 #define NV2080_CTRL_NVLINK_DEVICE_INFO_DEVICE_TYPE_TEGRA (0x00000004U) 204 #define NV2080_CTRL_NVLINK_DEVICE_INFO_DEVICE_TYPE_NONE (0x000000FFU) 205 206 #define NV2080_CTRL_NVLINK_DEVICE_INFO_DEVICE_UUID_INVALID (0xFFFFFFFFU) 207 208 /* 209 * NV2080_CTRL_NVLINK_NVLINK_LINK_STATUS_INFO 210 * 211 * This structure stores the per-link status of different NVLink parameters. 212 * 213 * capsTbl 214 * This is bit field for getting different global caps. The individual bitfields 215 * are specified by NV2080_CTRL_NVLINK_CAPS_* 216 * phyType 217 * This field specifies the type of PHY (NVHS or GRS) being used for this link. 218 * subLinkWidth 219 * This field specifies the no. of lanes per sublink. 220 * linkState 221 * This field specifies the current state of the link. 222 * See NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS_LINK_STATE_* for possible values. 223 * rxSublinkStatus 224 * This field specifies the current state of RX sublink. 225 * See NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS_SUBLINK_RX_STATE_* for possible values. 226 * txSublinkStatus 227 * This field specifies the current state of TX sublink. 228 * See NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS_SUBLINK_TX_STATE_* for possible values. 229 * bLaneReversal 230 * This field indicates that lane reversal is in effect on this link. 231 * nvlinkVersion 232 * This field specifies the NVLink version supported by the link. 233 * nciVersion 234 * This field specifies the NCI version supported by the link. 235 * phyVersion 236 * This field specifies the version of PHY being used by the link. 237 * nvlinkLineRateMbps 238 * Bit rate at which bits toggle on wires in megabits per second. 239 * NOTE: This value is the full speed line rate, not the instantaneous line rate of the link. 240 * nvlinkLinkClockMhz 241 * Clock corresponding to link logic in mega hertz 242 * nvlinkRefClkType 243 * This field specifies whether the link clock is taken from NVHS reflck 244 * or PEX refclk for the current GPU. 245 * nvlinkLinkDataRateKiBps 246 * Effective rate available for transactions after subtracting overhead, 247 * as seen at Data Layer in kibibytes (1024 bytes) per second. 248 * Only valid in GA100+, reported as 0 otherwise 249 * NOTE: Because minion calculates these values, it will only be valid if 250 * links are in ACTIVE state 251 * nvlinkRefClkSpeedMhz 252 * The input reference frequency to the PLL 253 * connected 254 * This field specifies if any device is connected on the other end of the link 255 * loopProperty 256 * This field specifies if the link is a loopback/loopout link. See NV2080_CTRL_NVLINK_STATUS_LOOP_PROPERTY_* for possible values. 257 * remoteDeviceLinkNumber 258 * This field specifies the link number on the remote end of the link 259 * remoteDeviceInfo 260 * This field stores the device information for the remote end of the link 261 * 262 */ 263 typedef struct NV2080_CTRL_NVLINK_LINK_STATUS_INFO { 264 // Top level capablilites 265 NvU32 capsTbl; 266 267 NvU8 phyType; 268 NvU8 subLinkWidth; 269 270 // Link and sublink states 271 NvU32 linkState; 272 NvU8 rxSublinkStatus; 273 NvU8 txSublinkStatus; 274 275 // Indicates that lane reversal is in effect on this link. 276 NvBool bLaneReversal; 277 278 NvU8 nvlinkVersion; 279 NvU8 nciVersion; 280 NvU8 phyVersion; 281 282 // Legacy clock information (to be deprecated) 283 NvU32 nvlinkLinkClockKHz; 284 NvU32 nvlinkCommonClockSpeedKHz; 285 NvU32 nvlinkRefClkSpeedKHz; 286 287 NvU32 nvlinkCommonClockSpeedMhz; 288 289 // Clock Speed and Data Rate Reporting 290 NvU32 nvlinkLineRateMbps; 291 NvU32 nvlinkLinkClockMhz; 292 NvU8 nvlinkRefClkType; 293 NvU32 nvlinkLinkDataRateKiBps; 294 NvU32 nvlinkRefClkSpeedMhz; 295 296 // Connection information 297 NvBool connected; 298 NvU8 loopProperty; 299 NvU8 remoteDeviceLinkNumber; 300 NvU8 localDeviceLinkNumber; 301 302 // 303 // Added as part of NvLink 3.0 304 // Note: SID has link info appended to it when provided by minion 305 // 306 NV_DECLARE_ALIGNED(NvU64 remoteLinkSid, 8); 307 NV_DECLARE_ALIGNED(NvU64 localLinkSid, 8); 308 309 // Ampere+ only 310 NvU32 laneRxdetStatusMask; 311 312 NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_DEVICE_INFO remoteDeviceInfo, 8); 313 NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_DEVICE_INFO localDeviceInfo, 8); 314 } NV2080_CTRL_NVLINK_LINK_STATUS_INFO; 315 316 // NVLink link states 317 #define NV2080_CTRL_NVLINK_STATUS_LINK_STATE_INIT (0x00000000U) 318 #define NV2080_CTRL_NVLINK_STATUS_LINK_STATE_HWCFG (0x00000001U) 319 #define NV2080_CTRL_NVLINK_STATUS_LINK_STATE_SWCFG (0x00000002U) 320 #define NV2080_CTRL_NVLINK_STATUS_LINK_STATE_ACTIVE (0x00000003U) 321 #define NV2080_CTRL_NVLINK_STATUS_LINK_STATE_FAULT (0x00000004U) 322 #define NV2080_CTRL_NVLINK_STATUS_LINK_STATE_SLEEP (0x00000005U) 323 #define NV2080_CTRL_NVLINK_STATUS_LINK_STATE_RECOVERY (0x00000006U) 324 #define NV2080_CTRL_NVLINK_STATUS_LINK_STATE_RECOVERY_AC (0x00000008U) 325 #define NV2080_CTRL_NVLINK_STATUS_LINK_STATE_RECOVERY_RX (0x0000000aU) 326 #define NV2080_CTRL_NVLINK_STATUS_LINK_STATE_INVALID (0xFFFFFFFFU) 327 328 // NVLink Rx sublink states 329 #define NV2080_CTRL_NVLINK_STATUS_SUBLINK_RX_STATE_HIGH_SPEED_1 (0x00000000U) 330 // TODO: @achaudhry remove SINGLE_LANE define once references switch to LOW_POWER 331 #define NV2080_CTRL_NVLINK_STATUS_SUBLINK_RX_STATE_SINGLE_LANE (0x00000004) // Deprecated 332 #define NV2080_CTRL_NVLINK_STATUS_SUBLINK_RX_STATE_LOW_POWER (0x00000004) 333 #define NV2080_CTRL_NVLINK_STATUS_SUBLINK_RX_STATE_TRAINING (0x00000005U) 334 #define NV2080_CTRL_NVLINK_STATUS_SUBLINK_RX_STATE_SAFE_MODE (0x00000006U) 335 #define NV2080_CTRL_NVLINK_STATUS_SUBLINK_RX_STATE_OFF (0x00000007U) 336 #define NV2080_CTRL_NVLINK_STATUS_SUBLINK_RX_STATE_TEST (0x00000008U) 337 #define NV2080_CTRL_NVLINK_STATUS_SUBLINK_RX_STATE_FAULT (0x0000000eU) 338 #define NV2080_CTRL_NVLINK_STATUS_SUBLINK_RX_STATE_INVALID (0x000000FFU) 339 340 // NVLink Tx sublink states 341 #define NV2080_CTRL_NVLINK_STATUS_SUBLINK_TX_STATE_HIGH_SPEED_1 (0x00000000U) 342 // TODO: @achaudhry remove SINGLE_LANE define once references switch to LOW_POWER 343 #define NV2080_CTRL_NVLINK_STATUS_SUBLINK_TX_STATE_SINGLE_LANE (0x00000004) // Deprecated 344 #define NV2080_CTRL_NVLINK_STATUS_SUBLINK_TX_STATE_LOW_POWER (0x00000004) 345 #define NV2080_CTRL_NVLINK_STATUS_SUBLINK_TX_STATE_TRAINING (0x00000005U) 346 #define NV2080_CTRL_NVLINK_STATUS_SUBLINK_TX_STATE_SAFE_MODE (0x00000006U) 347 #define NV2080_CTRL_NVLINK_STATUS_SUBLINK_TX_STATE_OFF (0x00000007U) 348 #define NV2080_CTRL_NVLINK_STATUS_SUBLINK_TX_STATE_TEST (0x00000008U) 349 #define NV2080_CTRL_NVLINK_STATUS_SUBLINK_TX_STATE_FAULT (0x0000000eU) 350 #define NV2080_CTRL_NVLINK_STATUS_SUBLINK_TX_STATE_INVALID (0x000000FFU) 351 352 #define NV2080_CTRL_NVLINK_STATUS_PHY_NVHS (0x00000001U) 353 #define NV2080_CTRL_NVLINK_STATUS_PHY_GRS (0x00000002U) 354 #define NV2080_CTRL_NVLINK_STATUS_PHY_INVALID (0x000000FFU) 355 356 // Version information 357 #define NV2080_CTRL_NVLINK_STATUS_NVLINK_VERSION_1_0 (0x00000001U) 358 #define NV2080_CTRL_NVLINK_STATUS_NVLINK_VERSION_2_0 (0x00000002U) 359 #define NV2080_CTRL_NVLINK_STATUS_NVLINK_VERSION_2_2 (0x00000004U) 360 #define NV2080_CTRL_NVLINK_STATUS_NVLINK_VERSION_3_0 (0x00000005U) 361 #define NV2080_CTRL_NVLINK_STATUS_NVLINK_VERSION_3_1 (0x00000006U) 362 #define NV2080_CTRL_NVLINK_STATUS_NVLINK_VERSION_4_0 (0x00000007U) 363 #define NV2080_CTRL_NVLINK_STATUS_NVLINK_VERSION_INVALID (0x000000FFU) 364 365 #define NV2080_CTRL_NVLINK_STATUS_NCI_VERSION_1_0 (0x00000001U) 366 #define NV2080_CTRL_NVLINK_STATUS_NCI_VERSION_2_0 (0x00000002U) 367 #define NV2080_CTRL_NVLINK_STATUS_NCI_VERSION_2_2 (0x00000004U) 368 #define NV2080_CTRL_NVLINK_STATUS_NCI_VERSION_3_0 (0x00000005U) 369 #define NV2080_CTRL_NVLINK_STATUS_NCI_VERSION_3_1 (0x00000006U) 370 #define NV2080_CTRL_NVLINK_STATUS_NCI_VERSION_4_0 (0x00000007U) 371 #define NV2080_CTRL_NVLINK_STATUS_NCI_VERSION_INVALID (0x000000FFU) 372 373 #define NV2080_CTRL_NVLINK_STATUS_NVHS_VERSION_1_0 (0x00000001U) 374 #define NV2080_CTRL_NVLINK_STATUS_NVHS_VERSION_INVALID (0x000000FFU) 375 376 #define NV2080_CTRL_NVLINK_STATUS_GRS_VERSION_1_0 (0x00000001U) 377 #define NV2080_CTRL_NVLINK_STATUS_GRS_VERSION_INVALID (0x000000FFU) 378 379 // Connection properties 380 #define NV2080_CTRL_NVLINK_STATUS_CONNECTED_TRUE (0x00000001U) 381 #define NV2080_CTRL_NVLINK_STATUS_CONNECTED_FALSE (0x00000000U) 382 383 #define NV2080_CTRL_NVLINK_STATUS_LOOP_PROPERTY_LOOPBACK (0x00000001U) 384 #define NV2080_CTRL_NVLINK_STATUS_LOOP_PROPERTY_LOOPOUT (0x00000002U) 385 #define NV2080_CTRL_NVLINK_STATUS_LOOP_PROPERTY_NONE (0x00000000U) 386 387 #define NV2080_CTRL_NVLINK_STATUS_REMOTE_LINK_NUMBER_INVALID (0x000000FFU) 388 389 #define NV2080_CTRL_NVLINK_MAX_LINKS 32 390 391 // NVLink REFCLK types 392 #define NV2080_CTRL_NVLINK_REFCLK_TYPE_INVALID (0x00U) 393 #define NV2080_CTRL_NVLINK_REFCLK_TYPE_NVHS (0x01U) 394 #define NV2080_CTRL_NVLINK_REFCLK_TYPE_PEX (0x02U) 395 396 #define NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS_PARAMS_MESSAGE_ID (0x2U) 397 398 typedef struct NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS_PARAMS { 399 NvU32 enabledLinkMask; 400 NvBool bSublinkStateInst; // whether instantaneous sublink state is needed 401 NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_LINK_STATUS_INFO linkInfo[NV2080_CTRL_NVLINK_MAX_LINKS], 8); 402 } NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS_PARAMS; 403 404 /* 405 * NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS 406 * 407 * enabledLinkMask 408 * This field specifies the mask of available links on this subdevice. 409 * linkInfo 410 * This structure stores the per-link status of different NVLink parameters. The link is identified using an index. 411 * 412 * Possible status values returned are: 413 * NV_OK 414 * NV_ERR_INVALID_PARAM_STRUCT 415 * NV_ERR_INVALID_ARGUMENT 416 */ 417 418 #define NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS (0x20803002U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS_PARAMS_MESSAGE_ID" */ 419 420 /* 421 * NV2080_CTRL_NVLINK_ERR_INFO 422 * Error information per link 423 * 424 * TLErrlog 425 * Returns the error mask for NVLINK TL errors 426 * Used in Pascal 427 * 428 * TLIntrEn 429 * Returns the intr enable mask for NVLINK TL errors 430 * Used in Pascal 431 * 432 * TLCTxErrStatus0 433 * Returns the TLC Tx Error Mask 0 434 * Used in Volta and later 435 * 436 * TLCTxErrStatus1 437 * Returns the TLC Tx Error Mask 1 438 * Used in Ampere and later 439 * 440 * TLCTxSysErrStatus0 441 * Returns the TLC Tx Sys Error Mask 0 442 * Used in Ampere and later. 443 * 444 * TLCRxErrStatus0 445 * Returns the TLC Rx Error Mask 0 446 * Used in Volta and later 447 * 448 * TLCRxErrStatus1 449 * Returns the TLC Rx Error Mask 1 450 * Used in Volta and later 451 * 452 * TLCRxSysErrStatus0 453 * Returns the TLC Rx Sys Error Mask 0 454 * Used in Ampere and later. 455 * 456 * TLCTxErrLogEn0 457 * Returns the TLC Tx Error Log En 0 458 * Used in Volta and later 459 * 460 * TLCTxErrLogEn1 461 * Returns the TLC Tx Error Log En 1 462 * Used in Ampere and later 463 * 464 * TLCTxSysErrLogEn0 465 * Returns the TLC Tx Sys Error Log En 0 466 * Used in Ampere and later 467 * 468 * TLCRxErrLogEn0 469 * Returns the TLC Rx Error Log En 0 470 * Used in Volta and later 471 * 472 * TLCRxErrLogEn1 473 * Returns the TLC Rx Error Log En 1 474 * Used in Volta and later 475 * 476 * TLCRxSysErrLogEn0 477 * Returns the TLC Rx Sys Error Log En 0 478 * Used in Ampere and later 479 * 480 * MIFTxErrStatus0 481 * Returns the MIF Rx Error Mask 0 482 * Used in Volta and Turing 483 * 484 * MIFRxErrStatus0 485 * Returns the MIF Tx Error Mask 0 486 * Used in Volta and Turing 487 * 488 * NVLIPTLnkErrStatus0 489 * Returns the NVLIPT_LNK Error Mask 0 490 * Used in Ampere and later 491 * 492 * NVLIPTLnkErrLogEn0 493 * Returns the NVLIPT_LNK Log En Mask 0 494 * Used in Ampere and later 495 * 496 * NVLIPTLnkCtrlLinkStateRequest 497 * Returns the NVLIPT_LNK Control Link State Request value 498 * Used in Ampere and later 499 * 500 * DLSpeedStatusTx 501 * Returns the NVLINK DL speed status for sublink Tx 502 * 503 * DLSpeedStatusRx 504 * Returns the NVLINK DL speed status for sublink Rx 505 * 506 * NVLDLRxSlsmErrCntl 507 * Returns the NVLDL_RXSLSM_ERR_CNTL value 508 * Used in Hopper and later 509 * 510 * NVLDLTopLinkState 511 * Returns the NVLDL_TOP_LINK_STATE value 512 * Used in Hopper and later 513 * 514 * NVLDLTopIntr 515 * Returns the NVLDL_TOP_INTR value 516 * Used in Hopper and later 517 * 518 * DLStatMN00 519 * Returns the DLSTAT MN00 Code and subcode 520 * Used in Hopper and later 521 * 522 * DLStatUC01 523 * Returns the DLSTAT UC01 value 524 * Used in Hopper and later 525 * 526 * MinionNvlinkLinkIntr 527 * Returns the MINION_NVLINK_LINK_INTR code and subcode 528 * Used in Hopper and later 529 * 530 * bExcessErrorDL 531 * Returns true for excessive error rate interrupt from DL 532 */ 533 typedef struct NV2080_CTRL_NVLINK_ERR_INFO { 534 NvU32 TLErrlog; 535 NvU32 TLIntrEn; 536 NvU32 TLCTxErrStatus0; 537 NvU32 TLCTxErrStatus1; 538 NvU32 TLCTxSysErrStatus0; 539 NvU32 TLCRxErrStatus0; 540 NvU32 TLCRxErrStatus1; 541 NvU32 TLCRxSysErrStatus0; 542 NvU32 TLCTxErrLogEn0; 543 NvU32 TLCTxErrLogEn1; 544 NvU32 TLCTxSysErrLogEn0; 545 NvU32 TLCRxErrLogEn0; 546 NvU32 TLCRxErrLogEn1; 547 NvU32 TLCRxSysErrLogEn0; 548 NvU32 MIFTxErrStatus0; 549 NvU32 MIFRxErrStatus0; 550 NvU32 NVLIPTLnkErrStatus0; 551 NvU32 NVLIPTLnkErrLogEn0; 552 NvU32 NVLIPTLnkCtrlLinkStateRequest; 553 NvU32 DLSpeedStatusTx; 554 NvU32 DLSpeedStatusRx; 555 NvU32 NVLDLRxSlsmErrCntl; 556 NvU32 NVLDLTopLinkState; 557 NvU32 NVLDLTopIntr; 558 NvU32 DLStatMN00; 559 NvU32 DLStatUC01; 560 NvU32 MinionNvlinkLinkIntr; 561 NvBool bExcessErrorDL; 562 } NV2080_CTRL_NVLINK_ERR_INFO; 563 564 /* 565 * NV2080_CTRL_NVLINK_COMMON_ERR_INFO 566 * Error information per IOCTRL 567 * 568 * NVLIPTErrStatus0 569 * Returns the NVLIPT_COMMON Error Mask 0 570 * Used in Ampere and later 571 * 572 * NVLIPTErrLogEn0 573 * Returns the NVLIPT_COMMON Log En Mask 0 574 * Used in Ampere and later 575 */ 576 typedef struct NV2080_CTRL_NVLINK_COMMON_ERR_INFO { 577 NvU32 NVLIPTErrStatus0; 578 NvU32 NVLIPTErrLogEn0; 579 } NV2080_CTRL_NVLINK_COMMON_ERR_INFO; 580 581 /* Extract the error status bit for a given TL error index i */ 582 #define NV2080_CTRL_NVLINK_GET_TL_ERRLOG_BIT(intr, i) (((1U << i) & (intr)) >> i) 583 584 /* Extract the intr enable bit for a given TL error index i */ 585 #define NV2080_CTRL_NVLINK_GET_TL_INTEN_BIT(intr, i) NV2080_CTRL_NVLINK_GET_TL_ERRLOG_BIT(intr, i) 586 587 /* Error status values for a given NVLINK TL error */ 588 #define NV2080_CTRL_NVLINK_TL_ERRLOG_TRUE (0x00000001U) 589 #define NV2080_CTRL_NVLINK_TL_ERRLOG_FALSE (0x00000000U) 590 591 /* Intr enable/disable for a given NVLINK TL error */ 592 #define NV2080_CTRL_NVLINK_TL_INTEN_TRUE (0x00000001U) 593 #define NV2080_CTRL_NVLINK_TL_INTEN_FALSE (0x00000000U) 594 595 /* NVLINK TL interrupt enable fields for errors */ 596 #define NV2080_CTRL_NVLINK_TL_INTEN_IDX_RXDLDATAPARITYEN 0U 597 #define NV2080_CTRL_NVLINK_TL_INTEN_IDX_RXDLCTRLPARITYEN 1U 598 #define NV2080_CTRL_NVLINK_TL_INTEN_IDX_RXPROTOCOLEN 2U 599 #define NV2080_CTRL_NVLINK_TL_INTEN_IDX_RXOVERFLOWEN 3U 600 #define NV2080_CTRL_NVLINK_TL_INTEN_IDX_RXRAMDATAPARITYEN 4U 601 #define NV2080_CTRL_NVLINK_TL_INTEN_IDX_RXRAMHDRPARITYEN 5U 602 #define NV2080_CTRL_NVLINK_TL_INTEN_IDX_RXRESPEN 6U 603 #define NV2080_CTRL_NVLINK_TL_INTEN_IDX_RXPOISONEN 7U 604 #define NV2080_CTRL_NVLINK_TL_INTEN_IDX_TXRAMDATAPARITYEN 8U 605 #define NV2080_CTRL_NVLINK_TL_INTEN_IDX_TXRAMHDRPARITYEN 9U 606 #define NV2080_CTRL_NVLINK_TL_INTEN_IDX_DLFLOWPARITYEN 10U 607 #define NV2080_CTRL_NVLINK_TL_INTEN_IDX_DLHDRPARITYEN 12U 608 #define NV2080_CTRL_NVLINK_TL_INTEN_IDX_TXCREDITEN 13U 609 #define NV2080_CTRL_NVLINK_TL_INTEN_IDX_MAX 14U 610 611 /* NVLINK TL error fields */ 612 #define NV2080_CTRL_NVLINK_TL_ERRLOG_IDX_RXDLDATAPARITYERR 0U 613 #define NV2080_CTRL_NVLINK_TL_ERRLOG_IDX_RXDLCTRLPARITYERR 1U 614 #define NV2080_CTRL_NVLINK_TL_ERRLOG_IDX_RXPROTOCOLERR 2U 615 #define NV2080_CTRL_NVLINK_TL_ERRLOG_IDX_RXOVERFLOWERR 3U 616 #define NV2080_CTRL_NVLINK_TL_ERRLOG_IDX_RXRAMDATAPARITYERR 4U 617 #define NV2080_CTRL_NVLINK_TL_ERRLOG_IDX_RXRAMHDRPARITYERR 5U 618 #define NV2080_CTRL_NVLINK_TL_ERRLOG_IDX_RXRESPERR 6U 619 #define NV2080_CTRL_NVLINK_TL_ERRLOG_IDX_RXPOISONERR 7U 620 #define NV2080_CTRL_NVLINK_TL_ERRLOG_IDX_TXRAMDATAPARITYERR 8U 621 #define NV2080_CTRL_NVLINK_TL_ERRLOG_IDX_TXRAMHDRPARITYERR 9U 622 #define NV2080_CTRL_NVLINK_TL_ERRLOG_IDX_DLFLOWPARITYERR 10U 623 #define NV2080_CTRL_NVLINK_TL_ERRLOG_IDX_DLHDRPARITYERR 12U 624 #define NV2080_CTRL_NVLINK_TL_ERRLOG_IDX_TXCREDITERR 13U 625 #define NV2080_CTRL_NVLINK_TL_ERRLOG_IDX_MAX 14U 626 627 /* NVLINK DL speed status for sublink Tx*/ 628 #define NV2080_CTRL_NVLINK_SL0_SLSM_STATUS_TX_PRIMARY_STATE_HS (0x00000000U) 629 #define NV2080_CTRL_NVLINK_SL0_SLSM_STATUS_TX_PRIMARY_STATE_SINGLE_LANE (0x00000004U) 630 #define NV2080_CTRL_NVLINK_SL0_SLSM_STATUS_TX_PRIMARY_STATE_TRAIN (0x00000005U) 631 #define NV2080_CTRL_NVLINK_SL0_SLSM_STATUS_TX_PRIMARY_STATE_SAFE (0x00000006U) 632 #define NV2080_CTRL_NVLINK_SL0_SLSM_STATUS_TX_PRIMARY_STATE_OFF (0x00000007U) 633 634 /* NVLINK DL speed status for sublink Rx*/ 635 #define NV2080_CTRL_NVLINK_SL1_SLSM_STATUS_RX_PRIMARY_STATE_HS (0x00000000U) 636 #define NV2080_CTRL_NVLINK_SL1_SLSM_STATUS_RX_PRIMARY_STATE_SINGLE_LANE (0x00000004U) 637 #define NV2080_CTRL_NVLINK_SL1_SLSM_STATUS_RX_PRIMARY_STATE_TRAIN (0x00000005U) 638 #define NV2080_CTRL_NVLINK_SL1_SLSM_STATUS_RX_PRIMARY_STATE_SAFE (0x00000006U) 639 #define NV2080_CTRL_NVLINK_SL1_SLSM_STATUS_RX_PRIMARY_STATE_OFF (0x00000007U) 640 641 /* Flags to query different debug registers */ 642 #define NV2080_CTRL_NVLINK_ERR_INFO_FLAGS_DEFAULT (0x0U) 643 #define NV2080_CTRL_NVLINK_ERR_INFO_FLAGS_INTR_STATUS (0x1U) 644 #define NV2080_CTRL_NVLINK_ERR_INFO_FLAGS_ALI_STATUS (0x2U) 645 646 #define NV2080_CTRL_NVLINK_MAX_IOCTRLS 3U 647 /* 648 * NV2080_CTRL_NVLINK_GET_ERR_INFO_PARAMS 649 * 650 * linkMask 651 * Returns the mask of links enabled 652 * 653 * linkErrInfo 654 * Returns the error information for all the links 655 * 656 * ioctrlMask 657 * Returns the mask of ioctrls 658 * 659 * commonErrInfo 660 * Returns the error information common to each IOCTRL 661 * 662 * ErrInfoFlags 663 * Input for determining which values to query. Possible values: 664 * NV2080_CTRL_NVLINK_ERR_INFO_FLAGS_INTR_STATUS 665 * NV2080_CTRL_NVLINK_ERR_INFO_FLAGS_ALI_STATUS 666 * 667 */ 668 #define NV2080_CTRL_NVLINK_GET_ERR_INFO_PARAMS_MESSAGE_ID (0x3U) 669 670 typedef struct NV2080_CTRL_NVLINK_GET_ERR_INFO_PARAMS { 671 NvU32 linkMask; 672 NV2080_CTRL_NVLINK_ERR_INFO linkErrInfo[NV2080_CTRL_NVLINK_MAX_LINKS]; 673 NvU32 ioctrlMask; 674 NV2080_CTRL_NVLINK_COMMON_ERR_INFO commonErrInfo[NV2080_CTRL_NVLINK_MAX_IOCTRLS]; 675 NvU8 ErrInfoFlags; 676 } NV2080_CTRL_NVLINK_GET_ERR_INFO_PARAMS; 677 678 /* 679 * NV2080_CTRL_CMD_NVLINK_GET_ERR_INFO 680 * This command is used to query the NVLINK error information 681 * 682 * Possible status values returned are: 683 * NV_OK 684 * NV_ERR_NOT_SUPPORTED 685 */ 686 #define NV2080_CTRL_CMD_NVLINK_GET_ERR_INFO (0x20803003U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_GET_ERR_INFO_PARAMS_MESSAGE_ID" */ 687 688 /* 689 * APIs for getting NVLink counters 690 */ 691 692 // These are the bitmask definitions for different counter types 693 694 #define NV2080_CTRL_NVLINK_COUNTER_INVALID 0x00000000U 695 696 #define NV2080_CTRL_NVLINK_COUNTER_TL_TX0 0x00000001U 697 #define NV2080_CTRL_NVLINK_COUNTER_TL_TX1 0x00000002U 698 #define NV2080_CTRL_NVLINK_COUNTER_TL_RX0 0x00000004U 699 #define NV2080_CTRL_NVLINK_COUNTER_TL_RX1 0x00000008U 700 701 #define NV2080_CTRL_NVLINK_LP_COUNTERS_DL 0x00000010U 702 703 #define NV2080_CTRL_NVLINK_COUNTER_DL_RX_ERR_ECC_LANE_L(i) (1 << (i + 8)) 704 #define NV2080_CTRL_NVLINK_COUNTER_DL_RX_ERR_ECC_LANE__SIZE 4U 705 #define NV2080_CTRL_NVLINK_COUNTER_DL_RX_ERR_ECC_LANE_L0 0x00000100U 706 #define NV2080_CTRL_NVLINK_COUNTER_DL_RX_ERR_ECC_LANE_L1 0x00000200U 707 #define NV2080_CTRL_NVLINK_COUNTER_DL_RX_ERR_ECC_LANE_L2 0x00000400U 708 #define NV2080_CTRL_NVLINK_COUNTER_DL_RX_ERR_ECC_LANE_L3 0x00000800U 709 710 #define NV2080_CTRL_NVLINK_COUNTER_DL_RX_ERR_CRC_FLIT 0x00010000U 711 712 #define NV2080_CTRL_NVLINK_COUNTER_DL_RX_ERR_CRC_LANE_L(i) (1 << (i + 17)) 713 #define NV2080_CTRL_NVLINK_COUNTER_DL_RX_ERR_CRC_LANE__SIZE 8U 714 #define NV2080_CTRL_NVLINK_COUNTER_DL_RX_ERR_CRC_LANE_L0 0x00020000U 715 #define NV2080_CTRL_NVLINK_COUNTER_DL_RX_ERR_CRC_LANE_L1 0x00040000U 716 #define NV2080_CTRL_NVLINK_COUNTER_DL_RX_ERR_CRC_LANE_L2 0x00080000U 717 #define NV2080_CTRL_NVLINK_COUNTER_DL_RX_ERR_CRC_LANE_L3 0x00100000U 718 #define NV2080_CTRL_NVLINK_COUNTER_DL_RX_ERR_CRC_LANE_L4 0x00200000U 719 #define NV2080_CTRL_NVLINK_COUNTER_DL_RX_ERR_CRC_LANE_L5 0x00400000U 720 #define NV2080_CTRL_NVLINK_COUNTER_DL_RX_ERR_CRC_LANE_L6 0x00800000U 721 #define NV2080_CTRL_NVLINK_COUNTER_DL_RX_ERR_CRC_LANE_L7 0x01000000U 722 723 #define NV2080_CTRL_NVLINK_COUNTER_DL_TX_ERR_REPLAY 0x02000000U 724 #define NV2080_CTRL_NVLINK_COUNTER_DL_TX_ERR_RECOVERY 0x04000000U 725 726 #define NV2080_CTRL_NVLINK_COUNTER_DL_RX_ERR_REPLAY 0x08000000U 727 728 #define NV2080_CTRL_NVLINK_COUNTER_DL_RX_ERR_CRC_MASKED 0x10000000U 729 730 /* 731 * Note that COUNTER_MAX_TYPES will need to be updated each time 732 * a new counter type gets added to the list above. 733 * 734 */ 735 #define NV2080_CTRL_NVLINK_COUNTER_MAX_TYPES 32U 736 737 /* 738 * NV2080_CTRL_CMD_NVLINK_GET_COUNTERS 739 * This command gets the counts for different counter types. 740 * 741 * [in] counterMask 742 * Mask of counter types to be queried 743 * One of NV2080_CTRL_NVLINK_COUNTERS_TYPE_* macros 744 * 745 * [in] linkMask 746 * Mask of links to be queried 747 * 748 * [out] counters 749 * Counter value returned 750 * 751 * [out] bTx0TlCounterOverflow 752 * This boolean is set to NV_TRUE if TX Counter 0 has rolled over. 753 * 754 * [out] bTx1TlCounterOverflow 755 * This boolean is set to NV_TRUE if TX Counter 1 has rolled over. 756 * 757 * [out] bRx0TlCounterOverflow 758 * This boolean is set to NV_TRUE if RX Counter 0 has rolled over. 759 * 760 * [out] bRx1TlCounterOverflow 761 * This boolean is set to NV_TRUE if RX Counter 1 has rolled over. 762 * 763 * [out] value 764 * This array contains the error counts for each error type as requested from 765 * the counterMask. The array indexes correspond to the mask bits one-to-one. 766 */ 767 typedef struct NV2080_CTRL_NVLINK_GET_COUNTERS_VALUES { 768 NvBool bTx0TlCounterOverflow; 769 NvBool bTx1TlCounterOverflow; 770 NvBool bRx0TlCounterOverflow; 771 NvBool bRx1TlCounterOverflow; 772 NV_DECLARE_ALIGNED(NvU64 value[NV2080_CTRL_NVLINK_COUNTER_MAX_TYPES], 8); 773 } NV2080_CTRL_NVLINK_GET_COUNTERS_VALUES; 774 775 #define NV2080_CTRL_NVLINK_GET_COUNTERS_PARAMS_MESSAGE_ID (0x4U) 776 777 typedef struct NV2080_CTRL_NVLINK_GET_COUNTERS_PARAMS { 778 NvU32 counterMask; 779 NV_DECLARE_ALIGNED(NvU64 linkMask, 8); 780 NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_GET_COUNTERS_VALUES counters[NV2080_CTRL_NVLINK_MAX_LINKS], 8); 781 } NV2080_CTRL_NVLINK_GET_COUNTERS_PARAMS; 782 783 #define NV2080_CTRL_CMD_NVLINK_GET_COUNTERS (0x20803004U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_GET_COUNTERS_PARAMS_MESSAGE_ID" */ 784 785 786 /* 787 * NV2080_CTRL_CMD_NVLINK_CLEAR_COUNTERS 788 * This command clears/resets the counters for the specified types. 789 * 790 * [in] linkMask 791 * This parameter specifies for which links we want to clear the 792 * counters. 793 * 794 * [in] counterMask 795 * This parameter specifies the input mask for desired counters to be 796 * cleared. Note that all counters cannot be cleared. 797 * 798 * NOTE: Bug# 2098529: On Turing all DL errors and LP counters are cleared 799 * together. They cannot be cleared individually per error type. RM 800 * would possibly move to a new API on Ampere and beyond 801 */ 802 803 #define NV2080_CTRL_CMD_NVLINK_CLEAR_COUNTERS (0x20803005U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_CLEAR_COUNTERS_PARAMS_MESSAGE_ID" */ 804 805 #define NV2080_CTRL_NVLINK_CLEAR_COUNTERS_PARAMS_MESSAGE_ID (0x5U) 806 807 typedef struct NV2080_CTRL_NVLINK_CLEAR_COUNTERS_PARAMS { 808 NvU32 counterMask; 809 NV_DECLARE_ALIGNED(NvU64 linkMask, 8); 810 } NV2080_CTRL_NVLINK_CLEAR_COUNTERS_PARAMS; 811 812 /* 813 * NV2080_CTRL_CMD_NVLINK_INJECT_ERROR 814 * This command causes all the same actions to occur as if the related 815 * error were to occur, either fatal or recoverable. 816 * 817 * [in] linkMask size: 32 bits 818 * Controls which links to apply error injection to. 819 * [in] bFatal 820 * This parameter specifies that the error should be fatal. 821 * 822 */ 823 #define NV2080_CTRL_CMD_NVLINK_INJECT_ERROR (0x20803006U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_INJECT_ERROR_PARAMS_MESSAGE_ID" */ 824 825 #define NV2080_CTRL_NVLINK_INJECT_ERROR_PARAMS_MESSAGE_ID (0x6U) 826 827 typedef struct NV2080_CTRL_NVLINK_INJECT_ERROR_PARAMS { 828 NvU32 linkMask; 829 NvBool bFatalError; 830 } NV2080_CTRL_NVLINK_INJECT_ERROR_PARAMS; 831 832 /* NVLINK unit list - to be used with error notifiers */ 833 #define NV2080_CTRL_NVLINK_UNIT_DL 0x01U 834 #define NV2080_CTRL_NVLINK_UNIT_TL 0x02U 835 #define NV2080_CTRL_NVLINK_UNIT_TLC_RX_0 0x03U 836 #define NV2080_CTRL_NVLINK_UNIT_TLC_RX_1 0x04U 837 #define NV2080_CTRL_NVLINK_UNIT_TLC_TX_0 0x05U 838 #define NV2080_CTRL_NVLINK_UNIT_MIF_RX_0 0x06U 839 #define NV2080_CTRL_NVLINK_UNIT_MIF_TX_0 0x07U 840 #define NV2080_CTRL_NVLINK_UNIT_MINION 0x08U 841 842 /* 843 * NV2080_CTRL_CMD_NVLINK_GET_ERROR_RECOVERIES 844 * This command gets the number of successful error recoveries 845 * 846 * [in] linkMask size: 32 bits 847 * This parameter controls which links to get recoveries for. 848 * [out] numRecoveries 849 * This parameter specifies the number of successful per link error recoveries 850 */ 851 #define NV2080_CTRL_CMD_NVLINK_GET_ERROR_RECOVERIES (0x20803007U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_CMD_NVLINK_GET_ERROR_RECOVERIES_PARAMS_MESSAGE_ID" */ 852 853 #define NV2080_CTRL_CMD_NVLINK_GET_ERROR_RECOVERIES_PARAMS_MESSAGE_ID (0x7U) 854 855 typedef struct NV2080_CTRL_CMD_NVLINK_GET_ERROR_RECOVERIES_PARAMS { 856 NvU32 linkMask; 857 NvU32 numRecoveries[NV2080_CTRL_NVLINK_MAX_LINKS]; 858 } NV2080_CTRL_CMD_NVLINK_GET_ERROR_RECOVERIES_PARAMS; 859 860 /* 861 * NV2080_CTRL_CMD_NVLINK_GET_LINK_LAST_ERROR_REMOTE_TYPE 862 * 863 * This command queries the remote endpoint type of the link recorded at the 864 * time the last error occurred on the link. 865 * 866 * [in] linkId 867 * This parameter specifies the link to get the last remote endpoint type 868 * recorded for. 869 * 870 * [out] remoteType 871 * This parameter returns the remote endpoint type of the link recorded at 872 * the time the last error occurred on the link. Possible values are: 873 * NV2080_CTRL_NVLINK_DEVICE_INFO_DEVICE_TYPE_NONE 874 * The link is not connected to an active remote endpoint. 875 * NV2080_CTRL_NVLINK_DEVICE_INFO_DEVICE_TYPE_GPU 876 * The remote endpoint of the link is a peer GPU. 877 * NV2080_CTRL_NVLINK_DEVICE_INFO_DEVICE_TYPE_NPU 878 * The remote endpoint of the link is the host system (e.g., an NPU 879 * on IBM POWER platforms). 880 * NV2080_CTRL_NVLINK_DEVICE_INFO_DEVICE_TYPE_TEGRA 881 * The remote endpoint of the link a tegra device 882 * 883 * Possible return status values are: 884 * NV_OK 885 * If the remoteType parameter value is valid upon return. 886 * NV_ERR_INVALID_ARGUMENT 887 * If the linkId parameter does not specify a valid link. 888 * NV_ERR_NOT_SUPPORTED 889 * If NVLINK is not supported on this GPU or the remote endpoint type is 890 * not recorded in non-volatile storage. 891 */ 892 #define NV2080_CTRL_CMD_NVLINK_GET_LINK_LAST_ERROR_REMOTE_TYPE (0x20803008U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_GET_LINK_LAST_ERROR_REMOTE_TYPE_PARAMS_MESSAGE_ID" */ 893 894 #define NV2080_CTRL_NVLINK_GET_LINK_LAST_ERROR_REMOTE_TYPE_PARAMS_MESSAGE_ID (0x8U) 895 896 typedef struct NV2080_CTRL_NVLINK_GET_LINK_LAST_ERROR_REMOTE_TYPE_PARAMS { 897 NvU32 linkId; 898 NvU32 remoteType; 899 } NV2080_CTRL_NVLINK_GET_LINK_LAST_ERROR_REMOTE_TYPE_PARAMS; 900 901 /* 902 * NV2080_CTRL_CMD_NVLINK_GET_LINK_FATAL_ERROR_COUNTS 903 * 904 * This command queries the number of each type of fatal errors that have 905 * occurred on the given link. 906 * 907 * [in] linkId 908 * This parameter specifies the link to get the fatal error information 909 * for. 910 * 911 * [out] supportedCounts 912 * This parameter identifies which counts in the fatalErrorCounts array 913 * are valid for the given link. A bit set in this field means that the 914 * corresponding index is valid in the fatalErrorCounts array. 915 * 916 * [out] fatalErrorCounts 917 * This parameter returns an array of 8-bit counts, one for each type of 918 * fatal error that can occur on the link. The valid indices of this array 919 * are: 920 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TL(C)_RX_DL_DATA_PARITY 921 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TL(C)_RX_DL_CTRL_PARITY 922 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TL_RX_PROTOCOL 923 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TL_RX_OVERFLOW 924 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TL(C)_RX_RAM_DATA_PARITY 925 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TL(C)_RX_RAM_HDR_PARITY 926 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TL_RX_RESP 927 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TL_RX_POISON 928 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_DATA_POISONED_PKT_RCVD 929 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TL(C)_TX_RAM_DATA_PARITY 930 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TL(C)_TX_RAM_HDR_PARITY 931 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TL_TX_CREDIT 932 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TL_DL_FLOW_CTRL_PARITY 933 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_TX_DL_FLOW_CTRL_PARITY 934 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TL_DL_HDR_PARITY 935 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_DL_TX_RECOVERY_LONG 936 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_DL_TX_FAULT_RAM 937 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_DL_TX_FAULT_INTERFACE 938 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_DL_TX_FAULT_SUBLINK_CHANGE 939 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_DL_RX_FAULT_SUBLINK_CHANGE 940 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_DL_RX_FAULT_DL_PROTOCOL 941 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_DL_LTSSM_FAULT 942 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_DL_HDR_PARITY 943 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_INVALID_AE_FLIT_RCVD 944 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_INVALID_BE_FLIT_RCVD 945 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_INVALID_ADDR_ALIGN 946 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_PKT_LEN 947 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_RSVD_CMD_ENC 948 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_RSVD_DAT_LEN_ENC 949 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_RSVD_ADDR_TYPE 950 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_RSVD_RSP_STATUS 951 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_RSVD_PKT_STATUS 952 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_RSVD_CACHE_ATTR_ENC_IN_PROBE_REQ 953 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_RSVD_CACHE_ATTR_ENC_IN_PROBE_RESP 954 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_DAT_LEN_GT_ATOMIC_REQ_MAX_SIZE 955 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_DAT_LEN_GT_RMW_REQ_MAX_SIZE 956 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_DAT_LEN_LT_ATR_RESP_MIN_SIZE 957 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_INVALID_PO_FOR_CACHE_ATTR 958 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_INVALID_COMPRESSED_RESP 959 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_RESP_STATUS_TARGET 960 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_RESP_STATUS_UNSUPPORTED_REQUEST 961 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_HDR_OVERFLOW 962 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_DATA_OVERFLOW 963 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_STOMPED_PKT_RCVD 964 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_CORRECTABLE_INTERNAL 965 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_UNSUPPORTED_VC_OVERFLOW 966 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_UNSUPPORTED_NVLINK_CREDIT_RELEASE 967 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_UNSUPPORTED_NCISOC_CREDIT_RELEASE 968 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_TX_HDR_CREDIT_OVERFLOW 969 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_TX_DATA_CREDIT_OVERFLOW 970 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_TX_DL_REPLAY_CREDIT_OVERFLOW 971 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_TX_UNSUPPORTED_VC_OVERFLOW 972 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_TX_STOMPED_PKT_SENT 973 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_TX_DATA_POISONED_PKT_SENT 974 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_TX_RESP_STATUS_TARGET 975 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_TX_RESP_STATUS_UNSUPPORTED_REQUEST 976 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_MIF_RX_RAM_DATA_PARITY 977 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_MIF_RX_RAM_HDR_PARITY 978 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_MIF_TX_RAM_DATA_PARITY 979 * NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_MIF_TX_RAM_HDR_PARITY 980 * 981 * Possible return status values are: 982 * NV_OK 983 * If the values in the fatalErrorCounts array are valid upon return. 984 * NV_ERR_INVALID_ARGUMENT 985 * If the linkId parameter does not specify a valid link. 986 * NV_ERR_NOT_SUPPORTED 987 * If NVLINK is not supported on this GPU or aggregate NVLINK fatal error 988 * counts are not recorded in non-volatile storage. 989 */ 990 #define NV2080_CTRL_CMD_NVLINK_GET_LINK_FATAL_ERROR_COUNTS (0x20803009U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_GET_LINK_FATAL_ERROR_COUNTS_PARAMS_MESSAGE_ID" */ 991 992 /* 993 * NVLink 1 Fatal Error Types 994 */ 995 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TL_RX_DL_DATA_PARITY 0U 996 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TL_RX_DL_CTRL_PARITY 1U 997 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TL_RX_PROTOCOL 2U 998 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TL_RX_OVERFLOW 3U 999 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TL_RX_RAM_DATA_PARITY 4U 1000 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TL_RX_RAM_HDR_PARITY 5U 1001 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TL_RX_RESP 6U 1002 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TL_RX_POISON 7U 1003 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TL_TX_RAM_DATA_PARITY 8U 1004 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TL_TX_RAM_HDR_PARITY 9U 1005 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TL_TX_CREDIT 10U 1006 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TL_DL_FLOW_CTRL_PARITY 11U 1007 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TL_DL_HDR_PARITY 12U 1008 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_DL_TX_RECOVERY_LONG 13U 1009 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_DL_TX_FAULT_RAM 14U 1010 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_DL_TX_FAULT_INTERFACE 15U 1011 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_DL_TX_FAULT_SUBLINK_CHANGE 16U 1012 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_DL_RX_FAULT_SUBLINK_CHANGE 17U 1013 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_DL_RX_FAULT_DL_PROTOCOL 18U 1014 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_DL_LTSSM_FAULT 19U 1015 1016 /* 1017 * NVLink 2 Fatal Error Types 1018 */ 1019 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_DL_DATA_PARITY 0U 1020 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_DL_CTRL_PARITY 1U 1021 // No direct equivalent to: TL_RX_PROTOCOL 2 1022 // No direct equivalent to: TL_RX_OVERFLOW 3 1023 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_RAM_DATA_PARITY 4U 1024 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_RAM_HDR_PARITY 5U 1025 // No direct equivalent to: TL_RX_RESP 6 1026 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_DATA_POISONED_PKT_RCVD 7U 1027 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_TX_RAM_DATA_PARITY 8U 1028 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_TX_RAM_HDR_PARITY 9U 1029 // No direct equivalent to: TL_TX_CREDIT 10 1030 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_TX_DL_FLOW_CONTROL_PARITY 11U 1031 // No direct equivalent to: TL_DL_HDR_PARITY 12 1032 // Identical to NVLink 1: DL_TX_RECOVERY_LONG 13 1033 // Identical to NVLink 1: DL_TX_FAULT_RAM 14 1034 // Identical to NVLink 1: DL_TX_FAULT_INTERFACE 15 1035 // Identical to NVLink 1: DL_TX_FAULT_SUBLINK_CHANGE 16 1036 // Identical to NVLink 1: DL_RX_FAULT_SUBLINK_CHANGE 17 1037 // Identical to NVLink 1: DL_RX_FAULT_DL_PROTOCOL 18 1038 // Identical to NVLink 1: DL_LTSSM_FAULT 19 1039 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_DL_HDR_PARITY 20U 1040 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_INVALID_AE_FLIT_RCVD 21U 1041 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_INVALID_BE_FLIT_RCVD 22U 1042 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_INVALID_ADDR_ALIGN 23U 1043 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_PKT_LEN 24U 1044 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_RSVD_CMD_ENC 25U 1045 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_RSVD_DAT_LEN_ENC 26U 1046 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_RSVD_ADDR_TYPE 27U 1047 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_RSVD_RSP_STATUS 28U 1048 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_RSVD_PKT_STATUS 29U 1049 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_RSVD_CACHE_ATTR_ENC_IN_PROBE_REQ 30U 1050 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_RSVD_CACHE_ATTR_ENC_IN_PROBE_RESP 31U 1051 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_DAT_LEN_GT_ATOMIC_REQ_MAX_SIZE 32U 1052 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_DAT_LEN_GT_RMW_REQ_MAX_SIZE 33U 1053 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_DAT_LEN_LT_ATR_RESP_MIN_SIZE 34U 1054 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_INVALID_PO_FOR_CACHE_ATTR 35U 1055 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_INVALID_COMPRESSED_RESP 36U 1056 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_RESP_STATUS_TARGET 37U 1057 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_RESP_STATUS_UNSUPPORTED_REQUEST 38U 1058 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_HDR_OVERFLOW 39U 1059 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_DATA_OVERFLOW 40U 1060 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_STOMPED_PKT_RCVD 41U 1061 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_CORRECTABLE_INTERNAL 42U 1062 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_UNSUPPORTED_VC_OVERFLOW 43U 1063 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_UNSUPPORTED_NVLINK_CREDIT_RELEASE 44U 1064 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_UNSUPPORTED_NCISOC_CREDIT_RELEASE 45U 1065 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_TX_HDR_CREDIT_OVERFLOW 46U 1066 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_TX_DATA_CREDIT_OVERFLOW 47U 1067 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_TX_DL_REPLAY_CREDIT_OVERFLOW 48U 1068 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_TX_UNSUPPORTED_VC_OVERFLOW 49U 1069 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_TX_STOMPED_PKT_SENT 50U 1070 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_TX_DATA_POISONED_PKT_SENT 51U 1071 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_TX_RESP_STATUS_TARGET 52U 1072 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_TX_RESP_STATUS_UNSUPPORTED_REQUEST 53U 1073 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_MIF_RX_RAM_DATA_PARITY 54U 1074 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_MIF_RX_RAM_HDR_PARITY 55U 1075 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_MIF_TX_RAM_DATA_PARITY 56U 1076 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_MIF_TX_RAM_HDR_PARITY 57U 1077 1078 /* 1079 * NVLink 3 Fatal Error Types 1080 */ 1081 // Identical to NVLink 2: TLC_RX_DL_DATA_PARITY 0 1082 // Identical to NVLink 2: TLC_RX_DL_CTRL_PARITY 1 1083 // No direct equivalent to: TL_RX_PROTOCOL 2 1084 // No direct equivalent to: TL_RX_OVERFLOW 3 1085 // No direct equivalent to: TLC_RX_RAM_DATA_PARITY 4 1086 // No direct equivalent to: RX_RAM_HDR_PARITY 5 1087 // No direct equivalent to: TL_RX_RESP 6 1088 // No direct equivalent to: TLC_RX_DATA_POISONED_PKT_RCVD 7 1089 // No direct equivalent to: TLC_TX_RAM_DATA_PARITY 8 1090 // No direct equivalent to: TLC_TX_RAM_HDR_PARITY 9 1091 // No direct equivalent to: TL_TX_CREDIT 10 1092 // Identical to NVLink 2: TLC_TX_DL_FLOW_CONTROL_PARITY 11 1093 // No direct equivalent to: TL_DL_HDR_PARITY 12 1094 // No direct equivalent to: DL_TX_RECOVERY_LONG 13 1095 // Identical to NVLink 1: DL_TX_FAULT_RAM 14 1096 // Identical to NVLink 1: DL_TX_FAULT_INTERFACE 15 1097 // Identical to NVLink 1: DL_TX_FAULT_SUBLINK_CHANGE 16 1098 // Identical to NVLink 1: DL_RX_FAULT_SUBLINK_CHANGE 17 1099 // Identical to NVLink 1: DL_RX_FAULT_DL_PROTOCOL 18 1100 // No direct equivalent to: DL_LTSSM_FAULT 19 1101 // Identical to NVLink 2: TLC_RX_DL_HDR_PARITY 20 1102 // Identical to NVLink 2: TLC_RX_INVALID_AE_FLIT_RCVD 21 1103 // Identical to NVLink 2: TLC_RX_INVALID_BE_FLIT_RCVD 22 1104 // Identical to NVLink 2: TLC_RX_INVALID_ADDR_ALIGN 23 1105 // Identical to NVLink 2: TLC_RX_PKT_LEN 24 1106 // Identical to NVLink 2: TLC_RX_RSVD_CMD_ENC 25 1107 // Identical to NVLink 2: TLC_RX_RSVD_DAT_LEN_ENC 26 1108 // No direct equivalent to: TLC_RX_RSVD_ADDR_TYPE 27 1109 // No direct equivalent to: TLC_RX_RSVD_RSP_STATUS 28 1110 // Identical to NVLink 2: TLC_RX_RSVD_PKT_STATUS 29 1111 // Identical to NVLink 2: TLC_RX_RSVD_CACHE_ATTR_ENC_IN_PROBE_REQ 30 1112 // Identical to NVLink 2: TLC_RX_RSVD_CACHE_ATTR_ENC_IN_PROBE_RESP 31 1113 // No direct equivalent to: TLC_RX_DAT_LEN_GT_ATOMIC_REQ_MAX_SIZE 32 1114 // Identical to NVLink 2: TLC_RX_DAT_LEN_GT_RMW_REQ_MAX_SIZE 33 1115 // Identical to NVLink 2: TLC_RX_DAT_LEN_LT_ATR_RESP_MIN_SIZE 34 1116 // Identical to NVLink 2: TLC_RX_INVALID_PO_FOR_CACHE_ATTR 35 1117 // Identical to NVLink 2: TLC_RX_INVALID_COMPRESSED_RESP 36 1118 // No direct equivalent to: TLC_RX_RESP_STATUS_TARGET 37 1119 // No direct equivalent to: TLC_RX_RESP_STATUS_UNSUPPORTED_REQUEST 38 1120 // Identical to NVLink 2: TLC_RX_HDR_OVERFLOW 39 1121 // Identical to NVLink 2: TLC_RX_DATA_OVERFLOW 40 1122 // Identical to NVLink 2: TLC_RX_STOMPED_PKT_RCVD 41 1123 // No direct equivalent to: TLC_RX_CORRECTABLE_INTERNAL 42 1124 // No direct equivalent to: TLC_RX_UNSUPPORTED_VC_OVERFLOW 43 1125 // No direct equivalent to: TLC_RX_UNSUPPORTED_NVLINK_CREDIT_RELEASE 44 1126 // No direct equivalent to: TLC_RX_UNSUPPORTED_NCISOC_CREDIT_RELEASE 45 1127 // No direct equivalent to: TLC_TX_HDR_CREDIT_OVERFLOW 46 1128 // No direct equivalent to: TLC_TX_DATA_CREDIT_OVERFLOW 47 1129 // No direct equivalent to: TLC_TX_DL_REPLAY_CREDIT_OVERFLOW 48 1130 // No direct equivalent to: TLC_TX_UNSUPPORTED_VC_OVERFLOW 49 1131 // No direct equivalent to: TLC_TX_STOMPED_PKT_SENT 50 1132 // No direct equivalent to: TLC_TX_DATA_POISONED_PKT_SENT 51 1133 // No direct equivalent to: TLC_TX_RESP_STATUS_TARGET 52 1134 // No direct equivalent to: TLC_TX_RESP_STATUS_UNSUPPORTED_REQUEST 53 1135 // No direct equivalent to: MIF_RX_RAM_DATA_PARITY 54 1136 // No direct equivalent to: MIF_RX_RAM_HDR_PARITY 55 1137 // No direct equivalent to: MIF_TX_RAM_DATA_PARITY 56 1138 // No direct equivalent to: MIF_TX_RAM_HDR_PARITY 57 1139 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_RX_INVALID_COLLAPSED_RESPONSE 58U 1140 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_TX_NCISOC_HDR_ECC_DBE 59U 1141 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_TLC_TX_NCISOC_PARITY 60U 1142 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_DL_LTSSM_FAULT_UP 61U 1143 #define NV2080_CTRL_NVLINK_FATAL_ERROR_TYPE_DL_LTSSM_FAULT_DOWN 62U 1144 1145 #define NV2080_CTRL_NVLINK_NUM_FATAL_ERROR_TYPES 63U 1146 1147 #define NV2080_CTRL_NVLINK_IS_FATAL_ERROR_COUNT_VALID(count, supportedCounts) \ 1148 (!!((supportedCounts) & NVBIT64(count))) 1149 1150 #define NV2080_CTRL_NVLINK_GET_LINK_FATAL_ERROR_COUNTS_PARAMS_MESSAGE_ID (0x9U) 1151 1152 typedef struct NV2080_CTRL_NVLINK_GET_LINK_FATAL_ERROR_COUNTS_PARAMS { 1153 NvU32 linkId; 1154 NV_DECLARE_ALIGNED(NvU64 supportedCounts, 8); 1155 NvU8 fatalErrorCounts[NV2080_CTRL_NVLINK_NUM_FATAL_ERROR_TYPES]; 1156 } NV2080_CTRL_NVLINK_GET_LINK_FATAL_ERROR_COUNTS_PARAMS; 1157 1158 /* 1159 * NV2080_CTRL_CMD_NVLINK_GET_LINK_NONFATAL_ERROR_RATES 1160 * 1161 * This command queries recent non-fatal error rates for the given link. 1162 * 1163 * The error rates specify the maximum number of errors per minute recorded 1164 * for the given link within a 24-hour period for daily maximums or a 30-day 1165 * period for monthly maximums. 1166 * 1167 * [in] linkId 1168 * This parameter specifies the link to get the nonfatal error information 1169 * for. 1170 * 1171 * [out] numDailyMaxNonfatalErrorRates 1172 * This parameter returns the number of valid nonfatal error rate entries 1173 * in the dailyMaxNonfatalErrorRates parameter. 1174 * 1175 * [out] dailyMaxNonfatalErrorRates 1176 * This parameter returns maximum nonfatal error rate entries recorded 1177 * over the last few 24-hour periods. For example, index 0 contains the 1178 * maximum nonfatal error rate recorded in the current day, index 1 1179 * contains the maximum nonfatal error rate recorded yesterday ago, etc. 1180 * 1181 * [out] numMonthlyMaxNonfatalErrorRates 1182 * This parameter returns the number of valid nonfatal error rate entries 1183 * in the monthlyMaxNonfatalErrorRates parameter. 1184 * 1185 * [out] monthlyMaxNonfatalErrorRates 1186 * THis parameter returns maximum nonfatal error rate entries recorded 1187 * over the last few 30-day periods. For example, index 0 contains the 1188 * maximum nonfatal error rate recorded in the current month, index 1 1189 * contains the maximum nonfatal error recorded last month, etc. 1190 * 1191 * Possible status values returned are: 1192 * NV_OK 1193 * If any nonfatal error rates are valid upon return. 1194 * NV_ERR_INVALID_ARGUMENT 1195 * If the linkId parameter does not specify a valid link. 1196 * NV_ERR_NOT_SUPPORTED 1197 * If NVLINK is not supported on this GPU or NVLINK nonfatal error rates 1198 * are not recorded in non-volatile storage. 1199 */ 1200 #define NV2080_CTRL_CMD_NVLINK_GET_LINK_NONFATAL_ERROR_RATES (0x2080300aU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_GET_LINK_NONFATAL_ERROR_RATES_PARAMS_MESSAGE_ID" */ 1201 1202 typedef struct NV2080_CTRL_NVLINK_NONFATAL_ERROR_RATE { 1203 NvU32 errorsPerMinute; 1204 NvU32 timestamp; 1205 } NV2080_CTRL_NVLINK_NONFATAL_ERROR_RATE; 1206 1207 #define NV2080_CTRL_NVLINK_NONFATAL_ERROR_RATE_ENTRIES 5U 1208 1209 #define NV2080_CTRL_NVLINK_GET_LINK_NONFATAL_ERROR_RATES_PARAMS_MESSAGE_ID (0xAU) 1210 1211 typedef struct NV2080_CTRL_NVLINK_GET_LINK_NONFATAL_ERROR_RATES_PARAMS { 1212 NvU32 linkId; 1213 NvU32 numDailyMaxNonfatalErrorRates; 1214 NV2080_CTRL_NVLINK_NONFATAL_ERROR_RATE dailyMaxNonfatalErrorRates[NV2080_CTRL_NVLINK_NONFATAL_ERROR_RATE_ENTRIES]; 1215 NvU32 numMonthlyMaxNonfatalErrorRates; 1216 NV2080_CTRL_NVLINK_NONFATAL_ERROR_RATE monthlyMaxNonfatalErrorRates[NV2080_CTRL_NVLINK_NONFATAL_ERROR_RATE_ENTRIES]; 1217 } NV2080_CTRL_NVLINK_GET_LINK_NONFATAL_ERROR_RATES_PARAMS; 1218 1219 /* 1220 * NV2080_CTRL_CMD_NVLINK_SET_ERROR_INJECTION_MODE 1221 * 1222 * This command sets the injection mode so that error handling and error 1223 * logging software can be aware that errors cropping up on links are 1224 * intentional and not due to HW failures. 1225 * 1226 * [in] bEnabled 1227 * This parameter specifies whether injection mode should be enabled or 1228 * disabled. 1229 * 1230 * Possible status values returned are: 1231 * NV_OK 1232 * If injection mode is enabled or disabled according to the parameters. 1233 * NV_ERR_NOT_SUPPORTED 1234 * If NVLINK is not supported on this GPU. 1235 */ 1236 #define NV2080_CTRL_CMD_NVLINK_SET_ERROR_INJECTION_MODE (0x2080300bU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_SET_ERROR_INJECTION_MODE_PARAMS_MESSAGE_ID" */ 1237 1238 #define NV2080_CTRL_NVLINK_SET_ERROR_INJECTION_MODE_PARAMS_MESSAGE_ID (0xBU) 1239 1240 typedef struct NV2080_CTRL_NVLINK_SET_ERROR_INJECTION_MODE_PARAMS { 1241 NvBool bEnabled; 1242 } NV2080_CTRL_NVLINK_SET_ERROR_INJECTION_MODE_PARAMS; 1243 1244 /* 1245 * NV2080_CTRL_CMD_NVLINK_SETUP_EOM 1246 * 1247 * This command passes a packed 32bit params value to NV_PMINION_MISC_0_SCRATCH_SWRW_0 1248 * and then issues an EOM DLCMD to minion for the desired link. Only one DLCMD 1249 * at a time can be issued to any given link. 1250 * 1251 * Params Packing is specified in Minion IAS 1252 */ 1253 #define NV2080_CTRL_CMD_NVLINK_SETUP_EOM (0x2080300cU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_CMD_NVLINK_SETUP_EOM_PARAMS_MESSAGE_ID" */ 1254 1255 #define NV2080_CTRL_CMD_NVLINK_SETUP_EOM_PARAMS_MESSAGE_ID (0xCU) 1256 1257 typedef struct NV2080_CTRL_CMD_NVLINK_SETUP_EOM_PARAMS { 1258 NvU8 linkId; 1259 NvU32 params; 1260 } NV2080_CTRL_CMD_NVLINK_SETUP_EOM_PARAMS; 1261 1262 /* 1263 * NV2080_CTRL_CMD_NVLINK_SET_POWER_STATE 1264 * 1265 * This command sets the mask of links associated with the GPU 1266 * to a target power state 1267 * 1268 * [in] linkMask 1269 * Mask of links that will be put to desired power state 1270 * Note: In Turing RM supports only tansitions into/out of L2 1271 * [in] powerState 1272 * Target power state to which the links will transition 1273 * This can be any one of NV2080_CTRL_NVLINK_POWER_STATE_* states 1274 * 1275 * Possible status values returned are: 1276 * NV_OK 1277 * If all links transitioned successfully to the target state 1278 * NV_ERR_NOT_SUPPORTED 1279 * If NVLINK is not supported on the chip or if the power state 1280 * is not enabled on the chip 1281 * NV_ERR_INVALID_ARGUMENT 1282 * If the any of the links in the mask is not enabled 1283 * NV_ERR_INVALID_REQUEST 1284 * If the power state transition is not supported 1285 * NV_WARN_MORE_PROCESSING_REQUIRED 1286 * Link has received the request for the power transition 1287 * The transition will happen when the remote end also agrees 1288 * 1289 * Note: Currently only L0->L2 and L2->L0 is supported 1290 */ 1291 #define NV2080_CTRL_CMD_NVLINK_SET_POWER_STATE (0x2080300dU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_SET_POWER_STATE_PARAMS_MESSAGE_ID" */ 1292 1293 #define NV2080_CTRL_NVLINK_SET_POWER_STATE_PARAMS_MESSAGE_ID (0xDU) 1294 1295 typedef struct NV2080_CTRL_NVLINK_SET_POWER_STATE_PARAMS { 1296 NvU32 linkMask; 1297 NvU32 powerState; 1298 } NV2080_CTRL_NVLINK_SET_POWER_STATE_PARAMS; 1299 1300 // NVLink Power States 1301 #define NV2080_CTRL_NVLINK_POWER_STATE_L0 (0x00U) 1302 #define NV2080_CTRL_NVLINK_POWER_STATE_L1 (0x01U) 1303 #define NV2080_CTRL_NVLINK_POWER_STATE_L2 (0x02U) 1304 #define NV2080_CTRL_NVLINK_POWER_STATE_L3 (0x03U) 1305 1306 /* 1307 * NV2080_CTRL_CMD_NVLINK_GET_POWER_STATE 1308 * 1309 * This command gets the power state of a link associated 1310 * with the GPU 1311 * 1312 * [in] linkId 1313 * Link whose power state is being requested 1314 * [out] powerState 1315 * Current power state of the link 1316 * Is any one the NV2080_CTRL_NVLINK_POWER_STATE_* states 1317 * 1318 * Possible status values returned are: 1319 * NV_OK 1320 * If the power state is retrieved successfully 1321 * NV_ERR_NOT_SUPPORTED 1322 * If NVLINK is not supported on the chip 1323 * NV_ERR_INVALID_ARGUMENT 1324 * If the link is not enabled on the GPU 1325 * NV_ERR_INVALID_STATE 1326 * If the link is in an invalid state 1327 */ 1328 #define NV2080_CTRL_CMD_NVLINK_GET_POWER_STATE (0x2080300eU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_GET_POWER_STATE_PARAMS_MESSAGE_ID" */ 1329 1330 #define NV2080_CTRL_NVLINK_GET_POWER_STATE_PARAMS_MESSAGE_ID (0xEU) 1331 1332 typedef struct NV2080_CTRL_NVLINK_GET_POWER_STATE_PARAMS { 1333 NvU32 linkId; 1334 NvU32 powerState; 1335 } NV2080_CTRL_NVLINK_GET_POWER_STATE_PARAMS; 1336 1337 /* 1338 * NV2080_CTRL_CMD_NVLINK_INJECT_TLC_ERROR 1339 * 1340 * This command injects TLC_*_REPORT_INJECT error. An RM interrupt 1341 * will be triggered after injection. Currently the injection call 1342 * only deals with HW_ERR, UR_ERR, PRIV_ERR in TX_SYS and RX_LNK devices 1343 * 1344 * [in] linkId 1345 * Link whose power state is being requested. 1346 * [in] errorType 1347 * error type that needs to be injected. 1348 * [in] device 1349 * The device this injection is intended for. 1350 * [in] bBroadcast 1351 * Whether the link report error should be fired in multiple links. 1352 1353 * Possible status values returned are: 1354 * NV_OK 1355 * If the injection succeeds. 1356 * NV_ERR_NOT_SUPPORTED 1357 * If the error type of NVLINK is not supported on the chip 1358 */ 1359 #define NV2080_CTRL_CMD_NVLINK_INJECT_TLC_ERROR (0x2080300fU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_INJECT_TLC_ERROR_PARAMS_MESSAGE_ID" */ 1360 1361 typedef enum NV2080_CTRL_NVLINK_INJECT_TLC_ERROR_DEVICE { 1362 TLC_RX_LNK = 0, 1363 TLC_TX_SYS = 1, 1364 } NV2080_CTRL_NVLINK_INJECT_TLC_ERROR_DEVICE; 1365 1366 typedef enum NV2080_CTRL_NVLINK_INJECT_TLC_TX_SYS_REPORT_ERROR_TYPE { 1367 TX_SYS_TX_RSP_STATUS_HW_ERR = 0, 1368 TX_SYS_TX_RSP_STATUS_UR_ERR = 1, 1369 TX_SYS_TX_RSP_STATUS_PRIV_ERR = 2, 1370 } NV2080_CTRL_NVLINK_INJECT_TLC_TX_SYS_REPORT_ERROR_TYPE; 1371 1372 typedef enum NV2080_CTRL_NVLINK_INJECT_TLC_RX_LNK_REPORT_ERROR_TYPE { 1373 RX_LNK_RX_RSP_STATUS_HW_ERR = 0, 1374 RX_LNK_RX_RSP_STATUS_UR_ERR = 1, 1375 RX_LNK_RX_RSP_STATUS_PRIV_ERR = 2, 1376 } NV2080_CTRL_NVLINK_INJECT_TLC_RX_LNK_REPORT_ERROR_TYPE; 1377 1378 typedef union NV2080_CTRL_NVLINK_INJECT_TLC_ERROR_TYPE { 1379 NV2080_CTRL_NVLINK_INJECT_TLC_TX_SYS_REPORT_ERROR_TYPE txSysErrorType; 1380 NV2080_CTRL_NVLINK_INJECT_TLC_RX_LNK_REPORT_ERROR_TYPE rxLnkErrorType; 1381 } NV2080_CTRL_NVLINK_INJECT_TLC_ERROR_TYPE; 1382 1383 1384 #define NV2080_CTRL_NVLINK_INJECT_TLC_ERROR_PARAMS_MESSAGE_ID (0xFU) 1385 1386 typedef struct NV2080_CTRL_NVLINK_INJECT_TLC_ERROR_PARAMS { 1387 NvU32 linkId; 1388 NV2080_CTRL_NVLINK_INJECT_TLC_ERROR_DEVICE device; 1389 NvBool bBroadcast; 1390 NV2080_CTRL_NVLINK_INJECT_TLC_ERROR_TYPE errorType; 1391 } NV2080_CTRL_NVLINK_INJECT_TLC_ERROR_PARAMS; 1392 1393 1394 1395 /* 1396 * NV2080_CTRL_CMD_NVLINK_GET_LINK_FOM_VALUES 1397 * 1398 * This command returns the per-lane Figure Of Merit (FOM) Values from a link 1399 * 1400 * [in] linkId 1401 * The NVLink link ID to report FOM values for 1402 * [out] numLanes 1403 * This field specifies the no. of lanes per link 1404 * [out] figureOfMeritValues 1405 * This field contains the FOM values per lane 1406 * 1407 */ 1408 #define NV2080_CTRL_CMD_NVLINK_GET_LINK_FOM_VALUES (0x20803011U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_CMD_NVLINK_GET_LINK_FOM_VALUES_PARAMS_MESSAGE_ID" */ 1409 1410 #define NV2080_CTRL_NVLINK_MAX_LANES 4U 1411 1412 #define NV2080_CTRL_CMD_NVLINK_GET_LINK_FOM_VALUES_PARAMS_MESSAGE_ID (0x11U) 1413 1414 typedef struct NV2080_CTRL_CMD_NVLINK_GET_LINK_FOM_VALUES_PARAMS { 1415 NvU32 linkId; 1416 NvU8 numLanes; 1417 NvU16 figureOfMeritValues[NV2080_CTRL_NVLINK_MAX_LANES]; 1418 } NV2080_CTRL_CMD_NVLINK_GET_LINK_FOM_VALUES_PARAMS; 1419 1420 /* 1421 * NV2080_CTRL_NVLINK_SET_NVLINK_PEER 1422 * 1423 * This command sets/unsets the USE_NVLINK_PEER bit for a given 1424 * mask of peers 1425 * 1426 * [in] peerMask 1427 * Mask of Peer IDs for which USE_NVLINK_PEER needs to be updated 1428 * [in] bEnable 1429 * Whether the bit needs to be set or unset 1430 * 1431 * Possible status values returned are: 1432 * NV_OK 1433 * If the USE_NVLINK_PEER bit was updated successfully 1434 * NV_ERR_NOT_SUPPORTED 1435 * If NVLINK is not supported on the chip, or 1436 * If unsetting USE_NVLINK_PEER bit is not supported 1437 * 1438 * NOTE: This is only supported on Windows 1439 * 1440 */ 1441 #define NV2080_CTRL_CMD_NVLINK_SET_NVLINK_PEER (0x20803012U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_SET_NVLINK_PEER_PARAMS_MESSAGE_ID" */ 1442 1443 #define NV2080_CTRL_NVLINK_SET_NVLINK_PEER_PARAMS_MESSAGE_ID (0x12U) 1444 1445 typedef struct NV2080_CTRL_NVLINK_SET_NVLINK_PEER_PARAMS { 1446 NvU32 peerMask; 1447 NvBool bEnable; 1448 } NV2080_CTRL_NVLINK_SET_NVLINK_PEER_PARAMS; 1449 1450 /* 1451 * NV2080_CTRL_CMD_NVLINK_READ_UPHY_PAD_LANE_REG 1452 * 1453 * This command packs the lane and addr values into NV_PMINION_MISC_0_SCRATCH_SWRW_0 1454 * and then issues a READPADLANEREG DLCMD to minion for the desired link. Only one DLCMD 1455 * at a time can be issued to any given link. 1456 * 1457 * After this command completes it is necessary to read the appropriate 1458 * NV_PNVL_BR0_PAD_CTL_7_CFG_RDATA register to retrieve the results of the read 1459 * Only GV100 should read NV_PNVL_BR0_PAD_CTL_7_CFG_RDATA. 1460 * From TU102+ the ctrl the required data would be updated in phyConfigData. 1461 * 1462 * [in] linkId 1463 * Link whose pad lane register is being read 1464 * [in] lane 1465 * Lane whose pad lane register is being read 1466 * [in] addr 1467 * Address of the pad lane register to read 1468 * [out] phyConfigData 1469 * Provides phyconfigaddr and landid 1470 * 1471 * Possible status values returned are: 1472 * NV_OK 1473 * If the minion command completed successfully 1474 * NV_ERR_NOT_SUPPORTED 1475 * If NVLINK is not supported on the chip 1476 * NV_ERR_INVALID_ARGUMENT 1477 * If the link is not enabled on the GPU or the lane is invalid 1478 * NV_ERR_TIMEOUT 1479 * If a timeout occurred waiting for minion response 1480 */ 1481 #define NV2080_CTRL_CMD_NVLINK_READ_UPHY_PAD_LANE_REG (0x20803013U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_READ_UPHY_PAD_LANE_REG_PARAMS_MESSAGE_ID" */ 1482 1483 #define NV2080_CTRL_NVLINK_READ_UPHY_PAD_LANE_REG_PARAMS_MESSAGE_ID (0x13U) 1484 1485 typedef struct NV2080_CTRL_NVLINK_READ_UPHY_PAD_LANE_REG_PARAMS { 1486 NvU8 linkId; 1487 NvU8 lane; 1488 NvU16 addr; 1489 NvU32 phyConfigData; 1490 } NV2080_CTRL_NVLINK_READ_UPHY_PAD_LANE_REG_PARAMS; 1491 1492 /* 1493 * Structure to store the ECC error data. 1494 * valid 1495 * Is the lane valid or not 1496 * eccErrorValue 1497 * Value of the Error. 1498 * overflowed 1499 * If the error overflowed or not 1500 */ 1501 typedef struct NV2080_CTRL_NVLINK_LANE_ERROR { 1502 NvBool bValid; 1503 NvU32 eccErrorValue; 1504 NvBool overflowed; 1505 } NV2080_CTRL_NVLINK_LANE_ERROR; 1506 1507 /* 1508 * Structure to store ECC error data for Links 1509 * errorLane array index corresponds to the lane number. 1510 * 1511 * errorLane[] 1512 * Stores the ECC error data per lane. 1513 */ 1514 typedef struct NV2080_CTRL_NVLINK_LINK_ECC_ERROR { 1515 NV2080_CTRL_NVLINK_LANE_ERROR errorLane[NV2080_CTRL_NVLINK_MAX_LANES]; 1516 NvU32 eccDecFailed; 1517 NvBool eccDecFailedOverflowed; 1518 } NV2080_CTRL_NVLINK_LINK_ECC_ERROR; 1519 1520 /* 1521 * NV2080_CTRL_NVLINK_GET_NVLINK_ECC_ERRORS 1522 * 1523 * Control to get the values of ECC ERRORS 1524 * 1525 * Parameters: 1526 * linkMask [IN] 1527 * Links on which the ECC error data requested 1528 * A valid link/port mask returned by the port masks returned by 1529 * NVSWITCH_GET_INFO 1530 * errorLink[] [OUT] 1531 * Stores the ECC error related information for each link. 1532 * errorLink array index corresponds to the link Number. 1533 */ 1534 1535 #define NV2080_CTRL_NVLINK_GET_NVLINK_ECC_ERRORS_PARAMS_MESSAGE_ID (0x14U) 1536 1537 typedef struct NV2080_CTRL_NVLINK_GET_NVLINK_ECC_ERRORS_PARAMS { 1538 NvU32 linkMask; 1539 NV2080_CTRL_NVLINK_LINK_ECC_ERROR errorLink[NV2080_CTRL_NVLINK_MAX_LINKS]; 1540 } NV2080_CTRL_NVLINK_GET_NVLINK_ECC_ERRORS_PARAMS; 1541 1542 1543 #define NV2080_CTRL_CMD_NVLINK_GET_NVLINK_ECC_ERRORS (0x20803014U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_GET_NVLINK_ECC_ERRORS_PARAMS_MESSAGE_ID" */ 1544 1545 // Nvlink throughput counters reading data flits in TX 1546 #define NV2080_CTRL_NVLINK_READ_TP_COUNTERS_TYPE_DATA_TX 0U 1547 1548 // Nvlink throughput counters reading data flits in RX 1549 #define NV2080_CTRL_NVLINK_READ_TP_COUNTERS_TYPE_DATA_RX 1U 1550 1551 // Nvlink throughput counters reading all flits in TX 1552 #define NV2080_CTRL_NVLINK_READ_TP_COUNTERS_TYPE_RAW_TX 2U 1553 1554 // Nvlink throughput counters reading all flits in RX 1555 #define NV2080_CTRL_NVLINK_READ_TP_COUNTERS_TYPE_RAW_RX 3U 1556 1557 #define NV2080_CTRL_NVLINK_READ_TP_COUNTERS_TYPE_MAX 4U 1558 1559 /* 1560 * NV2080_CTRL_CMD_NVLINK_READ_TP_COUNTERS 1561 * 1562 * Reads reserved monotonically increasing NVLINK throughput counters for given linkIds 1563 * 1564 * [in] counterMask 1565 * Mask of counter types to be queried 1566 * One of NV2080_CTRL_NVLINK_READ_TP_COUNTERS_TYPE_* macros 1567 * [in] linkMask 1568 * Mask of links to be queried 1569 * [out] value 1570 * Throughput counter value returned 1571 * 1572 * Possible status values returned are: 1573 * NV_OK 1574 * If command completed successfully 1575 * NV_ERR_NOT_SUPPORTED 1576 * If NVLINK is not supported on the chip 1577 * NV_ERR_INVALID_ARGUMENT 1578 * If numLinks is out-of-range or requested link is inactive 1579 * 1580 * Note: 1581 * The following commands will be deprecated in favor of NV2080_CTRL_CMD_NVLINK_READ_TP_COUNTERS: 1582 * NV90CC_CTRL_CMD_NVLINK_GET_COUNTERS 1583 * NV2080_CTRL_CMD_NVLINK_GET_COUNTERS 1584 * Other commands that will be deprecated due to the change in design: 1585 * NV90CC_CTRL_CMD_NVLINK_RESERVE_COUNTERS 1586 * NV90CC_CTRL_CMD_NVLINK_RELEASE_COUNTERS 1587 * NV90CC_CTRL_CMD_NVLINK_SET_COUNTERS_FROZEN 1588 * NV90CC_CTRL_CMD_NVLINK_GET_TL_COUNTER_CFG 1589 * NV90CC_CTRL_CMD_NVLINK_SET_TL_COUNTER_CFG 1590 * NV90CC_CTRL_CMD_NVLINK_CLEAR_COUNTERS 1591 * 1592 * Also, note that there is no counter overflow handling for these calls. 1593 * These counters would be counting in flits and assuming 25GB/s bandwidth per link, 1594 * with traffic flowing continuously, it would take 174 years for overflow to happen. 1595 * It is reasonable to assume an overflow will not occur within the GPU operation, 1596 * given that the counters get reset at system reboot or GPU reset. Counters are 63-bit. 1597 */ 1598 1599 typedef struct NV2080_CTRL_NVLINK_READ_TP_COUNTERS_VALUES { 1600 NV_DECLARE_ALIGNED(NvU64 value[NV2080_CTRL_NVLINK_READ_TP_COUNTERS_TYPE_MAX], 8); 1601 } NV2080_CTRL_NVLINK_READ_TP_COUNTERS_VALUES; 1602 1603 #define NV2080_CTRL_NVLINK_READ_TP_COUNTERS_PARAMS_MESSAGE_ID (0x15U) 1604 1605 typedef struct NV2080_CTRL_NVLINK_READ_TP_COUNTERS_PARAMS { 1606 NvU16 counterMask; 1607 NV_DECLARE_ALIGNED(NvU64 linkMask, 8); 1608 NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_READ_TP_COUNTERS_VALUES counters[NV2080_CTRL_NVLINK_MAX_LINKS], 8); 1609 } NV2080_CTRL_NVLINK_READ_TP_COUNTERS_PARAMS; 1610 1611 #define NV2080_CTRL_CMD_NVLINK_READ_TP_COUNTERS (0x20803015U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_READ_TP_COUNTERS_PARAMS_MESSAGE_ID" */ 1612 1613 /* 1614 * NV2080_CTRL_CMD_NVLINK_LOCK_LINK_POWER_STATE 1615 * 1616 * This command locks the link power state so that RM doesn't modify the state 1617 * of the link during pstate switch. 1618 * 1619 * [in] linkMask Links for which power mode needs to be locked. 1620 */ 1621 #define NV2080_CTRL_CMD_NVLINK_LOCK_LINK_POWER_STATE (0x20803016U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_CMD_NVLINK_LOCK_LINK_POWER_STATE_PARAMS_MESSAGE_ID" */ 1622 1623 #define NV2080_CTRL_CMD_NVLINK_LOCK_LINK_POWER_STATE_PARAMS_MESSAGE_ID (0x16U) 1624 1625 typedef struct NV2080_CTRL_CMD_NVLINK_LOCK_LINK_POWER_STATE_PARAMS { 1626 NvBool bLockPowerMode; 1627 } NV2080_CTRL_CMD_NVLINK_LOCK_LINK_POWER_STATE_PARAMS; 1628 1629 /* 1630 * NV2080_CTRL_CMD_NVLINK_ENABLE_NVLINK_PEER 1631 * 1632 * This command is used to enable RM NVLink enabled peer state. 1633 * Note: This just updates the RM state. To reflect the state in the registers, 1634 * use NV2080_CTRL_CMD_NVLINK_SET_NVLINK_PEER 1635 * 1636 * [in] peerMask 1637 * Mask of Peer IDs for which USE_NVLINK_PEER needs to be enabled 1638 * [in] bEnable 1639 * Whether the bit needs to be set or unset 1640 * 1641 * Possible status values returned are: 1642 * NV_OK 1643 * If the USE_NVLINK_PEER bit was enabled successfully 1644 * NV_ERR_NOT_SUPPORTED 1645 * If NVLINK is not supported on the chip, or 1646 * If unsetting USE_NVLINK_PEER bit is not supported 1647 * 1648 */ 1649 #define NV2080_CTRL_CMD_NVLINK_ENABLE_NVLINK_PEER (0x20803017U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_ENABLE_NVLINK_PEER_PARAMS_MESSAGE_ID" */ 1650 1651 #define NV2080_CTRL_NVLINK_ENABLE_NVLINK_PEER_PARAMS_MESSAGE_ID (0x17U) 1652 1653 typedef struct NV2080_CTRL_NVLINK_ENABLE_NVLINK_PEER_PARAMS { 1654 NvU32 peerMask; 1655 NvBool bEnable; 1656 } NV2080_CTRL_NVLINK_ENABLE_NVLINK_PEER_PARAMS; 1657 1658 #define NV2080_CTRL_NVLINK_GET_LP_COUNTERS_COUNT_TX_NVHS 0U 1659 #define NV2080_CTRL_NVLINK_GET_LP_COUNTERS_COUNT_TX_EIGHTH 1U 1660 #define NV2080_CTRL_NVLINK_GET_LP_COUNTERS_COUNT_TX_OTHER 2U 1661 #define NV2080_CTRL_NVLINK_GET_LP_COUNTERS_NUM_TX_LP_ENTER 3U 1662 #define NV2080_CTRL_NVLINK_GET_LP_COUNTERS_NUM_TX_LP_EXIT 4U 1663 #define NV2080_CTRL_NVLINK_GET_LP_COUNTERS_COUNT_TX_SLEEP 5U 1664 #define NV2080_CTRL_NVLINK_GET_LP_COUNTERS_MAX_COUNTERS 6U 1665 1666 /* 1667 * NV2080_CTRL_CMD_NVLINK_GET_LP_COUNTERS 1668 * 1669 * Reads NVLINK low power counters for given linkId 1670 * 1671 * [in] linkId 1672 * ID of the link to be queried 1673 * [in,out] counterValidMask 1674 * Mask of valid counters 1675 * [out] counterValues 1676 * Low power counter values returned 1677 * 1678 * Possible status values returned are: 1679 * NV_OK 1680 * If command completed successfully 1681 * NV_ERR_NOT_SUPPORTED 1682 * If NVLINK is not supported on the chip 1683 * NV_ERR_INVALID_ARGUMENT 1684 * If linkId is out-of-range or requested link is inactive 1685 */ 1686 1687 #define NV2080_CTRL_NVLINK_GET_LP_COUNTERS_PARAMS_MESSAGE_ID (0x18U) 1688 1689 typedef struct NV2080_CTRL_NVLINK_GET_LP_COUNTERS_PARAMS { 1690 NvU32 linkId; 1691 NvU32 counterValidMask; 1692 NvU32 counterValues[NV2080_CTRL_NVLINK_GET_LP_COUNTERS_MAX_COUNTERS]; 1693 } NV2080_CTRL_NVLINK_GET_LP_COUNTERS_PARAMS; 1694 1695 #define NV2080_CTRL_CMD_NVLINK_GET_LP_COUNTERS (0x20803018U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_GET_LP_COUNTERS_PARAMS_MESSAGE_ID" */ 1696 1697 /* 1698 * NVLINK Link states 1699 * These should ALWAYS match the nvlink core library defines in nvlink.h 1700 */ 1701 #define NV2080_NVLINK_CORE_LINK_STATE_OFF 0x00U 1702 #define NV2080_NVLINK_CORE_LINK_STATE_HS 0x01U 1703 #define NV2080_NVLINK_CORE_LINK_STATE_SAFE 0x02U 1704 #define NV2080_NVLINK_CORE_LINK_STATE_FAULT 0x03U 1705 #define NV2080_NVLINK_CORE_LINK_STATE_RECOVERY 0x04U 1706 #define NV2080_NVLINK_CORE_LINK_STATE_FAIL 0x05U 1707 #define NV2080_NVLINK_CORE_LINK_STATE_DETECT 0x06U 1708 #define NV2080_NVLINK_CORE_LINK_STATE_RESET 0x07U 1709 #define NV2080_NVLINK_CORE_LINK_STATE_ENABLE_PM 0x08U 1710 #define NV2080_NVLINK_CORE_LINK_STATE_DISABLE_PM 0x09U 1711 #define NV2080_NVLINK_CORE_LINK_STATE_SLEEP 0x0AU 1712 #define NV2080_NVLINK_CORE_LINK_STATE_SAVE_STATE 0x0BU 1713 #define NV2080_NVLINK_CORE_LINK_STATE_RESTORE_STATE 0x0CU 1714 #define NV2080_NVLINK_CORE_LINK_STATE_PRE_HS 0x0EU 1715 #define NV2080_NVLINK_CORE_LINK_STATE_DISABLE_ERR_DETECT 0x0FU 1716 #define NV2080_NVLINK_CORE_LINK_STATE_LANE_DISABLE 0x10U 1717 #define NV2080_NVLINK_CORE_LINK_STATE_LANE_SHUTDOWN 0x11U 1718 #define NV2080_NVLINK_CORE_LINK_STATE_TRAFFIC_SETUP 0x12U 1719 #define NV2080_NVLINK_CORE_LINK_STATE_INITPHASE1 0x13U 1720 #define NV2080_NVLINK_CORE_LINK_STATE_INITNEGOTIATE 0x14U 1721 #define NV2080_NVLINK_CORE_LINK_STATE_POST_INITNEGOTIATE 0x15U 1722 #define NV2080_NVLINK_CORE_LINK_STATE_INITOPTIMIZE 0x16U 1723 #define NV2080_NVLINK_CORE_LINK_STATE_POST_INITOPTIMIZE 0x17U 1724 #define NV2080_NVLINK_CORE_LINK_STATE_DISABLE_HEARTBEAT 0x18U 1725 #define NV2080_NVLINK_CORE_LINK_STATE_CONTAIN 0x19U 1726 #define NV2080_NVLINK_CORE_LINK_STATE_INITTL 0x1AU 1727 #define NV2080_NVLINK_CORE_LINK_STATE_INITPHASE5 0x1BU 1728 #define NV2080_NVLINK_CORE_LINK_STATE_ALI 0x1CU 1729 #define NV2080_NVLINK_CORE_LINK_STATE_ACTIVE_PENDING 0x1DU 1730 #define NV2080_NVLINK_CORE_LINK_STATE_INVALID 0xFFU 1731 1732 /* 1733 * NVLINK TX Sublink states 1734 * These should ALWAYS match the nvlink core library defines in nvlink.h 1735 */ 1736 #define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_HS 0x00U 1737 #define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_SINGLE_LANE 0x04U 1738 #define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_LOW_POWER 0x04U 1739 #define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_TRAIN 0x05U 1740 #define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_SAFE 0x06U 1741 #define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_OFF 0x07U 1742 #define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_COMMON_MODE 0x08U 1743 #define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_COMMON_MODE_DISABLE 0x09U 1744 #define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_DATA_READY 0x0AU 1745 #define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_EQ 0x0BU 1746 #define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_PRBS_EN 0x0CU 1747 #define NV2080_NVLINK_CORE_SUBLINK_STATE_TX_POST_HS 0x0DU 1748 1749 /* 1750 * NVLINK RX Sublink states 1751 * These should ALWAYS match the nvlink core library defines in nvlink.h 1752 */ 1753 #define NV2080_NVLINK_CORE_SUBLINK_STATE_RX_HS 0x00U 1754 #define NV2080_NVLINK_CORE_SUBLINK_STATE_RX_SINGLE_LANE 0x04U 1755 #define NV2080_NVLINK_CORE_SUBLINK_STATE_RX_LOW_POWER 0x04U 1756 #define NV2080_NVLINK_CORE_SUBLINK_STATE_RX_TRAIN 0x05U 1757 #define NV2080_NVLINK_CORE_SUBLINK_STATE_RX_SAFE 0x06U 1758 #define NV2080_NVLINK_CORE_SUBLINK_STATE_RX_OFF 0x07U 1759 #define NV2080_NVLINK_CORE_SUBLINK_STATE_RX_RXCAL 0x08U 1760 #define NV2080_NVLINK_CORE_SUBLINK_STATE_RX_INIT_TERM 0x09U 1761 1762 /* 1763 * Link training seed values 1764 * These should ALWAYS match the values defined in nvlink.h 1765 */ 1766 #define NV2080_CTRL_NVLINK_MAX_SEED_NUM 6U 1767 #define NV2080_CTRL_NVLINK_MAX_SEED_BUFFER_SIZE (0x7U) /* finn: Evaluated from "NV2080_CTRL_NVLINK_MAX_SEED_NUM + 1" */ 1768 1769 // NVLINK callback types 1770 #define NV2080_CTRL_NVLINK_CALLBACK_TYPE_GET_DL_LINK_MODE 0x00U 1771 #define NV2080_CTRL_NVLINK_CALLBACK_TYPE_SET_DL_LINK_MODE 0x01U 1772 #define NV2080_CTRL_NVLINK_CALLBACK_TYPE_GET_TL_LINK_MODE 0x02U 1773 #define NV2080_CTRL_NVLINK_CALLBACK_TYPE_SET_TL_LINK_MODE 0x03U 1774 #define NV2080_CTRL_NVLINK_CALLBACK_TYPE_GET_TX_SUBLINK_MODE 0x04U 1775 #define NV2080_CTRL_NVLINK_CALLBACK_TYPE_SET_TX_SUBLINK_MODE 0x05U 1776 #define NV2080_CTRL_NVLINK_CALLBACK_TYPE_GET_RX_SUBLINK_MODE 0x06U 1777 #define NV2080_CTRL_NVLINK_CALLBACK_TYPE_SET_RX_SUBLINK_MODE 0x07U 1778 #define NV2080_CTRL_NVLINK_CALLBACK_TYPE_GET_RX_SUBLINK_DETECT 0x08U 1779 #define NV2080_CTRL_NVLINK_CALLBACK_TYPE_SET_RX_SUBLINK_DETECT 0x09U 1780 #define NV2080_CTRL_NVLINK_CALLBACK_TYPE_WRITE_DISCOVERY_TOKEN 0x0AU 1781 #define NV2080_CTRL_NVLINK_CALLBACK_TYPE_READ_DISCOVERY_TOKEN 0x0BU 1782 #define NV2080_CTRL_NVLINK_CALLBACK_TYPE_TRAINING_COMPLETE 0x0CU 1783 #define NV2080_CTRL_NVLINK_CALLBACK_TYPE_GET_UPHY_LOAD 0x0DU 1784 1785 /* 1786 * Structure to store the GET_DL_MODE callback params. 1787 * mode 1788 * The current Nvlink DL mode 1789 */ 1790 typedef struct NV2080_CTRL_NVLINK_CALLBACK_GET_DL_LINK_MODE_PARAMS { 1791 NvU32 mode; 1792 } NV2080_CTRL_NVLINK_CALLBACK_GET_DL_LINK_MODE_PARAMS; 1793 1794 /* 1795 * Structure to store the SET_DL_LINK_MODE callback OFF params 1796 * seedData 1797 * The output seed data 1798 */ 1799 typedef struct NV2080_CTRL_NVLINK_SET_DL_LINK_MODE_OFF_PARAMS { 1800 NvU32 seedData[NV2080_CTRL_NVLINK_MAX_SEED_BUFFER_SIZE]; 1801 } NV2080_CTRL_NVLINK_SET_DL_LINK_MODE_OFF_PARAMS; 1802 1803 /* 1804 * Structure to store the SET_DL_LINK_MODE callback PRE_HS params 1805 * remoteDeviceType 1806 * The input remote Device Type 1807 * ipVerDlPl 1808 * The input DLPL version 1809 */ 1810 typedef struct NV2080_CTRL_NVLINK_SET_DL_LINK_MODE_PRE_HS_PARAMS { 1811 NvU32 remoteDeviceType; 1812 NvU32 ipVerDlPl; 1813 } NV2080_CTRL_NVLINK_SET_DL_LINK_MODE_PRE_HS_PARAMS; 1814 1815 /* 1816 * Structure to store SET_DL_LINK_MODE callback INIT_PHASE1 params 1817 * seedData[] 1818 * The input seed data 1819 */ 1820 typedef struct NV2080_CTRL_NVLINK_SET_DL_LINK_MODE_INIT_PHASE1_PARAMS { 1821 NvU32 seedData[NV2080_CTRL_NVLINK_MAX_SEED_BUFFER_SIZE]; 1822 } NV2080_CTRL_NVLINK_SET_DL_LINK_MODE_INIT_PHASE1_PARAMS; 1823 1824 /* 1825 * Structure to store the Nvlink Remote and Local SID info 1826 * remoteSid 1827 * The output remote SID 1828 * remoteDeviceType 1829 * The output remote Device Type 1830 * remoteLinkId 1831 * The output remote link ID 1832 * localSid 1833 * The output local SID 1834 */ 1835 typedef struct NV2080_CTRL_NVLINK_REMOTE_LOCAL_SID_INFO { 1836 NV_DECLARE_ALIGNED(NvU64 remoteSid, 8); 1837 NvU32 remoteDeviceType; 1838 NvU32 remoteLinkId; 1839 NV_DECLARE_ALIGNED(NvU64 localSid, 8); 1840 } NV2080_CTRL_NVLINK_REMOTE_LOCAL_SID_INFO; 1841 1842 /* 1843 * Structure to store the SET_DL_LINK_MODE callback POST_INITNEGOTIATE params 1844 * bInitnegotiateConfigGood 1845 * The output bool if the config is good 1846 * remoteLocalSidInfo 1847 * The output structure containing the Nvlink Remote/Local SID info 1848 */ 1849 typedef struct NV2080_CTRL_NVLINK_SET_DL_LINK_MODE_POST_INITNEGOTIATE_PARAMS { 1850 NvBool bInitnegotiateConfigGood; 1851 NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_REMOTE_LOCAL_SID_INFO remoteLocalSidInfo, 8); 1852 } NV2080_CTRL_NVLINK_SET_DL_LINK_MODE_POST_INITNEGOTIATE_PARAMS; 1853 1854 /* 1855 * Structure to store the SET_DL_LINK_MODE callback POST_INITOPTIMIZE params 1856 * bPollDone 1857 * The output bool if the polling has finished 1858 */ 1859 typedef struct NV2080_CTRLNVLINK_SET_DL_LINK_MODE_POST_INITOPTIMIZE_PARAMS { 1860 NvBool bPollDone; 1861 } NV2080_CTRLNVLINK_SET_DL_LINK_MODE_POST_INITOPTIMIZE_PARAMS; 1862 1863 /* 1864 * Structure to store the SET_DL_LINK_MODE callback params 1865 * mode 1866 * The input nvlink state to set 1867 * bSync 1868 * The input sync boolean 1869 * linkMode 1870 * The input link mode to be set for the callback 1871 */ 1872 typedef struct NV2080_CTRL_NVLINK_CALLBACK_SET_DL_LINK_MODE_PARAMS { 1873 NV_DECLARE_ALIGNED(NvU64 mode, 8); 1874 NvBool bSync; 1875 NvU32 linkMode; 1876 union { 1877 NV2080_CTRL_NVLINK_SET_DL_LINK_MODE_OFF_PARAMS linkModeOffParams; 1878 NV2080_CTRL_NVLINK_SET_DL_LINK_MODE_PRE_HS_PARAMS linkModePreHsParams; 1879 NV2080_CTRL_NVLINK_SET_DL_LINK_MODE_INIT_PHASE1_PARAMS linkModeInitPhase1Params; 1880 NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_SET_DL_LINK_MODE_POST_INITNEGOTIATE_PARAMS linkModePostInitNegotiateParams, 8); 1881 NV2080_CTRLNVLINK_SET_DL_LINK_MODE_POST_INITOPTIMIZE_PARAMS linkModePostInitOptimizeParams; 1882 } linkModeParams; 1883 } NV2080_CTRL_NVLINK_CALLBACK_SET_DL_LINK_MODE_PARAMS; 1884 1885 /* 1886 * Structure to store the GET_TL_MODE callback params. 1887 * mode 1888 * The current Nvlink TL mode 1889 */ 1890 typedef struct NV2080_CTRL_NVLINK_CALLBACK_GET_TL_LINK_MODE_PARAMS { 1891 NvU32 mode; 1892 } NV2080_CTRL_NVLINK_CALLBACK_GET_TL_LINK_MODE_PARAMS; 1893 1894 /* 1895 * Structure to store the SET_TL_LINK_MODE callback params 1896 * mode 1897 * The input nvlink mode to set 1898 * bSync 1899 * The input sync boolean 1900 */ 1901 typedef struct NV2080_CTRL_NVLINK_CALLBACK_SET_TL_LINK_MODE_PARAMS { 1902 NV_DECLARE_ALIGNED(NvU64 mode, 8); 1903 NvBool bSync; 1904 } NV2080_CTRL_NVLINK_CALLBACK_SET_TL_LINK_MODE_PARAMS; 1905 1906 /* 1907 * Structure to store the GET_RX/TX_SUBLINK_MODE callback params 1908 * sublinkMode 1909 * The current Sublink mode 1910 * sublinkSubMode 1911 * The current Sublink sub mode 1912 */ 1913 typedef struct NV2080_CTRL_NVLINK_CALLBACK_GET_SUBLINK_MODE_PARAMS { 1914 NvU32 sublinkMode; 1915 NvU32 sublinkSubMode; 1916 } NV2080_CTRL_NVLINK_CALLBACK_GET_SUBLINK_MODE_PARAMS; 1917 1918 /* 1919 * Structure to store the SET_TL_LINK_MODE callback params 1920 * mode 1921 * The input nvlink mode to set 1922 * bSync 1923 * The input sync boolean 1924 */ 1925 typedef struct NV2080_CTRL_NVLINK_CALLBACK_SET_TX_SUBLINK_MODE_PARAMS { 1926 NV_DECLARE_ALIGNED(NvU64 mode, 8); 1927 NvBool bSync; 1928 } NV2080_CTRL_NVLINK_CALLBACK_SET_TX_SUBLINK_MODE_PARAMS; 1929 1930 /* 1931 * Structure to store the SET_RX_SUBLINK_MODE callback params 1932 * mode 1933 * The input nvlink mode to set 1934 * bSync 1935 * The input sync boolean 1936 */ 1937 typedef struct NV2080_CTRL_NVLINK_CALLBACK_SET_RX_SUBLINK_MODE_PARAMS { 1938 NV_DECLARE_ALIGNED(NvU64 mode, 8); 1939 NvBool bSync; 1940 } NV2080_CTRL_NVLINK_CALLBACK_SET_RX_SUBLINK_MODE_PARAMS; 1941 1942 /* 1943 * Structure to store the GET_RX_SUBLINK_DETECT callback params 1944 * laneRxdetStatusMask 1945 * The output RXDET per-lane status mask 1946 */ 1947 typedef struct NV2080_CTRL_NVLINK_CALLBACK_GET_RX_DETECT_PARAMS { 1948 NvU32 laneRxdetStatusMask; 1949 } NV2080_CTRL_NVLINK_CALLBACK_GET_RX_DETECT_PARAMS; 1950 1951 /* 1952 * Structure to store the SET_RX_DETECT callback params 1953 * bSync 1954 * The input bSync boolean 1955 */ 1956 typedef struct NV2080_CTRL_NVLINK_CALLBACK_SET_RX_DETECT_PARAMS { 1957 NvBool bSync; 1958 } NV2080_CTRL_NVLINK_CALLBACK_SET_RX_DETECT_PARAMS; 1959 1960 /* 1961 * Structure to store the RD_WR_DISCOVERY_TOKEN callback params 1962 * ipVerDlPl 1963 * The input DLPL version 1964 * token 1965 * The output token 1966 */ 1967 typedef struct NV2080_CTRL_NVLINK_CALLBACK_RD_WR_DISCOVERY_TOKEN_PARAMS { 1968 NvU32 ipVerDlPl; 1969 NV_DECLARE_ALIGNED(NvU64 token, 8); 1970 } NV2080_CTRL_NVLINK_CALLBACK_RD_WR_DISCOVERY_TOKEN_PARAMS; 1971 1972 /* 1973 * Structure to store the GET_UPHY_LOAD callback params 1974 * bUnlocked 1975 * The output unlocked boolean 1976 */ 1977 typedef struct NV2080_CTRL_NVLINK_CALLBACK_GET_UPHY_LOAD_PARAMS { 1978 NvBool bUnlocked; 1979 } NV2080_CTRL_NVLINK_CALLBACK_GET_UPHY_LOAD_PARAMS; 1980 1981 /* 1982 * Structure to store the Union of Callback params 1983 * type 1984 * The input type of callback to be executed 1985 */ 1986 typedef struct NV2080_CTRL_NVLINK_CALLBACK_TYPE { 1987 NvU8 type; 1988 union { 1989 NV2080_CTRL_NVLINK_CALLBACK_GET_DL_LINK_MODE_PARAMS getDlLinkMode; 1990 NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_CALLBACK_SET_DL_LINK_MODE_PARAMS setDlLinkMode, 8); 1991 NV2080_CTRL_NVLINK_CALLBACK_GET_TL_LINK_MODE_PARAMS getTlLinkMode; 1992 NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_CALLBACK_SET_TL_LINK_MODE_PARAMS setTlLinkMode, 8); 1993 NV2080_CTRL_NVLINK_CALLBACK_GET_SUBLINK_MODE_PARAMS getTxSublinkMode; 1994 NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_CALLBACK_SET_TX_SUBLINK_MODE_PARAMS setTxSublinkMode, 8); 1995 NV2080_CTRL_NVLINK_CALLBACK_GET_SUBLINK_MODE_PARAMS getRxSublinkMode; 1996 NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_CALLBACK_SET_RX_SUBLINK_MODE_PARAMS setRxSublinkMode, 8); 1997 NV2080_CTRL_NVLINK_CALLBACK_GET_RX_DETECT_PARAMS getRxSublinkDetect; 1998 NV2080_CTRL_NVLINK_CALLBACK_SET_RX_DETECT_PARAMS setRxSublinkDetect; 1999 NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_CALLBACK_RD_WR_DISCOVERY_TOKEN_PARAMS writeDiscoveryToken, 8); 2000 NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_CALLBACK_RD_WR_DISCOVERY_TOKEN_PARAMS readDiscoveryToken, 8); 2001 NV2080_CTRL_NVLINK_CALLBACK_GET_UPHY_LOAD_PARAMS getUphyLoad; 2002 } callbackParams; 2003 } NV2080_CTRL_NVLINK_CALLBACK_TYPE; 2004 2005 /* 2006 * NV2080_CTRL_CMD_NVLINK_CORE_CALLBACK 2007 * 2008 * Generic NvLink callback RPC to route commands to GSP 2009 * 2010 * [In] linkdId 2011 * ID of the link to be used 2012 * [In/Out] callBackType 2013 * Callback params 2014 */ 2015 #define NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS_MESSAGE_ID (0x19U) 2016 2017 typedef struct NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS { 2018 NvU32 linkId; 2019 NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_CALLBACK_TYPE callbackType, 8); 2020 } NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS; 2021 2022 #define NV2080_CTRL_CMD_NVLINK_CORE_CALLBACK (0x20803019U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_CORE_CALLBACK_PARAMS_MESSAGE_ID" */ 2023 2024 /* 2025 * NV2080_CTRL_CMD_NVLINK_GET_ALI_ENABLED 2026 * 2027 * Returns if ALI is enabled 2028 * 2029 * [Out] bEnableAli 2030 * Output boolean for ALI enablement 2031 */ 2032 #define NV2080_CTRL_NVLINK_GET_ALI_ENABLED_PARAMS_MESSAGE_ID (0x1aU) 2033 2034 typedef struct NV2080_CTRL_NVLINK_GET_ALI_ENABLED_PARAMS { 2035 NvBool bEnableAli; 2036 } NV2080_CTRL_NVLINK_GET_ALI_ENABLED_PARAMS; 2037 2038 #define NV2080_CTRL_CMD_NVLINK_GET_ALI_ENABLED (0x2080301aU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_GET_ALI_ENABLED_PARAMS_MESSAGE_ID" */ 2039 2040 /* 2041 * NV2080_CTRL_CMD_NVLINK_UPDATE_REMOTE_LOCAL_SID 2042 * 2043 * Update Remote and Local Sid info via GSP 2044 * 2045 * [In] linkId 2046 * ID of the link to be used 2047 * [Out] remoteLocalSidInfo 2048 * The output structure containing the Nvlink Remote/Local SID info 2049 */ 2050 #define NV2080_CTRL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS_MESSAGE_ID (0x1bU) 2051 2052 typedef struct NV2080_CTRL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS { 2053 NvU32 linkId; 2054 NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_REMOTE_LOCAL_SID_INFO remoteLocalSidInfo, 8); 2055 } NV2080_CTRL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS; 2056 2057 #define NV2080_CTRL_CMD_NVLINK_UPDATE_REMOTE_LOCAL_SID (0x2080301bU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_UPDATE_REMOTE_LOCAL_SID_PARAMS_MESSAGE_ID" */ 2058 2059 #define NV2080_CTRL_NVLINK_UPDATE_HSHUB_MUX_TYPE_PROGRAM 0x0U 2060 #define NV2080_CTRL_NVLINK_UPDATE_HSHUB_MUX_TYPE_RESET 0x1U 2061 2062 /* 2063 * NV2080_CTRL_CMD_NVLINK_UPDATE_HSHUB_MUX 2064 * 2065 * Generic Hshub Mux Update RPC to route commands to GSP 2066 * 2067 * [In] updateType 2068 * HSHUB Mux update type to program or reset Mux 2069 * [In] bSysMem 2070 * Boolean to differentiate between sysmen and peer mem 2071 * [In] peerMask 2072 * Mask of peer IDs. Only parsed when bSysMem is false 2073 */ 2074 #define NV2080_CTRL_NVLINK_UPDATE_HSHUB_MUX_PARAMS_MESSAGE_ID (0x1cU) 2075 2076 typedef struct NV2080_CTRL_NVLINK_UPDATE_HSHUB_MUX_PARAMS { 2077 NvBool updateType; 2078 NvBool bSysMem; 2079 NvU32 peerMask; 2080 } NV2080_CTRL_NVLINK_UPDATE_HSHUB_MUX_PARAMS; 2081 2082 #define NV2080_CTRL_CMD_NVLINK_UPDATE_HSHUB_MUX (0x2080301cU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_UPDATE_HSHUB_MUX_PARAMS_MESSAGE_ID" */ 2083 2084 /* 2085 * NV2080_CTRL_CMD_NVLINK_PRE_SETUP_NVLINK_PEER 2086 * 2087 * Performs all the necessary actions required before setting a peer on NVLink 2088 * 2089 * [In] peerId 2090 * Peer ID which will be set on NVLink 2091 * [In] peerLinkMask 2092 * Mask of links that connects the given peer 2093 * [In] bNvswitchConn 2094 * Is the GPU connected to NVSwitch 2095 */ 2096 #define NV2080_CTRL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS_MESSAGE_ID (0x1dU) 2097 2098 typedef struct NV2080_CTRL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS { 2099 NvU32 peerId; 2100 NvU32 peerLinkMask; 2101 NvBool bEgmPeer; 2102 NvBool bNvswitchConn; 2103 } NV2080_CTRL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS; 2104 #define NV2080_CTRL_CMD_NVLINK_PRE_SETUP_NVLINK_PEER (0x2080301dU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRE_SETUP_NVLINK_PEER_PARAMS_MESSAGE_ID" */ 2105 2106 /* 2107 * NV2080_CTRL_CMD_NVLINK_POST_SETUP_NVLINK_PEER 2108 * 2109 * Performs all the necessary actions required after setting a peer on NVLink 2110 * 2111 * [In] peerMask 2112 * Mask of Peer IDs which has been set on NVLink 2113 */ 2114 #define NV2080_CTRL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS_MESSAGE_ID (0x1eU) 2115 2116 typedef struct NV2080_CTRL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS { 2117 NvU32 peerMask; 2118 } NV2080_CTRL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS; 2119 #define NV2080_CTRL_CMD_NVLINK_POST_SETUP_NVLINK_PEER (0x2080301eU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_POST_SETUP_NVLINK_PEER_PARAMS_MESSAGE_ID" */ 2120 2121 #define NV2080_CTRL_NVLINK_REMOVE_NVLINK_MAPPING_TYPE_SYSMEM 0x1U 2122 #define NV2080_CTRL_NVLINK_REMOVE_NVLINK_MAPPING_TYPE_PEER 0x2U 2123 2124 /* 2125 * NV2080_CTRL_CMD_NVLINK_REMOVE_NVLINK_MAPPING 2126 * 2127 * Performs all the necessary actions required to remove NVLink mapping (sysmem or peer or both) 2128 * 2129 * [In] mapTypeMask 2130 * Remove NVLink mapping for the given map types (sysmem or peer or both) 2131 * [In] peerMask 2132 * Mask of Peer IDs which needs to be removed on NVLink 2133 * Only parsed if mapTypeMask accounts peer 2134 * [In] bL2Entry 2135 * Is the peer removal happening because links are entering L2 low power state? 2136 * Only parsed if mapTypeMask accounts peer 2137 */ 2138 #define NV2080_CTRL_NVLINK_REMOVE_NVLINK_MAPPING_PARAMS_MESSAGE_ID (0x1fU) 2139 2140 typedef struct NV2080_CTRL_NVLINK_REMOVE_NVLINK_MAPPING_PARAMS { 2141 NvU32 mapTypeMask; 2142 NvU32 peerMask; 2143 NvBool bL2Entry; 2144 } NV2080_CTRL_NVLINK_REMOVE_NVLINK_MAPPING_PARAMS; 2145 #define NV2080_CTRL_CMD_NVLINK_REMOVE_NVLINK_MAPPING (0x2080301fU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_REMOVE_NVLINK_MAPPING_PARAMS_MESSAGE_ID" */ 2146 2147 /* 2148 * NV2080_CTRL_CMD_NVLINK_SAVE_RESTORE_HSHUB_STATE 2149 * 2150 * Performs all the necessary actions required to save/restore HSHUB state during NVLink L2 entry/exit 2151 * 2152 * [In] bSave 2153 * Whether this is a save/restore operation 2154 * [In] linkMask 2155 * Mask of links for which HSHUB config registers need to be saved/restored 2156 */ 2157 #define NV2080_CTRL_NVLINK_SAVE_RESTORE_HSHUB_STATE_PARAMS_MESSAGE_ID (0x20U) 2158 2159 typedef struct NV2080_CTRL_NVLINK_SAVE_RESTORE_HSHUB_STATE_PARAMS { 2160 NvBool bSave; 2161 NvU32 linkMask; 2162 } NV2080_CTRL_NVLINK_SAVE_RESTORE_HSHUB_STATE_PARAMS; 2163 #define NV2080_CTRL_CMD_NVLINK_SAVE_RESTORE_HSHUB_STATE (0x20803020U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_SAVE_RESTORE_HSHUB_STATE_PARAMS_MESSAGE_ID" */ 2164 2165 #define NV2080_CTRL_NVLINK_PROGRAM_BUFFERREADY_FLAGS_SET (0x00000000) 2166 #define NV2080_CTRL_NVLINK_PROGRAM_BUFFERREADY_FLAGS_SAVE (0x00000001) 2167 #define NV2080_CTRL_NVLINK_PROGRAM_BUFFERREADY_FLAGS_RESTORE (0x00000002) 2168 2169 /* 2170 * NV2080_CTRL_CMD_NVLINK_PROGRAM_BUFFERREADY 2171 * 2172 * Performs all the necessary actions required to save/restore bufferready state during NVLink L2 entry/exit 2173 * 2174 * [In] flags 2175 * Whether to set, save or restore bufferready 2176 * [In] bSysmem 2177 * Whether to perform the operation for sysmem links or peer links 2178 * [In] peerLinkMask 2179 * Mask of peer links for which bufferready state need to be set/saved/restored 2180 */ 2181 #define NV2080_CTRL_NVLINK_PROGRAM_BUFFERREADY_PARAMS_MESSAGE_ID (0x21U) 2182 2183 typedef struct NV2080_CTRL_NVLINK_PROGRAM_BUFFERREADY_PARAMS { 2184 NvU32 flags; 2185 NvBool bSysmem; 2186 NvU32 peerLinkMask; 2187 } NV2080_CTRL_NVLINK_PROGRAM_BUFFERREADY_PARAMS; 2188 #define NV2080_CTRL_CMD_NVLINK_PROGRAM_BUFFERREADY (0x20803021U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PROGRAM_BUFFERREADY_PARAMS_MESSAGE_ID" */ 2189 2190 /* 2191 * NV2080_CTRL_CMD_NVLINK_UPDATE_CURRENT_CONFIG 2192 * 2193 * Performs all the necessary actions required to update the current Nvlink configuration 2194 * 2195 * [out] bNvlinkSysmemEnabled 2196 * Whether sysmem nvlink support was enabled 2197 */ 2198 #define NV2080_CTRL_NVLINK_UPDATE_CURRENT_CONFIG_PARAMS_MESSAGE_ID (0x22U) 2199 2200 typedef struct NV2080_CTRL_NVLINK_UPDATE_CURRENT_CONFIG_PARAMS { 2201 NvBool bNvlinkSysmemEnabled; 2202 } NV2080_CTRL_NVLINK_UPDATE_CURRENT_CONFIG_PARAMS; 2203 #define NV2080_CTRL_CMD_NVLINK_UPDATE_CURRENT_CONFIG (0x20803022U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_UPDATE_CURRENT_CONFIG_PARAMS_MESSAGE_ID" */ 2204 2205 // 2206 // Set the near end loopback mode using the following 2207 // Currently, three modes - NEA, NEDR, NEW 2208 // 2209 #define NV2080_CTRL_NVLINK_SET_LOOPBACK_MODE_DEFAULT (0x00000000) 2210 #define NV2080_CTRL_NVLINK_SET_LOOPBACK_MODE_NEA (0x00000001) 2211 #define NV2080_CTRL_NVLINK_SET_LOOPBACK_MODE_NEDR (0x00000002) 2212 #define NV2080_CTRL_NVLINK_SET_LOOPBACK_MODE_NEDW (0x00000003) 2213 2214 /* 2215 * NV2080_CTRL_CMD_NVLINK_SET_LOOPBACK_MODE 2216 * 2217 * Generic NvLink callback for MODS 2218 * 2219 * [In] linkdId 2220 * ID of the link to be used 2221 * [In] loopbackMode 2222 * This value will decide which loopback mode need to 2223 * set on the specified link. 2224 * Modes are NEA / NEDR / NEDW 2225 */ 2226 #define NV2080_CTRL_NVLINK_SET_LOOPBACK_MODE_PARAMS_MESSAGE_ID (0x23U) 2227 2228 typedef struct NV2080_CTRL_NVLINK_SET_LOOPBACK_MODE_PARAMS { 2229 NvU32 linkId; 2230 NvU8 loopbackMode; 2231 } NV2080_CTRL_NVLINK_SET_LOOPBACK_MODE_PARAMS; 2232 2233 #define NV2080_CTRL_CMD_NVLINK_SET_LOOPBACK_MODE (0x20803023U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_SET_LOOPBACK_MODE_PARAMS_MESSAGE_ID" */ 2234 2235 /* 2236 * NV2080_CTRL_CMD_NVLINK_UPDATE_PEER_LINK_MASK 2237 * 2238 * Synchronizes the peerLinkMask between CPU-RM and GSP-RM 2239 * 2240 * [In] gpuInst 2241 * Gpu instance 2242 * [In] peerLinkMask 2243 * Mask of links to the given peer GPU 2244 */ 2245 #define NV2080_CTRL_NVLINK_UPDATE_PEER_LINK_MASK_PARAMS_MESSAGE_ID (0x24U) 2246 2247 typedef struct NV2080_CTRL_NVLINK_UPDATE_PEER_LINK_MASK_PARAMS { 2248 NvU32 gpuInst; 2249 NvU32 peerLinkMask; 2250 } NV2080_CTRL_NVLINK_UPDATE_PEER_LINK_MASK_PARAMS; 2251 2252 #define NV2080_CTRL_CMD_NVLINK_UPDATE_PEER_LINK_MASK (0x20803024U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_UPDATE_PEER_LINK_MASK_PARAMS_MESSAGE_ID" */ 2253 2254 /* 2255 * NV2080_CTRL_CMD_NVLINK_UPDATE_LINK_CONNECTION 2256 * 2257 * Updates the remote connection information for a link 2258 * 2259 * [In] linkId 2260 * Id of the link to be used 2261 * [In] bConnected 2262 * Boolean that tracks whether the link is connected 2263 * [In] remoteDeviceType 2264 * Tracks whether the remote device is switch/gpu/ibmnpu/tegra 2265 * [In] remoteLinkNumber 2266 * Tracks the link number for the connected remote device 2267 */ 2268 #define NV2080_CTRL_NVLINK_UPDATE_LINK_CONNECTION_PARAMS_MESSAGE_ID (0x25U) 2269 2270 typedef struct NV2080_CTRL_NVLINK_UPDATE_LINK_CONNECTION_PARAMS { 2271 NV_DECLARE_ALIGNED(NvU64 remoteDeviceType, 8); 2272 NV_DECLARE_ALIGNED(NvU64 remoteChipSid, 8); 2273 NvU32 linkId; 2274 NvU32 laneRxdetStatusMask; 2275 NvU32 remoteLinkNumber; 2276 NvU32 remotePciDeviceId; 2277 NvU32 remoteDomain; 2278 NvU8 remoteBus; 2279 NvU8 remoteDevice; 2280 NvU8 remoteFunction; 2281 NvBool bConnected; 2282 } NV2080_CTRL_NVLINK_UPDATE_LINK_CONNECTION_PARAMS; 2283 2284 #define NV2080_CTRL_CMD_NVLINK_UPDATE_LINK_CONNECTION (0x20803025U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_UPDATE_LINK_CONNECTION_PARAMS_MESSAGE_ID" */ 2285 2286 /* 2287 * NV2080_CTRL_CMD_NVLINK_ENABLE_LINKS_POST_TOPOLOGY 2288 * 2289 * Enable links post topology via GSP 2290 * 2291 * [In] linkMask 2292 * Mask of links to enable 2293 * [Out] initializedLinks 2294 * Mask of links that were initialized 2295 */ 2296 #define NV2080_CTRL_NVLINK_ENABLE_LINKS_POST_TOPOLOGY_PARAMS_MESSAGE_ID (0x26U) 2297 2298 typedef struct NV2080_CTRL_NVLINK_ENABLE_LINKS_POST_TOPOLOGY_PARAMS { 2299 NvU32 linkMask; 2300 NvU32 initializedLinks; 2301 } NV2080_CTRL_NVLINK_ENABLE_LINKS_POST_TOPOLOGY_PARAMS; 2302 2303 #define NV2080_CTRL_CMD_NVLINK_ENABLE_LINKS_POST_TOPOLOGY (0x20803026U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_ENABLE_LINKS_POST_TOPOLOGY_PARAMS_MESSAGE_ID" */ 2304 2305 /* 2306 * NV2080_CTRL_CMD_NVLINK_PRE_LINK_TRAIN_ALI 2307 * 2308 * [In] linkMask 2309 * Mask of enabled links to train 2310 * [In] bSync 2311 * The input sync boolean 2312 */ 2313 #define NV2080_CTRL_NVLINK_PRE_LINK_TRAIN_ALI_PARAMS_MESSAGE_ID (0x27U) 2314 2315 typedef struct NV2080_CTRL_NVLINK_PRE_LINK_TRAIN_ALI_PARAMS { 2316 NvU32 linkMask; 2317 NvBool bSync; 2318 } NV2080_CTRL_NVLINK_PRE_LINK_TRAIN_ALI_PARAMS; 2319 2320 #define NV2080_CTRL_CMD_NVLINK_PRE_LINK_TRAIN_ALI (0x20803027U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRE_LINK_TRAIN_ALI_PARAMS_MESSAGE_ID" */ 2321 2322 // 2323 // Read Refresh counter - the pass/fail occurrences 2324 // 2325 2326 typedef struct NV2080_CTRL_NVLINK_PHY_REFRESH_STATUS_INFO { 2327 // requested links or not 2328 NvBool bValid; 2329 2330 // counters 2331 NvU16 passCount; 2332 NvU16 failCount; 2333 } NV2080_CTRL_NVLINK_PHY_REFRESH_STATUS_INFO; 2334 2335 #define NV2080_CTRL_NVLINK_MAX_LINK_COUNT 32 2336 2337 /* 2338 * NV2080_CTRL_CMD_NVLINK_GET_REFRESH_COUNTERS 2339 * 2340 * 2341 * [In] linkMask 2342 * Specifies for which links we want to read the counters 2343 * [Out] refreshCountPass 2344 * Count of number of times PHY refresh pass 2345 * [Out] refreshCountFail 2346 * Count of number of times PHY refresh fail 2347 */ 2348 #define NV2080_CTRL_NVLINK_GET_REFRESH_COUNTERS_PARAMS_MESSAGE_ID (0x28U) 2349 2350 typedef struct NV2080_CTRL_NVLINK_GET_REFRESH_COUNTERS_PARAMS { 2351 NvU32 linkMask; 2352 NV2080_CTRL_NVLINK_PHY_REFRESH_STATUS_INFO refreshCount[NV2080_CTRL_NVLINK_MAX_LINK_COUNT]; 2353 } NV2080_CTRL_NVLINK_GET_REFRESH_COUNTERS_PARAMS; 2354 2355 #define NV2080_CTRL_CMD_NVLINK_GET_REFRESH_COUNTERS (0x20803028U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_GET_REFRESH_COUNTERS_PARAMS_MESSAGE_ID" */ 2356 2357 // 2358 // Clear Refresh counter - the pass/fail occurrences 2359 // 2360 2361 /* 2362 * NV2080_CTRL_CMD_NVLINK_CLEAR_REFRESH_COUNTERS 2363 * 2364 * 2365 * [In] linkMask 2366 * Specifies for which links we want to clear the counters 2367 */ 2368 #define NV2080_CTRL_NVLINK_CLEAR_REFRESH_COUNTERS_PARAMS_MESSAGE_ID (0x29U) 2369 2370 typedef struct NV2080_CTRL_NVLINK_CLEAR_REFRESH_COUNTERS_PARAMS { 2371 NvU32 linkMask; 2372 } NV2080_CTRL_NVLINK_CLEAR_REFRESH_COUNTERS_PARAMS; 2373 2374 #define NV2080_CTRL_CMD_NVLINK_CLEAR_REFRESH_COUNTERS (0x20803029U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_CLEAR_REFRESH_COUNTERS_PARAMS_MESSAGE_ID" */ 2375 2376 /* 2377 * NV2080_CTRL_CMD_NVLINK_GET_LINK_MASK_POST_RX_DET 2378 * 2379 * Get link mask post Rx detection 2380 * 2381 * [Out] postRxDetLinkMask 2382 * Mask of links discovered 2383 */ 2384 #define NV2080_CTRL_NVLINK_GET_LINK_MASK_POST_RX_DET_PARAMS_MESSAGE_ID (0x2aU) 2385 2386 typedef struct NV2080_CTRL_NVLINK_GET_LINK_MASK_POST_RX_DET_PARAMS { 2387 NvU32 postRxDetLinkMask; 2388 } NV2080_CTRL_NVLINK_GET_LINK_MASK_POST_RX_DET_PARAMS; 2389 2390 #define NV2080_CTRL_CMD_NVLINK_GET_LINK_MASK_POST_RX_DET (0x2080302aU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_GET_LINK_MASK_POST_RX_DET_PARAMS_MESSAGE_ID" */ 2391 2392 /* 2393 * NV2080_CTRL_CMD_NVLINK_LINK_TRAIN_ALI 2394 * 2395 * [In] linkMask 2396 * Mask of enabled links to train 2397 * [In] bSync 2398 * The input sync boolean 2399 */ 2400 #define NV2080_CTRL_NVLINK_LINK_TRAIN_ALI_PARAMS_MESSAGE_ID (0x2bU) 2401 2402 typedef struct NV2080_CTRL_NVLINK_LINK_TRAIN_ALI_PARAMS { 2403 NvU32 linkMask; 2404 NvBool bSync; 2405 } NV2080_CTRL_NVLINK_LINK_TRAIN_ALI_PARAMS; 2406 2407 #define NV2080_CTRL_CMD_NVLINK_LINK_TRAIN_ALI (0x2080302bU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_LINK_TRAIN_ALI_PARAMS_MESSAGE_ID" */ 2408 2409 typedef struct NV2080_CTRL_NVLINK_DEVICE_LINK_VALUES { 2410 NvBool bValid; 2411 NvU8 linkId; 2412 NvU32 ioctrlId; 2413 NvU8 pllMasterLinkId; 2414 NvU8 pllSlaveLinkId; 2415 NvU32 ipVerDlPl; 2416 } NV2080_CTRL_NVLINK_DEVICE_LINK_VALUES; 2417 2418 /* 2419 * NV2080_CTRL_CMD_NVLINK_GET_NVLINK_DEVICE_INFO 2420 * 2421 * [Out] ioctrlMask 2422 * Mask of IOCTRLs discovered from PTOP device info table 2423 * [Out] ioctrlNumEntries 2424 * Number of IOCTRL entries in the PTOP device info table 2425 * [Out] ioctrlSize 2426 * Maximum number of entries in the PTOP device info table 2427 * [Out] discoveredLinks 2428 * Mask of links discovered from all the IOCTRLs 2429 * [Out] ipVerNvlink 2430 * IP revision of the NVLink HW 2431 * [Out] linkInfo 2432 * Per link information 2433 */ 2434 2435 #define NV2080_CTRL_NVLINK_GET_NVLINK_DEVICE_INFO_PARAMS_MESSAGE_ID (0x2cU) 2436 2437 typedef struct NV2080_CTRL_NVLINK_GET_NVLINK_DEVICE_INFO_PARAMS { 2438 NvU32 ioctrlMask; 2439 NvU8 ioctrlNumEntries; 2440 NvU32 ioctrlSize; 2441 NvU32 discoveredLinks; 2442 NvU32 ipVerNvlink; 2443 NV2080_CTRL_NVLINK_DEVICE_LINK_VALUES linkInfo[NV2080_CTRL_NVLINK_MAX_LINKS]; 2444 } NV2080_CTRL_NVLINK_GET_NVLINK_DEVICE_INFO_PARAMS; 2445 2446 #define NV2080_CTRL_CMD_NVLINK_GET_NVLINK_DEVICE_INFO (0x2080302cU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_GET_NVLINK_DEVICE_INFO_PARAMS_MESSAGE_ID" */ 2447 2448 #define NV2080_CTRL_NVLINK_MAX_LINKS_PER_IOCTRL_SW 6U 2449 2450 typedef struct NV2080_CTRL_NVLINK_DEVICE_IP_REVISION_VALUES { 2451 NvU32 ipVerIoctrl; 2452 NvU32 ipVerMinion; 2453 } NV2080_CTRL_NVLINK_DEVICE_IP_REVISION_VALUES; 2454 2455 /* 2456 * NV2080_CTRL_CMD_NVLINK_GET_IOCTRL_DEVICE_INFO 2457 * 2458 * [In] ioctrlIdx 2459 * IOCTRL index 2460 * [Out] PublicId 2461 * PublicId of the IOCTRL discovered 2462 * [Out] localDiscoveredLinks 2463 * Mask of discovered links local to the IOCTRL 2464 * [Out] localGlobalLinkOffset 2465 * Global link offsets for the locally discovered links 2466 * [Out] ioctrlDiscoverySize 2467 * IOCTRL table size 2468 * [Out] numDevices 2469 * Number of devices discovered from the IOCTRL 2470 * [Out] deviceIpRevisions 2471 * IP revisions for the devices discovered in the IOCTRL 2472 */ 2473 2474 #define NV2080_CTRL_NVLINK_GET_IOCTRL_DEVICE_INFO_PARAMS_MESSAGE_ID (0x2dU) 2475 2476 typedef struct NV2080_CTRL_NVLINK_GET_IOCTRL_DEVICE_INFO_PARAMS { 2477 NvU32 ioctrlIdx; 2478 NvU32 PublicId; 2479 NvU32 localDiscoveredLinks; 2480 NvU32 localGlobalLinkOffset; 2481 NvU32 ioctrlDiscoverySize; 2482 NvU8 numDevices; 2483 NV2080_CTRL_NVLINK_DEVICE_IP_REVISION_VALUES ipRevisions; 2484 } NV2080_CTRL_NVLINK_GET_IOCTRL_DEVICE_INFO_PARAMS; 2485 2486 #define NV2080_CTRL_CMD_NVLINK_GET_IOCTRL_DEVICE_INFO (0x2080302dU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_GET_IOCTRL_DEVICE_INFO_PARAMS_MESSAGE_ID" */ 2487 2488 /* 2489 * NV2080_CTRL_CMD_NVLINK_PROGRAM_LINK_SPEED 2490 * 2491 * Program NVLink Speed from OS/VBIOS 2492 * 2493 * [In] bPlatformLinerateDefined 2494 * Whether line rate is defined in the platform 2495 * [In] platformLineRate 2496 * Platform defined line rate 2497 * [Out] nvlinkLinkSpeed 2498 * The line rate that was programmed for the links 2499 */ 2500 #define NV2080_CTRL_NVLINK_PROGRAM_LINK_SPEED_PARAMS_MESSAGE_ID (0x2eU) 2501 2502 typedef struct NV2080_CTRL_NVLINK_PROGRAM_LINK_SPEED_PARAMS { 2503 NvBool bPlatformLinerateDefined; 2504 NvU32 platformLineRate; 2505 NvU32 nvlinkLinkSpeed; 2506 } NV2080_CTRL_NVLINK_PROGRAM_LINK_SPEED_PARAMS; 2507 2508 #define NV2080_CTRL_CMD_NVLINK_PROGRAM_LINK_SPEED (0x2080302eU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PROGRAM_LINK_SPEED_PARAMS_MESSAGE_ID" */ 2509 2510 /* 2511 * NV2080_CTRL_CMD_NVLINK_ARE_LINKS_TRAINED 2512 * 2513 * [In] linkMask 2514 * Mask of links whose state will be checked 2515 * [In] bActiveOnly 2516 * The input boolean to check for Link Active state 2517 * [Out] bIsLinkActive 2518 * Boolean array to track if the link is trained 2519 */ 2520 #define NV2080_CTRL_NVLINK_ARE_LINKS_TRAINED_PARAMS_MESSAGE_ID (0x2fU) 2521 2522 typedef struct NV2080_CTRL_NVLINK_ARE_LINKS_TRAINED_PARAMS { 2523 NvU32 linkMask; 2524 NvBool bActiveOnly; 2525 NvBool bIsLinkActive[NV2080_CTRL_NVLINK_MAX_LINKS]; 2526 } NV2080_CTRL_NVLINK_ARE_LINKS_TRAINED_PARAMS; 2527 2528 #define NV2080_CTRL_CMD_NVLINK_ARE_LINKS_TRAINED (0x2080302fU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_ARE_LINKS_TRAINED_PARAMS_MESSAGE_ID" */ 2529 2530 #define NV2080_CTRL_NVLINK_RESET_FLAGS_ASSERT (0x00000000) 2531 #define NV2080_CTRL_NVLINK_RESET_FLAGS_DEASSERT (0x00000001) 2532 #define NV2080_CTRL_NVLINK_RESET_FLAGS_TOGGLE (0x00000002) 2533 2534 /* 2535 * NV2080_CTRL_CMD_NVLINK_RESET_LINKS 2536 * 2537 * [In] linkMask 2538 * Mask of links which need to be reset 2539 * [In] flags 2540 * Whether to assert, de-assert or toggle the Nvlink reset 2541 */ 2542 2543 #define NV2080_CTRL_NVLINK_RESET_LINKS_PARAMS_MESSAGE_ID (0x30U) 2544 2545 typedef struct NV2080_CTRL_NVLINK_RESET_LINKS_PARAMS { 2546 NvU32 linkMask; 2547 NvU32 flags; 2548 } NV2080_CTRL_NVLINK_RESET_LINKS_PARAMS; 2549 2550 #define NV2080_CTRL_CMD_NVLINK_RESET_LINKS (0x20803030U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_RESET_LINKS_PARAMS_MESSAGE_ID" */ 2551 2552 /* 2553 * NV2080_CTRL_CMD_NVLINK_DISABLE_DL_INTERRUPTS 2554 * 2555 * [In] linkMask 2556 * Mask of links for which DL interrrupts need to be disabled 2557 */ 2558 #define NV2080_CTRL_NVLINK_DISABLE_DL_INTERRUPTS_PARAMS_MESSAGE_ID (0x31U) 2559 2560 typedef struct NV2080_CTRL_NVLINK_DISABLE_DL_INTERRUPTS_PARAMS { 2561 NvU32 linkMask; 2562 } NV2080_CTRL_NVLINK_DISABLE_DL_INTERRUPTS_PARAMS; 2563 2564 #define NV2080_CTRL_CMD_NVLINK_DISABLE_DL_INTERRUPTS (0x20803031U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_DISABLE_DL_INTERRUPTS_PARAMS_MESSAGE_ID" */ 2565 2566 /* 2567 * Structure to store the GET_LINK_AND_CLOCK__INFO params 2568 * 2569 * [Out] bLinkConnectedToSystem 2570 * Boolean indicating sysmem connection of a link 2571 * [Out] bLinkConnectedToPeer 2572 * Boolean indicating peer connection of a link 2573 * [Out] bLinkReset 2574 * Whether the link is in reset 2575 * [Out] subLinkWidth 2576 * Number of lanes per sublink 2577 * [Out] linkState 2578 * Mode of the link 2579 * [Out] txSublinkState 2580 * Tx sublink state 2581 * [Out] rxSublinkState 2582 * Rx sublink state 2583 * [Out] bLaneReversal 2584 * Boolean indicating if a link's lanes are reversed 2585 * [Out] nvlinkLinkClockKHz 2586 * Link clock value in KHz 2587 * [Out] nvlinkLineRateMbps 2588 * Link line rate in Mbps 2589 * [Out] nvlinkLinkClockMhz 2590 * Link clock in MHz 2591 * [Out] nvlinkLinkDataRateKiBps 2592 * Link Data rate in KiBps 2593 * [Out] nvlinkRefClkType 2594 * Current Nvlink refclk source 2595 * [Out] nvlinkReqLinkClockMhz 2596 * Requested link clock value 2597 */ 2598 typedef struct NV2080_CTRL_NVLINK_GET_LINK_AND_CLOCK_VALUES { 2599 NvBool bLinkConnectedToSystem; 2600 NvBool bLinkConnectedToPeer; 2601 NvBool bLinkReset; 2602 NvU8 subLinkWidth; 2603 NvU32 linkState; 2604 NvU32 txSublinkState; 2605 NvU32 rxSublinkState; 2606 NvBool bLaneReversal; 2607 NvU32 nvlinkLinkClockKHz; 2608 NvU32 nvlinkLineRateMbps; 2609 NvU32 nvlinkLinkClockMhz; 2610 NvU32 nvlinkLinkDataRateKiBps; 2611 NvU8 nvlinkRefClkType; 2612 NvU32 nvlinkReqLinkClockMhz; 2613 } NV2080_CTRL_NVLINK_GET_LINK_AND_CLOCK_VALUES; 2614 2615 /* 2616 * NV2080_CTRL_CMD_NVLINK_GET_LINK_AND_CLOCK_INFO 2617 * 2618 * [In] linkMask 2619 * Mask of enabled links to loop over 2620 * [Out] nvlinkRefClkSpeedKHz 2621 * Ref clock value n KHz 2622 * [Out] linkInfo 2623 * Per link information 2624 */ 2625 #define NV2080_CTRL_NVLINK_GET_LINK_AND_CLOCK_INFO_PARAMS_MESSAGE_ID (0x32U) 2626 2627 typedef struct NV2080_CTRL_NVLINK_GET_LINK_AND_CLOCK_INFO_PARAMS { 2628 NvU32 linkMask; 2629 NvU32 nvlinkRefClkSpeedKHz; 2630 NvBool bSublinkStateInst; // whether instantaneous sublink state is needed 2631 NV2080_CTRL_NVLINK_GET_LINK_AND_CLOCK_VALUES linkInfo[NV2080_CTRL_NVLINK_MAX_LINKS]; 2632 } NV2080_CTRL_NVLINK_GET_LINK_AND_CLOCK_INFO_PARAMS; 2633 2634 #define NV2080_CTRL_CMD_NVLINK_GET_LINK_AND_CLOCK_INFO (0x20803032U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_GET_LINK_AND_CLOCK_INFO_PARAMS_MESSAGE_ID" */ 2635 2636 /* 2637 * NV2080_CTRL_CMD_NVLINK_SETUP_NVLINK_SYSMEM 2638 * 2639 * Updates the HSHUB sysmem config resgister state to reflect sysmem NVLinks 2640 * 2641 * [In] sysmemLinkMask 2642 * Mask of discovered sysmem NVLinks 2643 */ 2644 #define NV2080_CTRL_NVLINK_SETUP_NVLINK_SYSMEM_PARAMS_MESSAGE_ID (0x33U) 2645 2646 typedef struct NV2080_CTRL_NVLINK_SETUP_NVLINK_SYSMEM_PARAMS { 2647 NvU32 sysmemLinkMask; 2648 } NV2080_CTRL_NVLINK_SETUP_NVLINK_SYSMEM_PARAMS; 2649 #define NV2080_CTRL_CMD_NVLINK_SETUP_NVLINK_SYSMEM (0x20803033U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_SETUP_NVLINK_SYSMEM_PARAMS_MESSAGE_ID" */ 2650 2651 /* 2652 * NV2080_CTRL_CMD_NVLINK_PROCESS_FORCED_CONFIGS 2653 * 2654 * Process NVLink forced configurations which includes setting of HSHUB and memory system 2655 * 2656 * [In] bLegacyForcedConfig 2657 * Tracks whether the forced config is legacy forced config or chiplib config 2658 * [Out] bOverrideComputePeerMode 2659 * Whether compute peer mode was enabled 2660 * [In] phase 2661 * Only applicable when bLegacyForcedConfig is true 2662 * Tracks the set of registers to program from the NVLink table 2663 * [In] linkConnection 2664 * Array of chiplib configurations 2665 */ 2666 #define NV2080_CTRL_NVLINK_PROCESS_FORCED_CONFIGS_PARAMS_MESSAGE_ID (0x34U) 2667 2668 typedef struct NV2080_CTRL_NVLINK_PROCESS_FORCED_CONFIGS_PARAMS { 2669 NvBool bLegacyForcedConfig; 2670 NvBool bOverrideComputePeerMode; 2671 NvU32 phase; 2672 NvU32 linkConnection[NV2080_CTRL_NVLINK_MAX_LINKS]; 2673 } NV2080_CTRL_NVLINK_PROCESS_FORCED_CONFIGS_PARAMS; 2674 2675 #define NV2080_CTRL_CMD_NVLINK_PROCESS_FORCED_CONFIGS (0x20803034U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PROCESS_FORCED_CONFIGS_PARAMS_MESSAGE_ID" */ 2676 2677 /* 2678 * NV2080_CTRL_CMD_NVLINK_SYNC_NVLINK_SHUTDOWN_PROPS 2679 * 2680 * Sync the NVLink lane shutdown properties with GSP-RM 2681 * 2682 * [In] bLaneShutdownEnabled 2683 * Whether nvlink shutdown is enabled for the chip 2684 * [In] bLaneShutdownOnUnload 2685 * Whether nvlink shutdown should be triggered on driver unload 2686 */ 2687 #define NV2080_CTRL_NVLINK_SYNC_NVLINK_SHUTDOWN_PROPS_PARAMS_MESSAGE_ID (0x35U) 2688 2689 typedef struct NV2080_CTRL_NVLINK_SYNC_NVLINK_SHUTDOWN_PROPS_PARAMS { 2690 NvBool bLaneShutdownEnabled; 2691 NvBool bLaneShutdownOnUnload; 2692 } NV2080_CTRL_NVLINK_SYNC_NVLINK_SHUTDOWN_PROPS_PARAMS; 2693 2694 #define NV2080_CTRL_CMD_NVLINK_SYNC_NVLINK_SHUTDOWN_PROPS (0x20803035U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_SYNC_NVLINK_SHUTDOWN_PROPS_PARAMS_MESSAGE_ID" */ 2695 2696 /* 2697 * NV2080_CTRL_CMD_NVLINK_ENABLE_SYSMEM_NVLINK_ATS 2698 * 2699 * Enable ATS functionality related to NVLink sysmem if hardware support is available 2700 * 2701 * [In] notUsed 2702 */ 2703 #define NV2080_CTRL_NVLINK_ENABLE_SYSMEM_NVLINK_ATS_PARAMS_MESSAGE_ID (0x36U) 2704 2705 typedef struct NV2080_CTRL_NVLINK_ENABLE_SYSMEM_NVLINK_ATS_PARAMS { 2706 NvU32 notUsed; 2707 } NV2080_CTRL_NVLINK_ENABLE_SYSMEM_NVLINK_ATS_PARAMS; 2708 2709 #define NV2080_CTRL_CMD_NVLINK_ENABLE_SYSMEM_NVLINK_ATS (0x20803036U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_ENABLE_SYSMEM_NVLINK_ATS_PARAMS_MESSAGE_ID" */ 2710 2711 /* 2712 * NV2080_CTRL_CMD_NVLINK_HSHUB_GET_SYSMEM_NVLINK_MASK 2713 * 2714 * Get the mask of Nvlink links connected to system 2715 * 2716 * [Out] sysmemLinkMask 2717 * Mask of Nvlink links connected to system 2718 */ 2719 #define NV2080_CTRL_NVLINK_HSHUB_GET_SYSMEM_NVLINK_MASK_PARAMS_MESSAGE_ID (0x37U) 2720 2721 typedef struct NV2080_CTRL_NVLINK_HSHUB_GET_SYSMEM_NVLINK_MASK_PARAMS { 2722 NvU32 sysmemLinkMask; 2723 } NV2080_CTRL_NVLINK_HSHUB_GET_SYSMEM_NVLINK_MASK_PARAMS; 2724 2725 #define NV2080_CTRL_CMD_NVLINK_HSHUB_GET_SYSMEM_NVLINK_MASK (0x20803037U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_HSHUB_GET_SYSMEM_NVLINK_MASK_PARAMS_MESSAGE_ID" */ 2726 2727 /* 2728 * NV2080_CTRL_CMD_NVLINK_GET_SET_NVSWITCH_FLA_ADDR 2729 * 2730 * Get/Set NVSwitch FLA address 2731 * 2732 * [In] bGet 2733 * Whether to get or set the NVSwitch FLA address 2734 * [In/Out] addr 2735 * Address that is to be set or retrieved. 2736 */ 2737 #define NV2080_CTRL_NVLINK_GET_SET_NVSWITCH_FLA_ADDR_PARAMS_MESSAGE_ID (0x38U) 2738 2739 typedef struct NV2080_CTRL_NVLINK_GET_SET_NVSWITCH_FLA_ADDR_PARAMS { 2740 NvBool bGet; 2741 NV_DECLARE_ALIGNED(NvU64 addr, 8); 2742 } NV2080_CTRL_NVLINK_GET_SET_NVSWITCH_FLA_ADDR_PARAMS; 2743 2744 #define NV2080_CTRL_CMD_NVLINK_GET_SET_NVSWITCH_FLA_ADDR (0x20803038) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_GET_SET_NVSWITCH_FLA_ADDR_PARAMS_MESSAGE_ID" */ 2745 2746 /* 2747 * NV2080_CTRL_CMD_NVLINK_SYNC_LINK_MASKS_AND_VBIOS_INFO 2748 * 2749 * Syncs the different link masks and vbios defined values between CPU-RM and GSP-RM 2750 * 2751 * [in] discoveredLinks 2752 * Mask of links discovered from IOCTRLs 2753 * 2754 * [in] connectedLinksMask 2755 * Mask of links which are connected (remote present) 2756 * 2757 * [in] bridgeSensableLinks 2758 * Mask of links whose remote endpoint presence can be sensed 2759 * 2760 * [in] bridgedLinks 2761 * Mask of links which are connected (remote present) 2762 * Same as connectedLinksMask, but also tracks the case where link 2763 * is connected but marginal and could not initialize 2764 * 2765 * [out] initDisabledLinksMask 2766 * Mask of links for which initialization is disabled 2767 * 2768 * [out] vbiosDisabledLinkMask 2769 * Mask of links disabled in the VBIOS 2770 * 2771 * [out] initializedLinks 2772 * Mask of initialized links 2773 * 2774 * [out] bEnableTrainingAtLoad 2775 * Whether the links should be trained to active during driver load 2776 * 2777 * [out] bEnableSafeModeAtLoad 2778 * Whether the links should be initialized to swcfg during driver load 2779 */ 2780 2781 #define NV2080_CTRL_NVLINK_SYNC_LINK_MASKS_AND_VBIOS_INFO_PARAMS_MESSAGE_ID (0x39U) 2782 2783 typedef struct NV2080_CTRL_NVLINK_SYNC_LINK_MASKS_AND_VBIOS_INFO_PARAMS { 2784 NvU32 discoveredLinks; 2785 NvU32 connectedLinksMask; 2786 NvU32 bridgeSensableLinks; 2787 NvU32 bridgedLinks; 2788 NvU32 initDisabledLinksMask; 2789 NvU32 vbiosDisabledLinkMask; 2790 NvU32 initializedLinks; 2791 NvBool bEnableTrainingAtLoad; 2792 NvBool bEnableSafeModeAtLoad; 2793 } NV2080_CTRL_NVLINK_SYNC_LINK_MASKS_AND_VBIOS_INFO_PARAMS; 2794 2795 #define NV2080_CTRL_CMD_NVLINK_SYNC_LINK_MASKS_AND_VBIOS_INFO (0x20803039U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_SYNC_LINK_MASKS_AND_VBIOS_INFO_PARAMS_MESSAGE_ID" */ 2796 2797 /* 2798 * NV2080_CTRL_CMD_NVLINK_ENABLE_LINKS 2799 * 2800 * Enable pre-topology setup on the mask of enabled links 2801 * This command accepts no parameters. 2802 */ 2803 2804 #define NV2080_CTRL_CMD_NVLINK_ENABLE_LINKS (0x2080303aU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | 0x3a" */ 2805 2806 /* 2807 * NV2080_CTRL_CMD_NVLINK_PROCESS_INIT_DISABLED_LINKS 2808 * 2809 * Process the init disabled NVLinks and filter those out 2810 * 2811 * [in/out] initDisabledLinksMask 2812 * Mask of links initdisabled on a given GPU 2813 * 2814 * [in] bSkipHwNvlinkDisable 2815 * Whether to consider skipping the HW initdisable links 2816 */ 2817 2818 #define NV2080_CTRL_NVLINK_PROCESS_INIT_DISABLED_LINKS_PARAMS_MESSAGE_ID (0x3bU) 2819 2820 typedef struct NV2080_CTRL_NVLINK_PROCESS_INIT_DISABLED_LINKS_PARAMS { 2821 NvU32 initDisabledLinksMask; 2822 NvBool bSkipHwNvlinkDisable; 2823 } NV2080_CTRL_NVLINK_PROCESS_INIT_DISABLED_LINKS_PARAMS; 2824 2825 #define NV2080_CTRL_CMD_NVLINK_PROCESS_INIT_DISABLED_LINKS (0x2080303bU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PROCESS_INIT_DISABLED_LINKS_PARAMS_MESSAGE_ID" */ 2826 2827 /* 2828 * NV2080_CTRL_CMD_NVLINK_EOM_CONTROL 2829 * 2830 * cmd [IN] enum identifying the EOM related command for the driver to process 2831 * link [IN] linkId 2832 * params [IN] NvU32 word that is written into NV_PMINION_SCRATCH_SWRW_0 before calling CONFIGEOM dlcmd 2833 * 2834 * Params Packing is specified in Minion IAS 2835 */ 2836 2837 typedef enum NV2080_CTRL_CMD_NVLINK_EOM_CONTROL_PARAMS_COMMAND { 2838 NVLINK_EOM_CONTROL_START_EOM = 0, 2839 NVLINK_EOM_CONTROL_END_EOM = 1, 2840 NVLINK_EOM_CONTROL_CONFIG_EOM = 2, 2841 NVLINK_EOM_CONTROL_FULL_EOM_SEQUENCE = 3, 2842 } NV2080_CTRL_CMD_NVLINK_EOM_CONTROL_PARAMS_COMMAND; 2843 2844 #define NV2080_CTRL_NVLINK_EOM_CONTROL_PARAMS_MESSAGE_ID (0x3cU) 2845 2846 typedef struct NV2080_CTRL_NVLINK_EOM_CONTROL_PARAMS { 2847 NV2080_CTRL_CMD_NVLINK_EOM_CONTROL_PARAMS_COMMAND cmd; 2848 NvU32 linkId; 2849 NvU32 params; 2850 } NV2080_CTRL_NVLINK_EOM_CONTROL_PARAMS; 2851 2852 #define NV2080_CTRL_CMD_NVLINK_EOM_CONTROL (0x2080303c) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_EOM_CONTROL_PARAMS_MESSAGE_ID" */ 2853 2854 /*! 2855 * Inband Recieved Data 2856 */ 2857 #define NV2080_CTRL_NVLINK_INBAND_MAX_MSG_SIZE 4096 2858 #define NV2080_CTRL_NVLINK_INBAND_RECEIVED_DATA_PARAMS_MESSAGE_ID (0x3dU) 2859 2860 typedef struct NV2080_CTRL_NVLINK_INBAND_RECEIVED_DATA_PARAMS { 2861 NvU8 data[NV2080_CTRL_NVLINK_INBAND_MAX_MSG_SIZE]; 2862 NvU32 dataSize; 2863 } NV2080_CTRL_NVLINK_INBAND_RECEIVED_DATA_PARAMS; 2864 2865 /* 2866 * NV2080_CTRL_CMD_NVLINK_SET_L1_THRESHOLD 2867 * 2868 * This command is used to set the L1 threshold value 2869 * 2870 * [in] l1Threshold 2871 * Used to set the L1 threshold value 2872 * 2873 */ 2874 #define NV2080_CTRL_NVLINK_SET_L1_THRESHOLD_PARAMS_MESSAGE_ID (0x3eU) 2875 2876 typedef struct NV2080_CTRL_NVLINK_SET_L1_THRESHOLD_PARAMS { 2877 NvU32 l1Threshold; 2878 } NV2080_CTRL_NVLINK_SET_L1_THRESHOLD_PARAMS; 2879 2880 #define NV2080_CTRL_CMD_NVLINK_SET_L1_THRESHOLD (0x2080303eU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_SET_L1_THRESHOLD_PARAMS_MESSAGE_ID" */ 2881 2882 /* 2883 * NV2080_CTRL_CMD_NVLINK_GET_L1_THRESHOLD 2884 * 2885 * This command is used to get the L1 threshold value 2886 * 2887 * [out] l1Threshold 2888 * Used to get the L1 threshold value 2889 * 2890 */ 2891 #define NV2080_CTRL_NVLINK_GET_L1_THRESHOLD_PARAMS_MESSAGE_ID (0x3fU) 2892 2893 typedef struct NV2080_CTRL_NVLINK_GET_L1_THRESHOLD_PARAMS { 2894 NvU32 l1Threshold; 2895 } NV2080_CTRL_NVLINK_GET_L1_THRESHOLD_PARAMS; 2896 2897 #define NV2080_CTRL_CMD_NVLINK_GET_L1_THRESHOLD (0x2080303fU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_GET_L1_THRESHOLD_PARAMS_MESSAGE_ID" */ 2898 2899 /* 2900 * NV2080_CTRL_CMD_NVLINK_INBAND_SEND_DATA 2901 * 2902 * RPC for sending Inband data 2903 * 2904 * [In] data[] 2905 * data to be sent over inband 2906 * [In] dataSize 2907 * Size of valid data in data array 2908 */ 2909 #define NV2080_CTRL_NVLINK_INBAND_SEND_DATA_PARAMS_MESSAGE_ID (0x40U) 2910 2911 typedef struct NV2080_CTRL_NVLINK_INBAND_SEND_DATA_PARAMS { 2912 NvU8 buffer[NV2080_CTRL_NVLINK_INBAND_MAX_MSG_SIZE]; 2913 NvU32 dataSize; 2914 } NV2080_CTRL_NVLINK_INBAND_SEND_DATA_PARAMS; 2915 2916 #define NV2080_CTRL_CMD_NVLINK_INBAND_SEND_DATA (0x20803040U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_INBAND_SEND_DATA_PARAMS_MESSAGE_ID" */ 2917 2918 /* 2919 * NV2080_CTRL_CMD_NVLINK_IS_GPU_DEGRADED 2920 * 2921 * RPC for Getting GPU degraded status upon link error 2922 * 2923 * [In] linkId 2924 * Id of the link on which error occured 2925 * [In] bIsGpuDegraded 2926 * Boolean to track corresponding GPU is degraded or not 2927 */ 2928 #define NV2080_CTRL_NVLINK_IS_GPU_DEGRADED_PARAMS_MESSAGE_ID (0x41U) 2929 2930 typedef struct NV2080_CTRL_NVLINK_IS_GPU_DEGRADED_PARAMS { 2931 NvU32 linkId; 2932 NvBool bIsGpuDegraded; 2933 } NV2080_CTRL_NVLINK_IS_GPU_DEGRADED_PARAMS; 2934 2935 #define NV2080_CTRL_CMD_NVLINK_IS_GPU_DEGRADED (0x20803041U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_IS_GPU_DEGRADED_PARAMS_MESSAGE_ID" */ 2936 2937 /* 2938 * NV2080_CTRL_CMD_NVLINK_DIRECT_CONNECT_CHECK 2939 * 2940 * This command is used to check for missing 2941 * bridge/nvlink for direct connect GPU 2942 * 2943 * [out] bIsEnoughNvLink 2944 * Check if number of active nvlink meet the minimum requirements. 2945 * [out] numBridge 2946 * Number of NVLink bridge 2947 * [out] bridgePresenceMask 2948 * Bit mask of NVLink bridges's presence 2949 */ 2950 #define NV2080_CTRL_NVLINK_DIRECT_CONNECT_CHECK_PARAMS_MESSAGE_ID (0x42U) 2951 2952 typedef struct NV2080_CTRL_NVLINK_DIRECT_CONNECT_CHECK_PARAMS { 2953 NvBool bIsEnoughNvLink; 2954 NvU32 numBridge; 2955 NvU32 bridgePresenceMask; 2956 } NV2080_CTRL_NVLINK_DIRECT_CONNECT_CHECK_PARAMS; 2957 2958 #define NV2080_CTRL_CMD_NVLINK_DIRECT_CONNECT_CHECK (0x20803042U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_DIRECT_CONNECT_CHECK_PARAMS_MESSAGE_ID" */ 2959 2960 /* 2961 * NV2080_CTRL_CMD_NVLINK_POST_FAULT_UP 2962 * 2963 * This command is to trigger the next sequence after the 10 sec delay 2964 * 2965 * [out] linkId 2966 * Link number which the sequence should be triggered 2967 */ 2968 #define NV2080_CTRL_NVLINK_POST_FAULT_UP_PARAMS_MESSAGE_ID (0x43U) 2969 2970 typedef struct NV2080_CTRL_NVLINK_POST_FAULT_UP_PARAMS { 2971 NvU32 linkId; 2972 } NV2080_CTRL_NVLINK_POST_FAULT_UP_PARAMS; 2973 2974 #define NV2080_CTRL_CMD_NVLINK_POST_FAULT_UP (0x20803043U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_POST_FAULT_UP_PARAMS_MESSAGE_ID" */ 2975 2976 #define NV2080_CTRL_NVLINK_PORT_EVENT_COUNT_SIZE 64U 2977 2978 /* 2979 * Structure to store port event information 2980 * 2981 * portEventType 2982 * Type of port even that occurred: NVLINK_PORT_EVENT_TYPE* 2983 * 2984 * gpuId 2985 * Gpu that port event occurred on 2986 * 2987 * linkId 2988 * Link id that port event occurred on 2989 * 2990 * time 2991 * Platform time (nsec) when event occurred 2992 */ 2993 typedef struct NV2080_CTRL_NVLINK_PORT_EVENT { 2994 NvU32 portEventType; 2995 NvU32 gpuId; 2996 NvU32 linkId; 2997 NV_DECLARE_ALIGNED(NvU64 time, 8); 2998 } NV2080_CTRL_NVLINK_PORT_EVENT; 2999 3000 /* 3001 * NV2080_CTRL_CMD_NVLINK_GET_PORT_EVENTS 3002 * 3003 * This command returns the port up and port down events that have occurred 3004 * 3005 * Parameters: 3006 * 3007 * portEventIndex [IN/OUT] 3008 * On input: The index of the first port event at which to start reading out of the driver. 3009 * 3010 * On output: The index of the first port event that wasn't reported through the 'port event' array 3011 * in this call to NV2080_CTRL_CMD_NVLINK_GET_PORT_EVENTS. 3012 * 3013 * nextPortEventIndex[OUT] 3014 * The index that will be assigned to the next port event that occurs. 3015 * Users of the GET_PORT_EVENTS control call may set 'portEventIndex' to this field on initialization 3016 * to bypass port events that have already occurred without making multiple control calls. 3017 * 3018 * portEventCount [OUT] 3019 * Number of port events returned by the call. Currently, portEventCount is limited 3020 * by NV2080_CTRL_NVLINK_PORT_EVENT_COUNT_SIZE. In order to query all the port events, a 3021 * client needs to keep calling the control till portEventCount is zero. 3022 * 3023 * bOverflow [OUT] 3024 * True when the port event log is overflowed and no longer contains all the port 3025 * events that have occurred, false otherwise. 3026 * 3027 * portEvent [OUT] 3028 * The port event entires. 3029 */ 3030 #define NV2080_CTRL_NVLINK_GET_PORT_EVENTS_PARAMS_MESSAGE_ID (0x44U) 3031 3032 typedef struct NV2080_CTRL_NVLINK_GET_PORT_EVENTS_PARAMS { 3033 NV_DECLARE_ALIGNED(NvU64 portEventIndex, 8); 3034 NV_DECLARE_ALIGNED(NvU64 nextPortEventIndex, 8); 3035 NvU32 portEventCount; 3036 NvBool bOverflow; 3037 NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_PORT_EVENT portEvent[NV2080_CTRL_NVLINK_PORT_EVENT_COUNT_SIZE], 8); 3038 } NV2080_CTRL_NVLINK_GET_PORT_EVENTS_PARAMS; 3039 3040 #define NV2080_CTRL_CMD_NVLINK_GET_PORT_EVENTS (0x20803044U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_GET_PORT_EVENTS_PARAMS_MESSAGE_ID" */ 3041 3042 /* 3043 * NV2080_CTRL_CMD_NVLINK_CYCLE_LINK 3044 * 3045 * This command cycles a link by faulting it and then retraining the link 3046 * 3047 * Parameters: 3048 * 3049 * linkId [IN] 3050 * The link id of the link to be cycled 3051 */ 3052 #define NV2080_CTRL_NVLINK_CYCLE_LINK_PARAMS_MESSAGE_ID (0x45U) 3053 3054 typedef struct NV2080_CTRL_NVLINK_CYCLE_LINK_PARAMS { 3055 NvU32 linkId; 3056 } NV2080_CTRL_NVLINK_CYCLE_LINK_PARAMS; 3057 3058 #define NV2080_CTRL_CMD_NVLINK_CYCLE_LINK (0x20803045U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_CYCLE_LINK_PARAMS_MESSAGE_ID" */ 3059 3060 /* 3061 * NV2080_CTRL_CMD_NVLINK_IS_REDUCED_CONFIG 3062 * 3063 * This command is to check if a GPU has a reduced nvlink configuration 3064 * 3065 * [out] bReducedNvlinkConfig 3066 * Link number which the sequence should be triggered 3067 */ 3068 #define NV2080_CTRL_NVLINK_IS_REDUCED_CONFIG_PARAMS_MESSAGE_ID (0x46U) 3069 3070 typedef struct NV2080_CTRL_NVLINK_IS_REDUCED_CONFIG_PARAMS { 3071 NvBool bReducedNvlinkConfig; 3072 } NV2080_CTRL_NVLINK_IS_REDUCED_CONFIG_PARAMS; 3073 3074 #define NV2080_CTRL_CMD_NVLINK_IS_REDUCED_CONFIG (0x20803046U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_IS_REDUCED_CONFIG_PARAMS_MESSAGE_ID" */ 3075 3076 3077 /* _ctrl2080nvlink_h_ */ 3078 3079