1 /*
2  * SPDX-FileCopyrightText: Copyright (c) 2015-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
3  * SPDX-License-Identifier: MIT
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice shall be included in
13  * all copies or substantial portions of the Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21  * DEALINGS IN THE SOFTWARE.
22  */
23 
24 #pragma once
25 
26 #include <nvtypes.h>
27 
28 //
29 // This file was generated with FINN, an NVIDIA coding tool.
30 // Source file: ctrl/ctrl9067.finn
31 //
32 
33 #include "ctrl/ctrlxxxx.h"
34 /* Subcontext control commands and parameters */
35 #define NV9067_CTRL_CMD(cat,idx)          NVXXXX_CTRL_CMD(0x9067, NV9067_CTRL_##cat, idx)
36 
37 /* Command categories (6bits) */
38 #define NV9067_CTRL_RESERVED      (0x00)
39 #define NV9067_CTRL_TPC_PARTITION (0x01)
40 #define NV9067_CTRL_CWD_WATERMARK (0x02)
41 
42 /*!
43  * Does nothing.
44  */
45 #define NV9067_CTRL_CMD_NULL      (0x90670000) /* finn: Evaluated from "(FINN_FERMI_CONTEXT_SHARE_A_RESERVED_INTERFACE_ID << 8) | 0x0" */
46 
47 
48 
49 
50 
51 /*!
52  * NV9067_CTRL_CMD_GET_TPC_PARTITION_TABLE
53  *    This command gets the current partition table configuration of a subcontext
54  *
55  * NV9067_CTRL_CMD_SET_TPC_PARTITION_TABLE
56  *    This command sets the partition table of a subcontext
57  *
58  * NV9067_CTRL_TPC_PARTITION_TABLE_PARAMS
59  *     This structure defines the parameters used for SET/GET per-subcontext TPC partitioning table configuration
60  *
61  *       numUsedTpc [in/out]
62  *           Specifies the number of TPCs used by the subcontext
63  *           While querying the enabled TPCs, this is an output paramter
64  *           While configuring the TPCs, this is an input parameter
65  *
66  *       tpcList [in/out]
67  *           Array containing the TPCs enabled for the subcontext.
68  *           The first numUsedTpc in the array interpreted as the valid entries.
69  *
70  *           Only applicable for STATIC and DYNAMIC modes.
71  *
72  * NV9067_CTRL_TPC_PARTITION_TABLE_MAX_TPC_COUNT
73  *     Max TPC count supported by this ctrl call
74  *
75  * NV9067_CTRL_TPC_PARTITION_TABLE_TPC_INFO
76  *   This structure defines the parameters for a TPC
77  *
78  *       globalTpcIndex
79  *          Global logical index of the enabled TPC
80  *
81  *       lmemBlockIndex
82  *          Block index of the Local memory backing store for the enabled TPC.
83  *          For GET command, we will return the current lmem block assigment for STATIC & DYNAMIC modes.
84  *          For SET command, this index is relevant only for STATIC mode.
85  *          HW automatically assign it for other modes. So should be zeroed out for other modes.
86  *
87  */
88 #define NV9067_CTRL_CMD_GET_TPC_PARTITION_TABLE       (0x90670101) /* finn: Evaluated from "(FINN_FERMI_CONTEXT_SHARE_A_TPC_PARTITION_INTERFACE_ID << 8) | 0x1" */
89 
90 #define NV9067_CTRL_CMD_SET_TPC_PARTITION_TABLE       (0x90670102) /* finn: Evaluated from "(FINN_FERMI_CONTEXT_SHARE_A_TPC_PARTITION_INTERFACE_ID << 8) | NV9067_CTRL_TPC_PARTITION_TABLE_PARAMS_MESSAGE_ID" */
91 
92 #define NV9067_CTRL_TPC_PARTITION_TABLE_TPC_COUNT_MAX 256
93 
94 typedef struct NV9067_CTRL_TPC_PARTITION_TABLE_TPC_INFO {
95     NvU16 globalTpcIndex;
96     NvU16 lmemBlockIndex;
97 } NV9067_CTRL_TPC_PARTITION_TABLE_TPC_INFO;
98 
99 #define NV9067_CTRL_TPC_PARTITION_TABLE_PARAMS_MESSAGE_ID (0x2U)
100 
101 typedef struct NV9067_CTRL_TPC_PARTITION_TABLE_PARAMS {
102     NvU16                                    numUsedTpc;
103     NV9067_CTRL_TPC_PARTITION_TABLE_TPC_INFO tpcList[NV9067_CTRL_TPC_PARTITION_TABLE_TPC_COUNT_MAX];
104 } NV9067_CTRL_TPC_PARTITION_TABLE_PARAMS;
105 
106 
107 /*!
108  * NV9067_CTRL_CMD_GET_CWD_WATERMARK
109  *    This command gets the cached watermark value for a subcontext
110  *
111  * NV9067_CTRL_CMD_SET_CWD_WATERMARK
112  *    This command sets the watermark value for a subcontexts
113  *
114  * NV9067_CTRL_CWD_WATERMARK_PARAMS
115  *     This structure defines the parameters used to SET/GET watermark value per-subcontext.
116  *
117  *        watermarkValue [in/out]
118  *            Value of watermark per-subcontext
119  *            Acts as a output parameter to get the current value of watermark for a subcontext.
120  *            Acts as a input parameter to set the current value of watermark for a subcontexts.
121  *
122  * NV9067_CTRL_CWD_WATERMARK_VALUE_MIN
123  *     Minimum value of watermark for any subcontext
124  *     RM will throw an error if any value less than this value is specified
125  *
126  * NV9067_CTRL_CWD_WATERMARK_VALUE_DEFAULT
127  *     Default value of watermark for any subcontext
128  *     RM will set watermark of a subcontext to this value when the subcontext
129  *     is created/initialized for the first time
130  *
131  * NV9067_CTRL_CWD_WATERMARK_VALUE_MAX
132  *     Maximum value of watermark for any subcontext
133  *     RM will throw an error if any value more than this value is specified
134  *
135  */
136 
137 #define NV9067_CTRL_CMD_GET_CWD_WATERMARK       (0x90670201) /* finn: Evaluated from "(FINN_FERMI_CONTEXT_SHARE_A_CWD_WATERMARK_INTERFACE_ID << 8) | NV9067_CTRL_GET_CWD_WATERMARK_PARAMS_MESSAGE_ID" */
138 
139 #define NV9067_CTRL_CWD_WATERMARK_VALUE_MIN     1
140 #define NV9067_CTRL_CWD_WATERMARK_VALUE_DEFAULT 2
141 #define NV9067_CTRL_CWD_WATERMARK_VALUE_MAX     256
142 
143 typedef struct NV9067_CTRL_CWD_WATERMARK_PARAMS {
144     NvU32 watermarkValue;
145 } NV9067_CTRL_CWD_WATERMARK_PARAMS;
146 
147 #define NV9067_CTRL_GET_CWD_WATERMARK_PARAMS_MESSAGE_ID (0x1U)
148 
149 typedef NV9067_CTRL_CWD_WATERMARK_PARAMS NV9067_CTRL_GET_CWD_WATERMARK_PARAMS;
150 
151 #define NV9067_CTRL_CMD_SET_CWD_WATERMARK (0x90670202) /* finn: Evaluated from "(FINN_FERMI_CONTEXT_SHARE_A_CWD_WATERMARK_INTERFACE_ID << 8) | NV9067_CTRL_SET_CWD_WATERMARK_PARAMS_MESSAGE_ID" */
152 
153 #define NV9067_CTRL_SET_CWD_WATERMARK_PARAMS_MESSAGE_ID (0x2U)
154 
155 typedef NV9067_CTRL_CWD_WATERMARK_PARAMS NV9067_CTRL_SET_CWD_WATERMARK_PARAMS;
156 
157 /* _ctrl9067_h_ */
158