1 /* 2 * SPDX-FileCopyrightText: Copyright (c) 2015-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. 3 * SPDX-License-Identifier: MIT 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 */ 23 24 #pragma once 25 26 #include <nvtypes.h> 27 28 // 29 // This file was generated with FINN, an NVIDIA coding tool. 30 // Source file: ctrl/ctrlc370/ctrlc370rg.finn 31 // 32 33 #include "ctrl/ctrlc370/ctrlc370base.h" 34 /* C370 is partially derived from 5070 */ 35 #include "ctrl/ctrl5070/ctrl5070rg.h" 36 37 38 39 40 /* 41 * NVC370_CTRL_CMD_GET_LOCKPINS_CAPS 42 * 43 * This command returns lockpins for the specified pinset, 44 * as well as lockpins' HW capabilities. 45 * 46 * pinset [in] 47 * This parameter takes the pinset whose corresponding 48 * lockpin numbers need to be determined. This only affects 49 * the return value for the RaterLock and FlipLock pins. 50 * 51 * frameLockPin [out] 52 * This parameter returns the FrameLock pin index. 53 * 54 * rasterLockPin [out] 55 * This parameter returns the RasterLock pin index. 56 * 57 * flipLockPin [out] 58 * This parameter returns the FlipLock pin index. 59 * 60 * stereoPin [out] 61 * This parameter returns the Stereo pin index. 62 * 63 * numScanLockPins [out] 64 * This parameter returns the HW capability of ScanLock pins. 65 * 66 * numFlipLockPins [out] 67 * This parameter returns the HW capability of FlipLock pins. 68 * 69 * numStereoPins [out] 70 * This parameter returns the HW capability of Stereo pins. 71 * 72 * Possible status values returned are: 73 * NV_OK 74 * NV_ERR_INVALID_PARAM_STRUCT 75 * NV_ERR_INVALID_ARGUMENT 76 * NV_ERR_NOT_SUPPORTED 77 */ 78 79 #define NVC370_CTRL_CMD_GET_LOCKPINS_CAPS (0xc3700201) /* finn: Evaluated from "(FINN_NVC370_DISPLAY_RG_INTERFACE_ID << 8) | NVC370_CTRL_GET_LOCKPINS_CAPS_PARAMS_MESSAGE_ID" */ 80 81 #define NVC370_CTRL_GET_LOCKPINS_CAPS_FRAME_LOCK_PIN_NONE (0xffffffff) 82 #define NVC370_CTRL_GET_LOCKPINS_CAPS_RASTER_LOCK_PIN_NONE (0xffffffff) 83 #define NVC370_CTRL_GET_LOCKPINS_CAPS_FLIP_LOCK_PIN_NONE (0xffffffff) 84 #define NVC370_CTRL_GET_LOCKPINS_CAPS_STEREO_PIN_NONE (0xffffffff) 85 #define NVC370_CTRL_GET_LOCKPINS_CAPS_PARAMS_MESSAGE_ID (0x1U) 86 87 typedef struct NVC370_CTRL_GET_LOCKPINS_CAPS_PARAMS { 88 NVC370_CTRL_CMD_BASE_PARAMS base; 89 NvU32 pinset; 90 NvU32 frameLockPin; 91 NvU32 rasterLockPin; 92 NvU32 flipLockPin; 93 NvU32 stereoPin; 94 NvU32 numScanLockPins; 95 NvU32 numFlipLockPins; 96 NvU32 numStereoPins; 97 } NVC370_CTRL_GET_LOCKPINS_CAPS_PARAMS; 98 99 /* 100 * NVC370_CTRL_CMD_SET_SWAPRDY_GPIO_WAR 101 * 102 * This command switches SWAP_READY_OUT GPIO between SW 103 * and HW control to WAR bug 200374184 104 * 105 * bEnable [in]: 106 * This parameter indicates enable/disable external fliplock 107 * 108 * Possible status values returned are: 109 * NV_OK 110 * NV_ERR_INVALID_ARGUMENT 111 * NV_ERR_GENERIC 112 */ 113 114 #define NVC370_CTRL_CMD_SET_SWAPRDY_GPIO_WAR (0xc3700202) /* finn: Evaluated from "(FINN_NVC370_DISPLAY_RG_INTERFACE_ID << 8) | NVC370_CTRL_SET_SWAPRDY_GPIO_WAR_PARAMS_MESSAGE_ID" */ 115 116 #define NVC370_CTRL_SET_SWAPRDY_GPIO_WAR_PARAMS_MESSAGE_ID (0x2U) 117 118 typedef struct NVC370_CTRL_SET_SWAPRDY_GPIO_WAR_PARAMS { 119 NVC370_CTRL_CMD_BASE_PARAMS base; 120 NvBool bEnable; 121 } NVC370_CTRL_SET_SWAPRDY_GPIO_WAR_PARAMS; 122 123 124