1 /* 2 * SPDX-FileCopyrightText: Copyright (c) 2020-2012 NVIDIA CORPORATION & AFFILIATES. All rights reserved. 3 * SPDX-License-Identifier: MIT 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 */ 23 24 #ifndef _RMIFRIF_H_ 25 #define _RMIFRIF_H_ 26 27 /*! 28 * @file rmifrif.h 29 * @brief Defines structures and interfaces common between RM and 30 * Init-From-Rom (IFR). 31 * 32 * For systems supporting GC6 that have on-board VBIOS ROMs, IFR is used 33 * to expedite several parts of GC6 exit in parallel with PEX init. 34 * 35 * After running devinit using a PMU ucode image loaded from the ROM itself, 36 * parts of RM stateLoad can be done using RM's ucode image. This is 37 * achieved by loading RM PMU ucode directly from FB. The primary difficulties 38 * are how to find RM's PMU ucode and how to bootstrap it. 39 * 40 * We use the simple approach of allocating a fixed buffer near the 41 * top of FB that contains the information required to bootstrap RM's PMU 42 * image. This buffer is called the RM_IFR_GC6_CTX. 43 * 44 * The buffer is allocated within RM's reserved memory space, directly before 45 * the VBIOS workspace (if any is present). Since the VBIOS workspace is 46 * always a multiple of 64K, RM enforces that the offset between top of memory 47 * and the end of the buffer is 64K. This way the IFR code can start 48 * from the top of memory and search downwards in 64K decrements. 49 * 50 * A small header is placed at the end of the buffer which contains a 51 * string signature identifying the buffer and other data needed to find the 52 * remaining context data. 53 * 54 * Top_Of-FB /---------------------\ <- 55 * | | \ 56 * | (VBIOS_Workspace) | | END_OFFSET 57 * | | / 58 * |---------------------| <- 59 | | \ 60 * | GSP FW (if present) | | pFbHalPvtInfo->gspFwSizeBytes 61 * | | / 62 * |---------------------| <- 63 * | RM_IFR_GC6_CTX_HDR | \ 64 * |---------------------| | 65 * | (Padding) | | RM_IFR_GC6_CTX_HDR.bufferSize 66 * |---------------------| | 67 * | Sequence Data | / 68 * |---------------------| <- 69 * | | 70 * | | 71 * | | 72 * | | 73 * 0x00000000 \---------------------/ 74 * 75 * To simplify the RM PMU bootstrap process and decrease IFR maintainence 76 * cost, the bootstrap process is encoded as a sequence script, leveraging 77 * a small subset of RM's PMU_SEQ_INST interface (see pmuseqinst.h). 78 * Register writes are captured during the initial (CPU-driven) RM PMU bootstrap 79 * and saved into a sequence for replay during GC6 exit. 80 * 81 * Only the following opcodes are supported currently: 82 * NV_PMU_SEQ_WRITE_REG_OPC - (multi-)register write 83 * NV_PMU_SEQ_EXIT_OPC - sequence done 84 * 85 */ 86 87 /*! 88 * Header structure which identifies the GC6 context buffer. 89 */ 90 typedef struct 91 { 92 NvU8 signature[12]; // RM_IFR_GC6_CTX_SIGNATURE 93 NvU32 bufferSize; // Size of the entire context buffer in bytes 94 NvU32 seqSizeWords; // Number of 32-bit words of sequence data 95 NvU32 checksum; // 32-bit chunk checksum of the sequence data 96 } RM_IFR_GC6_CTX_HDR, *PRM_IFR_GC6_CTX_HDR; 97 98 /*! 99 * String signature that IFR searches for to find the GC6 context buffer. 100 */ 101 #define RM_IFR_GC6_CTX_SIGNATURE "GC6_CTX_HDR" // 12 bytes 102 103 /*! 104 * Alignment of the offset between top of memory and the end of the 105 * GC6 context buffer (which is also the end of the header). 106 */ 107 #define RM_IFR_GC6_CTX_END_OFFSET_ALIGNMENT 0x10000 // 64KB 108 109 /*! 110 * Maximum offset between top of memory and the end of the 111 * GC6 context buffer. This is meant to be a loose upper bound preventing 112 * scanning of the whole of memory (e.g. when something goes wrong). 113 */ 114 #define RM_IFR_GC6_CTX_END_OFFSET_MAX 0x1000000 // 16MB 115 116 /*! 117 * Maximum size of the context data in bytes. 118 * This is limited by FECS falcon DMEM size (4K on Kepler). 119 * The buffer must fit within DMEM together with stack and other global data. 120 */ 121 #define RM_IFR_GC6_CTX_DATA_MAX_SIZE 2048 // 2KB 122 123 #endif // _RMIFRIF_H_ 124