1 #define NVOC_GPU_HALSPEC_H_PRIVATE_ACCESS_ALLOWED
2 #include "nvoc/runtime.h"
3 #include "nvoc/rtti.h"
4 #include "nvtypes.h"
5 #include "nvport/nvport.h"
6 #include "nvport/inline/util_valist.h"
7 #include "utils/nvassert.h"
8 #include "g_gpu_halspec_nvoc.h"
9
10 #ifdef DEBUG
11 char __nvoc_class_id_uniqueness_check_0x34a6d6 = 1;
12 #endif
13
14 extern const struct NVOC_CLASS_DEF __nvoc_class_def_RmHalspecOwner;
15
16 void __nvoc_init_RmHalspecOwner(RmHalspecOwner*,
17 NvU32 ChipHal_arch, NvU32 ChipHal_impl, NvU32 ChipHal_hidrev,
18 RM_RUNTIME_VARIANT RmVariantHal_rmVariant,
19 TEGRA_CHIP_TYPE TegraChipHal_tegraType,
20 NvU32 DispIpHal_ipver);
21 void __nvoc_init_funcTable_RmHalspecOwner(RmHalspecOwner*);
22 NV_STATUS __nvoc_ctor_RmHalspecOwner(RmHalspecOwner*);
23 void __nvoc_init_dataField_RmHalspecOwner(RmHalspecOwner*);
24 void __nvoc_dtor_RmHalspecOwner(RmHalspecOwner*);
25 extern const struct NVOC_EXPORT_INFO __nvoc_export_info_RmHalspecOwner;
26
27 static const struct NVOC_RTTI __nvoc_rtti_RmHalspecOwner_RmHalspecOwner = {
28 /*pClassDef=*/ &__nvoc_class_def_RmHalspecOwner,
29 /*dtor=*/ (NVOC_DYNAMIC_DTOR) &__nvoc_dtor_RmHalspecOwner,
30 /*offset=*/ 0,
31 };
32
33 static const struct NVOC_CASTINFO __nvoc_castinfo_RmHalspecOwner = {
34 /*numRelatives=*/ 1,
35 /*relatives=*/ {
36 &__nvoc_rtti_RmHalspecOwner_RmHalspecOwner,
37 },
38 };
39
40 // Not instantiable because it's not derived from class "Object"
41 const struct NVOC_CLASS_DEF __nvoc_class_def_RmHalspecOwner =
42 {
43 /*classInfo=*/ {
44 /*size=*/ sizeof(RmHalspecOwner),
45 /*classId=*/ classId(RmHalspecOwner),
46 /*providerId=*/ &__nvoc_rtti_provider,
47 #if NV_PRINTF_STRINGS_ALLOWED
48 /*name=*/ "RmHalspecOwner",
49 #endif
50 },
51 /*objCreatefn=*/ (NVOC_DYNAMIC_OBJ_CREATE) NULL,
52 /*pCastInfo=*/ &__nvoc_castinfo_RmHalspecOwner,
53 /*pExportInfo=*/ &__nvoc_export_info_RmHalspecOwner
54 };
55
56 const struct NVOC_EXPORT_INFO __nvoc_export_info_RmHalspecOwner =
57 {
58 /*numEntries=*/ 0,
59 /*pExportEntries=*/ 0
60 };
61
__nvoc_dtor_RmHalspecOwner(RmHalspecOwner * pThis)62 void __nvoc_dtor_RmHalspecOwner(RmHalspecOwner *pThis) {
63 PORT_UNREFERENCED_VARIABLE(pThis);
64 }
65
__nvoc_init_dataField_RmHalspecOwner(RmHalspecOwner * pThis)66 void __nvoc_init_dataField_RmHalspecOwner(RmHalspecOwner *pThis) {
67 PORT_UNREFERENCED_VARIABLE(pThis);
68 }
69
__nvoc_ctor_RmHalspecOwner(RmHalspecOwner * pThis)70 NV_STATUS __nvoc_ctor_RmHalspecOwner(RmHalspecOwner *pThis) {
71 NV_STATUS status = NV_OK;
72 __nvoc_init_dataField_RmHalspecOwner(pThis);
73 goto __nvoc_ctor_RmHalspecOwner_exit; // Success
74
75 __nvoc_ctor_RmHalspecOwner_exit:
76
77 return status;
78 }
79
__nvoc_init_funcTable_RmHalspecOwner_1(RmHalspecOwner * pThis)80 static void __nvoc_init_funcTable_RmHalspecOwner_1(RmHalspecOwner *pThis) {
81 PORT_UNREFERENCED_VARIABLE(pThis);
82 }
83
__nvoc_init_funcTable_RmHalspecOwner(RmHalspecOwner * pThis)84 void __nvoc_init_funcTable_RmHalspecOwner(RmHalspecOwner *pThis) {
85 __nvoc_init_funcTable_RmHalspecOwner_1(pThis);
86 }
87
__nvoc_init_RmHalspecOwner(RmHalspecOwner * pThis,NvU32 ChipHal_arch,NvU32 ChipHal_impl,NvU32 ChipHal_hidrev,RM_RUNTIME_VARIANT RmVariantHal_rmVariant,TEGRA_CHIP_TYPE TegraChipHal_tegraType,NvU32 DispIpHal_ipver)88 void __nvoc_init_RmHalspecOwner(RmHalspecOwner *pThis,
89 NvU32 ChipHal_arch, NvU32 ChipHal_impl, NvU32 ChipHal_hidrev,
90 RM_RUNTIME_VARIANT RmVariantHal_rmVariant,
91 TEGRA_CHIP_TYPE TegraChipHal_tegraType,
92 NvU32 DispIpHal_ipver) {
93 pThis->__nvoc_pbase_RmHalspecOwner = pThis;
94 __nvoc_init_halspec_ChipHal(&pThis->chipHal, ChipHal_arch, ChipHal_impl, ChipHal_hidrev);
95 __nvoc_init_halspec_RmVariantHal(&pThis->rmVariantHal, RmVariantHal_rmVariant);
96 __nvoc_init_halspec_TegraChipHal(&pThis->tegraChipHal, TegraChipHal_tegraType);
97 __nvoc_init_halspec_DispIpHal(&pThis->dispIpHal, DispIpHal_ipver);
98 __nvoc_init_funcTable_RmHalspecOwner(pThis);
99 }
100
101