1 #ifndef _G_GPU_HALSPEC_NVOC_H_ 2 #define _G_GPU_HALSPEC_NVOC_H_ 3 #include "nvoc/runtime.h" 4 5 #ifdef __cplusplus 6 extern "C" { 7 #endif 8 9 /* 10 * SPDX-FileCopyrightText: Copyright (c) 2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. 11 * SPDX-License-Identifier: MIT 12 * 13 * Permission is hereby granted, free of charge, to any person obtaining a 14 * copy of this software and associated documentation files (the "Software"), 15 * to deal in the Software without restriction, including without limitation 16 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 17 * and/or sell copies of the Software, and to permit persons to whom the 18 * Software is furnished to do so, subject to the following conditions: 19 * 20 * The above copyright notice and this permission notice shall be included in 21 * all copies or substantial portions of the Software. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 26 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 28 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 29 * DEALINGS IN THE SOFTWARE. 30 */ 31 32 #include "g_gpu_halspec_nvoc.h" 33 34 #ifndef GPU_HALSPEC_H 35 #define GPU_HALSPEC_H 36 37 #include "g_chips2halspec.h" // NVOC halspec, generated by rmconfig.pl 38 39 40 // Private field names are wrapped in PRIVATE_FIELD, which does nothing for 41 // the matching C source file, but causes diagnostics to be issued if another 42 // source file references the field. 43 #ifdef NVOC_GPU_HALSPEC_H_PRIVATE_ACCESS_ALLOWED 44 #define PRIVATE_FIELD(x) x 45 #else 46 #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) 47 #endif 48 49 struct RmHalspecOwner { 50 const struct NVOC_RTTI *__nvoc_rtti; 51 struct RmHalspecOwner *__nvoc_pbase_RmHalspecOwner; 52 struct ChipHal chipHal; 53 struct RmVariantHal rmVariantHal; 54 struct TegraChipHal tegraChipHal; 55 struct DispIpHal dispIpHal; 56 }; 57 58 #ifndef __NVOC_CLASS_RmHalspecOwner_TYPEDEF__ 59 #define __NVOC_CLASS_RmHalspecOwner_TYPEDEF__ 60 typedef struct RmHalspecOwner RmHalspecOwner; 61 #endif /* __NVOC_CLASS_RmHalspecOwner_TYPEDEF__ */ 62 63 #ifndef __nvoc_class_id_RmHalspecOwner 64 #define __nvoc_class_id_RmHalspecOwner 0x34a6d6 65 #endif /* __nvoc_class_id_RmHalspecOwner */ 66 67 extern const struct NVOC_CLASS_DEF __nvoc_class_def_RmHalspecOwner; 68 69 #define __staticCast_RmHalspecOwner(pThis) \ 70 ((pThis)->__nvoc_pbase_RmHalspecOwner) 71 72 #ifdef __nvoc_gpu_halspec_h_disabled 73 #define __dynamicCast_RmHalspecOwner(pThis) ((RmHalspecOwner*)NULL) 74 #else //__nvoc_gpu_halspec_h_disabled 75 #define __dynamicCast_RmHalspecOwner(pThis) \ 76 ((RmHalspecOwner*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(RmHalspecOwner))) 77 #endif //__nvoc_gpu_halspec_h_disabled 78 79 80 NV_STATUS __nvoc_objCreateDynamic_RmHalspecOwner(RmHalspecOwner**, Dynamic*, NvU32, va_list); 81 82 NV_STATUS __nvoc_objCreate_RmHalspecOwner(RmHalspecOwner**, Dynamic*, NvU32, 83 NvU32 ChipHal_arch, NvU32 ChipHal_impl, NvU32 ChipHal_hidrev, 84 RM_RUNTIME_VARIANT RmVariantHal_rmVariant, 85 TEGRA_CHIP_TYPE TegraChipHal_tegraType, 86 NvU32 DispIpHal_ipver); 87 #define __objCreate_RmHalspecOwner(ppNewObj, pParent, createFlags, ChipHal_arch, ChipHal_impl, ChipHal_hidrev, RmVariantHal_rmVariant, TegraChipHal_tegraType, DispIpHal_ipver) \ 88 __nvoc_objCreate_RmHalspecOwner((ppNewObj), staticCast((pParent), Dynamic), (createFlags), ChipHal_arch, ChipHal_impl, ChipHal_hidrev, RmVariantHal_rmVariant, TegraChipHal_tegraType, DispIpHal_ipver) 89 90 #undef PRIVATE_FIELD 91 92 93 #endif // GPU_HALSPEC_H 94 95 #ifdef __cplusplus 96 } // extern "C" 97 #endif 98 99 #endif // _G_GPU_HALSPEC_NVOC_H_ 100