1 #ifndef _G_GSYNC_NVOC_H_ 2 #define _G_GSYNC_NVOC_H_ 3 #include "nvoc/runtime.h" 4 5 #ifdef __cplusplus 6 extern "C" { 7 #endif 8 9 /* 10 * SPDX-FileCopyrightText: Copyright (c) 2006-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. 11 * SPDX-License-Identifier: MIT 12 * 13 * Permission is hereby granted, free of charge, to any person obtaining a 14 * copy of this software and associated documentation files (the "Software"), 15 * to deal in the Software without restriction, including without limitation 16 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 17 * and/or sell copies of the Software, and to permit persons to whom the 18 * Software is furnished to do so, subject to the following conditions: 19 * 20 * The above copyright notice and this permission notice shall be included in 21 * all copies or substantial portions of the Software. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 26 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 28 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 29 * DEALINGS IN THE SOFTWARE. 30 */ 31 32 #include "g_gsync_nvoc.h" 33 34 #ifndef GSYNC_H_ 35 #define GSYNC_H_ 36 37 /* ------------------------ Includes --------------------------------------- */ 38 #include "core/core.h" 39 #include "core/system.h" 40 #include "gpu/external_device/external_device.h" 41 #include "ctrl/ctrl0000/ctrl0000gsync.h" 42 #include "ctrl/ctrl30f1.h" 43 #include "class/cl30f1.h" 44 45 /* ------------------------ Types definitions ------------------------------ */ 46 typedef enum { 47 /* Following value is valid for all gsync devices */ 48 gsync_Connector_None = 49 NV30F1_CTRL_GET_GSYNC_GPU_TOPOLOGY_NONE, 50 51 /* For P2060 four connectors are index based i.e. 0 to 3 */ 52 } GSYNCCONNECTOR; 53 54 typedef enum { 55 gsync_SyncPolarity_RisingEdge = 56 NV30F1_CTRL_GSYNC_SET_CONTROL_SYNC_POLARITY_RISING_EDGE, 57 gsync_SyncPolarity_FallingEdge = 58 NV30F1_CTRL_GSYNC_SET_CONTROL_SYNC_POLARITY_FALLING_EDGE, 59 gsync_SyncPolarity_BothEdges = 60 NV30F1_CTRL_GSYNC_SET_CONTROL_SYNC_POLARITY_BOTH_EDGES 61 } GSYNCSYNCPOLARITY; 62 63 typedef enum { 64 gsync_VideoMode_None = 65 NV30F1_CTRL_GSYNC_SET_CONTROL_VIDEO_MODE_NONE, 66 gsync_VideoMode_TTL = 67 NV30F1_CTRL_GSYNC_SET_CONTROL_VIDEO_MODE_TTL, 68 gsync_VideoMode_NTSCPALSECAM = 69 NV30F1_CTRL_GSYNC_SET_CONTROL_VIDEO_MODE_NTSCPALSECAM, 70 gsync_VideoMode_HDTV = 71 NV30F1_CTRL_GSYNC_SET_CONTROL_VIDEO_MODE_HDTV, 72 73 /* Following value is valid from P2060 only */ 74 gsync_VideoMode_COMPOSITE = 75 NV30F1_CTRL_GSYNC_GET_CONTROL_VIDEO_MODE_COMPOSITE 76 } GSYNCVIDEOMODE; 77 78 typedef enum { 79 gsync_Signal_RJ45_0 = 0, 80 gsync_Signal_RJ45_1 = 1, 81 gsync_Signal_House = 2, 82 gsync_Signal_Supported = 3 83 } GSYNCSYNCSIGNAL; 84 85 typedef enum { 86 gsync_Status_Refresh = 0, 87 gsync_Status_HouseSyncIncoming = 1, 88 gsync_Status_bSyncReady = 2, 89 gsync_Status_bSwapReady = 3, 90 gsync_Status_bTiming = 4, 91 gsync_Status_bStereoSync = 5, 92 gsync_Status_bHouseSync = 6, 93 gsync_Status_bPort0Input = 7, 94 gsync_Status_bPort1Input = 8, 95 gsync_Status_bPort0Ethernet = 9, 96 gsync_Status_bPort1Ethernet = 10, 97 gsync_Status_UniversalFrameCount = 11, 98 gsync_Status_bInternalSlave = 12, 99 } GSYNCSTATUS; 100 101 typedef enum { 102 refRead = 0, 103 refFetchGet = 1, 104 refSetCommit = 2, 105 } REFTYPE; 106 107 typedef NV30F1_CTRL_GSYNC_GET_OPTIMIZED_TIMING_PARAMS GSYNCTIMINGPARAMS; 108 typedef NV30F1_CTRL_GSYNC_GET_CAPS_PARAMS GSYNCCAPSPARAMS; 109 110 typedef NV_STATUS GsyncShutdownProvider(NvU32); 111 112 typedef NvBool GsyncGpuCanBeMaster (struct OBJGPU *, PDACEXTERNALDEVICE); 113 typedef NV_STATUS GsyncGetSyncPolarity (struct OBJGPU *, PDACEXTERNALDEVICE, GSYNCSYNCPOLARITY *); 114 typedef NV_STATUS GsyncSetSyncPolarity (struct OBJGPU *, PDACEXTERNALDEVICE, GSYNCSYNCPOLARITY); 115 typedef NV_STATUS GsyncGetVideoMode (struct OBJGPU *, PDACEXTERNALDEVICE, GSYNCVIDEOMODE*); 116 typedef NV_STATUS GsyncSetVideoMode (struct OBJGPU *, PDACEXTERNALDEVICE, GSYNCVIDEOMODE); 117 typedef NV_STATUS GsyncGetNSync (struct OBJGPU *, PDACEXTERNALDEVICE, NvU32 *); 118 typedef NV_STATUS GsyncSetNSync (struct OBJGPU *, PDACEXTERNALDEVICE, NvU32); 119 typedef NV_STATUS GsyncGetSyncSkew (struct OBJGPU *, PDACEXTERNALDEVICE, NvU32 *); 120 typedef NV_STATUS GsyncSetSyncSkew (struct OBJGPU *, PDACEXTERNALDEVICE, NvU32); 121 typedef NV_STATUS GsyncGetUseHouse (struct OBJGPU *, PDACEXTERNALDEVICE, NvU32 *); 122 typedef NV_STATUS GsyncSetUseHouse (struct OBJGPU *, PDACEXTERNALDEVICE, NvU32); 123 typedef NV_STATUS GsyncGetSyncStartDelay (struct OBJGPU *, PDACEXTERNALDEVICE, NvU32 *); 124 typedef NV_STATUS GsyncSetSyncStartDelay (struct OBJGPU *, PDACEXTERNALDEVICE, NvU32); 125 typedef NV_STATUS GsyncGetEmitTestSignal (struct OBJGPU *, PDACEXTERNALDEVICE, NvU32 *); 126 typedef NV_STATUS GsyncSetEmitTestSignal (struct OBJGPU *, PDACEXTERNALDEVICE, NvU32); 127 typedef NV_STATUS GsyncGetInterlaceMode (struct OBJGPU *, PDACEXTERNALDEVICE, NvU32 *); 128 typedef NV_STATUS GsyncSetInterlaceMode (struct OBJGPU *, PDACEXTERNALDEVICE, NvU32); 129 typedef NV_STATUS GsyncRefSwapBarrier (struct OBJGPU *, PDACEXTERNALDEVICE, REFTYPE, NvBool *); 130 typedef NV_STATUS GsyncRefSignal (struct OBJGPU *, PDACEXTERNALDEVICE, REFTYPE, GSYNCSYNCSIGNAL, NvBool TestRate, NvU32 *); 131 typedef NV_STATUS GsyncRefMaster (struct OBJGPU *, PDACEXTERNALDEVICE, REFTYPE, NvU32 *, NvU32 *, NvBool, NvBool); 132 typedef NV_STATUS GsyncRefSlaves (struct OBJGPU *, PDACEXTERNALDEVICE, REFTYPE, NvU32 *, NvU32 *); 133 typedef NV_STATUS GsyncGetCplStatus (struct OBJGPU *, PDACEXTERNALDEVICE, GSYNCSTATUS, NvU32 *); 134 typedef NV_STATUS GsyncSetWatchdog (struct OBJGPU *, PDACEXTERNALDEVICE, NvU32); 135 typedef NV_STATUS GsyncGetRevision (struct OBJGPU *, PDACEXTERNALDEVICE, GSYNCCAPSPARAMS *); 136 typedef NV_STATUS GsyncRefMasterable (struct OBJGPU *, PDACEXTERNALDEVICE, REFTYPE, NvU32 *, NvU32 *); 137 typedef NV_STATUS GsyncGetStereoLockMode (struct OBJGPU *, PDACEXTERNALDEVICE, NvU32 *); 138 typedef NV_STATUS GsyncSetStereoLockMode (struct OBJGPU *, PDACEXTERNALDEVICE, NvU32); 139 typedef NV_STATUS GsyncOptimizeTiming (struct OBJGPU *, GSYNCTIMINGPARAMS *); 140 typedef NV_STATUS GsyncSetMosaic (struct OBJGPU *, PDACEXTERNALDEVICE, NV30F1_CTRL_GSYNC_SET_LOCAL_SYNC_PARAMS *); 141 typedef NV_STATUS GsyncConfigFlashGsync (struct OBJGPU *, PDACEXTERNALDEVICE, NvU32); 142 typedef NV_STATUS GsyncGetHouseSyncMode (struct OBJGPU *, PDACEXTERNALDEVICE, NvU8*); 143 typedef NV_STATUS GsyncSetHouseSyncMode (struct OBJGPU *, PDACEXTERNALDEVICE, NvU8); 144 typedef NV_STATUS GsyncGetMulDiv (struct OBJGPU *, DACEXTERNALDEVICE *, NV30F1_CTRL_GSYNC_MULTIPLY_DIVIDE_SETTINGS *); 145 typedef NV_STATUS GsyncSetMulDiv (struct OBJGPU *, DACEXTERNALDEVICE *, NV30F1_CTRL_GSYNC_MULTIPLY_DIVIDE_SETTINGS *); 146 147 typedef struct GSYNC_HAL_IFACES { 148 149 GsyncGpuCanBeMaster *gsyncGpuCanBeMaster; 150 GsyncGetSyncPolarity *gsyncGetSyncPolarity; 151 GsyncSetSyncPolarity *gsyncSetSyncPolarity; 152 GsyncGetVideoMode *gsyncGetVideoMode; 153 GsyncSetVideoMode *gsyncSetVideoMode; 154 GsyncGetNSync *gsyncGetNSync; 155 GsyncSetNSync *gsyncSetNSync; 156 GsyncGetSyncSkew *gsyncGetSyncSkew; 157 GsyncSetSyncSkew *gsyncSetSyncSkew; 158 GsyncGetUseHouse *gsyncGetUseHouse; 159 GsyncSetUseHouse *gsyncSetUseHouse; 160 GsyncGetSyncStartDelay *gsyncGetSyncStartDelay; 161 GsyncSetSyncStartDelay *gsyncSetSyncStartDelay; 162 GsyncGetEmitTestSignal *gsyncGetEmitTestSignal; 163 GsyncSetEmitTestSignal *gsyncSetEmitTestSignal; 164 GsyncGetInterlaceMode *gsyncGetInterlaceMode; 165 GsyncSetInterlaceMode *gsyncSetInterlaceMode; 166 GsyncRefSwapBarrier *gsyncRefSwapBarrier; 167 GsyncRefSignal *gsyncRefSignal; 168 GsyncRefMaster *gsyncRefMaster; 169 GsyncRefSlaves *gsyncRefSlaves; 170 GsyncGetCplStatus *gsyncGetCplStatus; 171 GsyncSetWatchdog *gsyncSetWatchdog; 172 GsyncGetRevision *gsyncGetRevision; 173 GsyncRefMasterable *gsyncRefMasterable; 174 GsyncOptimizeTiming *gsyncOptimizeTiming; 175 GsyncGetStereoLockMode *gsyncGetStereoLockMode; 176 GsyncSetStereoLockMode *gsyncSetStereoLockMode; 177 GsyncSetMosaic *gsyncSetMosaic; 178 GsyncConfigFlashGsync *gsyncConfigFlashGsync; 179 GsyncGetHouseSyncMode *gsyncGetHouseSyncMode; 180 GsyncSetHouseSyncMode *gsyncSetHouseSyncMode; 181 GsyncGetMulDiv *gsyncGetMulDiv; 182 GsyncSetMulDiv *gsyncSetMulDiv; 183 184 } GSYNC_HAL_IFACES; 185 186 typedef struct _def_gsync { 187 NvU32 gsyncId; 188 NvU32 gpuCount; 189 NvU32 connectorCount; 190 struct { 191 NvU32 gpuId; 192 NvU32 connector; 193 NvU32 proxyGpuId; 194 } gpus[NV30F1_CTRL_MAX_GPUS_PER_GSYNC]; 195 196 PDACEXTERNALDEVICE pExtDev; 197 198 // 199 // Set for the gsync objects lifetime until 200 // any gsyncSetControlWatchdog has come in 201 // as this indicated client's are taking care 202 // and don't want any automatic solution. 203 // 204 NvBool bAutomaticWatchdogScheduling; 205 NvBool bDoEventFiltering; 206 207 // Bitmask of Masterable GPU connectors. 208 NvU8 masterableGpuConnectors; 209 210 // gsync hal 211 GSYNC_HAL_IFACES gsyncHal; 212 213 } OBJGSYNC, *POBJGSYNC; 214 215 /* ------------------------ Macros & Defines ------------------------------- */ 216 #define FLIPLOCK_LSR_MIN_TIME_FOR_SAWP_BARRIER_NV50 0x3FF //max LSR_MIN_TIME value for nv50 217 #define FLIPLOCK_LSR_MIN_TIME_FOR_SAWP_BARRIER_GF100 0x3FF //max LSR_MIN_TIME value for gf100 218 #define FLIPLOCK_LSR_MIN_TIME_FOR_SAWP_BARRIER_V02 0x3FF //max LSR_MIN_TIME value for gf11x+ 219 220 typedef struct OBJGSYNCMGR *POBJGSYNCMGR; 221 222 223 // Private field names are wrapped in PRIVATE_FIELD, which does nothing for 224 // the matching C source file, but causes diagnostics to be issued if another 225 // source file references the field. 226 #ifdef NVOC_GSYNC_H_PRIVATE_ACCESS_ALLOWED 227 #define PRIVATE_FIELD(x) x 228 #else 229 #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) 230 #endif 231 232 struct OBJGSYNCMGR { 233 const struct NVOC_RTTI *__nvoc_rtti; 234 struct Object __nvoc_base_Object; 235 struct Object *__nvoc_pbase_Object; 236 struct OBJGSYNCMGR *__nvoc_pbase_OBJGSYNCMGR; 237 NvU32 gsyncCount; 238 OBJGSYNC gsyncTable[4]; 239 }; 240 241 #ifndef __NVOC_CLASS_OBJGSYNCMGR_TYPEDEF__ 242 #define __NVOC_CLASS_OBJGSYNCMGR_TYPEDEF__ 243 typedef struct OBJGSYNCMGR OBJGSYNCMGR; 244 #endif /* __NVOC_CLASS_OBJGSYNCMGR_TYPEDEF__ */ 245 246 #ifndef __nvoc_class_id_OBJGSYNCMGR 247 #define __nvoc_class_id_OBJGSYNCMGR 0xd07fd0 248 #endif /* __nvoc_class_id_OBJGSYNCMGR */ 249 250 extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJGSYNCMGR; 251 252 #define __staticCast_OBJGSYNCMGR(pThis) \ 253 ((pThis)->__nvoc_pbase_OBJGSYNCMGR) 254 255 #ifdef __nvoc_gsync_h_disabled 256 #define __dynamicCast_OBJGSYNCMGR(pThis) ((OBJGSYNCMGR*)NULL) 257 #else //__nvoc_gsync_h_disabled 258 #define __dynamicCast_OBJGSYNCMGR(pThis) \ 259 ((OBJGSYNCMGR*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(OBJGSYNCMGR))) 260 #endif //__nvoc_gsync_h_disabled 261 262 263 NV_STATUS __nvoc_objCreateDynamic_OBJGSYNCMGR(OBJGSYNCMGR**, Dynamic*, NvU32, va_list); 264 265 NV_STATUS __nvoc_objCreate_OBJGSYNCMGR(OBJGSYNCMGR**, Dynamic*, NvU32); 266 #define __objCreate_OBJGSYNCMGR(ppNewObj, pParent, createFlags) \ 267 __nvoc_objCreate_OBJGSYNCMGR((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) 268 269 NV_STATUS gsyncmgrConstruct_IMPL(struct OBJGSYNCMGR *arg_pGsyncmgr); 270 271 #define __nvoc_gsyncmgrConstruct(arg_pGsyncmgr) gsyncmgrConstruct_IMPL(arg_pGsyncmgr) 272 void gsyncmgrDestruct_IMPL(struct OBJGSYNCMGR *pGsyncmgr); 273 274 #define __nvoc_gsyncmgrDestruct(pGsyncmgr) gsyncmgrDestruct_IMPL(pGsyncmgr) 275 #undef PRIVATE_FIELD 276 277 278 279 NV_STATUS gsyncGetAttachedIds(NV0000_CTRL_GSYNC_GET_ATTACHED_IDS_PARAMS *); 280 NV_STATUS gsyncGetIdInfo(NV0000_CTRL_GSYNC_GET_ID_INFO_PARAMS *); 281 NV_STATUS gsyncAttachGpu(PDACEXTERNALDEVICE pExtDev, struct OBJGPU *pGpu, 282 GSYNCCONNECTOR con, struct OBJGPU *pProxyGpu, 283 DAC_EXTERNAL_DEVICES externalDevice); 284 NV_STATUS gsyncRemoveGpu(struct OBJGPU *pGpu); 285 NvBool gsyncIsInstanceValid(NvU32 gsyncInst); 286 struct OBJGPU *gsyncGetMasterableGpuByInstance(NvU32 gsyncInst); 287 NV_STATUS gsyncSignalServiceRequested(NvU32 gsyncInst, NvU32 eventFlags, NvU32 iface); 288 NvU32 gsyncGetGsyncInstance(struct OBJGPU *pGpu); 289 NvU32 gsyncFilterEvents(NvU32, NvU32); 290 NvU32 gsyncConvertNewEventToOldEventNum(NvU32); 291 NvBool gsyncAreAllGpusInConfigAttachedToSameGsyncBoard(struct OBJGPU **pGpus, NvU32 gpuCount); 292 293 OBJGSYNC *gsyncmgrGetGsync(struct OBJGPU *); 294 295 #ifdef DEBUG 296 void gsyncDbgPrintGsyncEvents(NvU32 events, NvU32 iface); 297 #else 298 #define gsyncDbgPrintGsyncEvents(events, iface) 299 #endif 300 301 #endif // GSYNC_H_ 302 303 #ifdef __cplusplus 304 } // extern "C" 305 #endif 306 307 #endif // _G_GSYNC_NVOC_H_ 308