1 #define NVOC_KERN_BUS_H_PRIVATE_ACCESS_ALLOWED 2 #include "nvoc/runtime.h" 3 #include "nvoc/rtti.h" 4 #include "nvtypes.h" 5 #include "nvport/nvport.h" 6 #include "nvport/inline/util_valist.h" 7 #include "utils/nvassert.h" 8 #include "g_kern_bus_nvoc.h" 9 10 #ifdef DEBUG 11 char __nvoc_class_id_uniqueness_check_0xd2ac57 = 1; 12 #endif 13 14 extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelBus; 15 16 extern const struct NVOC_CLASS_DEF __nvoc_class_def_Object; 17 18 extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJENGSTATE; 19 20 void __nvoc_init_KernelBus(KernelBus*, RmHalspecOwner* ); 21 void __nvoc_init_funcTable_KernelBus(KernelBus*, RmHalspecOwner* ); 22 NV_STATUS __nvoc_ctor_KernelBus(KernelBus*, RmHalspecOwner* ); 23 void __nvoc_init_dataField_KernelBus(KernelBus*, RmHalspecOwner* ); 24 void __nvoc_dtor_KernelBus(KernelBus*); 25 extern const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelBus; 26 27 static const struct NVOC_RTTI __nvoc_rtti_KernelBus_KernelBus = { 28 /*pClassDef=*/ &__nvoc_class_def_KernelBus, 29 /*dtor=*/ (NVOC_DYNAMIC_DTOR) &__nvoc_dtor_KernelBus, 30 /*offset=*/ 0, 31 }; 32 33 static const struct NVOC_RTTI __nvoc_rtti_KernelBus_Object = { 34 /*pClassDef=*/ &__nvoc_class_def_Object, 35 /*dtor=*/ &__nvoc_destructFromBase, 36 /*offset=*/ NV_OFFSETOF(KernelBus, __nvoc_base_OBJENGSTATE.__nvoc_base_Object), 37 }; 38 39 static const struct NVOC_RTTI __nvoc_rtti_KernelBus_OBJENGSTATE = { 40 /*pClassDef=*/ &__nvoc_class_def_OBJENGSTATE, 41 /*dtor=*/ &__nvoc_destructFromBase, 42 /*offset=*/ NV_OFFSETOF(KernelBus, __nvoc_base_OBJENGSTATE), 43 }; 44 45 static const struct NVOC_CASTINFO __nvoc_castinfo_KernelBus = { 46 /*numRelatives=*/ 3, 47 /*relatives=*/ { 48 &__nvoc_rtti_KernelBus_KernelBus, 49 &__nvoc_rtti_KernelBus_OBJENGSTATE, 50 &__nvoc_rtti_KernelBus_Object, 51 }, 52 }; 53 54 const struct NVOC_CLASS_DEF __nvoc_class_def_KernelBus = 55 { 56 /*classInfo=*/ { 57 /*size=*/ sizeof(KernelBus), 58 /*classId=*/ classId(KernelBus), 59 /*providerId=*/ &__nvoc_rtti_provider, 60 #if NV_PRINTF_STRINGS_ALLOWED 61 /*name=*/ "KernelBus", 62 #endif 63 }, 64 /*objCreatefn=*/ (NVOC_DYNAMIC_OBJ_CREATE) &__nvoc_objCreateDynamic_KernelBus, 65 /*pCastInfo=*/ &__nvoc_castinfo_KernelBus, 66 /*pExportInfo=*/ &__nvoc_export_info_KernelBus 67 }; 68 69 static NV_STATUS __nvoc_thunk_KernelBus_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, ENGDESCRIPTOR arg0) { 70 return kbusConstructEngine(pGpu, (struct KernelBus *)(((unsigned char *)pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset), arg0); 71 } 72 73 static NV_STATUS __nvoc_thunk_KernelBus_engstateStatePreInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus) { 74 return kbusStatePreInitLocked(pGpu, (struct KernelBus *)(((unsigned char *)pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); 75 } 76 77 static NV_STATUS __nvoc_thunk_KernelBus_engstateStateInitLocked(OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus) { 78 return kbusStateInitLocked(pGpu, (struct KernelBus *)(((unsigned char *)pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); 79 } 80 81 static NV_STATUS __nvoc_thunk_KernelBus_engstateStatePreLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 arg0) { 82 return kbusStatePreLoad(pGpu, (struct KernelBus *)(((unsigned char *)pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset), arg0); 83 } 84 85 static NV_STATUS __nvoc_thunk_KernelBus_engstateStateLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 arg0) { 86 return kbusStateLoad(pGpu, (struct KernelBus *)(((unsigned char *)pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset), arg0); 87 } 88 89 static NV_STATUS __nvoc_thunk_KernelBus_engstateStatePostLoad(OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 arg0) { 90 return kbusStatePostLoad(pGpu, (struct KernelBus *)(((unsigned char *)pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset), arg0); 91 } 92 93 static NV_STATUS __nvoc_thunk_KernelBus_engstateStatePreUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 arg0) { 94 return kbusStatePreUnload(pGpu, (struct KernelBus *)(((unsigned char *)pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset), arg0); 95 } 96 97 static NV_STATUS __nvoc_thunk_KernelBus_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus, NvU32 flags) { 98 return kbusStateUnload(pGpu, (struct KernelBus *)(((unsigned char *)pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset), flags); 99 } 100 101 static void __nvoc_thunk_KernelBus_engstateStateDestroy(OBJGPU *pGpu, struct OBJENGSTATE *pKernelBus) { 102 kbusStateDestroy(pGpu, (struct KernelBus *)(((unsigned char *)pKernelBus) - __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); 103 } 104 105 static NV_STATUS __nvoc_thunk_OBJENGSTATE_kbusReconcileTunableState(POBJGPU pGpu, struct KernelBus *pEngstate, void *pTunableState) { 106 return engstateReconcileTunableState(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelBus_OBJENGSTATE.offset), pTunableState); 107 } 108 109 static NV_STATUS __nvoc_thunk_OBJENGSTATE_kbusStatePostUnload(POBJGPU pGpu, struct KernelBus *pEngstate, NvU32 arg0) { 110 return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelBus_OBJENGSTATE.offset), arg0); 111 } 112 113 static NV_STATUS __nvoc_thunk_OBJENGSTATE_kbusStateInitUnlocked(POBJGPU pGpu, struct KernelBus *pEngstate) { 114 return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); 115 } 116 117 static void __nvoc_thunk_OBJENGSTATE_kbusInitMissing(POBJGPU pGpu, struct KernelBus *pEngstate) { 118 engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); 119 } 120 121 static NV_STATUS __nvoc_thunk_OBJENGSTATE_kbusStatePreInitUnlocked(POBJGPU pGpu, struct KernelBus *pEngstate) { 122 return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); 123 } 124 125 static NV_STATUS __nvoc_thunk_OBJENGSTATE_kbusGetTunableState(POBJGPU pGpu, struct KernelBus *pEngstate, void *pTunableState) { 126 return engstateGetTunableState(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelBus_OBJENGSTATE.offset), pTunableState); 127 } 128 129 static NV_STATUS __nvoc_thunk_OBJENGSTATE_kbusCompareTunableState(POBJGPU pGpu, struct KernelBus *pEngstate, void *pTunables1, void *pTunables2) { 130 return engstateCompareTunableState(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelBus_OBJENGSTATE.offset), pTunables1, pTunables2); 131 } 132 133 static void __nvoc_thunk_OBJENGSTATE_kbusFreeTunableState(POBJGPU pGpu, struct KernelBus *pEngstate, void *pTunableState) { 134 engstateFreeTunableState(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelBus_OBJENGSTATE.offset), pTunableState); 135 } 136 137 static NV_STATUS __nvoc_thunk_OBJENGSTATE_kbusAllocTunableState(POBJGPU pGpu, struct KernelBus *pEngstate, void **ppTunableState) { 138 return engstateAllocTunableState(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelBus_OBJENGSTATE.offset), ppTunableState); 139 } 140 141 static NV_STATUS __nvoc_thunk_OBJENGSTATE_kbusSetTunableState(POBJGPU pGpu, struct KernelBus *pEngstate, void *pTunableState) { 142 return engstateSetTunableState(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelBus_OBJENGSTATE.offset), pTunableState); 143 } 144 145 static NvBool __nvoc_thunk_OBJENGSTATE_kbusIsPresent(POBJGPU pGpu, struct KernelBus *pEngstate) { 146 return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelBus_OBJENGSTATE.offset)); 147 } 148 149 const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelBus = 150 { 151 /*numEntries=*/ 0, 152 /*pExportEntries=*/ 0 153 }; 154 155 void __nvoc_dtor_OBJENGSTATE(OBJENGSTATE*); 156 void __nvoc_dtor_KernelBus(KernelBus *pThis) { 157 __nvoc_kbusDestruct(pThis); 158 __nvoc_dtor_OBJENGSTATE(&pThis->__nvoc_base_OBJENGSTATE); 159 PORT_UNREFERENCED_VARIABLE(pThis); 160 } 161 162 void __nvoc_init_dataField_KernelBus(KernelBus *pThis, RmHalspecOwner *pRmhalspecowner) { 163 ChipHal *chipHal = &pRmhalspecowner->chipHal; 164 const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; 165 RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; 166 const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; 167 PORT_UNREFERENCED_VARIABLE(pThis); 168 PORT_UNREFERENCED_VARIABLE(pRmhalspecowner); 169 PORT_UNREFERENCED_VARIABLE(chipHal); 170 PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); 171 PORT_UNREFERENCED_VARIABLE(rmVariantHal); 172 PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); 173 174 // Hal field -- bFlaDummyPageEnabled 175 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ 176 { 177 pThis->bFlaDummyPageEnabled = ((NvBool)(0 == 0)); 178 } 179 // default 180 else 181 { 182 pThis->bFlaDummyPageEnabled = ((NvBool)(0 != 0)); 183 } 184 185 // Hal field -- bP2pMailboxClientAllocatedBug3466714VoltaAndUp 186 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ 187 { 188 pThis->bP2pMailboxClientAllocatedBug3466714VoltaAndUp = ((NvBool)(0 == 0)); 189 } 190 191 // Hal field -- bBug2751296LimitBar2PtSize 192 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ 193 { 194 pThis->bBug2751296LimitBar2PtSize = ((NvBool)(0 == 0)); 195 } 196 197 // Hal field -- bAllowReflectedMappingAccess 198 // default 199 { 200 pThis->bAllowReflectedMappingAccess = ((NvBool)(0 != 0)); 201 } 202 203 // Hal field -- bBar2Tunnelled 204 // default 205 { 206 pThis->bBar2Tunnelled = ((NvBool)(0 != 0)); 207 } 208 209 // Hal field -- bBar2InternalOnly 210 // default 211 { 212 pThis->bBar2InternalOnly = ((NvBool)(0 != 0)); 213 } 214 215 // Hal field -- bSkipBar2TestOnGc6Exit 216 // default 217 { 218 pThis->bSkipBar2TestOnGc6Exit = ((NvBool)(0 != 0)); 219 } 220 221 // Hal field -- bReadCpuPointerToFlush 222 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ 223 { 224 pThis->bReadCpuPointerToFlush = ((NvBool)(0 == 0)); 225 } 226 227 // NVOC Property Hal field -- PDB_PROP_KBUS_NVLINK_DECONFIG_HSHUB_ON_NO_MAPPING 228 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ 229 { 230 pThis->setProperty(pThis, PDB_PROP_KBUS_NVLINK_DECONFIG_HSHUB_ON_NO_MAPPING, ((NvBool)(0 == 0))); 231 } 232 // default 233 else 234 { 235 pThis->setProperty(pThis, PDB_PROP_KBUS_NVLINK_DECONFIG_HSHUB_ON_NO_MAPPING, ((NvBool)(0 != 0))); 236 } 237 238 // NVOC Property Hal field -- PDB_PROP_KBUS_IS_MISSING 239 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ 240 { 241 pThis->setProperty(pThis, PDB_PROP_KBUS_IS_MISSING, ((NvBool)(0 != 0))); 242 } 243 } 244 245 NV_STATUS __nvoc_ctor_OBJENGSTATE(OBJENGSTATE* ); 246 NV_STATUS __nvoc_ctor_KernelBus(KernelBus *pThis, RmHalspecOwner *pRmhalspecowner) { 247 NV_STATUS status = NV_OK; 248 status = __nvoc_ctor_OBJENGSTATE(&pThis->__nvoc_base_OBJENGSTATE); 249 if (status != NV_OK) goto __nvoc_ctor_KernelBus_fail_OBJENGSTATE; 250 __nvoc_init_dataField_KernelBus(pThis, pRmhalspecowner); 251 goto __nvoc_ctor_KernelBus_exit; // Success 252 253 __nvoc_ctor_KernelBus_fail_OBJENGSTATE: 254 __nvoc_ctor_KernelBus_exit: 255 256 return status; 257 } 258 259 static void __nvoc_init_funcTable_KernelBus_1(KernelBus *pThis, RmHalspecOwner *pRmhalspecowner) { 260 ChipHal *chipHal = &pRmhalspecowner->chipHal; 261 const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; 262 RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal; 263 const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx; 264 PORT_UNREFERENCED_VARIABLE(pThis); 265 PORT_UNREFERENCED_VARIABLE(pRmhalspecowner); 266 PORT_UNREFERENCED_VARIABLE(chipHal); 267 PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx); 268 PORT_UNREFERENCED_VARIABLE(rmVariantHal); 269 PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx); 270 271 pThis->__kbusConstructEngine__ = &kbusConstructEngine_IMPL; 272 273 // Hal function -- kbusStatePreInitLocked 274 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ 275 { 276 pThis->__kbusStatePreInitLocked__ = &kbusStatePreInitLocked_GM107; 277 } 278 279 pThis->__kbusStateInitLocked__ = &kbusStateInitLocked_IMPL; 280 281 // Hal function -- kbusStatePreLoad 282 if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */ 283 { 284 pThis->__kbusStatePreLoad__ = &kbusStatePreLoad_56cd7a; 285 } 286 287 // Hal function -- kbusStateLoad 288 if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */ 289 { 290 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ 291 { 292 pThis->__kbusStateLoad__ = &kbusStateLoad_GM107; 293 } 294 } 295 296 // Hal function -- kbusStatePostLoad 297 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ 298 { 299 pThis->__kbusStatePostLoad__ = &kbusStatePostLoad_GM107; 300 } 301 302 // Hal function -- kbusStatePreUnload 303 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ 304 { 305 pThis->__kbusStatePreUnload__ = &kbusStatePreUnload_GM107; 306 } 307 308 // Hal function -- kbusStateUnload 309 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ 310 { 311 pThis->__kbusStateUnload__ = &kbusStateUnload_GM107; 312 } 313 314 // Hal function -- kbusStateDestroy 315 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ 316 { 317 pThis->__kbusStateDestroy__ = &kbusStateDestroy_GM107; 318 } 319 320 // Hal function -- kbusTeardownBar2CpuAperture 321 if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */ 322 { 323 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ 324 { 325 pThis->__kbusTeardownBar2CpuAperture__ = &kbusTeardownBar2CpuAperture_GM107; 326 } 327 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 328 { 329 pThis->__kbusTeardownBar2CpuAperture__ = &kbusTeardownBar2CpuAperture_GH100; 330 } 331 } 332 333 // Hal function -- kbusGetP2PMailboxAttributes 334 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ 335 { 336 pThis->__kbusGetP2PMailboxAttributes__ = &kbusGetP2PMailboxAttributes_GM200; 337 } 338 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 339 { 340 pThis->__kbusGetP2PMailboxAttributes__ = &kbusGetP2PMailboxAttributes_GH100; 341 } 342 343 // Hal function -- kbusCreateP2PMapping 344 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ 345 { 346 pThis->__kbusCreateP2PMapping__ = &kbusCreateP2PMapping_GP100; 347 } 348 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 349 { 350 pThis->__kbusCreateP2PMapping__ = &kbusCreateP2PMapping_GH100; 351 } 352 353 // Hal function -- kbusRemoveP2PMapping 354 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ 355 { 356 pThis->__kbusRemoveP2PMapping__ = &kbusRemoveP2PMapping_GP100; 357 } 358 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 359 { 360 pThis->__kbusRemoveP2PMapping__ = &kbusRemoveP2PMapping_GH100; 361 } 362 363 // Hal function -- kbusGetPeerId 364 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ 365 { 366 pThis->__kbusGetPeerId__ = &kbusGetPeerId_GP100; 367 } 368 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 369 { 370 pThis->__kbusGetPeerId__ = &kbusGetPeerId_GH100; 371 } 372 373 // Hal function -- kbusGetNvSwitchPeerId 374 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ 375 { 376 pThis->__kbusGetNvSwitchPeerId__ = &kbusGetNvSwitchPeerId_GA100; 377 } 378 // default 379 else 380 { 381 pThis->__kbusGetNvSwitchPeerId__ = &kbusGetNvSwitchPeerId_c732fb; 382 } 383 384 // Hal function -- kbusGetUnusedPciePeerId 385 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ 386 { 387 pThis->__kbusGetUnusedPciePeerId__ = &kbusGetUnusedPciePeerId_GM107; 388 } 389 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ 390 { 391 pThis->__kbusGetUnusedPciePeerId__ = &kbusGetUnusedPciePeerId_TU102; 392 } 393 394 // Hal function -- kbusIsPeerIdValid 395 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ 396 { 397 pThis->__kbusIsPeerIdValid__ = &kbusIsPeerIdValid_GP100; 398 } 399 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 400 { 401 pThis->__kbusIsPeerIdValid__ = &kbusIsPeerIdValid_GH100; 402 } 403 404 // Hal function -- kbusGetNvlinkP2PPeerId 405 if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */ 406 { 407 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000060UL) )) /* ChipHal: TU102 | TU104 */ 408 { 409 pThis->__kbusGetNvlinkP2PPeerId__ = &kbusGetNvlinkP2PPeerId_GP100; 410 } 411 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ 412 { 413 pThis->__kbusGetNvlinkP2PPeerId__ = &kbusGetNvlinkP2PPeerId_GA100; 414 } 415 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000380UL) )) /* ChipHal: TU106 | TU116 | TU117 */ 416 { 417 pThis->__kbusGetNvlinkP2PPeerId__ = &kbusGetNvlinkP2PPeerId_56cd7a; 418 } 419 } 420 421 // Hal function -- kbusWriteP2PWmbTag 422 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ 423 { 424 pThis->__kbusWriteP2PWmbTag__ = &kbusWriteP2PWmbTag_GM200; 425 } 426 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 427 { 428 pThis->__kbusWriteP2PWmbTag__ = &kbusWriteP2PWmbTag_GH100; 429 } 430 431 // Hal function -- kbusSetupP2PDomainAccess 432 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ 433 { 434 pThis->__kbusSetupP2PDomainAccess__ = &kbusSetupP2PDomainAccess_GM200; 435 } 436 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 437 { 438 pThis->__kbusSetupP2PDomainAccess__ = &kbusSetupP2PDomainAccess_GH100; 439 } 440 441 // Hal function -- kbusNeedWarForBug999673 442 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ 443 { 444 pThis->__kbusNeedWarForBug999673__ = &kbusNeedWarForBug999673_GM200; 445 } 446 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 447 { 448 pThis->__kbusNeedWarForBug999673__ = &kbusNeedWarForBug999673_491d52; 449 } 450 451 // Hal function -- kbusCreateP2PMappingForC2C 452 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 453 { 454 pThis->__kbusCreateP2PMappingForC2C__ = &kbusCreateP2PMappingForC2C_GH100; 455 } 456 // default 457 else 458 { 459 pThis->__kbusCreateP2PMappingForC2C__ = &kbusCreateP2PMappingForC2C_46f6a7; 460 } 461 462 // Hal function -- kbusRemoveP2PMappingForC2C 463 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 464 { 465 pThis->__kbusRemoveP2PMappingForC2C__ = &kbusRemoveP2PMappingForC2C_GH100; 466 } 467 // default 468 else 469 { 470 pThis->__kbusRemoveP2PMappingForC2C__ = &kbusRemoveP2PMappingForC2C_46f6a7; 471 } 472 473 // Hal function -- kbusUnreserveP2PPeerIds 474 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ 475 { 476 pThis->__kbusUnreserveP2PPeerIds__ = &kbusUnreserveP2PPeerIds_GP100; 477 } 478 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ 479 { 480 pThis->__kbusUnreserveP2PPeerIds__ = &kbusUnreserveP2PPeerIds_46f6a7; 481 } 482 483 // Hal function -- kbusCreateP2PMappingForBar1P2P 484 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 485 { 486 pThis->__kbusCreateP2PMappingForBar1P2P__ = &kbusCreateP2PMappingForBar1P2P_GH100; 487 } 488 // default 489 else 490 { 491 pThis->__kbusCreateP2PMappingForBar1P2P__ = &kbusCreateP2PMappingForBar1P2P_46f6a7; 492 } 493 494 // Hal function -- kbusRemoveP2PMappingForBar1P2P 495 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 496 { 497 pThis->__kbusRemoveP2PMappingForBar1P2P__ = &kbusRemoveP2PMappingForBar1P2P_GH100; 498 } 499 // default 500 else 501 { 502 pThis->__kbusRemoveP2PMappingForBar1P2P__ = &kbusRemoveP2PMappingForBar1P2P_46f6a7; 503 } 504 505 // Hal function -- kbusHasPcieBar1P2PMapping 506 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 507 { 508 pThis->__kbusHasPcieBar1P2PMapping__ = &kbusHasPcieBar1P2PMapping_GH100; 509 } 510 // default 511 else 512 { 513 pThis->__kbusHasPcieBar1P2PMapping__ = &kbusHasPcieBar1P2PMapping_491d52; 514 } 515 516 // Hal function -- kbusCheckFlaSupportedAndInit 517 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ 518 { 519 pThis->__kbusCheckFlaSupportedAndInit__ = &kbusCheckFlaSupportedAndInit_GA100; 520 } 521 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0fbe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ 522 { 523 pThis->__kbusCheckFlaSupportedAndInit__ = &kbusCheckFlaSupportedAndInit_ac1694; 524 } 525 526 // Hal function -- kbusDetermineFlaRangeAndAllocate 527 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ 528 { 529 pThis->__kbusDetermineFlaRangeAndAllocate__ = &kbusDetermineFlaRangeAndAllocate_GA100; 530 } 531 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 532 { 533 pThis->__kbusDetermineFlaRangeAndAllocate__ = &kbusDetermineFlaRangeAndAllocate_GH100; 534 } 535 // default 536 else 537 { 538 pThis->__kbusDetermineFlaRangeAndAllocate__ = &kbusDetermineFlaRangeAndAllocate_395e98; 539 } 540 541 // Hal function -- kbusAllocateFlaVaspace 542 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ 543 { 544 pThis->__kbusAllocateFlaVaspace__ = &kbusAllocateFlaVaspace_GA100; 545 } 546 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 547 { 548 pThis->__kbusAllocateFlaVaspace__ = &kbusAllocateFlaVaspace_GH100; 549 } 550 // default 551 else 552 { 553 pThis->__kbusAllocateFlaVaspace__ = &kbusAllocateFlaVaspace_395e98; 554 } 555 556 // Hal function -- kbusGetFlaRange 557 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ 558 { 559 pThis->__kbusGetFlaRange__ = &kbusGetFlaRange_GA100; 560 } 561 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 562 { 563 pThis->__kbusGetFlaRange__ = &kbusGetFlaRange_GH100; 564 } 565 // default 566 else 567 { 568 pThis->__kbusGetFlaRange__ = &kbusGetFlaRange_395e98; 569 } 570 571 // Hal function -- kbusAllocateLegacyFlaVaspace 572 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ 573 { 574 pThis->__kbusAllocateLegacyFlaVaspace__ = &kbusAllocateLegacyFlaVaspace_GA100; 575 } 576 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0fbe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ 577 { 578 pThis->__kbusAllocateLegacyFlaVaspace__ = &kbusAllocateLegacyFlaVaspace_395e98; 579 } 580 581 // Hal function -- kbusAllocateHostManagedFlaVaspace 582 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ 583 { 584 pThis->__kbusAllocateHostManagedFlaVaspace__ = &kbusAllocateHostManagedFlaVaspace_GA100; 585 } 586 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0fbe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ 587 { 588 pThis->__kbusAllocateHostManagedFlaVaspace__ = &kbusAllocateHostManagedFlaVaspace_395e98; 589 } 590 591 // Hal function -- kbusDestroyFla 592 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ 593 { 594 pThis->__kbusDestroyFla__ = &kbusDestroyFla_GA100; 595 } 596 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 597 { 598 pThis->__kbusDestroyFla__ = &kbusDestroyFla_GH100; 599 } 600 // default 601 else 602 { 603 pThis->__kbusDestroyFla__ = &kbusDestroyFla_d44104; 604 } 605 606 // Hal function -- kbusGetFlaVaspace 607 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ 608 { 609 pThis->__kbusGetFlaVaspace__ = &kbusGetFlaVaspace_GA100; 610 } 611 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0fbe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ 612 { 613 pThis->__kbusGetFlaVaspace__ = &kbusGetFlaVaspace_395e98; 614 } 615 616 // Hal function -- kbusDestroyHostManagedFlaVaspace 617 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ 618 { 619 pThis->__kbusDestroyHostManagedFlaVaspace__ = &kbusDestroyHostManagedFlaVaspace_GA100; 620 } 621 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0fbe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ 622 { 623 pThis->__kbusDestroyHostManagedFlaVaspace__ = &kbusDestroyHostManagedFlaVaspace_d44104; 624 } 625 626 // Hal function -- kbusVerifyFlaRange 627 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ 628 { 629 pThis->__kbusVerifyFlaRange__ = &kbusVerifyFlaRange_GA100; 630 } 631 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0fbe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ 632 { 633 pThis->__kbusVerifyFlaRange__ = &kbusVerifyFlaRange_bf6dfa; 634 } 635 636 // Hal function -- kbusConstructFlaInstBlk 637 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ 638 { 639 pThis->__kbusConstructFlaInstBlk__ = &kbusConstructFlaInstBlk_GA100; 640 } 641 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0fbe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ 642 { 643 pThis->__kbusConstructFlaInstBlk__ = &kbusConstructFlaInstBlk_395e98; 644 } 645 646 // Hal function -- kbusDestructFlaInstBlk 647 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ 648 { 649 pThis->__kbusDestructFlaInstBlk__ = &kbusDestructFlaInstBlk_GA100; 650 } 651 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0fbe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ 652 { 653 pThis->__kbusDestructFlaInstBlk__ = &kbusDestructFlaInstBlk_d44104; 654 } 655 656 // Hal function -- kbusValidateFlaBaseAddress 657 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */ 658 { 659 pThis->__kbusValidateFlaBaseAddress__ = &kbusValidateFlaBaseAddress_GA100; 660 } 661 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0fbe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ 662 { 663 pThis->__kbusValidateFlaBaseAddress__ = &kbusValidateFlaBaseAddress_395e98; 664 } 665 666 // Hal function -- kbusSetupUnbindFla 667 if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */ 668 { 669 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ 670 { 671 pThis->__kbusSetupUnbindFla__ = &kbusSetupUnbindFla_GA100; 672 } 673 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 674 { 675 pThis->__kbusSetupUnbindFla__ = &kbusSetupUnbindFla_GH100; 676 } 677 // default 678 else 679 { 680 pThis->__kbusSetupUnbindFla__ = &kbusSetupUnbindFla_46f6a7; 681 } 682 } 683 684 // Hal function -- kbusSetupBindFla 685 if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */ 686 { 687 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ 688 { 689 pThis->__kbusSetupBindFla__ = &kbusSetupBindFla_GA100; 690 } 691 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 692 { 693 pThis->__kbusSetupBindFla__ = &kbusSetupBindFla_GH100; 694 } 695 // default 696 else 697 { 698 pThis->__kbusSetupBindFla__ = &kbusSetupBindFla_46f6a7; 699 } 700 } 701 702 // Hal function -- kbusIsDirectMappingAllowed 703 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ 704 { 705 pThis->__kbusIsDirectMappingAllowed__ = &kbusIsDirectMappingAllowed_GM107; 706 } 707 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ 708 { 709 pThis->__kbusIsDirectMappingAllowed__ = &kbusIsDirectMappingAllowed_GA100; 710 } 711 712 // Hal function -- kbusUseDirectSysmemMap 713 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */ 714 { 715 pThis->__kbusUseDirectSysmemMap__ = &kbusUseDirectSysmemMap_GM107; 716 } 717 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */ 718 { 719 pThis->__kbusUseDirectSysmemMap__ = &kbusUseDirectSysmemMap_GA100; 720 } 721 722 // Hal function -- kbusWriteBAR0WindowBase 723 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 724 { 725 pThis->__kbusWriteBAR0WindowBase__ = &kbusWriteBAR0WindowBase_GH100; 726 } 727 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ 728 { 729 pThis->__kbusWriteBAR0WindowBase__ = &kbusWriteBAR0WindowBase_395e98; 730 } 731 732 // Hal function -- kbusReadBAR0WindowBase 733 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 734 { 735 pThis->__kbusReadBAR0WindowBase__ = &kbusReadBAR0WindowBase_GH100; 736 } 737 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ 738 { 739 pThis->__kbusReadBAR0WindowBase__ = &kbusReadBAR0WindowBase_13cd8d; 740 } 741 742 // Hal function -- kbusValidateBAR0WindowBase 743 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 744 { 745 pThis->__kbusValidateBAR0WindowBase__ = &kbusValidateBAR0WindowBase_GH100; 746 } 747 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ 748 { 749 pThis->__kbusValidateBAR0WindowBase__ = &kbusValidateBAR0WindowBase_ceaee8; 750 } 751 752 // Hal function -- kbusSetBAR0WindowVidOffset 753 if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */ 754 { 755 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ 756 { 757 pThis->__kbusSetBAR0WindowVidOffset__ = &kbusSetBAR0WindowVidOffset_GM107; 758 } 759 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 760 { 761 pThis->__kbusSetBAR0WindowVidOffset__ = &kbusSetBAR0WindowVidOffset_GH100; 762 } 763 } 764 765 // Hal function -- kbusGetBAR0WindowVidOffset 766 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ 767 { 768 pThis->__kbusGetBAR0WindowVidOffset__ = &kbusGetBAR0WindowVidOffset_GM107; 769 } 770 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 771 { 772 pThis->__kbusGetBAR0WindowVidOffset__ = &kbusGetBAR0WindowVidOffset_GH100; 773 } 774 775 // Hal function -- kbusVerifyBar2 776 if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */ 777 { 778 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ 779 { 780 pThis->__kbusVerifyBar2__ = &kbusVerifyBar2_GM107; 781 } 782 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 783 { 784 pThis->__kbusVerifyBar2__ = &kbusVerifyBar2_GH100; 785 } 786 } 787 788 // Hal function -- kbusFlushPcieForBar0Doorbell 789 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 790 { 791 pThis->__kbusFlushPcieForBar0Doorbell__ = &kbusFlushPcieForBar0Doorbell_GH100; 792 } 793 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ 794 { 795 pThis->__kbusFlushPcieForBar0Doorbell__ = &kbusFlushPcieForBar0Doorbell_56cd7a; 796 } 797 798 // Hal function -- kbusMapCoherentCpuMapping 799 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 800 { 801 pThis->__kbusMapCoherentCpuMapping__ = &kbusMapCoherentCpuMapping_GV100; 802 } 803 // default 804 else 805 { 806 pThis->__kbusMapCoherentCpuMapping__ = &kbusMapCoherentCpuMapping_9e2234; 807 } 808 809 // Hal function -- kbusUnmapCoherentCpuMapping 810 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 811 { 812 pThis->__kbusUnmapCoherentCpuMapping__ = &kbusUnmapCoherentCpuMapping_GV100; 813 } 814 // default 815 else 816 { 817 pThis->__kbusUnmapCoherentCpuMapping__ = &kbusUnmapCoherentCpuMapping_d44104; 818 } 819 820 // Hal function -- kbusTeardownCoherentCpuMapping 821 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 822 { 823 pThis->__kbusTeardownCoherentCpuMapping__ = &kbusTeardownCoherentCpuMapping_GV100; 824 } 825 // default 826 else 827 { 828 pThis->__kbusTeardownCoherentCpuMapping__ = &kbusTeardownCoherentCpuMapping_d44104; 829 } 830 831 pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_KernelBus_engstateConstructEngine; 832 833 pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreInitLocked__ = &__nvoc_thunk_KernelBus_engstateStatePreInitLocked; 834 835 pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_thunk_KernelBus_engstateStateInitLocked; 836 837 pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreLoad__ = &__nvoc_thunk_KernelBus_engstateStatePreLoad; 838 839 pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_thunk_KernelBus_engstateStateLoad; 840 841 pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_thunk_KernelBus_engstateStatePostLoad; 842 843 pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_thunk_KernelBus_engstateStatePreUnload; 844 845 pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_thunk_KernelBus_engstateStateUnload; 846 847 pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_thunk_KernelBus_engstateStateDestroy; 848 849 pThis->__kbusReconcileTunableState__ = &__nvoc_thunk_OBJENGSTATE_kbusReconcileTunableState; 850 851 pThis->__kbusStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_kbusStatePostUnload; 852 853 pThis->__kbusStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kbusStateInitUnlocked; 854 855 pThis->__kbusInitMissing__ = &__nvoc_thunk_OBJENGSTATE_kbusInitMissing; 856 857 pThis->__kbusStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kbusStatePreInitUnlocked; 858 859 pThis->__kbusGetTunableState__ = &__nvoc_thunk_OBJENGSTATE_kbusGetTunableState; 860 861 pThis->__kbusCompareTunableState__ = &__nvoc_thunk_OBJENGSTATE_kbusCompareTunableState; 862 863 pThis->__kbusFreeTunableState__ = &__nvoc_thunk_OBJENGSTATE_kbusFreeTunableState; 864 865 pThis->__kbusAllocTunableState__ = &__nvoc_thunk_OBJENGSTATE_kbusAllocTunableState; 866 867 pThis->__kbusSetTunableState__ = &__nvoc_thunk_OBJENGSTATE_kbusSetTunableState; 868 869 pThis->__kbusIsPresent__ = &__nvoc_thunk_OBJENGSTATE_kbusIsPresent; 870 } 871 872 void __nvoc_init_funcTable_KernelBus(KernelBus *pThis, RmHalspecOwner *pRmhalspecowner) { 873 __nvoc_init_funcTable_KernelBus_1(pThis, pRmhalspecowner); 874 } 875 876 NvU32 kbusGetP2PWriteMailboxAddressSize_STATIC_DISPATCH(OBJGPU *pGpu) { 877 ChipHal *chipHal = &staticCast(pGpu, RmHalspecOwner)->chipHal; 878 const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx; 879 880 if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */ 881 { 882 return kbusGetP2PWriteMailboxAddressSize_GH100(pGpu); 883 } 884 else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */ 885 { 886 return kbusGetP2PWriteMailboxAddressSize_474d46(pGpu); 887 } 888 889 NV_ASSERT_FAILED("No hal impl found for kbusGetP2PWriteMailboxAddressSize"); 890 891 return 0; 892 } 893 894 void __nvoc_init_OBJENGSTATE(OBJENGSTATE*); 895 void __nvoc_init_KernelBus(KernelBus *pThis, RmHalspecOwner *pRmhalspecowner) { 896 pThis->__nvoc_pbase_KernelBus = pThis; 897 pThis->__nvoc_pbase_Object = &pThis->__nvoc_base_OBJENGSTATE.__nvoc_base_Object; 898 pThis->__nvoc_pbase_OBJENGSTATE = &pThis->__nvoc_base_OBJENGSTATE; 899 __nvoc_init_OBJENGSTATE(&pThis->__nvoc_base_OBJENGSTATE); 900 __nvoc_init_funcTable_KernelBus(pThis, pRmhalspecowner); 901 } 902 903 NV_STATUS __nvoc_objCreate_KernelBus(KernelBus **ppThis, Dynamic *pParent, NvU32 createFlags) { 904 NV_STATUS status; 905 Object *pParentObj; 906 KernelBus *pThis; 907 RmHalspecOwner *pRmhalspecowner; 908 909 pThis = portMemAllocNonPaged(sizeof(KernelBus)); 910 if (pThis == NULL) return NV_ERR_NO_MEMORY; 911 912 portMemSet(pThis, 0, sizeof(KernelBus)); 913 914 __nvoc_initRtti(staticCast(pThis, Dynamic), &__nvoc_class_def_KernelBus); 915 916 if (pParent != NULL && !(createFlags & NVOC_OBJ_CREATE_FLAGS_PARENT_HALSPEC_ONLY)) 917 { 918 pParentObj = dynamicCast(pParent, Object); 919 objAddChild(pParentObj, &pThis->__nvoc_base_OBJENGSTATE.__nvoc_base_Object); 920 } 921 else 922 { 923 pThis->__nvoc_base_OBJENGSTATE.__nvoc_base_Object.pParent = NULL; 924 } 925 926 if ((pRmhalspecowner = dynamicCast(pParent, RmHalspecOwner)) == NULL) 927 pRmhalspecowner = objFindAncestorOfType(RmHalspecOwner, pParent); 928 NV_ASSERT_OR_RETURN(pRmhalspecowner != NULL, NV_ERR_INVALID_ARGUMENT); 929 930 __nvoc_init_KernelBus(pThis, pRmhalspecowner); 931 status = __nvoc_ctor_KernelBus(pThis, pRmhalspecowner); 932 if (status != NV_OK) goto __nvoc_objCreate_KernelBus_cleanup; 933 934 *ppThis = pThis; 935 return NV_OK; 936 937 __nvoc_objCreate_KernelBus_cleanup: 938 // do not call destructors here since the constructor already called them 939 portMemFree(pThis); 940 return status; 941 } 942 943 NV_STATUS __nvoc_objCreateDynamic_KernelBus(KernelBus **ppThis, Dynamic *pParent, NvU32 createFlags, va_list args) { 944 NV_STATUS status; 945 946 status = __nvoc_objCreate_KernelBus(ppThis, pParent, createFlags); 947 948 return status; 949 } 950 951