1 #ifndef _G_KERNEL_BIF_NVOC_H_ 2 #define _G_KERNEL_BIF_NVOC_H_ 3 #include "nvoc/runtime.h" 4 5 #ifdef __cplusplus 6 extern "C" { 7 #endif 8 9 /* 10 * SPDX-FileCopyrightText: Copyright (c) 2013-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. 11 * SPDX-License-Identifier: MIT 12 * 13 * Permission is hereby granted, free of charge, to any person obtaining a 14 * copy of this software and associated documentation files (the "Software"), 15 * to deal in the Software without restriction, including without limitation 16 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 17 * and/or sell copies of the Software, and to permit persons to whom the 18 * Software is furnished to do so, subject to the following conditions: 19 * 20 * The above copyright notice and this permission notice shall be included in 21 * all copies or substantial portions of the Software. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 26 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 28 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 29 * DEALINGS IN THE SOFTWARE. 30 */ 31 32 33 /* ------------------------ Includes ---------------------------------------- */ 34 #include "g_kernel_bif_nvoc.h" 35 36 #ifndef KERNEL_BIF_H 37 #define KERNEL_BIF_H 38 39 #include "core/core.h" 40 #include "gpu/eng_state.h" 41 #include "gpu/gpu_halspec.h" 42 #include "gpu/intr/intr_service.h" 43 #include "gpu/mem_mgr/mem_desc.h" 44 #include "rmpbicmdif.h" 45 #include "nvoc/utility.h" 46 #include "ctrl/ctrl2080/ctrl2080bus.h" 47 48 49 /* ------------------------ Types definitions ------------------------------ */ 50 51 // PCIe config space size 52 #define PCIE_CONFIG_SPACE_SIZE 0x1000 53 54 // The default value of registry key ForceP2P override, ~0 means no registry key. 55 #define BIF_P2P_NOT_OVERRIDEN ((NvU32)~0) 56 57 // DMA capabilities 58 #define BIF_DMA_CAPS_SNOOP 15:0 59 #define BIF_DMA_CAPS_SNOOP_CTXDMA 0x1 60 #define BIF_DMA_CAPS_NOSNOOP 31:16 61 #define BIF_DMA_CAPS_NOSNOOP_CTXDMA 0x1 62 63 #define KBIF_CLEAR_XVE_AER_ALL_MASK (0xFFFFFFFF) 64 65 #define kbifIsSnoopDmaCapable(pGpu, pKernelBif) ((REF_VAL(BIF_DMA_CAPS_SNOOP, \ 66 kbifGetDmaCaps(pGpu, pKernelBif)))) 67 68 // XVE bus options 69 typedef enum BUS_OPTIONS 70 { 71 BUS_OPTIONS_DEV_CONTROL_STATUS = 0, 72 BUS_OPTIONS_LINK_CONTROL_STATUS, 73 BUS_OPTIONS_LINK_CAPABILITIES 74 75 } BUS_OPTIONS; 76 77 typedef struct KERNEL_HOST_VGPU_DEVICE KERNEL_HOST_VGPU_DEVICE; 78 79 #ifdef NVOC_KERNEL_BIF_H_PRIVATE_ACCESS_ALLOWED 80 #define PRIVATE_FIELD(x) x 81 #else 82 #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) 83 #endif 84 struct KernelBif { 85 const struct NVOC_RTTI *__nvoc_rtti; 86 struct OBJENGSTATE __nvoc_base_OBJENGSTATE; 87 struct Object *__nvoc_pbase_Object; 88 struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; 89 struct KernelBif *__nvoc_pbase_KernelBif; 90 NV_STATUS (*__kbifConstructEngine__)(struct OBJGPU *, struct KernelBif *, ENGDESCRIPTOR); 91 NV_STATUS (*__kbifStateInitLocked__)(struct OBJGPU *, struct KernelBif *); 92 NV_STATUS (*__kbifStateLoad__)(struct OBJGPU *, struct KernelBif *, NvU32); 93 NV_STATUS (*__kbifStatePostLoad__)(struct OBJGPU *, struct KernelBif *, NvU32); 94 NV_STATUS (*__kbifStateUnload__)(struct OBJGPU *, struct KernelBif *, NvU32); 95 NV_STATUS (*__kbifGetXveStatusBits__)(struct OBJGPU *, struct KernelBif *, NvU32 *, NvU32 *); 96 NV_STATUS (*__kbifClearXveStatus__)(struct OBJGPU *, struct KernelBif *, NvU32 *); 97 NV_STATUS (*__kbifGetXveAerBits__)(struct OBJGPU *, struct KernelBif *, NvU32 *); 98 NV_STATUS (*__kbifClearXveAer__)(struct OBJGPU *, struct KernelBif *, NvU32); 99 void (*__kbifGetPcieConfigAccessTestRegisters__)(struct OBJGPU *, struct KernelBif *, NvU32 *, NvU32 *); 100 NV_STATUS (*__kbifVerifyPcieConfigAccessTestRegisters__)(struct OBJGPU *, struct KernelBif *, NvU32, NvU32); 101 void (*__kbifRearmMSI__)(struct OBJGPU *, struct KernelBif *); 102 NvBool (*__kbifIsMSIEnabledInHW__)(struct OBJGPU *, struct KernelBif *); 103 NvBool (*__kbifIsMSIXEnabledInHW__)(struct OBJGPU *, struct KernelBif *); 104 NvBool (*__kbifIsPciIoAccessEnabled__)(struct OBJGPU *, struct KernelBif *); 105 NvBool (*__kbifIs3dController__)(struct OBJGPU *, struct KernelBif *); 106 void (*__kbifExecC73War__)(struct OBJGPU *, struct KernelBif *); 107 void (*__kbifEnableExtendedTagSupport__)(struct OBJGPU *, struct KernelBif *); 108 void (*__kbifPcieConfigEnableRelaxedOrdering__)(struct OBJGPU *, struct KernelBif *); 109 void (*__kbifPcieConfigDisableRelaxedOrdering__)(struct OBJGPU *, struct KernelBif *); 110 void (*__kbifInitRelaxedOrderingFromEmulatedConfigSpace__)(struct OBJGPU *, struct KernelBif *); 111 NV_STATUS (*__kbifEnableNoSnoop__)(struct OBJGPU *, struct KernelBif *, NvBool); 112 void (*__kbifApplyWARBug3208922__)(struct OBJGPU *, struct KernelBif *); 113 void (*__kbifProbePcieReqAtomicCaps__)(struct OBJGPU *, struct KernelBif *); 114 NV_STATUS (*__kbifGetPciConfigSpacePriMirror__)(struct OBJGPU *, struct KernelBif *, NvU32 *, NvU32 *); 115 NV_STATUS (*__kbifGetBusOptionsAddr__)(struct OBJGPU *, struct KernelBif *, BUS_OPTIONS, NvU32 *); 116 NV_STATUS (*__kbifReconcileTunableState__)(POBJGPU, struct KernelBif *, void *); 117 NV_STATUS (*__kbifStatePreLoad__)(POBJGPU, struct KernelBif *, NvU32); 118 NV_STATUS (*__kbifStatePostUnload__)(POBJGPU, struct KernelBif *, NvU32); 119 void (*__kbifStateDestroy__)(POBJGPU, struct KernelBif *); 120 NV_STATUS (*__kbifStatePreUnload__)(POBJGPU, struct KernelBif *, NvU32); 121 NV_STATUS (*__kbifStateInitUnlocked__)(POBJGPU, struct KernelBif *); 122 void (*__kbifInitMissing__)(POBJGPU, struct KernelBif *); 123 NV_STATUS (*__kbifStatePreInitLocked__)(POBJGPU, struct KernelBif *); 124 NV_STATUS (*__kbifStatePreInitUnlocked__)(POBJGPU, struct KernelBif *); 125 NV_STATUS (*__kbifGetTunableState__)(POBJGPU, struct KernelBif *, void *); 126 NV_STATUS (*__kbifCompareTunableState__)(POBJGPU, struct KernelBif *, void *, void *); 127 void (*__kbifFreeTunableState__)(POBJGPU, struct KernelBif *, void *); 128 NV_STATUS (*__kbifAllocTunableState__)(POBJGPU, struct KernelBif *, void **); 129 NV_STATUS (*__kbifSetTunableState__)(POBJGPU, struct KernelBif *, void *); 130 NvBool (*__kbifIsPresent__)(POBJGPU, struct KernelBif *); 131 NvBool PDB_PROP_KBIF_CHECK_IF_GPU_EXISTS_DEF; 132 NvBool PDB_PROP_KBIF_IS_MSI_ENABLED; 133 NvBool PDB_PROP_KBIF_IS_MSI_CACHED; 134 NvBool PDB_PROP_KBIF_IS_MSIX_ENABLED; 135 NvBool PDB_PROP_KBIF_IS_MSIX_CACHED; 136 NvBool PDB_PROP_KBIF_IS_FMODEL_MSI_BROKEN; 137 NvBool PDB_PROP_KBIF_USE_CONFIG_SPACE_TO_REARM_MSI; 138 NvBool PDB_PROP_KBIF_IS_C2C_LINK_UP; 139 NvBool PDB_PROP_KBIF_P2P_READS_DISABLED; 140 NvBool PDB_PROP_KBIF_P2P_WRITES_DISABLED; 141 NvBool PDB_PROP_KBIF_UPSTREAM_LTR_SUPPORT_WAR_BUG_200634944; 142 NvBool PDB_PROP_KBIF_SUPPORT_NONCOHERENT; 143 NvBool PDB_PROP_KBIF_PCIE_GEN4_CAPABLE; 144 NvBool PDB_PROP_KBIF_PCIE_RELAXED_ORDERING_SET_IN_EMULATED_CONFIG_SPACE; 145 NvU32 dmaCaps; 146 RmPhysAddr dmaWindowStartAddress; 147 NvU32 p2pOverride; 148 NvU32 forceP2PType; 149 NvBool peerMappingOverride; 150 NvBool EnteredRecoverySinceErrorsLastChecked; 151 NvU32 osPcieAtomicsOpMask; 152 }; 153 154 #ifndef __NVOC_CLASS_KernelBif_TYPEDEF__ 155 #define __NVOC_CLASS_KernelBif_TYPEDEF__ 156 typedef struct KernelBif KernelBif; 157 #endif /* __NVOC_CLASS_KernelBif_TYPEDEF__ */ 158 159 #ifndef __nvoc_class_id_KernelBif 160 #define __nvoc_class_id_KernelBif 0xdbe523 161 #endif /* __nvoc_class_id_KernelBif */ 162 163 extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelBif; 164 165 #define __staticCast_KernelBif(pThis) \ 166 ((pThis)->__nvoc_pbase_KernelBif) 167 168 #ifdef __nvoc_kernel_bif_h_disabled 169 #define __dynamicCast_KernelBif(pThis) ((KernelBif*)NULL) 170 #else //__nvoc_kernel_bif_h_disabled 171 #define __dynamicCast_KernelBif(pThis) \ 172 ((KernelBif*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelBif))) 173 #endif //__nvoc_kernel_bif_h_disabled 174 175 #define PDB_PROP_KBIF_CHECK_IF_GPU_EXISTS_DEF_BASE_CAST 176 #define PDB_PROP_KBIF_CHECK_IF_GPU_EXISTS_DEF_BASE_NAME PDB_PROP_KBIF_CHECK_IF_GPU_EXISTS_DEF 177 #define PDB_PROP_KBIF_IS_C2C_LINK_UP_BASE_CAST 178 #define PDB_PROP_KBIF_IS_C2C_LINK_UP_BASE_NAME PDB_PROP_KBIF_IS_C2C_LINK_UP 179 #define PDB_PROP_KBIF_IS_MSIX_ENABLED_BASE_CAST 180 #define PDB_PROP_KBIF_IS_MSIX_ENABLED_BASE_NAME PDB_PROP_KBIF_IS_MSIX_ENABLED 181 #define PDB_PROP_KBIF_P2P_WRITES_DISABLED_BASE_CAST 182 #define PDB_PROP_KBIF_P2P_WRITES_DISABLED_BASE_NAME PDB_PROP_KBIF_P2P_WRITES_DISABLED 183 #define PDB_PROP_KBIF_USE_CONFIG_SPACE_TO_REARM_MSI_BASE_CAST 184 #define PDB_PROP_KBIF_USE_CONFIG_SPACE_TO_REARM_MSI_BASE_NAME PDB_PROP_KBIF_USE_CONFIG_SPACE_TO_REARM_MSI 185 #define PDB_PROP_KBIF_IS_MSI_ENABLED_BASE_CAST 186 #define PDB_PROP_KBIF_IS_MSI_ENABLED_BASE_NAME PDB_PROP_KBIF_IS_MSI_ENABLED 187 #define PDB_PROP_KBIF_PCIE_RELAXED_ORDERING_SET_IN_EMULATED_CONFIG_SPACE_BASE_CAST 188 #define PDB_PROP_KBIF_PCIE_RELAXED_ORDERING_SET_IN_EMULATED_CONFIG_SPACE_BASE_NAME PDB_PROP_KBIF_PCIE_RELAXED_ORDERING_SET_IN_EMULATED_CONFIG_SPACE 189 #define PDB_PROP_KBIF_UPSTREAM_LTR_SUPPORT_WAR_BUG_200634944_BASE_CAST 190 #define PDB_PROP_KBIF_UPSTREAM_LTR_SUPPORT_WAR_BUG_200634944_BASE_NAME PDB_PROP_KBIF_UPSTREAM_LTR_SUPPORT_WAR_BUG_200634944 191 #define PDB_PROP_KBIF_IS_MSIX_CACHED_BASE_CAST 192 #define PDB_PROP_KBIF_IS_MSIX_CACHED_BASE_NAME PDB_PROP_KBIF_IS_MSIX_CACHED 193 #define PDB_PROP_KBIF_PCIE_GEN4_CAPABLE_BASE_CAST 194 #define PDB_PROP_KBIF_PCIE_GEN4_CAPABLE_BASE_NAME PDB_PROP_KBIF_PCIE_GEN4_CAPABLE 195 #define PDB_PROP_KBIF_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE. 196 #define PDB_PROP_KBIF_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING 197 #define PDB_PROP_KBIF_P2P_READS_DISABLED_BASE_CAST 198 #define PDB_PROP_KBIF_P2P_READS_DISABLED_BASE_NAME PDB_PROP_KBIF_P2P_READS_DISABLED 199 #define PDB_PROP_KBIF_IS_FMODEL_MSI_BROKEN_BASE_CAST 200 #define PDB_PROP_KBIF_IS_FMODEL_MSI_BROKEN_BASE_NAME PDB_PROP_KBIF_IS_FMODEL_MSI_BROKEN 201 #define PDB_PROP_KBIF_IS_MSI_CACHED_BASE_CAST 202 #define PDB_PROP_KBIF_IS_MSI_CACHED_BASE_NAME PDB_PROP_KBIF_IS_MSI_CACHED 203 #define PDB_PROP_KBIF_SUPPORT_NONCOHERENT_BASE_CAST 204 #define PDB_PROP_KBIF_SUPPORT_NONCOHERENT_BASE_NAME PDB_PROP_KBIF_SUPPORT_NONCOHERENT 205 206 NV_STATUS __nvoc_objCreateDynamic_KernelBif(KernelBif**, Dynamic*, NvU32, va_list); 207 208 NV_STATUS __nvoc_objCreate_KernelBif(KernelBif**, Dynamic*, NvU32); 209 #define __objCreate_KernelBif(ppNewObj, pParent, createFlags) \ 210 __nvoc_objCreate_KernelBif((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) 211 212 #define kbifConstructEngine(pGpu, pKernelBif, arg0) kbifConstructEngine_DISPATCH(pGpu, pKernelBif, arg0) 213 #define kbifStateInitLocked(pGpu, pKernelBif) kbifStateInitLocked_DISPATCH(pGpu, pKernelBif) 214 #define kbifStateLoad(pGpu, pKernelBif, arg0) kbifStateLoad_DISPATCH(pGpu, pKernelBif, arg0) 215 #define kbifStateLoad_HAL(pGpu, pKernelBif, arg0) kbifStateLoad_DISPATCH(pGpu, pKernelBif, arg0) 216 #define kbifStatePostLoad(pGpu, pKernelBif, arg0) kbifStatePostLoad_DISPATCH(pGpu, pKernelBif, arg0) 217 #define kbifStatePostLoad_HAL(pGpu, pKernelBif, arg0) kbifStatePostLoad_DISPATCH(pGpu, pKernelBif, arg0) 218 #define kbifStateUnload(pGpu, pKernelBif, arg0) kbifStateUnload_DISPATCH(pGpu, pKernelBif, arg0) 219 #define kbifStateUnload_HAL(pGpu, pKernelBif, arg0) kbifStateUnload_DISPATCH(pGpu, pKernelBif, arg0) 220 #define kbifGetXveStatusBits(pGpu, pKernelBif, pBits, pStatus) kbifGetXveStatusBits_DISPATCH(pGpu, pKernelBif, pBits, pStatus) 221 #define kbifGetXveStatusBits_HAL(pGpu, pKernelBif, pBits, pStatus) kbifGetXveStatusBits_DISPATCH(pGpu, pKernelBif, pBits, pStatus) 222 #define kbifClearXveStatus(pGpu, pKernelBif, pStatus) kbifClearXveStatus_DISPATCH(pGpu, pKernelBif, pStatus) 223 #define kbifClearXveStatus_HAL(pGpu, pKernelBif, pStatus) kbifClearXveStatus_DISPATCH(pGpu, pKernelBif, pStatus) 224 #define kbifGetXveAerBits(pGpu, pKernelBif, pBits) kbifGetXveAerBits_DISPATCH(pGpu, pKernelBif, pBits) 225 #define kbifGetXveAerBits_HAL(pGpu, pKernelBif, pBits) kbifGetXveAerBits_DISPATCH(pGpu, pKernelBif, pBits) 226 #define kbifClearXveAer(pGpu, pKernelBif, bits) kbifClearXveAer_DISPATCH(pGpu, pKernelBif, bits) 227 #define kbifClearXveAer_HAL(pGpu, pKernelBif, bits) kbifClearXveAer_DISPATCH(pGpu, pKernelBif, bits) 228 #define kbifGetPcieConfigAccessTestRegisters(pGpu, pKernelBif, pciStart, pcieStart) kbifGetPcieConfigAccessTestRegisters_DISPATCH(pGpu, pKernelBif, pciStart, pcieStart) 229 #define kbifGetPcieConfigAccessTestRegisters_HAL(pGpu, pKernelBif, pciStart, pcieStart) kbifGetPcieConfigAccessTestRegisters_DISPATCH(pGpu, pKernelBif, pciStart, pcieStart) 230 #define kbifVerifyPcieConfigAccessTestRegisters(pGpu, pKernelBif, nvXveId, nvXveVccapHdr) kbifVerifyPcieConfigAccessTestRegisters_DISPATCH(pGpu, pKernelBif, nvXveId, nvXveVccapHdr) 231 #define kbifVerifyPcieConfigAccessTestRegisters_HAL(pGpu, pKernelBif, nvXveId, nvXveVccapHdr) kbifVerifyPcieConfigAccessTestRegisters_DISPATCH(pGpu, pKernelBif, nvXveId, nvXveVccapHdr) 232 #define kbifRearmMSI(pGpu, pKernelBif) kbifRearmMSI_DISPATCH(pGpu, pKernelBif) 233 #define kbifRearmMSI_HAL(pGpu, pKernelBif) kbifRearmMSI_DISPATCH(pGpu, pKernelBif) 234 #define kbifIsMSIEnabledInHW(pGpu, pKernelBif) kbifIsMSIEnabledInHW_DISPATCH(pGpu, pKernelBif) 235 #define kbifIsMSIEnabledInHW_HAL(pGpu, pKernelBif) kbifIsMSIEnabledInHW_DISPATCH(pGpu, pKernelBif) 236 #define kbifIsMSIXEnabledInHW(pGpu, pKernelBif) kbifIsMSIXEnabledInHW_DISPATCH(pGpu, pKernelBif) 237 #define kbifIsMSIXEnabledInHW_HAL(pGpu, pKernelBif) kbifIsMSIXEnabledInHW_DISPATCH(pGpu, pKernelBif) 238 #define kbifIsPciIoAccessEnabled(pGpu, pKernelBif) kbifIsPciIoAccessEnabled_DISPATCH(pGpu, pKernelBif) 239 #define kbifIsPciIoAccessEnabled_HAL(pGpu, pKernelBif) kbifIsPciIoAccessEnabled_DISPATCH(pGpu, pKernelBif) 240 #define kbifIs3dController(pGpu, pKernelBif) kbifIs3dController_DISPATCH(pGpu, pKernelBif) 241 #define kbifIs3dController_HAL(pGpu, pKernelBif) kbifIs3dController_DISPATCH(pGpu, pKernelBif) 242 #define kbifExecC73War(pGpu, pKernelBif) kbifExecC73War_DISPATCH(pGpu, pKernelBif) 243 #define kbifExecC73War_HAL(pGpu, pKernelBif) kbifExecC73War_DISPATCH(pGpu, pKernelBif) 244 #define kbifEnableExtendedTagSupport(pGpu, pKernelBif) kbifEnableExtendedTagSupport_DISPATCH(pGpu, pKernelBif) 245 #define kbifEnableExtendedTagSupport_HAL(pGpu, pKernelBif) kbifEnableExtendedTagSupport_DISPATCH(pGpu, pKernelBif) 246 #define kbifPcieConfigEnableRelaxedOrdering(pGpu, pKernelBif) kbifPcieConfigEnableRelaxedOrdering_DISPATCH(pGpu, pKernelBif) 247 #define kbifPcieConfigEnableRelaxedOrdering_HAL(pGpu, pKernelBif) kbifPcieConfigEnableRelaxedOrdering_DISPATCH(pGpu, pKernelBif) 248 #define kbifPcieConfigDisableRelaxedOrdering(pGpu, pKernelBif) kbifPcieConfigDisableRelaxedOrdering_DISPATCH(pGpu, pKernelBif) 249 #define kbifPcieConfigDisableRelaxedOrdering_HAL(pGpu, pKernelBif) kbifPcieConfigDisableRelaxedOrdering_DISPATCH(pGpu, pKernelBif) 250 #define kbifInitRelaxedOrderingFromEmulatedConfigSpace(pGpu, pBif) kbifInitRelaxedOrderingFromEmulatedConfigSpace_DISPATCH(pGpu, pBif) 251 #define kbifInitRelaxedOrderingFromEmulatedConfigSpace_HAL(pGpu, pBif) kbifInitRelaxedOrderingFromEmulatedConfigSpace_DISPATCH(pGpu, pBif) 252 #define kbifEnableNoSnoop(pGpu, pKernelBif, bEnable) kbifEnableNoSnoop_DISPATCH(pGpu, pKernelBif, bEnable) 253 #define kbifEnableNoSnoop_HAL(pGpu, pKernelBif, bEnable) kbifEnableNoSnoop_DISPATCH(pGpu, pKernelBif, bEnable) 254 #define kbifApplyWARBug3208922(pGpu, pKernelBif) kbifApplyWARBug3208922_DISPATCH(pGpu, pKernelBif) 255 #define kbifApplyWARBug3208922_HAL(pGpu, pKernelBif) kbifApplyWARBug3208922_DISPATCH(pGpu, pKernelBif) 256 #define kbifProbePcieReqAtomicCaps(pGpu, pKernelBif) kbifProbePcieReqAtomicCaps_DISPATCH(pGpu, pKernelBif) 257 #define kbifProbePcieReqAtomicCaps_HAL(pGpu, pKernelBif) kbifProbePcieReqAtomicCaps_DISPATCH(pGpu, pKernelBif) 258 #define kbifGetPciConfigSpacePriMirror(pGpu, pKernelBif, pMirrorBase, pMirrorSize) kbifGetPciConfigSpacePriMirror_DISPATCH(pGpu, pKernelBif, pMirrorBase, pMirrorSize) 259 #define kbifGetPciConfigSpacePriMirror_HAL(pGpu, pKernelBif, pMirrorBase, pMirrorSize) kbifGetPciConfigSpacePriMirror_DISPATCH(pGpu, pKernelBif, pMirrorBase, pMirrorSize) 260 #define kbifGetBusOptionsAddr(pGpu, pKernelBif, options, addrReg) kbifGetBusOptionsAddr_DISPATCH(pGpu, pKernelBif, options, addrReg) 261 #define kbifGetBusOptionsAddr_HAL(pGpu, pKernelBif, options, addrReg) kbifGetBusOptionsAddr_DISPATCH(pGpu, pKernelBif, options, addrReg) 262 #define kbifReconcileTunableState(pGpu, pEngstate, pTunableState) kbifReconcileTunableState_DISPATCH(pGpu, pEngstate, pTunableState) 263 #define kbifStatePreLoad(pGpu, pEngstate, arg0) kbifStatePreLoad_DISPATCH(pGpu, pEngstate, arg0) 264 #define kbifStatePostUnload(pGpu, pEngstate, arg0) kbifStatePostUnload_DISPATCH(pGpu, pEngstate, arg0) 265 #define kbifStateDestroy(pGpu, pEngstate) kbifStateDestroy_DISPATCH(pGpu, pEngstate) 266 #define kbifStatePreUnload(pGpu, pEngstate, arg0) kbifStatePreUnload_DISPATCH(pGpu, pEngstate, arg0) 267 #define kbifStateInitUnlocked(pGpu, pEngstate) kbifStateInitUnlocked_DISPATCH(pGpu, pEngstate) 268 #define kbifInitMissing(pGpu, pEngstate) kbifInitMissing_DISPATCH(pGpu, pEngstate) 269 #define kbifStatePreInitLocked(pGpu, pEngstate) kbifStatePreInitLocked_DISPATCH(pGpu, pEngstate) 270 #define kbifStatePreInitUnlocked(pGpu, pEngstate) kbifStatePreInitUnlocked_DISPATCH(pGpu, pEngstate) 271 #define kbifGetTunableState(pGpu, pEngstate, pTunableState) kbifGetTunableState_DISPATCH(pGpu, pEngstate, pTunableState) 272 #define kbifCompareTunableState(pGpu, pEngstate, pTunables1, pTunables2) kbifCompareTunableState_DISPATCH(pGpu, pEngstate, pTunables1, pTunables2) 273 #define kbifFreeTunableState(pGpu, pEngstate, pTunableState) kbifFreeTunableState_DISPATCH(pGpu, pEngstate, pTunableState) 274 #define kbifAllocTunableState(pGpu, pEngstate, ppTunableState) kbifAllocTunableState_DISPATCH(pGpu, pEngstate, ppTunableState) 275 #define kbifSetTunableState(pGpu, pEngstate, pTunableState) kbifSetTunableState_DISPATCH(pGpu, pEngstate, pTunableState) 276 #define kbifIsPresent(pGpu, pEngstate) kbifIsPresent_DISPATCH(pGpu, pEngstate) 277 static inline NvU32 kbifGetBusIntfType_2f2c74(struct KernelBif *pKernelBif) { 278 return (3); 279 } 280 281 282 #ifdef __nvoc_kernel_bif_h_disabled 283 static inline NvU32 kbifGetBusIntfType(struct KernelBif *pKernelBif) { 284 NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!"); 285 return 0; 286 } 287 #else //__nvoc_kernel_bif_h_disabled 288 #define kbifGetBusIntfType(pKernelBif) kbifGetBusIntfType_2f2c74(pKernelBif) 289 #endif //__nvoc_kernel_bif_h_disabled 290 291 #define kbifGetBusIntfType_HAL(pKernelBif) kbifGetBusIntfType(pKernelBif) 292 293 void kbifInitDmaCaps_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); 294 295 296 #ifdef __nvoc_kernel_bif_h_disabled 297 static inline void kbifInitDmaCaps(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { 298 NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!"); 299 } 300 #else //__nvoc_kernel_bif_h_disabled 301 #define kbifInitDmaCaps(pGpu, pKernelBif) kbifInitDmaCaps_IMPL(pGpu, pKernelBif) 302 #endif //__nvoc_kernel_bif_h_disabled 303 304 #define kbifInitDmaCaps_HAL(pGpu, pKernelBif) kbifInitDmaCaps(pGpu, pKernelBif) 305 306 void kbifClearConfigErrors_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvBool arg0, NvU32 arg1); 307 308 309 #ifdef __nvoc_kernel_bif_h_disabled 310 static inline void kbifClearConfigErrors(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvBool arg0, NvU32 arg1) { 311 NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!"); 312 } 313 #else //__nvoc_kernel_bif_h_disabled 314 #define kbifClearConfigErrors(pGpu, pKernelBif, arg0, arg1) kbifClearConfigErrors_IMPL(pGpu, pKernelBif, arg0, arg1) 315 #endif //__nvoc_kernel_bif_h_disabled 316 317 #define kbifClearConfigErrors_HAL(pGpu, pKernelBif, arg0, arg1) kbifClearConfigErrors(pGpu, pKernelBif, arg0, arg1) 318 319 void kbifDisableP2PTransactions_TU102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); 320 321 322 #ifdef __nvoc_kernel_bif_h_disabled 323 static inline void kbifDisableP2PTransactions(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { 324 NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!"); 325 } 326 #else //__nvoc_kernel_bif_h_disabled 327 #define kbifDisableP2PTransactions(pGpu, pKernelBif) kbifDisableP2PTransactions_TU102(pGpu, pKernelBif) 328 #endif //__nvoc_kernel_bif_h_disabled 329 330 #define kbifDisableP2PTransactions_HAL(pGpu, pKernelBif) kbifDisableP2PTransactions(pGpu, pKernelBif) 331 332 NV_STATUS kbifGetNumVFSparseMmapRegions_TU102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice, NvU32 *numAreas); 333 334 335 #ifdef __nvoc_kernel_bif_h_disabled 336 static inline NV_STATUS kbifGetNumVFSparseMmapRegions(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice, NvU32 *numAreas) { 337 NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!"); 338 return NV_ERR_NOT_SUPPORTED; 339 } 340 #else //__nvoc_kernel_bif_h_disabled 341 #define kbifGetNumVFSparseMmapRegions(pGpu, pKernelBif, pKernelHostVgpuDevice, numAreas) kbifGetNumVFSparseMmapRegions_TU102(pGpu, pKernelBif, pKernelHostVgpuDevice, numAreas) 342 #endif //__nvoc_kernel_bif_h_disabled 343 344 #define kbifGetNumVFSparseMmapRegions_HAL(pGpu, pKernelBif, pKernelHostVgpuDevice, numAreas) kbifGetNumVFSparseMmapRegions(pGpu, pKernelBif, pKernelHostVgpuDevice, numAreas) 345 346 NV_STATUS kbifGetVFSparseMmapRegions_TU102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice, NvU64 os_page_size, NvU64 *offsets, NvU64 *sizes); 347 348 349 #ifdef __nvoc_kernel_bif_h_disabled 350 static inline NV_STATUS kbifGetVFSparseMmapRegions(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice, NvU64 os_page_size, NvU64 *offsets, NvU64 *sizes) { 351 NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!"); 352 return NV_ERR_NOT_SUPPORTED; 353 } 354 #else //__nvoc_kernel_bif_h_disabled 355 #define kbifGetVFSparseMmapRegions(pGpu, pKernelBif, pKernelHostVgpuDevice, os_page_size, offsets, sizes) kbifGetVFSparseMmapRegions_TU102(pGpu, pKernelBif, pKernelHostVgpuDevice, os_page_size, offsets, sizes) 356 #endif //__nvoc_kernel_bif_h_disabled 357 358 #define kbifGetVFSparseMmapRegions_HAL(pGpu, pKernelBif, pKernelHostVgpuDevice, os_page_size, offsets, sizes) kbifGetVFSparseMmapRegions(pGpu, pKernelBif, pKernelHostVgpuDevice, os_page_size, offsets, sizes) 359 360 NV_STATUS kbifConstructEngine_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, ENGDESCRIPTOR arg0); 361 362 static inline NV_STATUS kbifConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, ENGDESCRIPTOR arg0) { 363 return pKernelBif->__kbifConstructEngine__(pGpu, pKernelBif, arg0); 364 } 365 366 NV_STATUS kbifStateInitLocked_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); 367 368 static inline NV_STATUS kbifStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { 369 return pKernelBif->__kbifStateInitLocked__(pGpu, pKernelBif); 370 } 371 372 NV_STATUS kbifStateLoad_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg0); 373 374 static inline NV_STATUS kbifStateLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg0) { 375 return pKernelBif->__kbifStateLoad__(pGpu, pKernelBif, arg0); 376 } 377 378 NV_STATUS kbifStatePostLoad_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg0); 379 380 static inline NV_STATUS kbifStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg0) { 381 return pKernelBif->__kbifStatePostLoad__(pGpu, pKernelBif, arg0); 382 } 383 384 NV_STATUS kbifStateUnload_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg0); 385 386 static inline NV_STATUS kbifStateUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg0) { 387 return pKernelBif->__kbifStateUnload__(pGpu, pKernelBif, arg0); 388 } 389 390 NV_STATUS kbifGetXveStatusBits_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pBits, NvU32 *pStatus); 391 392 NV_STATUS kbifGetXveStatusBits_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pBits, NvU32 *pStatus); 393 394 static inline NV_STATUS kbifGetXveStatusBits_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pBits, NvU32 *pStatus) { 395 return pKernelBif->__kbifGetXveStatusBits__(pGpu, pKernelBif, pBits, pStatus); 396 } 397 398 NV_STATUS kbifClearXveStatus_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pStatus); 399 400 NV_STATUS kbifClearXveStatus_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pStatus); 401 402 static inline NV_STATUS kbifClearXveStatus_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pStatus) { 403 return pKernelBif->__kbifClearXveStatus__(pGpu, pKernelBif, pStatus); 404 } 405 406 NV_STATUS kbifGetXveAerBits_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pBits); 407 408 NV_STATUS kbifGetXveAerBits_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pBits); 409 410 static inline NV_STATUS kbifGetXveAerBits_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pBits) { 411 return pKernelBif->__kbifGetXveAerBits__(pGpu, pKernelBif, pBits); 412 } 413 414 NV_STATUS kbifClearXveAer_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 bits); 415 416 NV_STATUS kbifClearXveAer_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 bits); 417 418 static inline NV_STATUS kbifClearXveAer_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 bits) { 419 return pKernelBif->__kbifClearXveAer__(pGpu, pKernelBif, bits); 420 } 421 422 void kbifGetPcieConfigAccessTestRegisters_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pciStart, NvU32 *pcieStart); 423 424 static inline void kbifGetPcieConfigAccessTestRegisters_b3696a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pciStart, NvU32 *pcieStart) { 425 return; 426 } 427 428 static inline void kbifGetPcieConfigAccessTestRegisters_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pciStart, NvU32 *pcieStart) { 429 pKernelBif->__kbifGetPcieConfigAccessTestRegisters__(pGpu, pKernelBif, pciStart, pcieStart); 430 } 431 432 NV_STATUS kbifVerifyPcieConfigAccessTestRegisters_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 nvXveId, NvU32 nvXveVccapHdr); 433 434 static inline NV_STATUS kbifVerifyPcieConfigAccessTestRegisters_46f6a7(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 nvXveId, NvU32 nvXveVccapHdr) { 435 return NV_ERR_NOT_SUPPORTED; 436 } 437 438 static inline NV_STATUS kbifVerifyPcieConfigAccessTestRegisters_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 nvXveId, NvU32 nvXveVccapHdr) { 439 return pKernelBif->__kbifVerifyPcieConfigAccessTestRegisters__(pGpu, pKernelBif, nvXveId, nvXveVccapHdr); 440 } 441 442 void kbifRearmMSI_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); 443 444 static inline void kbifRearmMSI_f2d351(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { 445 NV_ASSERT_PRECOMP(0); 446 } 447 448 static inline void kbifRearmMSI_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { 449 pKernelBif->__kbifRearmMSI__(pGpu, pKernelBif); 450 } 451 452 NvBool kbifIsMSIEnabledInHW_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); 453 454 NvBool kbifIsMSIEnabledInHW_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); 455 456 static inline NvBool kbifIsMSIEnabledInHW_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { 457 return pKernelBif->__kbifIsMSIEnabledInHW__(pGpu, pKernelBif); 458 } 459 460 NvBool kbifIsMSIXEnabledInHW_TU102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); 461 462 NvBool kbifIsMSIXEnabledInHW_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); 463 464 static inline NvBool kbifIsMSIXEnabledInHW_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { 465 return pKernelBif->__kbifIsMSIXEnabledInHW__(pGpu, pKernelBif); 466 } 467 468 NvBool kbifIsPciIoAccessEnabled_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); 469 470 static inline NvBool kbifIsPciIoAccessEnabled_491d52(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { 471 return ((NvBool)(0 != 0)); 472 } 473 474 static inline NvBool kbifIsPciIoAccessEnabled_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { 475 return pKernelBif->__kbifIsPciIoAccessEnabled__(pGpu, pKernelBif); 476 } 477 478 NvBool kbifIs3dController_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); 479 480 NvBool kbifIs3dController_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); 481 482 static inline NvBool kbifIs3dController_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { 483 return pKernelBif->__kbifIs3dController__(pGpu, pKernelBif); 484 } 485 486 void kbifExecC73War_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); 487 488 static inline void kbifExecC73War_b3696a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { 489 return; 490 } 491 492 static inline void kbifExecC73War_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { 493 pKernelBif->__kbifExecC73War__(pGpu, pKernelBif); 494 } 495 496 void kbifEnableExtendedTagSupport_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); 497 498 static inline void kbifEnableExtendedTagSupport_b3696a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { 499 return; 500 } 501 502 static inline void kbifEnableExtendedTagSupport_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { 503 pKernelBif->__kbifEnableExtendedTagSupport__(pGpu, pKernelBif); 504 } 505 506 void kbifPcieConfigEnableRelaxedOrdering_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); 507 508 void kbifPcieConfigEnableRelaxedOrdering_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); 509 510 static inline void kbifPcieConfigEnableRelaxedOrdering_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { 511 pKernelBif->__kbifPcieConfigEnableRelaxedOrdering__(pGpu, pKernelBif); 512 } 513 514 void kbifPcieConfigDisableRelaxedOrdering_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); 515 516 void kbifPcieConfigDisableRelaxedOrdering_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); 517 518 static inline void kbifPcieConfigDisableRelaxedOrdering_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { 519 pKernelBif->__kbifPcieConfigDisableRelaxedOrdering__(pGpu, pKernelBif); 520 } 521 522 static inline void kbifInitRelaxedOrderingFromEmulatedConfigSpace_b3696a(struct OBJGPU *pGpu, struct KernelBif *pBif) { 523 return; 524 } 525 526 void kbifInitRelaxedOrderingFromEmulatedConfigSpace_GA100(struct OBJGPU *pGpu, struct KernelBif *pBif); 527 528 static inline void kbifInitRelaxedOrderingFromEmulatedConfigSpace_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pBif) { 529 pBif->__kbifInitRelaxedOrderingFromEmulatedConfigSpace__(pGpu, pBif); 530 } 531 532 NV_STATUS kbifEnableNoSnoop_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvBool bEnable); 533 534 NV_STATUS kbifEnableNoSnoop_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvBool bEnable); 535 536 static inline NV_STATUS kbifEnableNoSnoop_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvBool bEnable) { 537 return pKernelBif->__kbifEnableNoSnoop__(pGpu, pKernelBif, bEnable); 538 } 539 540 void kbifApplyWARBug3208922_GA100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); 541 542 static inline void kbifApplyWARBug3208922_b3696a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { 543 return; 544 } 545 546 static inline void kbifApplyWARBug3208922_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { 547 pKernelBif->__kbifApplyWARBug3208922__(pGpu, pKernelBif); 548 } 549 550 static inline void kbifProbePcieReqAtomicCaps_b3696a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { 551 return; 552 } 553 554 void kbifProbePcieReqAtomicCaps_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); 555 556 static inline void kbifProbePcieReqAtomicCaps_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { 557 pKernelBif->__kbifProbePcieReqAtomicCaps__(pGpu, pKernelBif); 558 } 559 560 NV_STATUS kbifGetPciConfigSpacePriMirror_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pMirrorBase, NvU32 *pMirrorSize); 561 562 NV_STATUS kbifGetPciConfigSpacePriMirror_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pMirrorBase, NvU32 *pMirrorSize); 563 564 static inline NV_STATUS kbifGetPciConfigSpacePriMirror_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pMirrorBase, NvU32 *pMirrorSize) { 565 return pKernelBif->__kbifGetPciConfigSpacePriMirror__(pGpu, pKernelBif, pMirrorBase, pMirrorSize); 566 } 567 568 NV_STATUS kbifGetBusOptionsAddr_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, BUS_OPTIONS options, NvU32 *addrReg); 569 570 NV_STATUS kbifGetBusOptionsAddr_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, BUS_OPTIONS options, NvU32 *addrReg); 571 572 static inline NV_STATUS kbifGetBusOptionsAddr_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, BUS_OPTIONS options, NvU32 *addrReg) { 573 return pKernelBif->__kbifGetBusOptionsAddr__(pGpu, pKernelBif, options, addrReg); 574 } 575 576 static inline NV_STATUS kbifReconcileTunableState_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate, void *pTunableState) { 577 return pEngstate->__kbifReconcileTunableState__(pGpu, pEngstate, pTunableState); 578 } 579 580 static inline NV_STATUS kbifStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate, NvU32 arg0) { 581 return pEngstate->__kbifStatePreLoad__(pGpu, pEngstate, arg0); 582 } 583 584 static inline NV_STATUS kbifStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate, NvU32 arg0) { 585 return pEngstate->__kbifStatePostUnload__(pGpu, pEngstate, arg0); 586 } 587 588 static inline void kbifStateDestroy_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate) { 589 pEngstate->__kbifStateDestroy__(pGpu, pEngstate); 590 } 591 592 static inline NV_STATUS kbifStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate, NvU32 arg0) { 593 return pEngstate->__kbifStatePreUnload__(pGpu, pEngstate, arg0); 594 } 595 596 static inline NV_STATUS kbifStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate) { 597 return pEngstate->__kbifStateInitUnlocked__(pGpu, pEngstate); 598 } 599 600 static inline void kbifInitMissing_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate) { 601 pEngstate->__kbifInitMissing__(pGpu, pEngstate); 602 } 603 604 static inline NV_STATUS kbifStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate) { 605 return pEngstate->__kbifStatePreInitLocked__(pGpu, pEngstate); 606 } 607 608 static inline NV_STATUS kbifStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate) { 609 return pEngstate->__kbifStatePreInitUnlocked__(pGpu, pEngstate); 610 } 611 612 static inline NV_STATUS kbifGetTunableState_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate, void *pTunableState) { 613 return pEngstate->__kbifGetTunableState__(pGpu, pEngstate, pTunableState); 614 } 615 616 static inline NV_STATUS kbifCompareTunableState_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate, void *pTunables1, void *pTunables2) { 617 return pEngstate->__kbifCompareTunableState__(pGpu, pEngstate, pTunables1, pTunables2); 618 } 619 620 static inline void kbifFreeTunableState_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate, void *pTunableState) { 621 pEngstate->__kbifFreeTunableState__(pGpu, pEngstate, pTunableState); 622 } 623 624 static inline NV_STATUS kbifAllocTunableState_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate, void **ppTunableState) { 625 return pEngstate->__kbifAllocTunableState__(pGpu, pEngstate, ppTunableState); 626 } 627 628 static inline NV_STATUS kbifSetTunableState_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate, void *pTunableState) { 629 return pEngstate->__kbifSetTunableState__(pGpu, pEngstate, pTunableState); 630 } 631 632 static inline NvBool kbifIsPresent_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate) { 633 return pEngstate->__kbifIsPresent__(pGpu, pEngstate); 634 } 635 636 NV_STATUS kbifStaticInfoInit_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); 637 638 #ifdef __nvoc_kernel_bif_h_disabled 639 static inline NV_STATUS kbifStaticInfoInit(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { 640 NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!"); 641 return NV_ERR_NOT_SUPPORTED; 642 } 643 #else //__nvoc_kernel_bif_h_disabled 644 #define kbifStaticInfoInit(pGpu, pKernelBif) kbifStaticInfoInit_IMPL(pGpu, pKernelBif) 645 #endif //__nvoc_kernel_bif_h_disabled 646 647 void kbifInitPcieDeviceControlStatus_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); 648 649 #ifdef __nvoc_kernel_bif_h_disabled 650 static inline void kbifInitPcieDeviceControlStatus(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { 651 NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!"); 652 } 653 #else //__nvoc_kernel_bif_h_disabled 654 #define kbifInitPcieDeviceControlStatus(pGpu, pKernelBif) kbifInitPcieDeviceControlStatus_IMPL(pGpu, pKernelBif) 655 #endif //__nvoc_kernel_bif_h_disabled 656 657 void kbifCheckAndRearmMSI_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); 658 659 #ifdef __nvoc_kernel_bif_h_disabled 660 static inline void kbifCheckAndRearmMSI(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { 661 NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!"); 662 } 663 #else //__nvoc_kernel_bif_h_disabled 664 #define kbifCheckAndRearmMSI(pGpu, pKernelBif) kbifCheckAndRearmMSI_IMPL(pGpu, pKernelBif) 665 #endif //__nvoc_kernel_bif_h_disabled 666 667 NvBool kbifIsMSIEnabled_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); 668 669 #ifdef __nvoc_kernel_bif_h_disabled 670 static inline NvBool kbifIsMSIEnabled(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { 671 NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!"); 672 return NV_FALSE; 673 } 674 #else //__nvoc_kernel_bif_h_disabled 675 #define kbifIsMSIEnabled(pGpu, pKernelBif) kbifIsMSIEnabled_IMPL(pGpu, pKernelBif) 676 #endif //__nvoc_kernel_bif_h_disabled 677 678 NvBool kbifIsMSIXEnabled_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); 679 680 #ifdef __nvoc_kernel_bif_h_disabled 681 static inline NvBool kbifIsMSIXEnabled(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { 682 NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!"); 683 return NV_FALSE; 684 } 685 #else //__nvoc_kernel_bif_h_disabled 686 #define kbifIsMSIXEnabled(pGpu, pKernelBif) kbifIsMSIXEnabled_IMPL(pGpu, pKernelBif) 687 #endif //__nvoc_kernel_bif_h_disabled 688 689 NvBool kbifIsPciBusFamily_IMPL(struct KernelBif *pKernelBif); 690 691 #ifdef __nvoc_kernel_bif_h_disabled 692 static inline NvBool kbifIsPciBusFamily(struct KernelBif *pKernelBif) { 693 NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!"); 694 return NV_FALSE; 695 } 696 #else //__nvoc_kernel_bif_h_disabled 697 #define kbifIsPciBusFamily(pKernelBif) kbifIsPciBusFamily_IMPL(pKernelBif) 698 #endif //__nvoc_kernel_bif_h_disabled 699 700 NV_STATUS kbifControlGetPCIEInfo_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NV2080_CTRL_BUS_INFO *pBusInfo); 701 702 #ifdef __nvoc_kernel_bif_h_disabled 703 static inline NV_STATUS kbifControlGetPCIEInfo(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NV2080_CTRL_BUS_INFO *pBusInfo) { 704 NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!"); 705 return NV_ERR_NOT_SUPPORTED; 706 } 707 #else //__nvoc_kernel_bif_h_disabled 708 #define kbifControlGetPCIEInfo(pGpu, pKernelBif, pBusInfo) kbifControlGetPCIEInfo_IMPL(pGpu, pKernelBif, pBusInfo) 709 #endif //__nvoc_kernel_bif_h_disabled 710 711 NvU32 kbifGetDmaCaps_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif); 712 713 #ifdef __nvoc_kernel_bif_h_disabled 714 static inline NvU32 kbifGetDmaCaps(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) { 715 NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!"); 716 return 0; 717 } 718 #else //__nvoc_kernel_bif_h_disabled 719 #define kbifGetDmaCaps(pGpu, pKernelBif) kbifGetDmaCaps_IMPL(pGpu, pKernelBif) 720 #endif //__nvoc_kernel_bif_h_disabled 721 722 #undef PRIVATE_FIELD 723 724 725 #endif // KERNEL_BIF_H 726 727 #ifdef __cplusplus 728 } // extern "C" 729 #endif 730 #endif // _G_KERNEL_BIF_NVOC_H_ 731