1 #ifndef _G_KERNEL_BIF_NVOC_H_
2 #define _G_KERNEL_BIF_NVOC_H_
3 #include "nvoc/runtime.h"
4 
5 #ifdef __cplusplus
6 extern "C" {
7 #endif
8 
9 /*
10  * SPDX-FileCopyrightText: Copyright (c) 2013-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
11  * SPDX-License-Identifier: MIT
12  *
13  * Permission is hereby granted, free of charge, to any person obtaining a
14  * copy of this software and associated documentation files (the "Software"),
15  * to deal in the Software without restriction, including without limitation
16  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
17  * and/or sell copies of the Software, and to permit persons to whom the
18  * Software is furnished to do so, subject to the following conditions:
19  *
20  * The above copyright notice and this permission notice shall be included in
21  * all copies or substantial portions of the Software.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
27  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
28  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
29  * DEALINGS IN THE SOFTWARE.
30  */
31 
32 
33 /* ------------------------ Includes ---------------------------------------- */
34 #include "g_kernel_bif_nvoc.h"
35 
36 #ifndef KERNEL_BIF_H
37 #define KERNEL_BIF_H
38 
39 #include "core/core.h"
40 #include "gpu/eng_state.h"
41 #include "gpu/gpu_halspec.h"
42 #include "gpu/intr/intr_service.h"
43 #include "gpu/mem_mgr/mem_desc.h"
44 #include "rmpbicmdif.h"
45 #include "nvoc/utility.h"
46 #include "ctrl/ctrl2080/ctrl2080bus.h"
47 
48 
49 /* ------------------------ Types definitions ------------------------------ */
50 
51 // PCIe config space size
52 #define PCIE_CONFIG_SPACE_SIZE                         0x1000
53 
54 // The default value of registry key ForceP2P override, ~0 means no registry key.
55 #define BIF_P2P_NOT_OVERRIDEN                          ((NvU32)~0)
56 
57 // DMA capabilities
58 #define BIF_DMA_CAPS_SNOOP                             15:0
59 #define BIF_DMA_CAPS_SNOOP_CTXDMA                      0x1
60 #define BIF_DMA_CAPS_NOSNOOP                           31:16
61 #define BIF_DMA_CAPS_NOSNOOP_CTXDMA                    0x1
62 
63 #define KBIF_CLEAR_XVE_AER_ALL_MASK                    (0xFFFFFFFF)
64 
65 #define kbifIsSnoopDmaCapable(pGpu, pKernelBif)        ((REF_VAL(BIF_DMA_CAPS_SNOOP,       \
66                                                          kbifGetDmaCaps(pGpu, pKernelBif))))
67 
68 // XVE bus options
69 typedef enum BUS_OPTIONS
70 {
71    BUS_OPTIONS_DEV_CONTROL_STATUS  = 0,
72    BUS_OPTIONS_LINK_CONTROL_STATUS,
73    BUS_OPTIONS_LINK_CAPABILITIES
74 
75 } BUS_OPTIONS;
76 
77 typedef struct KERNEL_HOST_VGPU_DEVICE KERNEL_HOST_VGPU_DEVICE;
78 
79 #ifdef NVOC_KERNEL_BIF_H_PRIVATE_ACCESS_ALLOWED
80 #define PRIVATE_FIELD(x) x
81 #else
82 #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x)
83 #endif
84 struct KernelBif {
85     const struct NVOC_RTTI *__nvoc_rtti;
86     struct OBJENGSTATE __nvoc_base_OBJENGSTATE;
87     struct Object *__nvoc_pbase_Object;
88     struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE;
89     struct KernelBif *__nvoc_pbase_KernelBif;
90     NV_STATUS (*__kbifConstructEngine__)(struct OBJGPU *, struct KernelBif *, ENGDESCRIPTOR);
91     NV_STATUS (*__kbifStateInitLocked__)(struct OBJGPU *, struct KernelBif *);
92     NV_STATUS (*__kbifStateLoad__)(struct OBJGPU *, struct KernelBif *, NvU32);
93     NV_STATUS (*__kbifStatePostLoad__)(struct OBJGPU *, struct KernelBif *, NvU32);
94     NV_STATUS (*__kbifStateUnload__)(struct OBJGPU *, struct KernelBif *, NvU32);
95     NV_STATUS (*__kbifGetXveStatusBits__)(struct OBJGPU *, struct KernelBif *, NvU32 *, NvU32 *);
96     NV_STATUS (*__kbifClearXveStatus__)(struct OBJGPU *, struct KernelBif *, NvU32 *);
97     NV_STATUS (*__kbifGetXveAerBits__)(struct OBJGPU *, struct KernelBif *, NvU32 *);
98     NV_STATUS (*__kbifClearXveAer__)(struct OBJGPU *, struct KernelBif *, NvU32);
99     void (*__kbifGetPcieConfigAccessTestRegisters__)(struct OBJGPU *, struct KernelBif *, NvU32 *, NvU32 *);
100     NV_STATUS (*__kbifVerifyPcieConfigAccessTestRegisters__)(struct OBJGPU *, struct KernelBif *, NvU32, NvU32);
101     void (*__kbifRearmMSI__)(struct OBJGPU *, struct KernelBif *);
102     NvBool (*__kbifIsMSIEnabledInHW__)(struct OBJGPU *, struct KernelBif *);
103     NvBool (*__kbifIsMSIXEnabledInHW__)(struct OBJGPU *, struct KernelBif *);
104     NvBool (*__kbifIsPciIoAccessEnabled__)(struct OBJGPU *, struct KernelBif *);
105     NvBool (*__kbifIs3dController__)(struct OBJGPU *, struct KernelBif *);
106     void (*__kbifExecC73War__)(struct OBJGPU *, struct KernelBif *);
107     void (*__kbifEnableExtendedTagSupport__)(struct OBJGPU *, struct KernelBif *);
108     void (*__kbifPcieConfigEnableRelaxedOrdering__)(struct OBJGPU *, struct KernelBif *);
109     void (*__kbifPcieConfigDisableRelaxedOrdering__)(struct OBJGPU *, struct KernelBif *);
110     void (*__kbifInitRelaxedOrderingFromEmulatedConfigSpace__)(struct OBJGPU *, struct KernelBif *);
111     NV_STATUS (*__kbifEnableNoSnoop__)(struct OBJGPU *, struct KernelBif *, NvBool);
112     void (*__kbifApplyWARBug3208922__)(struct OBJGPU *, struct KernelBif *);
113     void (*__kbifProbePcieReqAtomicCaps__)(struct OBJGPU *, struct KernelBif *);
114     void (*__kbifEnablePcieAtomics__)(struct OBJGPU *, struct KernelBif *);
115     NV_STATUS (*__kbifGetPciConfigSpacePriMirror__)(struct OBJGPU *, struct KernelBif *, NvU32 *, NvU32 *);
116     NV_STATUS (*__kbifGetBusOptionsAddr__)(struct OBJGPU *, struct KernelBif *, BUS_OPTIONS, NvU32 *);
117     NV_STATUS (*__kbifPreOsGlobalErotGrantRequest__)(struct OBJGPU *, struct KernelBif *);
118     NV_STATUS (*__kbifStatePreLoad__)(POBJGPU, struct KernelBif *, NvU32);
119     NV_STATUS (*__kbifStatePostUnload__)(POBJGPU, struct KernelBif *, NvU32);
120     void (*__kbifStateDestroy__)(POBJGPU, struct KernelBif *);
121     NV_STATUS (*__kbifStatePreUnload__)(POBJGPU, struct KernelBif *, NvU32);
122     NV_STATUS (*__kbifStateInitUnlocked__)(POBJGPU, struct KernelBif *);
123     void (*__kbifInitMissing__)(POBJGPU, struct KernelBif *);
124     NV_STATUS (*__kbifStatePreInitLocked__)(POBJGPU, struct KernelBif *);
125     NV_STATUS (*__kbifStatePreInitUnlocked__)(POBJGPU, struct KernelBif *);
126     NvBool (*__kbifIsPresent__)(POBJGPU, struct KernelBif *);
127     NvBool PDB_PROP_KBIF_CHECK_IF_GPU_EXISTS_DEF;
128     NvBool PDB_PROP_KBIF_IS_MSI_ENABLED;
129     NvBool PDB_PROP_KBIF_IS_MSI_CACHED;
130     NvBool PDB_PROP_KBIF_IS_MSIX_ENABLED;
131     NvBool PDB_PROP_KBIF_IS_MSIX_CACHED;
132     NvBool PDB_PROP_KBIF_IS_FMODEL_MSI_BROKEN;
133     NvBool PDB_PROP_KBIF_USE_CONFIG_SPACE_TO_REARM_MSI;
134     NvBool PDB_PROP_KBIF_IS_C2C_LINK_UP;
135     NvBool PDB_PROP_KBIF_P2P_READS_DISABLED;
136     NvBool PDB_PROP_KBIF_P2P_WRITES_DISABLED;
137     NvBool PDB_PROP_KBIF_UPSTREAM_LTR_SUPPORT_WAR_BUG_200634944;
138     NvBool PDB_PROP_KBIF_SUPPORT_NONCOHERENT;
139     NvBool PDB_PROP_KBIF_PCIE_GEN4_CAPABLE;
140     NvBool PDB_PROP_KBIF_PCIE_RELAXED_ORDERING_SET_IN_EMULATED_CONFIG_SPACE;
141     NvBool PDB_PROP_KBIF_SYSTEM_ACCESS_DISABLED;
142     NvU32 dmaCaps;
143     RmPhysAddr dmaWindowStartAddress;
144     NvU32 p2pOverride;
145     NvU32 forceP2PType;
146     NvBool peerMappingOverride;
147     NvBool EnteredRecoverySinceErrorsLastChecked;
148     NvU32 osPcieAtomicsOpMask;
149     NvBool bMnocAvailable;
150 };
151 
152 #ifndef __NVOC_CLASS_KernelBif_TYPEDEF__
153 #define __NVOC_CLASS_KernelBif_TYPEDEF__
154 typedef struct KernelBif KernelBif;
155 #endif /* __NVOC_CLASS_KernelBif_TYPEDEF__ */
156 
157 #ifndef __nvoc_class_id_KernelBif
158 #define __nvoc_class_id_KernelBif 0xdbe523
159 #endif /* __nvoc_class_id_KernelBif */
160 
161 extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelBif;
162 
163 #define __staticCast_KernelBif(pThis) \
164     ((pThis)->__nvoc_pbase_KernelBif)
165 
166 #ifdef __nvoc_kernel_bif_h_disabled
167 #define __dynamicCast_KernelBif(pThis) ((KernelBif*)NULL)
168 #else //__nvoc_kernel_bif_h_disabled
169 #define __dynamicCast_KernelBif(pThis) \
170     ((KernelBif*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelBif)))
171 #endif //__nvoc_kernel_bif_h_disabled
172 
173 #define PDB_PROP_KBIF_CHECK_IF_GPU_EXISTS_DEF_BASE_CAST
174 #define PDB_PROP_KBIF_CHECK_IF_GPU_EXISTS_DEF_BASE_NAME PDB_PROP_KBIF_CHECK_IF_GPU_EXISTS_DEF
175 #define PDB_PROP_KBIF_IS_C2C_LINK_UP_BASE_CAST
176 #define PDB_PROP_KBIF_IS_C2C_LINK_UP_BASE_NAME PDB_PROP_KBIF_IS_C2C_LINK_UP
177 #define PDB_PROP_KBIF_IS_MSIX_ENABLED_BASE_CAST
178 #define PDB_PROP_KBIF_IS_MSIX_ENABLED_BASE_NAME PDB_PROP_KBIF_IS_MSIX_ENABLED
179 #define PDB_PROP_KBIF_P2P_WRITES_DISABLED_BASE_CAST
180 #define PDB_PROP_KBIF_P2P_WRITES_DISABLED_BASE_NAME PDB_PROP_KBIF_P2P_WRITES_DISABLED
181 #define PDB_PROP_KBIF_USE_CONFIG_SPACE_TO_REARM_MSI_BASE_CAST
182 #define PDB_PROP_KBIF_USE_CONFIG_SPACE_TO_REARM_MSI_BASE_NAME PDB_PROP_KBIF_USE_CONFIG_SPACE_TO_REARM_MSI
183 #define PDB_PROP_KBIF_IS_MSI_ENABLED_BASE_CAST
184 #define PDB_PROP_KBIF_IS_MSI_ENABLED_BASE_NAME PDB_PROP_KBIF_IS_MSI_ENABLED
185 #define PDB_PROP_KBIF_PCIE_RELAXED_ORDERING_SET_IN_EMULATED_CONFIG_SPACE_BASE_CAST
186 #define PDB_PROP_KBIF_PCIE_RELAXED_ORDERING_SET_IN_EMULATED_CONFIG_SPACE_BASE_NAME PDB_PROP_KBIF_PCIE_RELAXED_ORDERING_SET_IN_EMULATED_CONFIG_SPACE
187 #define PDB_PROP_KBIF_SYSTEM_ACCESS_DISABLED_BASE_CAST
188 #define PDB_PROP_KBIF_SYSTEM_ACCESS_DISABLED_BASE_NAME PDB_PROP_KBIF_SYSTEM_ACCESS_DISABLED
189 #define PDB_PROP_KBIF_UPSTREAM_LTR_SUPPORT_WAR_BUG_200634944_BASE_CAST
190 #define PDB_PROP_KBIF_UPSTREAM_LTR_SUPPORT_WAR_BUG_200634944_BASE_NAME PDB_PROP_KBIF_UPSTREAM_LTR_SUPPORT_WAR_BUG_200634944
191 #define PDB_PROP_KBIF_IS_MSIX_CACHED_BASE_CAST
192 #define PDB_PROP_KBIF_IS_MSIX_CACHED_BASE_NAME PDB_PROP_KBIF_IS_MSIX_CACHED
193 #define PDB_PROP_KBIF_PCIE_GEN4_CAPABLE_BASE_CAST
194 #define PDB_PROP_KBIF_PCIE_GEN4_CAPABLE_BASE_NAME PDB_PROP_KBIF_PCIE_GEN4_CAPABLE
195 #define PDB_PROP_KBIF_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE.
196 #define PDB_PROP_KBIF_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING
197 #define PDB_PROP_KBIF_P2P_READS_DISABLED_BASE_CAST
198 #define PDB_PROP_KBIF_P2P_READS_DISABLED_BASE_NAME PDB_PROP_KBIF_P2P_READS_DISABLED
199 #define PDB_PROP_KBIF_IS_FMODEL_MSI_BROKEN_BASE_CAST
200 #define PDB_PROP_KBIF_IS_FMODEL_MSI_BROKEN_BASE_NAME PDB_PROP_KBIF_IS_FMODEL_MSI_BROKEN
201 #define PDB_PROP_KBIF_IS_MSI_CACHED_BASE_CAST
202 #define PDB_PROP_KBIF_IS_MSI_CACHED_BASE_NAME PDB_PROP_KBIF_IS_MSI_CACHED
203 #define PDB_PROP_KBIF_SUPPORT_NONCOHERENT_BASE_CAST
204 #define PDB_PROP_KBIF_SUPPORT_NONCOHERENT_BASE_NAME PDB_PROP_KBIF_SUPPORT_NONCOHERENT
205 
206 NV_STATUS __nvoc_objCreateDynamic_KernelBif(KernelBif**, Dynamic*, NvU32, va_list);
207 
208 NV_STATUS __nvoc_objCreate_KernelBif(KernelBif**, Dynamic*, NvU32);
209 #define __objCreate_KernelBif(ppNewObj, pParent, createFlags) \
210     __nvoc_objCreate_KernelBif((ppNewObj), staticCast((pParent), Dynamic), (createFlags))
211 
212 #define kbifConstructEngine(pGpu, pKernelBif, arg0) kbifConstructEngine_DISPATCH(pGpu, pKernelBif, arg0)
213 #define kbifStateInitLocked(pGpu, pKernelBif) kbifStateInitLocked_DISPATCH(pGpu, pKernelBif)
214 #define kbifStateLoad(pGpu, pKernelBif, arg0) kbifStateLoad_DISPATCH(pGpu, pKernelBif, arg0)
215 #define kbifStateLoad_HAL(pGpu, pKernelBif, arg0) kbifStateLoad_DISPATCH(pGpu, pKernelBif, arg0)
216 #define kbifStatePostLoad(pGpu, pKernelBif, arg0) kbifStatePostLoad_DISPATCH(pGpu, pKernelBif, arg0)
217 #define kbifStatePostLoad_HAL(pGpu, pKernelBif, arg0) kbifStatePostLoad_DISPATCH(pGpu, pKernelBif, arg0)
218 #define kbifStateUnload(pGpu, pKernelBif, arg0) kbifStateUnload_DISPATCH(pGpu, pKernelBif, arg0)
219 #define kbifStateUnload_HAL(pGpu, pKernelBif, arg0) kbifStateUnload_DISPATCH(pGpu, pKernelBif, arg0)
220 #define kbifGetXveStatusBits(pGpu, pKernelBif, pBits, pStatus) kbifGetXveStatusBits_DISPATCH(pGpu, pKernelBif, pBits, pStatus)
221 #define kbifGetXveStatusBits_HAL(pGpu, pKernelBif, pBits, pStatus) kbifGetXveStatusBits_DISPATCH(pGpu, pKernelBif, pBits, pStatus)
222 #define kbifClearXveStatus(pGpu, pKernelBif, pStatus) kbifClearXveStatus_DISPATCH(pGpu, pKernelBif, pStatus)
223 #define kbifClearXveStatus_HAL(pGpu, pKernelBif, pStatus) kbifClearXveStatus_DISPATCH(pGpu, pKernelBif, pStatus)
224 #define kbifGetXveAerBits(pGpu, pKernelBif, pBits) kbifGetXveAerBits_DISPATCH(pGpu, pKernelBif, pBits)
225 #define kbifGetXveAerBits_HAL(pGpu, pKernelBif, pBits) kbifGetXveAerBits_DISPATCH(pGpu, pKernelBif, pBits)
226 #define kbifClearXveAer(pGpu, pKernelBif, bits) kbifClearXveAer_DISPATCH(pGpu, pKernelBif, bits)
227 #define kbifClearXveAer_HAL(pGpu, pKernelBif, bits) kbifClearXveAer_DISPATCH(pGpu, pKernelBif, bits)
228 #define kbifGetPcieConfigAccessTestRegisters(pGpu, pKernelBif, pciStart, pcieStart) kbifGetPcieConfigAccessTestRegisters_DISPATCH(pGpu, pKernelBif, pciStart, pcieStart)
229 #define kbifGetPcieConfigAccessTestRegisters_HAL(pGpu, pKernelBif, pciStart, pcieStart) kbifGetPcieConfigAccessTestRegisters_DISPATCH(pGpu, pKernelBif, pciStart, pcieStart)
230 #define kbifVerifyPcieConfigAccessTestRegisters(pGpu, pKernelBif, nvXveId, nvXveVccapHdr) kbifVerifyPcieConfigAccessTestRegisters_DISPATCH(pGpu, pKernelBif, nvXveId, nvXveVccapHdr)
231 #define kbifVerifyPcieConfigAccessTestRegisters_HAL(pGpu, pKernelBif, nvXveId, nvXveVccapHdr) kbifVerifyPcieConfigAccessTestRegisters_DISPATCH(pGpu, pKernelBif, nvXveId, nvXveVccapHdr)
232 #define kbifRearmMSI(pGpu, pKernelBif) kbifRearmMSI_DISPATCH(pGpu, pKernelBif)
233 #define kbifRearmMSI_HAL(pGpu, pKernelBif) kbifRearmMSI_DISPATCH(pGpu, pKernelBif)
234 #define kbifIsMSIEnabledInHW(pGpu, pKernelBif) kbifIsMSIEnabledInHW_DISPATCH(pGpu, pKernelBif)
235 #define kbifIsMSIEnabledInHW_HAL(pGpu, pKernelBif) kbifIsMSIEnabledInHW_DISPATCH(pGpu, pKernelBif)
236 #define kbifIsMSIXEnabledInHW(pGpu, pKernelBif) kbifIsMSIXEnabledInHW_DISPATCH(pGpu, pKernelBif)
237 #define kbifIsMSIXEnabledInHW_HAL(pGpu, pKernelBif) kbifIsMSIXEnabledInHW_DISPATCH(pGpu, pKernelBif)
238 #define kbifIsPciIoAccessEnabled(pGpu, pKernelBif) kbifIsPciIoAccessEnabled_DISPATCH(pGpu, pKernelBif)
239 #define kbifIsPciIoAccessEnabled_HAL(pGpu, pKernelBif) kbifIsPciIoAccessEnabled_DISPATCH(pGpu, pKernelBif)
240 #define kbifIs3dController(pGpu, pKernelBif) kbifIs3dController_DISPATCH(pGpu, pKernelBif)
241 #define kbifIs3dController_HAL(pGpu, pKernelBif) kbifIs3dController_DISPATCH(pGpu, pKernelBif)
242 #define kbifExecC73War(pGpu, pKernelBif) kbifExecC73War_DISPATCH(pGpu, pKernelBif)
243 #define kbifExecC73War_HAL(pGpu, pKernelBif) kbifExecC73War_DISPATCH(pGpu, pKernelBif)
244 #define kbifEnableExtendedTagSupport(pGpu, pKernelBif) kbifEnableExtendedTagSupport_DISPATCH(pGpu, pKernelBif)
245 #define kbifEnableExtendedTagSupport_HAL(pGpu, pKernelBif) kbifEnableExtendedTagSupport_DISPATCH(pGpu, pKernelBif)
246 #define kbifPcieConfigEnableRelaxedOrdering(pGpu, pKernelBif) kbifPcieConfigEnableRelaxedOrdering_DISPATCH(pGpu, pKernelBif)
247 #define kbifPcieConfigEnableRelaxedOrdering_HAL(pGpu, pKernelBif) kbifPcieConfigEnableRelaxedOrdering_DISPATCH(pGpu, pKernelBif)
248 #define kbifPcieConfigDisableRelaxedOrdering(pGpu, pKernelBif) kbifPcieConfigDisableRelaxedOrdering_DISPATCH(pGpu, pKernelBif)
249 #define kbifPcieConfigDisableRelaxedOrdering_HAL(pGpu, pKernelBif) kbifPcieConfigDisableRelaxedOrdering_DISPATCH(pGpu, pKernelBif)
250 #define kbifInitRelaxedOrderingFromEmulatedConfigSpace(pGpu, pBif) kbifInitRelaxedOrderingFromEmulatedConfigSpace_DISPATCH(pGpu, pBif)
251 #define kbifInitRelaxedOrderingFromEmulatedConfigSpace_HAL(pGpu, pBif) kbifInitRelaxedOrderingFromEmulatedConfigSpace_DISPATCH(pGpu, pBif)
252 #define kbifEnableNoSnoop(pGpu, pKernelBif, bEnable) kbifEnableNoSnoop_DISPATCH(pGpu, pKernelBif, bEnable)
253 #define kbifEnableNoSnoop_HAL(pGpu, pKernelBif, bEnable) kbifEnableNoSnoop_DISPATCH(pGpu, pKernelBif, bEnable)
254 #define kbifApplyWARBug3208922(pGpu, pKernelBif) kbifApplyWARBug3208922_DISPATCH(pGpu, pKernelBif)
255 #define kbifApplyWARBug3208922_HAL(pGpu, pKernelBif) kbifApplyWARBug3208922_DISPATCH(pGpu, pKernelBif)
256 #define kbifProbePcieReqAtomicCaps(pGpu, pKernelBif) kbifProbePcieReqAtomicCaps_DISPATCH(pGpu, pKernelBif)
257 #define kbifProbePcieReqAtomicCaps_HAL(pGpu, pKernelBif) kbifProbePcieReqAtomicCaps_DISPATCH(pGpu, pKernelBif)
258 #define kbifEnablePcieAtomics(pGpu, pKernelBif) kbifEnablePcieAtomics_DISPATCH(pGpu, pKernelBif)
259 #define kbifEnablePcieAtomics_HAL(pGpu, pKernelBif) kbifEnablePcieAtomics_DISPATCH(pGpu, pKernelBif)
260 #define kbifGetPciConfigSpacePriMirror(pGpu, pKernelBif, pMirrorBase, pMirrorSize) kbifGetPciConfigSpacePriMirror_DISPATCH(pGpu, pKernelBif, pMirrorBase, pMirrorSize)
261 #define kbifGetPciConfigSpacePriMirror_HAL(pGpu, pKernelBif, pMirrorBase, pMirrorSize) kbifGetPciConfigSpacePriMirror_DISPATCH(pGpu, pKernelBif, pMirrorBase, pMirrorSize)
262 #define kbifGetBusOptionsAddr(pGpu, pKernelBif, options, addrReg) kbifGetBusOptionsAddr_DISPATCH(pGpu, pKernelBif, options, addrReg)
263 #define kbifGetBusOptionsAddr_HAL(pGpu, pKernelBif, options, addrReg) kbifGetBusOptionsAddr_DISPATCH(pGpu, pKernelBif, options, addrReg)
264 #define kbifPreOsGlobalErotGrantRequest(pGpu, pKernelBif) kbifPreOsGlobalErotGrantRequest_DISPATCH(pGpu, pKernelBif)
265 #define kbifPreOsGlobalErotGrantRequest_HAL(pGpu, pKernelBif) kbifPreOsGlobalErotGrantRequest_DISPATCH(pGpu, pKernelBif)
266 #define kbifStatePreLoad(pGpu, pEngstate, arg0) kbifStatePreLoad_DISPATCH(pGpu, pEngstate, arg0)
267 #define kbifStatePostUnload(pGpu, pEngstate, arg0) kbifStatePostUnload_DISPATCH(pGpu, pEngstate, arg0)
268 #define kbifStateDestroy(pGpu, pEngstate) kbifStateDestroy_DISPATCH(pGpu, pEngstate)
269 #define kbifStatePreUnload(pGpu, pEngstate, arg0) kbifStatePreUnload_DISPATCH(pGpu, pEngstate, arg0)
270 #define kbifStateInitUnlocked(pGpu, pEngstate) kbifStateInitUnlocked_DISPATCH(pGpu, pEngstate)
271 #define kbifInitMissing(pGpu, pEngstate) kbifInitMissing_DISPATCH(pGpu, pEngstate)
272 #define kbifStatePreInitLocked(pGpu, pEngstate) kbifStatePreInitLocked_DISPATCH(pGpu, pEngstate)
273 #define kbifStatePreInitUnlocked(pGpu, pEngstate) kbifStatePreInitUnlocked_DISPATCH(pGpu, pEngstate)
274 #define kbifIsPresent(pGpu, pEngstate) kbifIsPresent_DISPATCH(pGpu, pEngstate)
275 static inline NvU32 kbifGetBusIntfType_2f2c74(struct KernelBif *pKernelBif) {
276     return (3);
277 }
278 
279 
280 #ifdef __nvoc_kernel_bif_h_disabled
281 static inline NvU32 kbifGetBusIntfType(struct KernelBif *pKernelBif) {
282     NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!");
283     return 0;
284 }
285 #else //__nvoc_kernel_bif_h_disabled
286 #define kbifGetBusIntfType(pKernelBif) kbifGetBusIntfType_2f2c74(pKernelBif)
287 #endif //__nvoc_kernel_bif_h_disabled
288 
289 #define kbifGetBusIntfType_HAL(pKernelBif) kbifGetBusIntfType(pKernelBif)
290 
291 void kbifInitDmaCaps_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
292 
293 
294 #ifdef __nvoc_kernel_bif_h_disabled
295 static inline void kbifInitDmaCaps(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
296     NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!");
297 }
298 #else //__nvoc_kernel_bif_h_disabled
299 #define kbifInitDmaCaps(pGpu, pKernelBif) kbifInitDmaCaps_IMPL(pGpu, pKernelBif)
300 #endif //__nvoc_kernel_bif_h_disabled
301 
302 #define kbifInitDmaCaps_HAL(pGpu, pKernelBif) kbifInitDmaCaps(pGpu, pKernelBif)
303 
304 void kbifClearConfigErrors_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvBool arg0, NvU32 arg1);
305 
306 
307 #ifdef __nvoc_kernel_bif_h_disabled
308 static inline void kbifClearConfigErrors(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvBool arg0, NvU32 arg1) {
309     NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!");
310 }
311 #else //__nvoc_kernel_bif_h_disabled
312 #define kbifClearConfigErrors(pGpu, pKernelBif, arg0, arg1) kbifClearConfigErrors_IMPL(pGpu, pKernelBif, arg0, arg1)
313 #endif //__nvoc_kernel_bif_h_disabled
314 
315 #define kbifClearConfigErrors_HAL(pGpu, pKernelBif, arg0, arg1) kbifClearConfigErrors(pGpu, pKernelBif, arg0, arg1)
316 
317 void kbifDisableP2PTransactions_TU102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
318 
319 
320 #ifdef __nvoc_kernel_bif_h_disabled
321 static inline void kbifDisableP2PTransactions(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
322     NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!");
323 }
324 #else //__nvoc_kernel_bif_h_disabled
325 #define kbifDisableP2PTransactions(pGpu, pKernelBif) kbifDisableP2PTransactions_TU102(pGpu, pKernelBif)
326 #endif //__nvoc_kernel_bif_h_disabled
327 
328 #define kbifDisableP2PTransactions_HAL(pGpu, pKernelBif) kbifDisableP2PTransactions(pGpu, pKernelBif)
329 
330 NV_STATUS kbifGetVFSparseMmapRegions_TU102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice, NvU64 osPageSize, NvU32 *pNumAreas, NvU64 *pOffsets, NvU64 *pSizes);
331 
332 
333 #ifdef __nvoc_kernel_bif_h_disabled
334 static inline NV_STATUS kbifGetVFSparseMmapRegions(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice, NvU64 osPageSize, NvU32 *pNumAreas, NvU64 *pOffsets, NvU64 *pSizes) {
335     NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!");
336     return NV_ERR_NOT_SUPPORTED;
337 }
338 #else //__nvoc_kernel_bif_h_disabled
339 #define kbifGetVFSparseMmapRegions(pGpu, pKernelBif, pKernelHostVgpuDevice, osPageSize, pNumAreas, pOffsets, pSizes) kbifGetVFSparseMmapRegions_TU102(pGpu, pKernelBif, pKernelHostVgpuDevice, osPageSize, pNumAreas, pOffsets, pSizes)
340 #endif //__nvoc_kernel_bif_h_disabled
341 
342 #define kbifGetVFSparseMmapRegions_HAL(pGpu, pKernelBif, pKernelHostVgpuDevice, osPageSize, pNumAreas, pOffsets, pSizes) kbifGetVFSparseMmapRegions(pGpu, pKernelBif, pKernelHostVgpuDevice, osPageSize, pNumAreas, pOffsets, pSizes)
343 
344 NV_STATUS kbifDisableSysmemAccess_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvBool bDisable);
345 
346 
347 #ifdef __nvoc_kernel_bif_h_disabled
348 static inline NV_STATUS kbifDisableSysmemAccess(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvBool bDisable) {
349     NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!");
350     return NV_ERR_NOT_SUPPORTED;
351 }
352 #else //__nvoc_kernel_bif_h_disabled
353 #define kbifDisableSysmemAccess(pGpu, pKernelBif, bDisable) kbifDisableSysmemAccess_GM107(pGpu, pKernelBif, bDisable)
354 #endif //__nvoc_kernel_bif_h_disabled
355 
356 #define kbifDisableSysmemAccess_HAL(pGpu, pKernelBif, bDisable) kbifDisableSysmemAccess(pGpu, pKernelBif, bDisable)
357 
358 static inline void kbifIsMnocSupported_b3696a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
359     return;
360 }
361 
362 
363 #ifdef __nvoc_kernel_bif_h_disabled
364 static inline void kbifIsMnocSupported(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
365     NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!");
366 }
367 #else //__nvoc_kernel_bif_h_disabled
368 #define kbifIsMnocSupported(pGpu, pKernelBif) kbifIsMnocSupported_b3696a(pGpu, pKernelBif)
369 #endif //__nvoc_kernel_bif_h_disabled
370 
371 #define kbifIsMnocSupported_HAL(pGpu, pKernelBif) kbifIsMnocSupported(pGpu, pKernelBif)
372 
373 NV_STATUS kbifConstructEngine_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, ENGDESCRIPTOR arg0);
374 
375 static inline NV_STATUS kbifConstructEngine_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, ENGDESCRIPTOR arg0) {
376     return pKernelBif->__kbifConstructEngine__(pGpu, pKernelBif, arg0);
377 }
378 
379 NV_STATUS kbifStateInitLocked_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
380 
381 static inline NV_STATUS kbifStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
382     return pKernelBif->__kbifStateInitLocked__(pGpu, pKernelBif);
383 }
384 
385 NV_STATUS kbifStateLoad_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg0);
386 
387 static inline NV_STATUS kbifStateLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg0) {
388     return pKernelBif->__kbifStateLoad__(pGpu, pKernelBif, arg0);
389 }
390 
391 NV_STATUS kbifStatePostLoad_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg0);
392 
393 static inline NV_STATUS kbifStatePostLoad_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg0) {
394     return pKernelBif->__kbifStatePostLoad__(pGpu, pKernelBif, arg0);
395 }
396 
397 NV_STATUS kbifStateUnload_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg0);
398 
399 static inline NV_STATUS kbifStateUnload_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 arg0) {
400     return pKernelBif->__kbifStateUnload__(pGpu, pKernelBif, arg0);
401 }
402 
403 NV_STATUS kbifGetXveStatusBits_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pBits, NvU32 *pStatus);
404 
405 NV_STATUS kbifGetXveStatusBits_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pBits, NvU32 *pStatus);
406 
407 static inline NV_STATUS kbifGetXveStatusBits_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pBits, NvU32 *pStatus) {
408     return pKernelBif->__kbifGetXveStatusBits__(pGpu, pKernelBif, pBits, pStatus);
409 }
410 
411 NV_STATUS kbifClearXveStatus_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pStatus);
412 
413 NV_STATUS kbifClearXveStatus_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pStatus);
414 
415 static inline NV_STATUS kbifClearXveStatus_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pStatus) {
416     return pKernelBif->__kbifClearXveStatus__(pGpu, pKernelBif, pStatus);
417 }
418 
419 NV_STATUS kbifGetXveAerBits_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pBits);
420 
421 NV_STATUS kbifGetXveAerBits_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pBits);
422 
423 static inline NV_STATUS kbifGetXveAerBits_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pBits) {
424     return pKernelBif->__kbifGetXveAerBits__(pGpu, pKernelBif, pBits);
425 }
426 
427 NV_STATUS kbifClearXveAer_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 bits);
428 
429 NV_STATUS kbifClearXveAer_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 bits);
430 
431 static inline NV_STATUS kbifClearXveAer_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 bits) {
432     return pKernelBif->__kbifClearXveAer__(pGpu, pKernelBif, bits);
433 }
434 
435 void kbifGetPcieConfigAccessTestRegisters_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pciStart, NvU32 *pcieStart);
436 
437 static inline void kbifGetPcieConfigAccessTestRegisters_b3696a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pciStart, NvU32 *pcieStart) {
438     return;
439 }
440 
441 static inline void kbifGetPcieConfigAccessTestRegisters_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pciStart, NvU32 *pcieStart) {
442     pKernelBif->__kbifGetPcieConfigAccessTestRegisters__(pGpu, pKernelBif, pciStart, pcieStart);
443 }
444 
445 NV_STATUS kbifVerifyPcieConfigAccessTestRegisters_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 nvXveId, NvU32 nvXveVccapHdr);
446 
447 static inline NV_STATUS kbifVerifyPcieConfigAccessTestRegisters_56cd7a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 nvXveId, NvU32 nvXveVccapHdr) {
448     return NV_OK;
449 }
450 
451 static inline NV_STATUS kbifVerifyPcieConfigAccessTestRegisters_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 nvXveId, NvU32 nvXveVccapHdr) {
452     return pKernelBif->__kbifVerifyPcieConfigAccessTestRegisters__(pGpu, pKernelBif, nvXveId, nvXveVccapHdr);
453 }
454 
455 void kbifRearmMSI_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
456 
457 static inline void kbifRearmMSI_f2d351(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
458     NV_ASSERT_PRECOMP(0);
459 }
460 
461 static inline void kbifRearmMSI_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
462     pKernelBif->__kbifRearmMSI__(pGpu, pKernelBif);
463 }
464 
465 NvBool kbifIsMSIEnabledInHW_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
466 
467 NvBool kbifIsMSIEnabledInHW_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
468 
469 static inline NvBool kbifIsMSIEnabledInHW_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
470     return pKernelBif->__kbifIsMSIEnabledInHW__(pGpu, pKernelBif);
471 }
472 
473 NvBool kbifIsMSIXEnabledInHW_TU102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
474 
475 NvBool kbifIsMSIXEnabledInHW_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
476 
477 static inline NvBool kbifIsMSIXEnabledInHW_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
478     return pKernelBif->__kbifIsMSIXEnabledInHW__(pGpu, pKernelBif);
479 }
480 
481 NvBool kbifIsPciIoAccessEnabled_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
482 
483 static inline NvBool kbifIsPciIoAccessEnabled_491d52(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
484     return ((NvBool)(0 != 0));
485 }
486 
487 static inline NvBool kbifIsPciIoAccessEnabled_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
488     return pKernelBif->__kbifIsPciIoAccessEnabled__(pGpu, pKernelBif);
489 }
490 
491 NvBool kbifIs3dController_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
492 
493 NvBool kbifIs3dController_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
494 
495 static inline NvBool kbifIs3dController_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
496     return pKernelBif->__kbifIs3dController__(pGpu, pKernelBif);
497 }
498 
499 void kbifExecC73War_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
500 
501 static inline void kbifExecC73War_b3696a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
502     return;
503 }
504 
505 static inline void kbifExecC73War_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
506     pKernelBif->__kbifExecC73War__(pGpu, pKernelBif);
507 }
508 
509 void kbifEnableExtendedTagSupport_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
510 
511 static inline void kbifEnableExtendedTagSupport_b3696a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
512     return;
513 }
514 
515 static inline void kbifEnableExtendedTagSupport_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
516     pKernelBif->__kbifEnableExtendedTagSupport__(pGpu, pKernelBif);
517 }
518 
519 void kbifPcieConfigEnableRelaxedOrdering_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
520 
521 void kbifPcieConfigEnableRelaxedOrdering_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
522 
523 static inline void kbifPcieConfigEnableRelaxedOrdering_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
524     pKernelBif->__kbifPcieConfigEnableRelaxedOrdering__(pGpu, pKernelBif);
525 }
526 
527 void kbifPcieConfigDisableRelaxedOrdering_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
528 
529 void kbifPcieConfigDisableRelaxedOrdering_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
530 
531 static inline void kbifPcieConfigDisableRelaxedOrdering_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
532     pKernelBif->__kbifPcieConfigDisableRelaxedOrdering__(pGpu, pKernelBif);
533 }
534 
535 static inline void kbifInitRelaxedOrderingFromEmulatedConfigSpace_b3696a(struct OBJGPU *pGpu, struct KernelBif *pBif) {
536     return;
537 }
538 
539 void kbifInitRelaxedOrderingFromEmulatedConfigSpace_GA100(struct OBJGPU *pGpu, struct KernelBif *pBif);
540 
541 static inline void kbifInitRelaxedOrderingFromEmulatedConfigSpace_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pBif) {
542     pBif->__kbifInitRelaxedOrderingFromEmulatedConfigSpace__(pGpu, pBif);
543 }
544 
545 NV_STATUS kbifEnableNoSnoop_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvBool bEnable);
546 
547 NV_STATUS kbifEnableNoSnoop_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvBool bEnable);
548 
549 static inline NV_STATUS kbifEnableNoSnoop_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvBool bEnable) {
550     return pKernelBif->__kbifEnableNoSnoop__(pGpu, pKernelBif, bEnable);
551 }
552 
553 void kbifApplyWARBug3208922_GA100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
554 
555 static inline void kbifApplyWARBug3208922_b3696a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
556     return;
557 }
558 
559 static inline void kbifApplyWARBug3208922_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
560     pKernelBif->__kbifApplyWARBug3208922__(pGpu, pKernelBif);
561 }
562 
563 static inline void kbifProbePcieReqAtomicCaps_b3696a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
564     return;
565 }
566 
567 void kbifProbePcieReqAtomicCaps_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
568 
569 static inline void kbifProbePcieReqAtomicCaps_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
570     pKernelBif->__kbifProbePcieReqAtomicCaps__(pGpu, pKernelBif);
571 }
572 
573 void kbifEnablePcieAtomics_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
574 
575 static inline void kbifEnablePcieAtomics_b3696a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
576     return;
577 }
578 
579 static inline void kbifEnablePcieAtomics_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
580     pKernelBif->__kbifEnablePcieAtomics__(pGpu, pKernelBif);
581 }
582 
583 NV_STATUS kbifGetPciConfigSpacePriMirror_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pMirrorBase, NvU32 *pMirrorSize);
584 
585 NV_STATUS kbifGetPciConfigSpacePriMirror_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pMirrorBase, NvU32 *pMirrorSize);
586 
587 static inline NV_STATUS kbifGetPciConfigSpacePriMirror_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU32 *pMirrorBase, NvU32 *pMirrorSize) {
588     return pKernelBif->__kbifGetPciConfigSpacePriMirror__(pGpu, pKernelBif, pMirrorBase, pMirrorSize);
589 }
590 
591 NV_STATUS kbifGetBusOptionsAddr_GM107(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, BUS_OPTIONS options, NvU32 *addrReg);
592 
593 NV_STATUS kbifGetBusOptionsAddr_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, BUS_OPTIONS options, NvU32 *addrReg);
594 
595 static inline NV_STATUS kbifGetBusOptionsAddr_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, BUS_OPTIONS options, NvU32 *addrReg) {
596     return pKernelBif->__kbifGetBusOptionsAddr__(pGpu, pKernelBif, options, addrReg);
597 }
598 
599 NV_STATUS kbifPreOsGlobalErotGrantRequest_AD102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
600 
601 static inline NV_STATUS kbifPreOsGlobalErotGrantRequest_56cd7a(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
602     return NV_OK;
603 }
604 
605 static inline NV_STATUS kbifPreOsGlobalErotGrantRequest_DISPATCH(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
606     return pKernelBif->__kbifPreOsGlobalErotGrantRequest__(pGpu, pKernelBif);
607 }
608 
609 static inline NV_STATUS kbifStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate, NvU32 arg0) {
610     return pEngstate->__kbifStatePreLoad__(pGpu, pEngstate, arg0);
611 }
612 
613 static inline NV_STATUS kbifStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate, NvU32 arg0) {
614     return pEngstate->__kbifStatePostUnload__(pGpu, pEngstate, arg0);
615 }
616 
617 static inline void kbifStateDestroy_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate) {
618     pEngstate->__kbifStateDestroy__(pGpu, pEngstate);
619 }
620 
621 static inline NV_STATUS kbifStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate, NvU32 arg0) {
622     return pEngstate->__kbifStatePreUnload__(pGpu, pEngstate, arg0);
623 }
624 
625 static inline NV_STATUS kbifStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate) {
626     return pEngstate->__kbifStateInitUnlocked__(pGpu, pEngstate);
627 }
628 
629 static inline void kbifInitMissing_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate) {
630     pEngstate->__kbifInitMissing__(pGpu, pEngstate);
631 }
632 
633 static inline NV_STATUS kbifStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate) {
634     return pEngstate->__kbifStatePreInitLocked__(pGpu, pEngstate);
635 }
636 
637 static inline NV_STATUS kbifStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate) {
638     return pEngstate->__kbifStatePreInitUnlocked__(pGpu, pEngstate);
639 }
640 
641 static inline NvBool kbifIsPresent_DISPATCH(POBJGPU pGpu, struct KernelBif *pEngstate) {
642     return pEngstate->__kbifIsPresent__(pGpu, pEngstate);
643 }
644 
645 NV_STATUS kbifStaticInfoInit_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
646 
647 #ifdef __nvoc_kernel_bif_h_disabled
648 static inline NV_STATUS kbifStaticInfoInit(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
649     NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!");
650     return NV_ERR_NOT_SUPPORTED;
651 }
652 #else //__nvoc_kernel_bif_h_disabled
653 #define kbifStaticInfoInit(pGpu, pKernelBif) kbifStaticInfoInit_IMPL(pGpu, pKernelBif)
654 #endif //__nvoc_kernel_bif_h_disabled
655 
656 void kbifInitPcieDeviceControlStatus_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
657 
658 #ifdef __nvoc_kernel_bif_h_disabled
659 static inline void kbifInitPcieDeviceControlStatus(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
660     NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!");
661 }
662 #else //__nvoc_kernel_bif_h_disabled
663 #define kbifInitPcieDeviceControlStatus(pGpu, pKernelBif) kbifInitPcieDeviceControlStatus_IMPL(pGpu, pKernelBif)
664 #endif //__nvoc_kernel_bif_h_disabled
665 
666 void kbifCheckAndRearmMSI_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
667 
668 #ifdef __nvoc_kernel_bif_h_disabled
669 static inline void kbifCheckAndRearmMSI(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
670     NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!");
671 }
672 #else //__nvoc_kernel_bif_h_disabled
673 #define kbifCheckAndRearmMSI(pGpu, pKernelBif) kbifCheckAndRearmMSI_IMPL(pGpu, pKernelBif)
674 #endif //__nvoc_kernel_bif_h_disabled
675 
676 NvBool kbifIsMSIEnabled_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
677 
678 #ifdef __nvoc_kernel_bif_h_disabled
679 static inline NvBool kbifIsMSIEnabled(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
680     NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!");
681     return NV_FALSE;
682 }
683 #else //__nvoc_kernel_bif_h_disabled
684 #define kbifIsMSIEnabled(pGpu, pKernelBif) kbifIsMSIEnabled_IMPL(pGpu, pKernelBif)
685 #endif //__nvoc_kernel_bif_h_disabled
686 
687 NvBool kbifIsMSIXEnabled_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
688 
689 #ifdef __nvoc_kernel_bif_h_disabled
690 static inline NvBool kbifIsMSIXEnabled(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
691     NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!");
692     return NV_FALSE;
693 }
694 #else //__nvoc_kernel_bif_h_disabled
695 #define kbifIsMSIXEnabled(pGpu, pKernelBif) kbifIsMSIXEnabled_IMPL(pGpu, pKernelBif)
696 #endif //__nvoc_kernel_bif_h_disabled
697 
698 NV_STATUS kbifPollDeviceOnBus_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
699 
700 #ifdef __nvoc_kernel_bif_h_disabled
701 static inline NV_STATUS kbifPollDeviceOnBus(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
702     NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!");
703     return NV_ERR_NOT_SUPPORTED;
704 }
705 #else //__nvoc_kernel_bif_h_disabled
706 #define kbifPollDeviceOnBus(pGpu, pKernelBif) kbifPollDeviceOnBus_IMPL(pGpu, pKernelBif)
707 #endif //__nvoc_kernel_bif_h_disabled
708 
709 NvU32 kbifGetGpuLinkCapabilities_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
710 
711 #ifdef __nvoc_kernel_bif_h_disabled
712 static inline NvU32 kbifGetGpuLinkCapabilities(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
713     NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!");
714     return 0;
715 }
716 #else //__nvoc_kernel_bif_h_disabled
717 #define kbifGetGpuLinkCapabilities(pGpu, pKernelBif) kbifGetGpuLinkCapabilities_IMPL(pGpu, pKernelBif)
718 #endif //__nvoc_kernel_bif_h_disabled
719 
720 NvU32 kbifGetGpuLinkControlStatus_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
721 
722 #ifdef __nvoc_kernel_bif_h_disabled
723 static inline NvU32 kbifGetGpuLinkControlStatus(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
724     NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!");
725     return 0;
726 }
727 #else //__nvoc_kernel_bif_h_disabled
728 #define kbifGetGpuLinkControlStatus(pGpu, pKernelBif) kbifGetGpuLinkControlStatus_IMPL(pGpu, pKernelBif)
729 #endif //__nvoc_kernel_bif_h_disabled
730 
731 NvBool kbifIsPciBusFamily_IMPL(struct KernelBif *pKernelBif);
732 
733 #ifdef __nvoc_kernel_bif_h_disabled
734 static inline NvBool kbifIsPciBusFamily(struct KernelBif *pKernelBif) {
735     NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!");
736     return NV_FALSE;
737 }
738 #else //__nvoc_kernel_bif_h_disabled
739 #define kbifIsPciBusFamily(pKernelBif) kbifIsPciBusFamily_IMPL(pKernelBif)
740 #endif //__nvoc_kernel_bif_h_disabled
741 
742 NV_STATUS kbifControlGetPCIEInfo_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NV2080_CTRL_BUS_INFO *pBusInfo);
743 
744 #ifdef __nvoc_kernel_bif_h_disabled
745 static inline NV_STATUS kbifControlGetPCIEInfo(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NV2080_CTRL_BUS_INFO *pBusInfo) {
746     NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!");
747     return NV_ERR_NOT_SUPPORTED;
748 }
749 #else //__nvoc_kernel_bif_h_disabled
750 #define kbifControlGetPCIEInfo(pGpu, pKernelBif, pBusInfo) kbifControlGetPCIEInfo_IMPL(pGpu, pKernelBif, pBusInfo)
751 #endif //__nvoc_kernel_bif_h_disabled
752 
753 NvU32 kbifGetDmaCaps_IMPL(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
754 
755 #ifdef __nvoc_kernel_bif_h_disabled
756 static inline NvU32 kbifGetDmaCaps(struct OBJGPU *pGpu, struct KernelBif *pKernelBif) {
757     NV_ASSERT_FAILED_PRECOMP("KernelBif was disabled!");
758     return 0;
759 }
760 #else //__nvoc_kernel_bif_h_disabled
761 #define kbifGetDmaCaps(pGpu, pKernelBif) kbifGetDmaCaps_IMPL(pGpu, pKernelBif)
762 #endif //__nvoc_kernel_bif_h_disabled
763 
764 #undef PRIVATE_FIELD
765 
766 
767 #endif // KERNEL_BIF_H
768 
769 #ifdef __cplusplus
770 } // extern "C"
771 #endif
772 #endif // _G_KERNEL_BIF_NVOC_H_
773