1 #define NVOC_KERNEL_CE_H_PRIVATE_ACCESS_ALLOWED
2 #include "nvoc/runtime.h"
3 #include "nvoc/rtti.h"
4 #include "nvtypes.h"
5 #include "nvport/nvport.h"
6 #include "nvport/inline/util_valist.h"
7 #include "utils/nvassert.h"
8 #include "g_kernel_ce_nvoc.h"
9 
10 #ifdef DEBUG
11 char __nvoc_class_id_uniqueness_check_0x242aca = 1;
12 #endif
13 
14 extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCE;
15 
16 extern const struct NVOC_CLASS_DEF __nvoc_class_def_Object;
17 
18 extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJENGSTATE;
19 
20 extern const struct NVOC_CLASS_DEF __nvoc_class_def_IntrService;
21 
22 void __nvoc_init_KernelCE(KernelCE*, RmHalspecOwner* );
23 void __nvoc_init_funcTable_KernelCE(KernelCE*, RmHalspecOwner* );
24 NV_STATUS __nvoc_ctor_KernelCE(KernelCE*, RmHalspecOwner* );
25 void __nvoc_init_dataField_KernelCE(KernelCE*, RmHalspecOwner* );
26 void __nvoc_dtor_KernelCE(KernelCE*);
27 extern const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelCE;
28 
29 static const struct NVOC_RTTI __nvoc_rtti_KernelCE_KernelCE = {
30     /*pClassDef=*/          &__nvoc_class_def_KernelCE,
31     /*dtor=*/               (NVOC_DYNAMIC_DTOR) &__nvoc_dtor_KernelCE,
32     /*offset=*/             0,
33 };
34 
35 static const struct NVOC_RTTI __nvoc_rtti_KernelCE_Object = {
36     /*pClassDef=*/          &__nvoc_class_def_Object,
37     /*dtor=*/               &__nvoc_destructFromBase,
38     /*offset=*/             NV_OFFSETOF(KernelCE, __nvoc_base_OBJENGSTATE.__nvoc_base_Object),
39 };
40 
41 static const struct NVOC_RTTI __nvoc_rtti_KernelCE_OBJENGSTATE = {
42     /*pClassDef=*/          &__nvoc_class_def_OBJENGSTATE,
43     /*dtor=*/               &__nvoc_destructFromBase,
44     /*offset=*/             NV_OFFSETOF(KernelCE, __nvoc_base_OBJENGSTATE),
45 };
46 
47 static const struct NVOC_RTTI __nvoc_rtti_KernelCE_IntrService = {
48     /*pClassDef=*/          &__nvoc_class_def_IntrService,
49     /*dtor=*/               &__nvoc_destructFromBase,
50     /*offset=*/             NV_OFFSETOF(KernelCE, __nvoc_base_IntrService),
51 };
52 
53 static const struct NVOC_CASTINFO __nvoc_castinfo_KernelCE = {
54     /*numRelatives=*/       4,
55     /*relatives=*/ {
56         &__nvoc_rtti_KernelCE_KernelCE,
57         &__nvoc_rtti_KernelCE_IntrService,
58         &__nvoc_rtti_KernelCE_OBJENGSTATE,
59         &__nvoc_rtti_KernelCE_Object,
60     },
61 };
62 
63 const struct NVOC_CLASS_DEF __nvoc_class_def_KernelCE =
64 {
65     /*classInfo=*/ {
66         /*size=*/               sizeof(KernelCE),
67         /*classId=*/            classId(KernelCE),
68         /*providerId=*/         &__nvoc_rtti_provider,
69 #if NV_PRINTF_STRINGS_ALLOWED
70         /*name=*/               "KernelCE",
71 #endif
72     },
73     /*objCreatefn=*/        (NVOC_DYNAMIC_OBJ_CREATE) &__nvoc_objCreateDynamic_KernelCE,
74     /*pCastInfo=*/          &__nvoc_castinfo_KernelCE,
75     /*pExportInfo=*/        &__nvoc_export_info_KernelCE
76 };
77 
78 static NV_STATUS __nvoc_thunk_KernelCE_engstateConstructEngine(OBJGPU *pGpu, struct OBJENGSTATE *pKCe, ENGDESCRIPTOR arg0) {
79     return kceConstructEngine(pGpu, (struct KernelCE *)(((unsigned char *)pKCe) - __nvoc_rtti_KernelCE_OBJENGSTATE.offset), arg0);
80 }
81 
82 static NvBool __nvoc_thunk_KernelCE_engstateIsPresent(OBJGPU *pGpu, struct OBJENGSTATE *pKCe) {
83     return kceIsPresent(pGpu, (struct KernelCE *)(((unsigned char *)pKCe) - __nvoc_rtti_KernelCE_OBJENGSTATE.offset));
84 }
85 
86 static NV_STATUS __nvoc_thunk_KernelCE_engstateStateLoad(OBJGPU *arg0, struct OBJENGSTATE *arg1, NvU32 arg2) {
87     return kceStateLoad(arg0, (struct KernelCE *)(((unsigned char *)arg1) - __nvoc_rtti_KernelCE_OBJENGSTATE.offset), arg2);
88 }
89 
90 static NV_STATUS __nvoc_thunk_KernelCE_engstateStateUnload(OBJGPU *pGpu, struct OBJENGSTATE *pKCe, NvU32 flags) {
91     return kceStateUnload(pGpu, (struct KernelCE *)(((unsigned char *)pKCe) - __nvoc_rtti_KernelCE_OBJENGSTATE.offset), flags);
92 }
93 
94 static void __nvoc_thunk_KernelCE_intrservRegisterIntrService(OBJGPU *arg0, struct IntrService *arg1, IntrServiceRecord arg2[168]) {
95     kceRegisterIntrService(arg0, (struct KernelCE *)(((unsigned char *)arg1) - __nvoc_rtti_KernelCE_IntrService.offset), arg2);
96 }
97 
98 static NV_STATUS __nvoc_thunk_KernelCE_intrservServiceNotificationInterrupt(OBJGPU *arg0, struct IntrService *arg1, IntrServiceServiceNotificationInterruptArguments *arg2) {
99     return kceServiceNotificationInterrupt(arg0, (struct KernelCE *)(((unsigned char *)arg1) - __nvoc_rtti_KernelCE_IntrService.offset), arg2);
100 }
101 
102 static NV_STATUS __nvoc_thunk_OBJENGSTATE_kceStateInitLocked(POBJGPU pGpu, struct KernelCE *pEngstate) {
103     return engstateStateInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset));
104 }
105 
106 static NV_STATUS __nvoc_thunk_OBJENGSTATE_kceStatePreLoad(POBJGPU pGpu, struct KernelCE *pEngstate, NvU32 arg0) {
107     return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset), arg0);
108 }
109 
110 static NV_STATUS __nvoc_thunk_OBJENGSTATE_kceStatePostUnload(POBJGPU pGpu, struct KernelCE *pEngstate, NvU32 arg0) {
111     return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset), arg0);
112 }
113 
114 static void __nvoc_thunk_OBJENGSTATE_kceStateDestroy(POBJGPU pGpu, struct KernelCE *pEngstate) {
115     engstateStateDestroy(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset));
116 }
117 
118 static NV_STATUS __nvoc_thunk_OBJENGSTATE_kceStatePreUnload(POBJGPU pGpu, struct KernelCE *pEngstate, NvU32 arg0) {
119     return engstateStatePreUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset), arg0);
120 }
121 
122 static NV_STATUS __nvoc_thunk_OBJENGSTATE_kceStateInitUnlocked(POBJGPU pGpu, struct KernelCE *pEngstate) {
123     return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset));
124 }
125 
126 static void __nvoc_thunk_OBJENGSTATE_kceInitMissing(POBJGPU pGpu, struct KernelCE *pEngstate) {
127     engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset));
128 }
129 
130 static NV_STATUS __nvoc_thunk_OBJENGSTATE_kceStatePreInitLocked(POBJGPU pGpu, struct KernelCE *pEngstate) {
131     return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset));
132 }
133 
134 static NV_STATUS __nvoc_thunk_OBJENGSTATE_kceStatePreInitUnlocked(POBJGPU pGpu, struct KernelCE *pEngstate) {
135     return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset));
136 }
137 
138 static NvBool __nvoc_thunk_IntrService_kceClearInterrupt(OBJGPU *pGpu, struct KernelCE *pIntrService, IntrServiceClearInterruptArguments *pParams) {
139     return intrservClearInterrupt(pGpu, (struct IntrService *)(((unsigned char *)pIntrService) + __nvoc_rtti_KernelCE_IntrService.offset), pParams);
140 }
141 
142 static NV_STATUS __nvoc_thunk_OBJENGSTATE_kceStatePostLoad(POBJGPU pGpu, struct KernelCE *pEngstate, NvU32 arg0) {
143     return engstateStatePostLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelCE_OBJENGSTATE.offset), arg0);
144 }
145 
146 static NvU32 __nvoc_thunk_IntrService_kceServiceInterrupt(OBJGPU *pGpu, struct KernelCE *pIntrService, IntrServiceServiceInterruptArguments *pParams) {
147     return intrservServiceInterrupt(pGpu, (struct IntrService *)(((unsigned char *)pIntrService) + __nvoc_rtti_KernelCE_IntrService.offset), pParams);
148 }
149 
150 const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelCE =
151 {
152     /*numEntries=*/     0,
153     /*pExportEntries=*/  0
154 };
155 
156 void __nvoc_dtor_OBJENGSTATE(OBJENGSTATE*);
157 void __nvoc_dtor_IntrService(IntrService*);
158 void __nvoc_dtor_KernelCE(KernelCE *pThis) {
159     __nvoc_dtor_OBJENGSTATE(&pThis->__nvoc_base_OBJENGSTATE);
160     __nvoc_dtor_IntrService(&pThis->__nvoc_base_IntrService);
161     PORT_UNREFERENCED_VARIABLE(pThis);
162 }
163 
164 void __nvoc_init_dataField_KernelCE(KernelCE *pThis, RmHalspecOwner *pRmhalspecowner) {
165     ChipHal *chipHal = &pRmhalspecowner->chipHal;
166     const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx;
167     RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal;
168     const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx;
169     PORT_UNREFERENCED_VARIABLE(pThis);
170     PORT_UNREFERENCED_VARIABLE(pRmhalspecowner);
171     PORT_UNREFERENCED_VARIABLE(chipHal);
172     PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx);
173     PORT_UNREFERENCED_VARIABLE(rmVariantHal);
174     PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx);
175 }
176 
177 NV_STATUS __nvoc_ctor_OBJENGSTATE(OBJENGSTATE* );
178 NV_STATUS __nvoc_ctor_IntrService(IntrService* );
179 NV_STATUS __nvoc_ctor_KernelCE(KernelCE *pThis, RmHalspecOwner *pRmhalspecowner) {
180     NV_STATUS status = NV_OK;
181     status = __nvoc_ctor_OBJENGSTATE(&pThis->__nvoc_base_OBJENGSTATE);
182     if (status != NV_OK) goto __nvoc_ctor_KernelCE_fail_OBJENGSTATE;
183     status = __nvoc_ctor_IntrService(&pThis->__nvoc_base_IntrService);
184     if (status != NV_OK) goto __nvoc_ctor_KernelCE_fail_IntrService;
185     __nvoc_init_dataField_KernelCE(pThis, pRmhalspecowner);
186     goto __nvoc_ctor_KernelCE_exit; // Success
187 
188 __nvoc_ctor_KernelCE_fail_IntrService:
189     __nvoc_dtor_OBJENGSTATE(&pThis->__nvoc_base_OBJENGSTATE);
190 __nvoc_ctor_KernelCE_fail_OBJENGSTATE:
191 __nvoc_ctor_KernelCE_exit:
192 
193     return status;
194 }
195 
196 static void __nvoc_init_funcTable_KernelCE_1(KernelCE *pThis, RmHalspecOwner *pRmhalspecowner) {
197     ChipHal *chipHal = &pRmhalspecowner->chipHal;
198     const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx;
199     RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal;
200     const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx;
201     PORT_UNREFERENCED_VARIABLE(pThis);
202     PORT_UNREFERENCED_VARIABLE(pRmhalspecowner);
203     PORT_UNREFERENCED_VARIABLE(chipHal);
204     PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx);
205     PORT_UNREFERENCED_VARIABLE(rmVariantHal);
206     PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx);
207 
208     pThis->__kceConstructEngine__ = &kceConstructEngine_IMPL;
209 
210     // Hal function -- kceIsPresent
211     pThis->__kceIsPresent__ = &kceIsPresent_IMPL;
212 
213     // Hal function -- kceStateLoad
214     pThis->__kceStateLoad__ = &kceStateLoad_GP100;
215 
216     // Hal function -- kceStateUnload
217     // default
218     pThis->__kceStateUnload__ = &kceStateUnload_56cd7a;
219 
220     pThis->__kceRegisterIntrService__ = &kceRegisterIntrService_IMPL;
221 
222     pThis->__kceServiceNotificationInterrupt__ = &kceServiceNotificationInterrupt_IMPL;
223 
224     // Hal function -- kceGetNvlinkAutoConfigCeValues
225     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
226     {
227         pThis->__kceGetNvlinkAutoConfigCeValues__ = &kceGetNvlinkAutoConfigCeValues_TU102;
228     }
229     else
230     {
231         pThis->__kceGetNvlinkAutoConfigCeValues__ = &kceGetNvlinkAutoConfigCeValues_GA100;
232     }
233 
234     // Hal function -- kceGetNvlinkMaxTopoForTable
235     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
236     {
237         pThis->__kceGetNvlinkMaxTopoForTable__ = &kceGetNvlinkMaxTopoForTable_GP100;
238     }
239     else
240     {
241         pThis->__kceGetNvlinkMaxTopoForTable__ = &kceGetNvlinkMaxTopoForTable_491d52;
242     }
243 
244     // Hal function -- kceIsCurrentMaxTopology
245     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
246     {
247         pThis->__kceIsCurrentMaxTopology__ = &kceIsCurrentMaxTopology_491d52;
248     }
249     else
250     {
251         pThis->__kceIsCurrentMaxTopology__ = &kceIsCurrentMaxTopology_GA100;
252     }
253 
254     // Hal function -- kceGetAutoConfigTableEntry
255     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */
256     {
257         pThis->__kceGetAutoConfigTableEntry__ = &kceGetAutoConfigTableEntry_GH100;
258     }
259     else
260     {
261         pThis->__kceGetAutoConfigTableEntry__ = &kceGetAutoConfigTableEntry_GV100;
262     }
263 
264     // Hal function -- kceGetPce2lceConfigSize1
265     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */
266     {
267         pThis->__kceGetPce2lceConfigSize1__ = &kceGetPce2lceConfigSize1_GA100;
268     }
269     else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */
270     {
271         pThis->__kceGetPce2lceConfigSize1__ = &kceGetPce2lceConfigSize1_GH100;
272     }
273     else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
274     {
275         pThis->__kceGetPce2lceConfigSize1__ = &kceGetPce2lceConfigSize1_TU102;
276     }
277     else
278     {
279         pThis->__kceGetPce2lceConfigSize1__ = &kceGetPce2lceConfigSize1_GA102;
280     }
281 
282     // Hal function -- kceGetMappings
283     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */
284     {
285         pThis->__kceGetMappings__ = &kceGetMappings_GH100;
286     }
287     else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
288     {
289         pThis->__kceGetMappings__ = &kceGetMappings_46f6a7;
290     }
291     else
292     {
293         pThis->__kceGetMappings__ = &kceGetMappings_GA100;
294     }
295 
296     // Hal function -- kceMapPceLceForC2C
297     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */
298     {
299         pThis->__kceMapPceLceForC2C__ = &kceMapPceLceForC2C_GH100;
300     }
301     else
302     {
303         pThis->__kceMapPceLceForC2C__ = &kceMapPceLceForC2C_46f6a7;
304     }
305 
306     // Hal function -- kceMapPceLceForGRCE
307     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */
308     {
309         pThis->__kceMapPceLceForGRCE__ = &kceMapPceLceForGRCE_GH100;
310     }
311     // default
312     else
313     {
314         pThis->__kceMapPceLceForGRCE__ = &kceMapPceLceForGRCE_b3696a;
315     }
316 
317     // Hal function -- kceMapPceLceForSysmemLinks
318     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */
319     {
320         pThis->__kceMapPceLceForSysmemLinks__ = &kceMapPceLceForSysmemLinks_GA100;
321     }
322     else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x100003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GH100 */
323     {
324         pThis->__kceMapPceLceForSysmemLinks__ = &kceMapPceLceForSysmemLinks_46f6a7;
325     }
326     else
327     {
328         pThis->__kceMapPceLceForSysmemLinks__ = &kceMapPceLceForSysmemLinks_GA102;
329     }
330 
331     // Hal function -- kceMapPceLceForNvlinkPeers
332     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */
333     {
334         pThis->__kceMapPceLceForNvlinkPeers__ = &kceMapPceLceForNvlinkPeers_GH100;
335     }
336     else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
337     {
338         pThis->__kceMapPceLceForNvlinkPeers__ = &kceMapPceLceForNvlinkPeers_46f6a7;
339     }
340     else
341     {
342         pThis->__kceMapPceLceForNvlinkPeers__ = &kceMapPceLceForNvlinkPeers_GA100;
343     }
344 
345     // Hal function -- kceGetSysmemSupportedLceMask
346     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */
347     {
348         pThis->__kceGetSysmemSupportedLceMask__ = &kceGetSysmemSupportedLceMask_GA100;
349     }
350     else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x100003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GH100 */
351     {
352         pThis->__kceGetSysmemSupportedLceMask__ = &kceGetSysmemSupportedLceMask_4a4dee;
353     }
354     else
355     {
356         pThis->__kceGetSysmemSupportedLceMask__ = &kceGetSysmemSupportedLceMask_GA102;
357     }
358 
359     // Hal function -- kceMapAsyncLceDefault
360     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */
361     {
362         pThis->__kceMapAsyncLceDefault__ = &kceMapAsyncLceDefault_GH100;
363     }
364     else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
365     {
366         pThis->__kceMapAsyncLceDefault__ = &kceMapAsyncLceDefault_46f6a7;
367     }
368     else
369     {
370         pThis->__kceMapAsyncLceDefault__ = &kceMapAsyncLceDefault_GA100;
371     }
372 
373     // Hal function -- kceGetNvlinkPeerSupportedLceMask
374     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000400UL) )) /* ChipHal: GA100 | GH100 */
375     {
376         pThis->__kceGetNvlinkPeerSupportedLceMask__ = &kceGetNvlinkPeerSupportedLceMask_GA100;
377     }
378     else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
379     {
380         pThis->__kceGetNvlinkPeerSupportedLceMask__ = &kceGetNvlinkPeerSupportedLceMask_4a4dee;
381     }
382     else
383     {
384         pThis->__kceGetNvlinkPeerSupportedLceMask__ = &kceGetNvlinkPeerSupportedLceMask_GA102;
385     }
386 
387     // Hal function -- kceGetGrceSupportedLceMask
388     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */
389     {
390         pThis->__kceGetGrceSupportedLceMask__ = &kceGetGrceSupportedLceMask_GA100;
391     }
392     else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
393     {
394         pThis->__kceGetGrceSupportedLceMask__ = &kceGetGrceSupportedLceMask_4a4dee;
395     }
396     else
397     {
398         pThis->__kceGetGrceSupportedLceMask__ = &kceGetGrceSupportedLceMask_GA102;
399     }
400 
401     // Hal function -- kceIsGenXorHigherSupported
402     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */
403     {
404         pThis->__kceIsGenXorHigherSupported__ = &kceIsGenXorHigherSupported_GA100;
405     }
406     else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */
407     {
408         pThis->__kceIsGenXorHigherSupported__ = &kceIsGenXorHigherSupported_GH100;
409     }
410     else
411     {
412         pThis->__kceIsGenXorHigherSupported__ = &kceIsGenXorHigherSupported_cbe027;
413     }
414 
415     // Hal function -- kceApplyGen4orHigherMapping
416     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */
417     {
418         pThis->__kceApplyGen4orHigherMapping__ = &kceApplyGen4orHigherMapping_GA100;
419     }
420     else
421     {
422         pThis->__kceApplyGen4orHigherMapping__ = &kceApplyGen4orHigherMapping_b3696a;
423     }
424 
425     pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_KernelCE_engstateConstructEngine;
426 
427     pThis->__nvoc_base_OBJENGSTATE.__engstateIsPresent__ = &__nvoc_thunk_KernelCE_engstateIsPresent;
428 
429     pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_thunk_KernelCE_engstateStateLoad;
430 
431     pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_thunk_KernelCE_engstateStateUnload;
432 
433     pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_thunk_KernelCE_intrservRegisterIntrService;
434 
435     pThis->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ = &__nvoc_thunk_KernelCE_intrservServiceNotificationInterrupt;
436 
437     pThis->__kceStateInitLocked__ = &__nvoc_thunk_OBJENGSTATE_kceStateInitLocked;
438 
439     pThis->__kceStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_kceStatePreLoad;
440 
441     pThis->__kceStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_kceStatePostUnload;
442 
443     pThis->__kceStateDestroy__ = &__nvoc_thunk_OBJENGSTATE_kceStateDestroy;
444 
445     pThis->__kceStatePreUnload__ = &__nvoc_thunk_OBJENGSTATE_kceStatePreUnload;
446 
447     pThis->__kceStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kceStateInitUnlocked;
448 
449     pThis->__kceInitMissing__ = &__nvoc_thunk_OBJENGSTATE_kceInitMissing;
450 
451     pThis->__kceStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_kceStatePreInitLocked;
452 
453     pThis->__kceStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kceStatePreInitUnlocked;
454 
455     pThis->__kceClearInterrupt__ = &__nvoc_thunk_IntrService_kceClearInterrupt;
456 
457     pThis->__kceStatePostLoad__ = &__nvoc_thunk_OBJENGSTATE_kceStatePostLoad;
458 
459     pThis->__kceServiceInterrupt__ = &__nvoc_thunk_IntrService_kceServiceInterrupt;
460 }
461 
462 void __nvoc_init_funcTable_KernelCE(KernelCE *pThis, RmHalspecOwner *pRmhalspecowner) {
463     __nvoc_init_funcTable_KernelCE_1(pThis, pRmhalspecowner);
464 }
465 
466 void __nvoc_init_OBJENGSTATE(OBJENGSTATE*);
467 void __nvoc_init_IntrService(IntrService*);
468 void __nvoc_init_KernelCE(KernelCE *pThis, RmHalspecOwner *pRmhalspecowner) {
469     pThis->__nvoc_pbase_KernelCE = pThis;
470     pThis->__nvoc_pbase_Object = &pThis->__nvoc_base_OBJENGSTATE.__nvoc_base_Object;
471     pThis->__nvoc_pbase_OBJENGSTATE = &pThis->__nvoc_base_OBJENGSTATE;
472     pThis->__nvoc_pbase_IntrService = &pThis->__nvoc_base_IntrService;
473     __nvoc_init_OBJENGSTATE(&pThis->__nvoc_base_OBJENGSTATE);
474     __nvoc_init_IntrService(&pThis->__nvoc_base_IntrService);
475     __nvoc_init_funcTable_KernelCE(pThis, pRmhalspecowner);
476 }
477 
478 NV_STATUS __nvoc_objCreate_KernelCE(KernelCE **ppThis, Dynamic *pParent, NvU32 createFlags) {
479     NV_STATUS status;
480     Object *pParentObj;
481     KernelCE *pThis;
482     RmHalspecOwner *pRmhalspecowner;
483 
484     status = __nvoc_handleObjCreateMemAlloc(createFlags, sizeof(KernelCE), (void**)&pThis, (void**)ppThis);
485     if (status != NV_OK)
486         return status;
487 
488     portMemSet(pThis, 0, sizeof(KernelCE));
489 
490     __nvoc_initRtti(staticCast(pThis, Dynamic), &__nvoc_class_def_KernelCE);
491 
492     pThis->__nvoc_base_OBJENGSTATE.__nvoc_base_Object.createFlags = createFlags;
493 
494     if (pParent != NULL && !(createFlags & NVOC_OBJ_CREATE_FLAGS_PARENT_HALSPEC_ONLY))
495     {
496         pParentObj = dynamicCast(pParent, Object);
497         objAddChild(pParentObj, &pThis->__nvoc_base_OBJENGSTATE.__nvoc_base_Object);
498     }
499     else
500     {
501         pThis->__nvoc_base_OBJENGSTATE.__nvoc_base_Object.pParent = NULL;
502     }
503 
504     if ((pRmhalspecowner = dynamicCast(pParent, RmHalspecOwner)) == NULL)
505         pRmhalspecowner = objFindAncestorOfType(RmHalspecOwner, pParent);
506     NV_ASSERT_OR_RETURN(pRmhalspecowner != NULL, NV_ERR_INVALID_ARGUMENT);
507 
508     __nvoc_init_KernelCE(pThis, pRmhalspecowner);
509     status = __nvoc_ctor_KernelCE(pThis, pRmhalspecowner);
510     if (status != NV_OK) goto __nvoc_objCreate_KernelCE_cleanup;
511 
512     *ppThis = pThis;
513 
514     return NV_OK;
515 
516 __nvoc_objCreate_KernelCE_cleanup:
517     // do not call destructors here since the constructor already called them
518     if (createFlags & NVOC_OBJ_CREATE_FLAGS_IN_PLACE_CONSTRUCT)
519         portMemSet(pThis, 0, sizeof(KernelCE));
520     else
521         portMemFree(pThis);
522 
523     // coverity[leaked_storage:FALSE]
524     return status;
525 }
526 
527 NV_STATUS __nvoc_objCreateDynamic_KernelCE(KernelCE **ppThis, Dynamic *pParent, NvU32 createFlags, va_list args) {
528     NV_STATUS status;
529 
530     status = __nvoc_objCreate_KernelCE(ppThis, pParent, createFlags);
531 
532     return status;
533 }
534 
535