1 #define NVOC_KERNEL_FALCON_H_PRIVATE_ACCESS_ALLOWED
2 #include "nvoc/runtime.h"
3 #include "nvoc/rtti.h"
4 #include "nvtypes.h"
5 #include "nvport/nvport.h"
6 #include "nvport/inline/util_valist.h"
7 #include "utils/nvassert.h"
8 #include "g_kernel_falcon_nvoc.h"
9 
10 #ifdef DEBUG
11 char __nvoc_class_id_uniqueness_check_0xb6b1af = 1;
12 #endif
13 
14 extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelFalcon;
15 
16 void __nvoc_init_KernelFalcon(KernelFalcon*, RmHalspecOwner* );
17 void __nvoc_init_funcTable_KernelFalcon(KernelFalcon*, RmHalspecOwner* );
18 NV_STATUS __nvoc_ctor_KernelFalcon(KernelFalcon*, RmHalspecOwner* );
19 void __nvoc_init_dataField_KernelFalcon(KernelFalcon*, RmHalspecOwner* );
20 void __nvoc_dtor_KernelFalcon(KernelFalcon*);
21 extern const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelFalcon;
22 
23 static const struct NVOC_RTTI __nvoc_rtti_KernelFalcon_KernelFalcon = {
24     /*pClassDef=*/          &__nvoc_class_def_KernelFalcon,
25     /*dtor=*/               (NVOC_DYNAMIC_DTOR) &__nvoc_dtor_KernelFalcon,
26     /*offset=*/             0,
27 };
28 
29 static const struct NVOC_CASTINFO __nvoc_castinfo_KernelFalcon = {
30     /*numRelatives=*/       1,
31     /*relatives=*/ {
32         &__nvoc_rtti_KernelFalcon_KernelFalcon,
33     },
34 };
35 
36 // Not instantiable because it's not derived from class "Object"
37 // Not instantiable because it's an abstract class with following pure virtual functions:
38 //  kflcnResetHw
39 const struct NVOC_CLASS_DEF __nvoc_class_def_KernelFalcon =
40 {
41     /*classInfo=*/ {
42         /*size=*/               sizeof(KernelFalcon),
43         /*classId=*/            classId(KernelFalcon),
44         /*providerId=*/         &__nvoc_rtti_provider,
45 #if NV_PRINTF_STRINGS_ALLOWED
46         /*name=*/               "KernelFalcon",
47 #endif
48     },
49     /*objCreatefn=*/        (NVOC_DYNAMIC_OBJ_CREATE) NULL,
50     /*pCastInfo=*/          &__nvoc_castinfo_KernelFalcon,
51     /*pExportInfo=*/        &__nvoc_export_info_KernelFalcon
52 };
53 
54 const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelFalcon =
55 {
56     /*numEntries=*/     0,
57     /*pExportEntries=*/  0
58 };
59 
60 void __nvoc_dtor_KernelFalcon(KernelFalcon *pThis) {
61     PORT_UNREFERENCED_VARIABLE(pThis);
62 }
63 
64 void __nvoc_init_dataField_KernelFalcon(KernelFalcon *pThis, RmHalspecOwner *pRmhalspecowner) {
65     ChipHal *chipHal = &pRmhalspecowner->chipHal;
66     const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx;
67     RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal;
68     const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx;
69     PORT_UNREFERENCED_VARIABLE(pThis);
70     PORT_UNREFERENCED_VARIABLE(pRmhalspecowner);
71     PORT_UNREFERENCED_VARIABLE(chipHal);
72     PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx);
73     PORT_UNREFERENCED_VARIABLE(rmVariantHal);
74     PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx);
75 }
76 
77 NV_STATUS __nvoc_ctor_KernelFalcon(KernelFalcon *pThis, RmHalspecOwner *pRmhalspecowner) {
78     NV_STATUS status = NV_OK;
79     __nvoc_init_dataField_KernelFalcon(pThis, pRmhalspecowner);
80     goto __nvoc_ctor_KernelFalcon_exit; // Success
81 
82 __nvoc_ctor_KernelFalcon_exit:
83 
84     return status;
85 }
86 
87 static void __nvoc_init_funcTable_KernelFalcon_1(KernelFalcon *pThis, RmHalspecOwner *pRmhalspecowner) {
88     ChipHal *chipHal = &pRmhalspecowner->chipHal;
89     const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx;
90     RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal;
91     const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx;
92     PORT_UNREFERENCED_VARIABLE(pThis);
93     PORT_UNREFERENCED_VARIABLE(pRmhalspecowner);
94     PORT_UNREFERENCED_VARIABLE(chipHal);
95     PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx);
96     PORT_UNREFERENCED_VARIABLE(rmVariantHal);
97     PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx);
98 
99     // Hal function -- kflcnIsRiscvActive
100     if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
101     {
102         if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000007e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 */
103         {
104             pThis->__kflcnIsRiscvActive__ = &kflcnIsRiscvActive_TU102;
105         }
106         else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0f800UL) )) /* ChipHal: GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */
107         {
108             pThis->__kflcnIsRiscvActive__ = &kflcnIsRiscvActive_GA10X;
109         }
110     }
111 
112     // Hal function -- kflcnRiscvProgramBcr
113     if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
114     {
115         if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0f800UL) )) /* ChipHal: GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */
116         {
117             pThis->__kflcnRiscvProgramBcr__ = &kflcnRiscvProgramBcr_GA102;
118         }
119         else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000007e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 */
120         {
121             pThis->__kflcnRiscvProgramBcr__ = &kflcnRiscvProgramBcr_f2d351;
122         }
123     }
124 
125     // Hal function -- kflcnSwitchToFalcon
126     if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
127     {
128         if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0f800UL) )) /* ChipHal: GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */
129         {
130             pThis->__kflcnSwitchToFalcon__ = &kflcnSwitchToFalcon_GA10X;
131         }
132         else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000007e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 */
133         {
134             pThis->__kflcnSwitchToFalcon__ = &kflcnSwitchToFalcon_b3696a;
135         }
136     }
137 
138     pThis->__kflcnResetHw__ = NULL;
139 
140     // Hal function -- kflcnPreResetWait
141     if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
142     {
143         if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x0000f800UL) )) /* ChipHal: GA102 | GA103 | GA104 | GA106 | GA107 */
144         {
145             pThis->__kflcnPreResetWait__ = &kflcnPreResetWait_GA10X;
146         }
147         // default
148         else
149         {
150             pThis->__kflcnPreResetWait__ = &kflcnPreResetWait_56cd7a;
151         }
152     }
153 
154     // Hal function -- kflcnWaitForResetToFinish
155     if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
156     {
157         if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0f800UL) )) /* ChipHal: GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */
158         {
159             pThis->__kflcnWaitForResetToFinish__ = &kflcnWaitForResetToFinish_GA102;
160         }
161         else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000007e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 */
162         {
163             pThis->__kflcnWaitForResetToFinish__ = &kflcnWaitForResetToFinish_TU102;
164         }
165     }
166 
167     // Hal function -- kflcnReadIntrStatus
168     if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
169     {
170         if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000007e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 */
171         {
172             pThis->__kflcnReadIntrStatus__ = &kflcnReadIntrStatus_TU102;
173         }
174         else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0f800UL) )) /* ChipHal: GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */
175         {
176             pThis->__kflcnReadIntrStatus__ = &kflcnReadIntrStatus_GA102;
177         }
178     }
179 
180     // Hal function -- kflcnIntrRetrigger
181     if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
182     {
183         if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */
184         {
185             pThis->__kflcnIntrRetrigger__ = &kflcnIntrRetrigger_GA100;
186         }
187         else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
188         {
189             pThis->__kflcnIntrRetrigger__ = &kflcnIntrRetrigger_b3696a;
190         }
191     }
192 
193     // Hal function -- kflcnMaskImemAddr
194     if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
195     {
196         if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
197         {
198             pThis->__kflcnMaskImemAddr__ = &kflcnMaskImemAddr_TU102;
199         }
200         else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */
201         {
202             pThis->__kflcnMaskImemAddr__ = &kflcnMaskImemAddr_GA100;
203         }
204     }
205 
206     // Hal function -- kflcnMaskDmemAddr
207     if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000002UL) )) /* RmVariantHal: PF_KERNEL_ONLY */
208     {
209         if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
210         {
211             pThis->__kflcnMaskDmemAddr__ = &kflcnMaskDmemAddr_TU102;
212         }
213         else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */
214         {
215             pThis->__kflcnMaskDmemAddr__ = &kflcnMaskDmemAddr_GA100;
216         }
217     }
218 }
219 
220 void __nvoc_init_funcTable_KernelFalcon(KernelFalcon *pThis, RmHalspecOwner *pRmhalspecowner) {
221     __nvoc_init_funcTable_KernelFalcon_1(pThis, pRmhalspecowner);
222 }
223 
224 void __nvoc_init_KernelFalcon(KernelFalcon *pThis, RmHalspecOwner *pRmhalspecowner) {
225     pThis->__nvoc_pbase_KernelFalcon = pThis;
226     __nvoc_init_funcTable_KernelFalcon(pThis, pRmhalspecowner);
227 }
228 
229 #ifdef DEBUG
230 char __nvoc_class_id_uniqueness_check_0xabcf08 = 1;
231 #endif
232 
233 extern const struct NVOC_CLASS_DEF __nvoc_class_def_GenericKernelFalcon;
234 
235 extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelFalcon;
236 
237 extern const struct NVOC_CLASS_DEF __nvoc_class_def_IntrService;
238 
239 extern const struct NVOC_CLASS_DEF __nvoc_class_def_Object;
240 
241 void __nvoc_init_GenericKernelFalcon(GenericKernelFalcon*, RmHalspecOwner* );
242 void __nvoc_init_funcTable_GenericKernelFalcon(GenericKernelFalcon*);
243 NV_STATUS __nvoc_ctor_GenericKernelFalcon(GenericKernelFalcon*, RmHalspecOwner* , struct OBJGPU * arg_pGpu, KernelFalconEngineConfig * arg_pFalconConfig);
244 void __nvoc_init_dataField_GenericKernelFalcon(GenericKernelFalcon*);
245 void __nvoc_dtor_GenericKernelFalcon(GenericKernelFalcon*);
246 extern const struct NVOC_EXPORT_INFO __nvoc_export_info_GenericKernelFalcon;
247 
248 static const struct NVOC_RTTI __nvoc_rtti_GenericKernelFalcon_GenericKernelFalcon = {
249     /*pClassDef=*/          &__nvoc_class_def_GenericKernelFalcon,
250     /*dtor=*/               (NVOC_DYNAMIC_DTOR) &__nvoc_dtor_GenericKernelFalcon,
251     /*offset=*/             0,
252 };
253 
254 static const struct NVOC_RTTI __nvoc_rtti_GenericKernelFalcon_KernelFalcon = {
255     /*pClassDef=*/          &__nvoc_class_def_KernelFalcon,
256     /*dtor=*/               &__nvoc_destructFromBase,
257     /*offset=*/             NV_OFFSETOF(GenericKernelFalcon, __nvoc_base_KernelFalcon),
258 };
259 
260 static const struct NVOC_RTTI __nvoc_rtti_GenericKernelFalcon_IntrService = {
261     /*pClassDef=*/          &__nvoc_class_def_IntrService,
262     /*dtor=*/               &__nvoc_destructFromBase,
263     /*offset=*/             NV_OFFSETOF(GenericKernelFalcon, __nvoc_base_IntrService),
264 };
265 
266 static const struct NVOC_RTTI __nvoc_rtti_GenericKernelFalcon_Object = {
267     /*pClassDef=*/          &__nvoc_class_def_Object,
268     /*dtor=*/               &__nvoc_destructFromBase,
269     /*offset=*/             NV_OFFSETOF(GenericKernelFalcon, __nvoc_base_Object),
270 };
271 
272 static const struct NVOC_CASTINFO __nvoc_castinfo_GenericKernelFalcon = {
273     /*numRelatives=*/       4,
274     /*relatives=*/ {
275         &__nvoc_rtti_GenericKernelFalcon_GenericKernelFalcon,
276         &__nvoc_rtti_GenericKernelFalcon_Object,
277         &__nvoc_rtti_GenericKernelFalcon_IntrService,
278         &__nvoc_rtti_GenericKernelFalcon_KernelFalcon,
279     },
280 };
281 
282 const struct NVOC_CLASS_DEF __nvoc_class_def_GenericKernelFalcon =
283 {
284     /*classInfo=*/ {
285         /*size=*/               sizeof(GenericKernelFalcon),
286         /*classId=*/            classId(GenericKernelFalcon),
287         /*providerId=*/         &__nvoc_rtti_provider,
288 #if NV_PRINTF_STRINGS_ALLOWED
289         /*name=*/               "GenericKernelFalcon",
290 #endif
291     },
292     /*objCreatefn=*/        (NVOC_DYNAMIC_OBJ_CREATE) &__nvoc_objCreateDynamic_GenericKernelFalcon,
293     /*pCastInfo=*/          &__nvoc_castinfo_GenericKernelFalcon,
294     /*pExportInfo=*/        &__nvoc_export_info_GenericKernelFalcon
295 };
296 
297 static NV_STATUS __nvoc_thunk_GenericKernelFalcon_kflcnResetHw(struct OBJGPU *pGpu, struct KernelFalcon *pGenKernFlcn) {
298     return gkflcnResetHw(pGpu, (struct GenericKernelFalcon *)(((unsigned char *)pGenKernFlcn) - __nvoc_rtti_GenericKernelFalcon_KernelFalcon.offset));
299 }
300 
301 static void __nvoc_thunk_GenericKernelFalcon_intrservRegisterIntrService(struct OBJGPU *arg0, struct IntrService *arg1, IntrServiceRecord arg2[166]) {
302     gkflcnRegisterIntrService(arg0, (struct GenericKernelFalcon *)(((unsigned char *)arg1) - __nvoc_rtti_GenericKernelFalcon_IntrService.offset), arg2);
303 }
304 
305 static NV_STATUS __nvoc_thunk_GenericKernelFalcon_intrservServiceNotificationInterrupt(struct OBJGPU *arg0, struct IntrService *arg1, IntrServiceServiceNotificationInterruptArguments *arg2) {
306     return gkflcnServiceNotificationInterrupt(arg0, (struct GenericKernelFalcon *)(((unsigned char *)arg1) - __nvoc_rtti_GenericKernelFalcon_IntrService.offset), arg2);
307 }
308 
309 static NvBool __nvoc_thunk_IntrService_gkflcnClearInterrupt(struct OBJGPU *pGpu, struct GenericKernelFalcon *pIntrService, IntrServiceClearInterruptArguments *pParams) {
310     return intrservClearInterrupt(pGpu, (struct IntrService *)(((unsigned char *)pIntrService) + __nvoc_rtti_GenericKernelFalcon_IntrService.offset), pParams);
311 }
312 
313 static NvU32 __nvoc_thunk_IntrService_gkflcnServiceInterrupt(struct OBJGPU *pGpu, struct GenericKernelFalcon *pIntrService, IntrServiceServiceInterruptArguments *pParams) {
314     return intrservServiceInterrupt(pGpu, (struct IntrService *)(((unsigned char *)pIntrService) + __nvoc_rtti_GenericKernelFalcon_IntrService.offset), pParams);
315 }
316 
317 const struct NVOC_EXPORT_INFO __nvoc_export_info_GenericKernelFalcon =
318 {
319     /*numEntries=*/     0,
320     /*pExportEntries=*/  0
321 };
322 
323 void __nvoc_dtor_KernelFalcon(KernelFalcon*);
324 void __nvoc_dtor_IntrService(IntrService*);
325 void __nvoc_dtor_Object(Object*);
326 void __nvoc_dtor_GenericKernelFalcon(GenericKernelFalcon *pThis) {
327     __nvoc_dtor_KernelFalcon(&pThis->__nvoc_base_KernelFalcon);
328     __nvoc_dtor_IntrService(&pThis->__nvoc_base_IntrService);
329     __nvoc_dtor_Object(&pThis->__nvoc_base_Object);
330     PORT_UNREFERENCED_VARIABLE(pThis);
331 }
332 
333 void __nvoc_init_dataField_GenericKernelFalcon(GenericKernelFalcon *pThis) {
334     PORT_UNREFERENCED_VARIABLE(pThis);
335 }
336 
337 NV_STATUS __nvoc_ctor_KernelFalcon(KernelFalcon* , RmHalspecOwner* );
338 NV_STATUS __nvoc_ctor_IntrService(IntrService* );
339 NV_STATUS __nvoc_ctor_Object(Object* );
340 NV_STATUS __nvoc_ctor_GenericKernelFalcon(GenericKernelFalcon *pThis, RmHalspecOwner *pRmhalspecowner, struct OBJGPU * arg_pGpu, KernelFalconEngineConfig * arg_pFalconConfig) {
341     NV_STATUS status = NV_OK;
342     status = __nvoc_ctor_KernelFalcon(&pThis->__nvoc_base_KernelFalcon, pRmhalspecowner);
343     if (status != NV_OK) goto __nvoc_ctor_GenericKernelFalcon_fail_KernelFalcon;
344     status = __nvoc_ctor_IntrService(&pThis->__nvoc_base_IntrService);
345     if (status != NV_OK) goto __nvoc_ctor_GenericKernelFalcon_fail_IntrService;
346     status = __nvoc_ctor_Object(&pThis->__nvoc_base_Object);
347     if (status != NV_OK) goto __nvoc_ctor_GenericKernelFalcon_fail_Object;
348     __nvoc_init_dataField_GenericKernelFalcon(pThis);
349 
350     status = __nvoc_gkflcnConstruct(pThis, arg_pGpu, arg_pFalconConfig);
351     if (status != NV_OK) goto __nvoc_ctor_GenericKernelFalcon_fail__init;
352     goto __nvoc_ctor_GenericKernelFalcon_exit; // Success
353 
354 __nvoc_ctor_GenericKernelFalcon_fail__init:
355     __nvoc_dtor_Object(&pThis->__nvoc_base_Object);
356 __nvoc_ctor_GenericKernelFalcon_fail_Object:
357     __nvoc_dtor_IntrService(&pThis->__nvoc_base_IntrService);
358 __nvoc_ctor_GenericKernelFalcon_fail_IntrService:
359     __nvoc_dtor_KernelFalcon(&pThis->__nvoc_base_KernelFalcon);
360 __nvoc_ctor_GenericKernelFalcon_fail_KernelFalcon:
361 __nvoc_ctor_GenericKernelFalcon_exit:
362 
363     return status;
364 }
365 
366 static void __nvoc_init_funcTable_GenericKernelFalcon_1(GenericKernelFalcon *pThis) {
367     PORT_UNREFERENCED_VARIABLE(pThis);
368 
369     pThis->__gkflcnResetHw__ = &gkflcnResetHw_IMPL;
370 
371     pThis->__gkflcnRegisterIntrService__ = &gkflcnRegisterIntrService_IMPL;
372 
373     pThis->__gkflcnServiceNotificationInterrupt__ = &gkflcnServiceNotificationInterrupt_IMPL;
374 
375     pThis->__nvoc_base_KernelFalcon.__kflcnResetHw__ = &__nvoc_thunk_GenericKernelFalcon_kflcnResetHw;
376 
377     pThis->__nvoc_base_IntrService.__intrservRegisterIntrService__ = &__nvoc_thunk_GenericKernelFalcon_intrservRegisterIntrService;
378 
379     pThis->__nvoc_base_IntrService.__intrservServiceNotificationInterrupt__ = &__nvoc_thunk_GenericKernelFalcon_intrservServiceNotificationInterrupt;
380 
381     pThis->__gkflcnClearInterrupt__ = &__nvoc_thunk_IntrService_gkflcnClearInterrupt;
382 
383     pThis->__gkflcnServiceInterrupt__ = &__nvoc_thunk_IntrService_gkflcnServiceInterrupt;
384 }
385 
386 void __nvoc_init_funcTable_GenericKernelFalcon(GenericKernelFalcon *pThis) {
387     __nvoc_init_funcTable_GenericKernelFalcon_1(pThis);
388 }
389 
390 void __nvoc_init_KernelFalcon(KernelFalcon*, RmHalspecOwner* );
391 void __nvoc_init_IntrService(IntrService*);
392 void __nvoc_init_Object(Object*);
393 void __nvoc_init_GenericKernelFalcon(GenericKernelFalcon *pThis, RmHalspecOwner *pRmhalspecowner) {
394     pThis->__nvoc_pbase_GenericKernelFalcon = pThis;
395     pThis->__nvoc_pbase_KernelFalcon = &pThis->__nvoc_base_KernelFalcon;
396     pThis->__nvoc_pbase_IntrService = &pThis->__nvoc_base_IntrService;
397     pThis->__nvoc_pbase_Object = &pThis->__nvoc_base_Object;
398     __nvoc_init_KernelFalcon(&pThis->__nvoc_base_KernelFalcon, pRmhalspecowner);
399     __nvoc_init_IntrService(&pThis->__nvoc_base_IntrService);
400     __nvoc_init_Object(&pThis->__nvoc_base_Object);
401     __nvoc_init_funcTable_GenericKernelFalcon(pThis);
402 }
403 
404 NV_STATUS __nvoc_objCreate_GenericKernelFalcon(GenericKernelFalcon **ppThis, Dynamic *pParent, NvU32 createFlags, struct OBJGPU * arg_pGpu, KernelFalconEngineConfig * arg_pFalconConfig) {
405     NV_STATUS status;
406     Object *pParentObj;
407     GenericKernelFalcon *pThis;
408     RmHalspecOwner *pRmhalspecowner;
409 
410     status = __nvoc_handleObjCreateMemAlloc(createFlags, sizeof(GenericKernelFalcon), (void**)&pThis, (void**)ppThis);
411     if (status != NV_OK)
412         return status;
413 
414     portMemSet(pThis, 0, sizeof(GenericKernelFalcon));
415 
416     __nvoc_initRtti(staticCast(pThis, Dynamic), &__nvoc_class_def_GenericKernelFalcon);
417 
418     pThis->__nvoc_base_Object.createFlags = createFlags;
419 
420     if (pParent != NULL && !(createFlags & NVOC_OBJ_CREATE_FLAGS_PARENT_HALSPEC_ONLY))
421     {
422         pParentObj = dynamicCast(pParent, Object);
423         objAddChild(pParentObj, &pThis->__nvoc_base_Object);
424     }
425     else
426     {
427         pThis->__nvoc_base_Object.pParent = NULL;
428     }
429 
430     if ((pRmhalspecowner = dynamicCast(pParent, RmHalspecOwner)) == NULL)
431         pRmhalspecowner = objFindAncestorOfType(RmHalspecOwner, pParent);
432     NV_ASSERT_OR_RETURN(pRmhalspecowner != NULL, NV_ERR_INVALID_ARGUMENT);
433 
434     __nvoc_init_GenericKernelFalcon(pThis, pRmhalspecowner);
435     status = __nvoc_ctor_GenericKernelFalcon(pThis, pRmhalspecowner, arg_pGpu, arg_pFalconConfig);
436     if (status != NV_OK) goto __nvoc_objCreate_GenericKernelFalcon_cleanup;
437 
438     *ppThis = pThis;
439 
440     return NV_OK;
441 
442 __nvoc_objCreate_GenericKernelFalcon_cleanup:
443     // do not call destructors here since the constructor already called them
444     if (createFlags & NVOC_OBJ_CREATE_FLAGS_IN_PLACE_CONSTRUCT)
445         portMemSet(pThis, 0, sizeof(GenericKernelFalcon));
446     else
447         portMemFree(pThis);
448 
449     // coverity[leaked_storage:FALSE]
450     return status;
451 }
452 
453 NV_STATUS __nvoc_objCreateDynamic_GenericKernelFalcon(GenericKernelFalcon **ppThis, Dynamic *pParent, NvU32 createFlags, va_list args) {
454     NV_STATUS status;
455     struct OBJGPU * arg_pGpu = va_arg(args, struct OBJGPU *);
456     KernelFalconEngineConfig * arg_pFalconConfig = va_arg(args, KernelFalconEngineConfig *);
457 
458     status = __nvoc_objCreate_GenericKernelFalcon(ppThis, pParent, createFlags, arg_pGpu, arg_pFalconConfig);
459 
460     return status;
461 }
462 
463