1 #define NVOC_KERNEL_FIFO_H_PRIVATE_ACCESS_ALLOWED
2 #include "nvoc/runtime.h"
3 #include "nvoc/rtti.h"
4 #include "nvtypes.h"
5 #include "nvport/nvport.h"
6 #include "nvport/inline/util_valist.h"
7 #include "utils/nvassert.h"
8 #include "g_kernel_fifo_nvoc.h"
9 
10 #ifdef DEBUG
11 char __nvoc_class_id_uniqueness_check_0xf3e155 = 1;
12 #endif
13 
14 extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelFifo;
15 
16 extern const struct NVOC_CLASS_DEF __nvoc_class_def_Object;
17 
18 extern const struct NVOC_CLASS_DEF __nvoc_class_def_OBJENGSTATE;
19 
20 void __nvoc_init_KernelFifo(KernelFifo*, RmHalspecOwner* );
21 void __nvoc_init_funcTable_KernelFifo(KernelFifo*, RmHalspecOwner* );
22 NV_STATUS __nvoc_ctor_KernelFifo(KernelFifo*, RmHalspecOwner* );
23 void __nvoc_init_dataField_KernelFifo(KernelFifo*, RmHalspecOwner* );
24 void __nvoc_dtor_KernelFifo(KernelFifo*);
25 extern const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelFifo;
26 
27 static const struct NVOC_RTTI __nvoc_rtti_KernelFifo_KernelFifo = {
28     /*pClassDef=*/          &__nvoc_class_def_KernelFifo,
29     /*dtor=*/               (NVOC_DYNAMIC_DTOR) &__nvoc_dtor_KernelFifo,
30     /*offset=*/             0,
31 };
32 
33 static const struct NVOC_RTTI __nvoc_rtti_KernelFifo_Object = {
34     /*pClassDef=*/          &__nvoc_class_def_Object,
35     /*dtor=*/               &__nvoc_destructFromBase,
36     /*offset=*/             NV_OFFSETOF(KernelFifo, __nvoc_base_OBJENGSTATE.__nvoc_base_Object),
37 };
38 
39 static const struct NVOC_RTTI __nvoc_rtti_KernelFifo_OBJENGSTATE = {
40     /*pClassDef=*/          &__nvoc_class_def_OBJENGSTATE,
41     /*dtor=*/               &__nvoc_destructFromBase,
42     /*offset=*/             NV_OFFSETOF(KernelFifo, __nvoc_base_OBJENGSTATE),
43 };
44 
45 static const struct NVOC_CASTINFO __nvoc_castinfo_KernelFifo = {
46     /*numRelatives=*/       3,
47     /*relatives=*/ {
48         &__nvoc_rtti_KernelFifo_KernelFifo,
49         &__nvoc_rtti_KernelFifo_OBJENGSTATE,
50         &__nvoc_rtti_KernelFifo_Object,
51     },
52 };
53 
54 const struct NVOC_CLASS_DEF __nvoc_class_def_KernelFifo =
55 {
56     /*classInfo=*/ {
57         /*size=*/               sizeof(KernelFifo),
58         /*classId=*/            classId(KernelFifo),
59         /*providerId=*/         &__nvoc_rtti_provider,
60 #if NV_PRINTF_STRINGS_ALLOWED
61         /*name=*/               "KernelFifo",
62 #endif
63     },
64     /*objCreatefn=*/        (NVOC_DYNAMIC_OBJ_CREATE) &__nvoc_objCreateDynamic_KernelFifo,
65     /*pCastInfo=*/          &__nvoc_castinfo_KernelFifo,
66     /*pExportInfo=*/        &__nvoc_export_info_KernelFifo
67 };
68 
69 static NV_STATUS __nvoc_thunk_KernelFifo_engstateConstructEngine(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, ENGDESCRIPTOR engDesc) {
70     return kfifoConstructEngine(pGpu, (struct KernelFifo *)(((unsigned char *)pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), engDesc);
71 }
72 
73 static NV_STATUS __nvoc_thunk_KernelFifo_engstateStateLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, NvU32 flags) {
74     return kfifoStateLoad(pGpu, (struct KernelFifo *)(((unsigned char *)pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), flags);
75 }
76 
77 static NV_STATUS __nvoc_thunk_KernelFifo_engstateStateUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, NvU32 flags) {
78     return kfifoStateUnload(pGpu, (struct KernelFifo *)(((unsigned char *)pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), flags);
79 }
80 
81 static NV_STATUS __nvoc_thunk_KernelFifo_engstateStateInitLocked(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo) {
82     return kfifoStateInitLocked(pGpu, (struct KernelFifo *)(((unsigned char *)pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset));
83 }
84 
85 static void __nvoc_thunk_KernelFifo_engstateStateDestroy(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo) {
86     kfifoStateDestroy(pGpu, (struct KernelFifo *)(((unsigned char *)pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset));
87 }
88 
89 static NV_STATUS __nvoc_thunk_KernelFifo_engstateStatePostLoad(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, NvU32 flags) {
90     return kfifoStatePostLoad(pGpu, (struct KernelFifo *)(((unsigned char *)pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), flags);
91 }
92 
93 static NV_STATUS __nvoc_thunk_KernelFifo_engstateStatePreUnload(struct OBJGPU *pGpu, struct OBJENGSTATE *pKernelFifo, NvU32 flags) {
94     return kfifoStatePreUnload(pGpu, (struct KernelFifo *)(((unsigned char *)pKernelFifo) - __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), flags);
95 }
96 
97 static NV_STATUS __nvoc_thunk_OBJENGSTATE_kfifoStatePreLoad(POBJGPU pGpu, struct KernelFifo *pEngstate, NvU32 arg0) {
98     return engstateStatePreLoad(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), arg0);
99 }
100 
101 static NV_STATUS __nvoc_thunk_OBJENGSTATE_kfifoStatePostUnload(POBJGPU pGpu, struct KernelFifo *pEngstate, NvU32 arg0) {
102     return engstateStatePostUnload(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset), arg0);
103 }
104 
105 static NV_STATUS __nvoc_thunk_OBJENGSTATE_kfifoStateInitUnlocked(POBJGPU pGpu, struct KernelFifo *pEngstate) {
106     return engstateStateInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset));
107 }
108 
109 static void __nvoc_thunk_OBJENGSTATE_kfifoInitMissing(POBJGPU pGpu, struct KernelFifo *pEngstate) {
110     engstateInitMissing(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset));
111 }
112 
113 static NV_STATUS __nvoc_thunk_OBJENGSTATE_kfifoStatePreInitLocked(POBJGPU pGpu, struct KernelFifo *pEngstate) {
114     return engstateStatePreInitLocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset));
115 }
116 
117 static NV_STATUS __nvoc_thunk_OBJENGSTATE_kfifoStatePreInitUnlocked(POBJGPU pGpu, struct KernelFifo *pEngstate) {
118     return engstateStatePreInitUnlocked(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset));
119 }
120 
121 static NvBool __nvoc_thunk_OBJENGSTATE_kfifoIsPresent(POBJGPU pGpu, struct KernelFifo *pEngstate) {
122     return engstateIsPresent(pGpu, (struct OBJENGSTATE *)(((unsigned char *)pEngstate) + __nvoc_rtti_KernelFifo_OBJENGSTATE.offset));
123 }
124 
125 const struct NVOC_EXPORT_INFO __nvoc_export_info_KernelFifo =
126 {
127     /*numEntries=*/     0,
128     /*pExportEntries=*/  0
129 };
130 
131 void __nvoc_dtor_OBJENGSTATE(OBJENGSTATE*);
132 void __nvoc_dtor_KernelFifo(KernelFifo *pThis) {
133     __nvoc_kfifoDestruct(pThis);
134     __nvoc_dtor_OBJENGSTATE(&pThis->__nvoc_base_OBJENGSTATE);
135     PORT_UNREFERENCED_VARIABLE(pThis);
136 }
137 
138 void __nvoc_init_dataField_KernelFifo(KernelFifo *pThis, RmHalspecOwner *pRmhalspecowner) {
139     ChipHal *chipHal = &pRmhalspecowner->chipHal;
140     const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx;
141     RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal;
142     const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx;
143     PORT_UNREFERENCED_VARIABLE(pThis);
144     PORT_UNREFERENCED_VARIABLE(pRmhalspecowner);
145     PORT_UNREFERENCED_VARIABLE(chipHal);
146     PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx);
147     PORT_UNREFERENCED_VARIABLE(rmVariantHal);
148     PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx);
149 
150     // Hal field -- bUseChidHeap
151     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */
152     {
153         pThis->bUseChidHeap = ((NvBool)(0 == 0));
154     }
155 
156     // Hal field -- bUsePerRunlistChram
157     pThis->bUsePerRunlistChram = ((NvBool)(0 != 0));
158 
159     // Hal field -- bIsPerRunlistChramSupportedInHw
160     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */
161     {
162         pThis->bIsPerRunlistChramSupportedInHw = ((NvBool)(0 == 0));
163     }
164     // default
165     else
166     {
167         pThis->bIsPerRunlistChramSupportedInHw = ((NvBool)(0 != 0));
168     }
169 
170     // Hal field -- bHostEngineExpansion
171     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */
172     {
173         pThis->bHostEngineExpansion = ((NvBool)(0 == 0));
174     }
175     // default
176     else
177     {
178         pThis->bHostEngineExpansion = ((NvBool)(0 != 0));
179     }
180 
181     // Hal field -- bHostHasLbOverflow
182     // default
183     {
184         pThis->bHostHasLbOverflow = ((NvBool)(0 != 0));
185     }
186 
187     // Hal field -- bSubcontextSupported
188     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */
189     {
190         pThis->bSubcontextSupported = ((NvBool)(0 == 0));
191     }
192 
193     // Hal field -- bMixedInstmemApertureDefAllowed
194     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */
195     {
196         pThis->bMixedInstmemApertureDefAllowed = ((NvBool)(0 == 0));
197     }
198 
199     // Hal field -- bIsZombieSubctxWarEnabled
200     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */
201     {
202         pThis->bIsZombieSubctxWarEnabled = ((NvBool)(0 == 0));
203     }
204 
205     // Hal field -- bIsSchedSupported
206     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x11f0ffe0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 */
207     {
208         pThis->bIsSchedSupported = ((NvBool)(0 == 0));
209     }
210 
211     // Hal field -- bGuestGenenratesWorkSubmitToken
212     // default
213     {
214         pThis->bGuestGenenratesWorkSubmitToken = ((NvBool)(0 != 0));
215     }
216 
217     pThis->pBar1VF = ((void *)0);
218 
219     pThis->pBar1PrivVF = ((void *)0);
220 
221     pThis->pRegVF = ((void *)0);
222 }
223 
224 NV_STATUS __nvoc_ctor_OBJENGSTATE(OBJENGSTATE* );
225 NV_STATUS __nvoc_ctor_KernelFifo(KernelFifo *pThis, RmHalspecOwner *pRmhalspecowner) {
226     NV_STATUS status = NV_OK;
227     status = __nvoc_ctor_OBJENGSTATE(&pThis->__nvoc_base_OBJENGSTATE);
228     if (status != NV_OK) goto __nvoc_ctor_KernelFifo_fail_OBJENGSTATE;
229     __nvoc_init_dataField_KernelFifo(pThis, pRmhalspecowner);
230     goto __nvoc_ctor_KernelFifo_exit; // Success
231 
232 __nvoc_ctor_KernelFifo_fail_OBJENGSTATE:
233 __nvoc_ctor_KernelFifo_exit:
234 
235     return status;
236 }
237 
238 static void __nvoc_init_funcTable_KernelFifo_1(KernelFifo *pThis, RmHalspecOwner *pRmhalspecowner) {
239     ChipHal *chipHal = &pRmhalspecowner->chipHal;
240     const unsigned long chipHal_HalVarIdx = (unsigned long)chipHal->__nvoc_HalVarIdx;
241     RmVariantHal *rmVariantHal = &pRmhalspecowner->rmVariantHal;
242     const unsigned long rmVariantHal_HalVarIdx = (unsigned long)rmVariantHal->__nvoc_HalVarIdx;
243     PORT_UNREFERENCED_VARIABLE(pThis);
244     PORT_UNREFERENCED_VARIABLE(pRmhalspecowner);
245     PORT_UNREFERENCED_VARIABLE(chipHal);
246     PORT_UNREFERENCED_VARIABLE(chipHal_HalVarIdx);
247     PORT_UNREFERENCED_VARIABLE(rmVariantHal);
248     PORT_UNREFERENCED_VARIABLE(rmVariantHal_HalVarIdx);
249 
250     pThis->__kfifoConstructEngine__ = &kfifoConstructEngine_IMPL;
251 
252     // Hal function -- kfifoStateLoad
253     if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */
254     {
255         pThis->__kfifoStateLoad__ = &kfifoStateLoad_IMPL;
256     }
257     // default
258     else
259     {
260         pThis->__kfifoStateLoad__ = &kfifoStateLoad_56cd7a;
261     }
262 
263     // Hal function -- kfifoStateUnload
264     if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */
265     {
266         pThis->__kfifoStateUnload__ = &kfifoStateUnload_IMPL;
267     }
268     // default
269     else
270     {
271         pThis->__kfifoStateUnload__ = &kfifoStateUnload_56cd7a;
272     }
273 
274     pThis->__kfifoStateInitLocked__ = &kfifoStateInitLocked_IMPL;
275 
276     pThis->__kfifoStateDestroy__ = &kfifoStateDestroy_IMPL;
277 
278     // Hal function -- kfifoStatePostLoad
279     pThis->__kfifoStatePostLoad__ = &kfifoStatePostLoad_GM107;
280 
281     // Hal function -- kfifoStatePreUnload
282     pThis->__kfifoStatePreUnload__ = &kfifoStatePreUnload_GM107;
283 
284     // Hal function -- kfifoCheckChannelAllocAddrSpaces
285     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */
286     {
287         pThis->__kfifoCheckChannelAllocAddrSpaces__ = &kfifoCheckChannelAllocAddrSpaces_GH100;
288     }
289     // default
290     else
291     {
292         pThis->__kfifoCheckChannelAllocAddrSpaces__ = &kfifoCheckChannelAllocAddrSpaces_56cd7a;
293     }
294 
295     // Hal function -- kfifoConstructUsermodeMemdescs
296     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */
297     {
298         pThis->__kfifoConstructUsermodeMemdescs__ = &kfifoConstructUsermodeMemdescs_GH100;
299     }
300     else
301     {
302         pThis->__kfifoConstructUsermodeMemdescs__ = &kfifoConstructUsermodeMemdescs_GV100;
303     }
304 
305     // Hal function -- kfifoChannelGroupGetLocalMaxSubcontext
306     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
307     {
308         pThis->__kfifoChannelGroupGetLocalMaxSubcontext__ = &kfifoChannelGroupGetLocalMaxSubcontext_GM107;
309     }
310     else
311     {
312         pThis->__kfifoChannelGroupGetLocalMaxSubcontext__ = &kfifoChannelGroupGetLocalMaxSubcontext_GA100;
313     }
314 
315     // Hal function -- kfifoGetCtxBufferMapFlags
316     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */
317     {
318         pThis->__kfifoGetCtxBufferMapFlags__ = &kfifoGetCtxBufferMapFlags_GH100;
319     }
320     // default
321     else
322     {
323         pThis->__kfifoGetCtxBufferMapFlags__ = &kfifoGetCtxBufferMapFlags_b3696a;
324     }
325 
326     // Hal function -- kfifoEngineInfoXlate
327     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
328     {
329         pThis->__kfifoEngineInfoXlate__ = &kfifoEngineInfoXlate_GV100;
330     }
331     else
332     {
333         pThis->__kfifoEngineInfoXlate__ = &kfifoEngineInfoXlate_GA100;
334     }
335 
336     // Hal function -- kfifoGenerateWorkSubmitToken
337     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
338     {
339         pThis->__kfifoGenerateWorkSubmitToken__ = &kfifoGenerateWorkSubmitToken_TU102;
340     }
341     else
342     {
343         pThis->__kfifoGenerateWorkSubmitToken__ = &kfifoGenerateWorkSubmitToken_GA100;
344     }
345 
346     // Hal function -- kfifoUpdateUsermodeDoorbell
347     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
348     {
349         pThis->__kfifoUpdateUsermodeDoorbell__ = &kfifoUpdateUsermodeDoorbell_TU102;
350     }
351     else
352     {
353         pThis->__kfifoUpdateUsermodeDoorbell__ = &kfifoUpdateUsermodeDoorbell_GA100;
354     }
355 
356     // Hal function -- kfifoRunlistGetBaseShift
357     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */
358     {
359         pThis->__kfifoRunlistGetBaseShift__ = &kfifoRunlistGetBaseShift_GA100;
360     }
361     else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
362     {
363         pThis->__kfifoRunlistGetBaseShift__ = &kfifoRunlistGetBaseShift_GM107;
364     }
365     else
366     {
367         pThis->__kfifoRunlistGetBaseShift__ = &kfifoRunlistGetBaseShift_GA102;
368     }
369 
370     // Hal function -- kfifoGetUserdBar1MapStartOffset
371     if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */
372     {
373         pThis->__kfifoGetUserdBar1MapStartOffset__ = &kfifoGetUserdBar1MapStartOffset_VF;
374     }
375     else
376     {
377         pThis->__kfifoGetUserdBar1MapStartOffset__ = &kfifoGetUserdBar1MapStartOffset_4a4dee;
378     }
379 
380     // Hal function -- kfifoGetMaxCeChannelGroups
381     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
382     {
383         pThis->__kfifoGetMaxCeChannelGroups__ = &kfifoGetMaxCeChannelGroups_GV100;
384     }
385     else
386     {
387         pThis->__kfifoGetMaxCeChannelGroups__ = &kfifoGetMaxCeChannelGroups_GA100;
388     }
389 
390     // Hal function -- kfifoGetVChIdForSChId
391     if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */
392     {
393         pThis->__kfifoGetVChIdForSChId__ = &kfifoGetVChIdForSChId_c04480;
394     }
395     else
396     {
397         pThis->__kfifoGetVChIdForSChId__ = &kfifoGetVChIdForSChId_FWCLIENT;
398     }
399 
400     // Hal function -- kfifoProgramChIdTable
401     if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */
402     {
403         pThis->__kfifoProgramChIdTable__ = &kfifoProgramChIdTable_c04480;
404     }
405     else
406     {
407         pThis->__kfifoProgramChIdTable__ = &kfifoProgramChIdTable_56cd7a;
408     }
409 
410     // Hal function -- kfifoRecoverAllChannels
411     if (( ((rmVariantHal_HalVarIdx >> 5) == 0UL) && ((1UL << (rmVariantHal_HalVarIdx & 0x1f)) & 0x00000001UL) )) /* RmVariantHal: VF */
412     {
413         pThis->__kfifoRecoverAllChannels__ = &kfifoRecoverAllChannels_56cd7a;
414     }
415     else
416     {
417         pThis->__kfifoRecoverAllChannels__ = &kfifoRecoverAllChannels_92bfc3;
418     }
419 
420     // Hal function -- kfifoGetEnginePbdmaFaultIds
421     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
422     {
423         pThis->__kfifoGetEnginePbdmaFaultIds__ = &kfifoGetEnginePbdmaFaultIds_5baef9;
424     }
425     else
426     {
427         pThis->__kfifoGetEnginePbdmaFaultIds__ = &kfifoGetEnginePbdmaFaultIds_GA100;
428     }
429 
430     // Hal function -- kfifoGetNumPBDMAs
431     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
432     {
433         pThis->__kfifoGetNumPBDMAs__ = &kfifoGetNumPBDMAs_GM200;
434     }
435     else
436     {
437         pThis->__kfifoGetNumPBDMAs__ = &kfifoGetNumPBDMAs_GA100;
438     }
439 
440     // Hal function -- kfifoPrintPbdmaId
441     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
442     {
443         pThis->__kfifoPrintPbdmaId__ = &kfifoPrintPbdmaId_TU102;
444     }
445     else
446     {
447         pThis->__kfifoPrintPbdmaId__ = &kfifoPrintPbdmaId_GA100;
448     }
449 
450     // Hal function -- kfifoPrintInternalEngine
451     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */
452     {
453         pThis->__kfifoPrintInternalEngine__ = &kfifoPrintInternalEngine_GH100;
454     }
455     else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
456     {
457         pThis->__kfifoPrintInternalEngine__ = &kfifoPrintInternalEngine_TU102;
458     }
459     else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f00000UL) )) /* ChipHal: AD102 | AD103 | AD104 | AD106 | AD107 */
460     {
461         pThis->__kfifoPrintInternalEngine__ = &kfifoPrintInternalEngine_AD102;
462     }
463     else
464     {
465         pThis->__kfifoPrintInternalEngine__ = &kfifoPrintInternalEngine_GA100;
466     }
467 
468     // Hal function -- kfifoPrintInternalEngineCheck
469     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x100003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GH100 */
470     {
471         pThis->__kfifoPrintInternalEngineCheck__ = &kfifoPrintInternalEngineCheck_fa6e19;
472     }
473     else
474     {
475         pThis->__kfifoPrintInternalEngineCheck__ = &kfifoPrintInternalEngineCheck_GA100;
476     }
477 
478     // Hal function -- kfifoGetClientIdStringCommon
479     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */
480     {
481         pThis->__kfifoGetClientIdStringCommon__ = &kfifoGetClientIdStringCommon_GH100;
482     }
483     // default
484     else
485     {
486         pThis->__kfifoGetClientIdStringCommon__ = &kfifoGetClientIdStringCommon_95626c;
487     }
488 
489     // Hal function -- kfifoGetClientIdString
490     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */
491     {
492         pThis->__kfifoGetClientIdString__ = &kfifoGetClientIdString_GH100;
493     }
494     else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
495     {
496         pThis->__kfifoGetClientIdString__ = &kfifoGetClientIdString_TU102;
497     }
498     else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f00000UL) )) /* ChipHal: AD102 | AD103 | AD104 | AD106 | AD107 */
499     {
500         pThis->__kfifoGetClientIdString__ = &kfifoGetClientIdString_AD102;
501     }
502     else
503     {
504         pThis->__kfifoGetClientIdString__ = &kfifoGetClientIdString_GA100;
505     }
506 
507     // Hal function -- kfifoGetClientIdStringCheck
508     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
509     {
510         pThis->__kfifoGetClientIdStringCheck__ = &kfifoGetClientIdStringCheck_da47da;
511     }
512     else
513     {
514         pThis->__kfifoGetClientIdStringCheck__ = &kfifoGetClientIdStringCheck_GA100;
515     }
516 
517     pThis->__nvoc_base_OBJENGSTATE.__engstateConstructEngine__ = &__nvoc_thunk_KernelFifo_engstateConstructEngine;
518 
519     pThis->__nvoc_base_OBJENGSTATE.__engstateStateLoad__ = &__nvoc_thunk_KernelFifo_engstateStateLoad;
520 
521     pThis->__nvoc_base_OBJENGSTATE.__engstateStateUnload__ = &__nvoc_thunk_KernelFifo_engstateStateUnload;
522 
523     pThis->__nvoc_base_OBJENGSTATE.__engstateStateInitLocked__ = &__nvoc_thunk_KernelFifo_engstateStateInitLocked;
524 
525     pThis->__nvoc_base_OBJENGSTATE.__engstateStateDestroy__ = &__nvoc_thunk_KernelFifo_engstateStateDestroy;
526 
527     pThis->__nvoc_base_OBJENGSTATE.__engstateStatePostLoad__ = &__nvoc_thunk_KernelFifo_engstateStatePostLoad;
528 
529     pThis->__nvoc_base_OBJENGSTATE.__engstateStatePreUnload__ = &__nvoc_thunk_KernelFifo_engstateStatePreUnload;
530 
531     pThis->__kfifoStatePreLoad__ = &__nvoc_thunk_OBJENGSTATE_kfifoStatePreLoad;
532 
533     pThis->__kfifoStatePostUnload__ = &__nvoc_thunk_OBJENGSTATE_kfifoStatePostUnload;
534 
535     pThis->__kfifoStateInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kfifoStateInitUnlocked;
536 
537     pThis->__kfifoInitMissing__ = &__nvoc_thunk_OBJENGSTATE_kfifoInitMissing;
538 
539     pThis->__kfifoStatePreInitLocked__ = &__nvoc_thunk_OBJENGSTATE_kfifoStatePreInitLocked;
540 
541     pThis->__kfifoStatePreInitUnlocked__ = &__nvoc_thunk_OBJENGSTATE_kfifoStatePreInitUnlocked;
542 
543     pThis->__kfifoIsPresent__ = &__nvoc_thunk_OBJENGSTATE_kfifoIsPresent;
544 }
545 
546 void __nvoc_init_funcTable_KernelFifo(KernelFifo *pThis, RmHalspecOwner *pRmhalspecowner) {
547     __nvoc_init_funcTable_KernelFifo_1(pThis, pRmhalspecowner);
548 }
549 
550 void __nvoc_init_OBJENGSTATE(OBJENGSTATE*);
551 void __nvoc_init_KernelFifo(KernelFifo *pThis, RmHalspecOwner *pRmhalspecowner) {
552     pThis->__nvoc_pbase_KernelFifo = pThis;
553     pThis->__nvoc_pbase_Object = &pThis->__nvoc_base_OBJENGSTATE.__nvoc_base_Object;
554     pThis->__nvoc_pbase_OBJENGSTATE = &pThis->__nvoc_base_OBJENGSTATE;
555     __nvoc_init_OBJENGSTATE(&pThis->__nvoc_base_OBJENGSTATE);
556     __nvoc_init_funcTable_KernelFifo(pThis, pRmhalspecowner);
557 }
558 
559 NV_STATUS __nvoc_objCreate_KernelFifo(KernelFifo **ppThis, Dynamic *pParent, NvU32 createFlags)
560 {
561     NV_STATUS status;
562     Object *pParentObj = NULL;
563     KernelFifo *pThis;
564     RmHalspecOwner *pRmhalspecowner;
565 
566     // Assign `pThis`, allocating memory unless suppressed by flag.
567     status = __nvoc_handleObjCreateMemAlloc(createFlags, sizeof(KernelFifo), (void**)&pThis, (void**)ppThis);
568     if (status != NV_OK)
569         return status;
570 
571     // Zero is the initial value for everything.
572     portMemSet(pThis, 0, sizeof(KernelFifo));
573 
574     // Initialize runtime type information.
575     __nvoc_initRtti(staticCast(pThis, Dynamic), &__nvoc_class_def_KernelFifo);
576 
577     pThis->__nvoc_base_OBJENGSTATE.__nvoc_base_Object.createFlags = createFlags;
578 
579     // pParent must be a valid object that derives from a halspec owner class.
580     NV_ASSERT_OR_RETURN(pParent != NULL, NV_ERR_INVALID_ARGUMENT);
581 
582     // Link the child into the parent unless flagged not to do so.
583     if (!(createFlags & NVOC_OBJ_CREATE_FLAGS_PARENT_HALSPEC_ONLY))
584     {
585         pParentObj = dynamicCast(pParent, Object);
586         objAddChild(pParentObj, &pThis->__nvoc_base_OBJENGSTATE.__nvoc_base_Object);
587     }
588     else
589     {
590         pThis->__nvoc_base_OBJENGSTATE.__nvoc_base_Object.pParent = NULL;
591     }
592 
593     if ((pRmhalspecowner = dynamicCast(pParent, RmHalspecOwner)) == NULL)
594         pRmhalspecowner = objFindAncestorOfType(RmHalspecOwner, pParent);
595     NV_ASSERT_OR_RETURN(pRmhalspecowner != NULL, NV_ERR_INVALID_ARGUMENT);
596 
597     __nvoc_init_KernelFifo(pThis, pRmhalspecowner);
598     status = __nvoc_ctor_KernelFifo(pThis, pRmhalspecowner);
599     if (status != NV_OK) goto __nvoc_objCreate_KernelFifo_cleanup;
600 
601     // Assignment has no effect if NVOC_OBJ_CREATE_FLAGS_IN_PLACE_CONSTRUCT is set.
602     *ppThis = pThis;
603 
604     return NV_OK;
605 
606 __nvoc_objCreate_KernelFifo_cleanup:
607 
608     // Unlink the child from the parent if it was linked above.
609     if (pParentObj != NULL)
610         objRemoveChild(pParentObj, &pThis->__nvoc_base_OBJENGSTATE.__nvoc_base_Object);
611 
612     // Do not call destructors here since the constructor already called them.
613     if (createFlags & NVOC_OBJ_CREATE_FLAGS_IN_PLACE_CONSTRUCT)
614         portMemSet(pThis, 0, sizeof(KernelFifo));
615     else
616     {
617         portMemFree(pThis);
618         *ppThis = NULL;
619     }
620 
621     // coverity[leaked_storage:FALSE]
622     return status;
623 }
624 
625 NV_STATUS __nvoc_objCreateDynamic_KernelFifo(KernelFifo **ppThis, Dynamic *pParent, NvU32 createFlags, va_list args) {
626     NV_STATUS status;
627 
628     status = __nvoc_objCreate_KernelFifo(ppThis, pParent, createFlags);
629 
630     return status;
631 }
632 
633